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arch: arm: Add Cortex-R support

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This adds initial Cortex-R support for interrupts and context switching.

Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This commit is contained in:
Bradley Bolen 2018-06-25 09:15:14 -04:00 • committed by Ioannis Glaropoulos
commit c30a71df95
37 changed files with 1516 additions and 82 deletions
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11
include/arch/arm/asm_inline_gcc.h
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@ -90,6 +90,12 @@ static ALWAYS_INLINE unsigned int z_arch_irq_lock(void)
: "=r"(key), "=r"(tmp)
: "i"(_EXC_IRQ_DEFAULT_PRIO)
: "memory");
#elif defined(CONFIG_ARMV7_R)
__asm__ volatile("mrs %0, cpsr;"
"cpsid i"
: "=r" (key)
:
: "memory", "cc");
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
@ -132,6 +138,11 @@ static ALWAYS_INLINE void z_arch_irq_unlock(unsigned int key)
"msr BASEPRI, %0;"
"isb;"
: : "r"(key) : "memory");
#elif defined(CONFIG_ARMV7_R)
__asm__ volatile("msr cpsr_c, %0"
:
: "r" (key)
: "memory", "cc");
#else
#error Unknown ARM architecture
#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */