boards: shields: add support for the ARM Ltd. V2C DAPLink shield

Add support for the ARM DesignStart DAPLink board for Digilent Arty
S7/A7 (V2C DAPLink) shield.

This shield is designed to be used along with the ARM Cortex-M1/M3
DesignStart FPGA reference designs running on the Digilent Arty.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>

boards/shields/v2c_daplink/Kconfig.defconfig

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+# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
+# SPDX-License-Identifier: Apache-2.0
+
+if SHIELD_V2C_DAPLINK || SHIELD_V2C_DAPLINK_CFG
+
+if BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
+
+if DISK_ACCESS
+
+config SPI
+	default y
+
+config DISK_ACCESS_SDHC
+	default y
+
+config DISK_ACCESS_SPI_SDHC
+	default y
+
+endif # DISK_ACCESS
+
+endif # BOARD_ARTY_A7_ARM_DESIGNSTART_M1 || BOARD_ARTY_A7_ARM_DESIGNSTART_M3
+
+endif # SHIELD_V2C_DAPLINK || SHIELD_V2C_DAPLINK_CFG

boards/shields/v2c_daplink/Kconfig.shield

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+# Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
+# SPDX-License-Identifier: Apache-2.0
+
+config SHIELD_V2C_DAPLINK
+	def_bool $(shields_list_contains,v2c_daplink)
+
+config SHIELD_V2C_DAPLINK_CFG
+	def_bool $(shields_list_contains,v2c_daplink_cfg)

boards/shields/v2c_daplink/doc/index.rst

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+.. _v2c_daplink_shield:
+
+ARM V2C-DAPLink for DesignStart FPGA
+####################################
+
+Overview
+********
+
+The `ARM V2C-DAPLink for DesignStart FPGA`_ shield can be used to provide
+DAPLink debug access to the ARM DesignStart FPGA reference designs implemented
+on the :ref:`arty`.
+
+.. figure:: ./v2c_daplink.png
+   :width: 600px
+   :align: center
+   :alt: V2C-DAPLink
+
+   V2C-DAPLink (Credit: ARM Ltd.)
+
+In addition to DAPLink debug access, the V2C-DAPLink shield provides the
+following hardware features:
+
+- QSPI NOR flash
+- Micro-SD card slot
+
+Programming
+***********
+
+When using the V2C-DAPLink shield with the ``Cfg`` jumper (``J2``) open, the CPU
+will boot from ITCM and flashing can be performed automatically. The console is
+routed to USB connector ``J10`` on the :ref:`arty`. For example:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: arty_a7_arm_designstart_m1
+   :shield: v2c_daplink
+   :goals: flash
+
+When using the V2C-DAPLink shield with the ``Cfg`` jumper (``J2``) closed, the
+CPU will boot from the V2C-DAPLink QSPI NOR flash. The console is routed to USB
+connector ``J1`` on the V2C-DAPLink. Flashing needs to be done
+manually by copying the resulting ``zephyr/zephyr.bin`` file to the USB mass
+storage device provided by the V2C-DAPLink shield:
+
+.. zephyr-app-commands::
+   :zephyr-app: samples/hello_world
+   :board: arty_a7_arm_designstart_m1
+   :shield: v2c_daplink_cfg
+   :goals: build
+
+.. _ARM V2C-DAPLink for DesignStart FPGA:
+   https://developer.arm.com/tools-and-software/development-boards/designstart-daplink-board

boards/shields/v2c_daplink/v2c_daplink.overlay

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+/*
+ * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&daplink_gpio0 {
+	status = "okay";
+};
+
+&daplink_qspi_mux {
+	status = "okay";
+};
+
+&flash0 {
+	/*
+	* Disable the on-board flash until the jedec,spi-nor driver supports
+	* multiple instances.
+	*/
+	status = "disabled";
+};
+
+&daplink_quad_spi0 {
+	status = "okay";
+
+	daplink_flash0: flash@0 {
+		compatible = "spansion,s25fl128s", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		size = <DT_SIZE_M(128)>;
+		jedec-id = [01 20 18];
+		label = "DAPLINK_FLASH_0";
+	};
+};
+
+&daplink_single_spi0 {
+	status = "okay";
+
+	sdhc0: sdhc@0 {
+		compatible = "zephyr,mmc-spi-slot";
+		reg = <0>;
+		label = "SDHC_0";
+		spi-max-frequency = <25000000>;
+	};
+};

boards/shields/v2c_daplink/v2c_daplink_cfg.overlay

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+/*
+ * Copyright (c) 2020 Henrik Brix Andersen <henrik@brixandersen.dk>
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/delete-node/ &itcm;
+
+/ {
+	chosen {
+		zephyr,flash = &daplink_flash0;
+	};
+
+	soc {
+		daplink_flash0: flash@0 {
+			compatible = "soc-nv-flash";
+			reg = <0x00000000 DT_SIZE_M(1)>;
+		};
+
+		itcm: memory@10000000 {
+			compatible = "arm,itcm";
+			reg = <0x10000000 DT_SIZE_K(64)>;
+		};
+	};
+};
+
+&daplink_single_spi0 {
+	status = "okay";
+
+	sdhc0: sdhc@0 {
+		compatible = "zephyr,mmc-spi-slot";
+		reg = <0>;
+		label = "SDHC_0";
+		spi-max-frequency = <25000000>;
+	};
+};