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ext: hal: nordic: Update nrfx to version 1.7.1

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Updates nrfx to the recently released version. See
https://github.com/NordicSemiconductor/nrfx/blob/v1.7.1/CHANGELOG.md
for a list of changes that this version introduces.

Origin: nrfx
License: BSD 3-Clause
URL: https://github.com/NordicSemiconductor/nrfx/tree/v1.7.1
commit: 9d68726e41c321f1772c187bd12d82f5b13104f1
Purpose: Provide peripheral drivers for Nordic SoCs
Maintained-by: External

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This commit is contained in:
Andrzej Głąbek 2019-04-01 10:51:43 +02:00 • committed by Carles Cufí
commit c28fdc7a0f
99 changed files with 7359 additions and 5587 deletions
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8
ext/hal/nordic/nrfx/README
View file

@ -2,10 +2,10 @@ nrfx
####
Origin:
https://github.com/NordicSemiconductor/nrfx/tree/v1.6.2
https://github.com/NordicSemiconductor/nrfx/tree/v1.7.1
Status:
v1.6.2
v1.7.1
Purpose:
With added proper shims adapting it to Zephyr's APIs, nrfx will provide
@ -32,7 +32,7 @@ URL:
https://github.com/NordicSemiconductor/nrfx
commit:
6f54f689e9555ea18f9aca87caf44a3419e5dd7a
9d68726e41c321f1772c187bd12d82f5b13104f1
Maintained-by:
External
@ -41,4 +41,4 @@ License:
BSD-3-Clause
License Link:
https://github.com/NordicSemiconductor/nrfx/blob/v1.6.2/LICENSE
https://github.com/NordicSemiconductor/nrfx/blob/v1.7.1/LICENSE

41
ext/hal/nordic/nrfx/drivers/include/nrf_bitmask.h
View file

@ -45,14 +45,17 @@ extern "C" {
* @brief Bitmask managing module.
*/
/** @brief Macro for getting index of byte in byte stream where @c abs_bit is put. */
#define BITMASK_BYTE_GET(abs_bit) ((abs_bit)/8)
/** @brief Macro for getting relative index of bit in byte. */
#define BITMASK_RELBIT_GET(abs_bit) ((abs_bit) & 0x00000007)
/**
* Function for checking if bit in the multi-byte bit mask is set.
* @brief Function for checking if bit in the multi-byte bit mask is set.
*
* @param bit Bit index.
* @param p_mask A pointer to mask with bit fields.
* @param[in] bit Bit index.
* @param[in] p_mask Pointer to mask with bit fields.
*
* @return 0 if bit is not set, positive value otherwise.
*/
@ -65,10 +68,10 @@ __STATIC_INLINE uint32_t nrf_bitmask_bit_is_set(uint32_t bit, void const * p_mas
}
/**
* Function for setting a bit in the multi-byte bit mask.
* @brief Function for setting a bit in the multi-byte bit mask.
*
* @param bit Bit index.
* @param p_mask A pointer to mask with bit fields.
* @param[in] bit Bit index.
* @param[in] p_mask Pointer to mask with bit fields.
*/
__STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
{
@ -79,10 +82,10 @@ __STATIC_INLINE void nrf_bitmask_bit_set(uint32_t bit, void * p_mask)
}
/**
* Function for clearing a bit in the multi-byte bit mask.
* @brief Function for clearing a bit in the multi-byte bit mask.
*
* @param bit Bit index.
* @param p_mask A pointer to mask with bit fields.
* @param[in] bit Bit index.
* @param[in] p_mask Pointer to mask with bit fields.
*/
__STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
{
@ -93,12 +96,12 @@ __STATIC_INLINE void nrf_bitmask_bit_clear(uint32_t bit, void * p_mask)
}
/**
* Function for performing bitwise OR operation on two multi-byte bit masks.
* @brief Function for performing bitwise OR operation on two multi-byte bit masks.
*
* @param p_mask1 A pointer to the first bit mask.
* @param p_mask2 A pointer to the second bit mask.
* @param p_out_mask A pointer to the output bit mask.
* @param length Length of output mask in bytes.
* @param[in] p_mask1 Pointer to the first bit mask.
* @param[in] p_mask2 Pointer to the second bit mask.
* @param[in] p_out_mask Pointer to the output bit mask.
* @param[in] length Length of output mask in bytes.
*/
__STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1,
void const * p_mask2,
@ -116,12 +119,12 @@ __STATIC_INLINE void nrf_bitmask_masks_or(void const * p_mask1,
}
/**
* Function for performing bitwise AND operation on two multi-byte bit masks.
* @brief Function for performing bitwise AND operation on two multi-byte bit masks.
*
* @param p_mask1 A pointer to the first bit mask.
* @param p_mask2 A pointer to the second bit mask.
* @param p_out_mask A pointer to the output bit mask.
* @param length Length of output mask in bytes.
* @param[in] p_mask1 Pointer to the first bit mask.
* @param[in] p_mask2 Pointer to the second bit mask.
* @param[in] p_out_mask Pointer to the output bit mask.
* @param[in] length Length of output mask in bytes.
*/
__STATIC_INLINE void nrf_bitmask_masks_and(void const * p_mask1,
void const * p_mask2,

54
ext/hal/nordic/nrfx/drivers/include/nrfx_adc.h
View file

@ -46,35 +46,27 @@ extern "C" {
* @brief Analog-to-Digital Converter (ADC) peripheral driver.
*/
/**
* @brief Driver event types.
*/
/** @brief Driver event types. */
typedef enum
{
NRFX_ADC_EVT_DONE, ///< Event generated when the buffer is filled with samples.
NRFX_ADC_EVT_SAMPLE, ///< Event generated when the requested channel is sampled.
} nrfx_adc_evt_type_t;
/**
* @brief Analog-to-digital converter driver DONE event.
*/
/** @brief ADC driver DONE event structure. */
typedef struct
{
nrf_adc_value_t * p_buffer; ///< Pointer to the buffer with converted samples.
uint16_t size; ///< Number of samples in the buffer.
} nrfx_adc_done_evt_t;
/**
* @brief Analog-to-digital converter driver SAMPLE event.
*/
/** @brief SAMPLE event structure. */
typedef struct
{
nrf_adc_value_t sample; ///< Converted sample.
} nrfx_adc_sample_evt_t;
/**
* @brief Analog-to-digital converter driver event.
*/
/** @brief ADC driver event. */
typedef struct
{
nrfx_adc_evt_type_t type; ///< Event type.
@ -82,10 +74,10 @@ typedef struct
{
nrfx_adc_done_evt_t done; ///< Data for DONE event.
nrfx_adc_sample_evt_t sample; ///< Data for SAMPLE event.
} data;
} data; ///< Union to store event data.
} nrfx_adc_evt_t;
/**@brief Macro for initializing the ADC channel with the default configuration. */
/** @brief Macro for initializing the ADC channel with the default configuration. */
#define NRFX_ADC_DEFAULT_CHANNEL(analog_input) \
{ \
NULL, \
@ -98,7 +90,7 @@ typedef struct
} \
}
// Forward declaration of the nrfx_adc_channel_t type.
/** @brief Forward declaration of the nrfx_adc_channel_t type. */
typedef struct nrfx_adc_channel_s nrfx_adc_channel_t;
/**
@ -113,9 +105,7 @@ struct nrfx_adc_channel_s
nrf_adc_config_t config; ///< ADC configuration for the current channel.
};
/**
* @brief ADC configuration.
*/
/** @brief ADC configuration. */
typedef struct
{
uint8_t interrupt_priority; ///< Priority of ADC interrupt.
@ -142,11 +132,11 @@ typedef void (*nrfx_adc_event_handler_t)(nrfx_adc_evt_t const * p_event);
* If a valid event handler is provided, the driver is initialized in non-blocking mode.
* If event_handler is NULL, the driver works in blocking mode.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
*/
nrfx_err_t nrfx_adc_init(nrfx_adc_config_t const * p_config,
nrfx_adc_event_handler_t event_handler);
@ -169,6 +159,8 @@ void nrfx_adc_uninit(void);
*
* @note The channel instance variable @p p_channel is used by the driver as an item
* in a list. Therefore, it cannot be an automatic variable that is located on the stack.
*
* @param[in] p_channel Pointer to the channel instance.
*/
void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel);
@ -177,6 +169,8 @@ void nrfx_adc_channel_enable(nrfx_adc_channel_t * const p_channel);
*
* This function can be called only when there is no conversion in progress
* (the ADC is not busy).
*
* @param p_channel Pointer to the channel instance.
*/
void nrfx_adc_channel_disable(nrfx_adc_channel_t * const p_channel);
@ -206,11 +200,11 @@ void nrfx_adc_sample(void);
* fail if ADC is busy. The channel does not need to be enabled to perform a single conversion.
*
* @param[in] p_channel Channel.
* @param[out] p_value Pointer to the location where the result should be placed. Unless NULL is
* @param[out] p_value Pointer to the location where the result is to be placed. Unless NULL is
* provided, the function is blocking.
*
* @retval NRFX_SUCCESS If conversion was successful.
* @retval NRFX_ERROR_BUSY If the ADC driver is busy.
* @retval NRFX_SUCCESS Conversion was successful.
* @retval NRFX_ERROR_BUSY The ADC driver is busy.
*/
nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
nrf_adc_value_t * p_value);
@ -241,16 +235,16 @@ nrfx_err_t nrfx_adc_sample_convert(nrfx_adc_channel_t const * const p_channel,
* @param[in] buffer Result buffer.
* @param[in] size Buffer size in samples.
*
* @retval NRFX_SUCCESS If conversion was successful.
* @retval NRFX_ERROR_BUSY If the driver is busy.
* @retval NRFX_SUCCESS Conversion was successful.
* @retval NRFX_ERROR_BUSY The driver is busy.
*/
nrfx_err_t nrfx_adc_buffer_convert(nrf_adc_value_t * buffer, uint16_t size);
/**
* @brief Function for retrieving the ADC state.
*
* @retval true If the ADC is busy.
* @retval false If the ADC is ready.
* @retval true The ADC is busy.
* @retval false The ADC is ready.
*/
bool nrfx_adc_is_busy(void);
@ -273,12 +267,12 @@ __STATIC_INLINE uint32_t nrfx_adc_start_task_get(void)
#endif
/** @} */
void nrfx_adc_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

77
ext/hal/nordic/nrfx/drivers/include/nrfx_clock.h
View file

@ -47,9 +47,7 @@ extern "C" {
* @brief CLOCK peripheral driver.
*/
/**
* @brief Clock events.
*/
/** @brief Clock events. */
typedef enum
{
NRFX_CLOCK_EVT_HFCLK_STARTED, ///< HFCLK has been started.
@ -61,7 +59,7 @@ typedef enum
/**
* @brief Clock event handler.
*
* @param[in] event Event.
* @param[in] event Event.
*/
typedef void (*nrfx_clock_event_handler_t)(nrfx_clock_evt_type_t event);
@ -73,71 +71,57 @@ typedef void (*nrfx_clock_event_handler_t)(nrfx_clock_evt_type_t event);
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_ALREADY_INITIALIZED If the driver was already initialized.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_ALREADY_INITIALIZED The driver is already initialized.
*/
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler);
/**
* @brief Function for enabling interrupts in the clock module.
*/
/** @brief Function for enabling interrupts in the clock module. */
void nrfx_clock_enable(void);
/**
* @brief Function for disabling interrupts in the clock module.
*/
/** @brief Function for disabling interrupts in the clock module. */
void nrfx_clock_disable(void);
/**
* @brief Function for uninitializing the clock module.
*/
/** @brief Function for uninitializing the clock module. */
void nrfx_clock_uninit(void);
/**
* @brief Function for starting the LFCLK.
*/
/** @brief Function for starting the LFCLK. */
void nrfx_clock_lfclk_start(void);
/**
* @brief Function for stoping the LFCLK.
*/
/** @brief Function for stopping the LFCLK. */
void nrfx_clock_lfclk_stop(void);
/**
* @brief Function for checking the LFCLK state.
*
* @retval true If the LFCLK is running.
* @retval false If the LFCLK is not running.
* @retval true The LFCLK is running.
* @retval false The LFCLK is not running.
*/
__STATIC_INLINE bool nrfx_clock_lfclk_is_running(void);
/**
* @brief Function for starting the high-accuracy source HFCLK.
*/
/** @brief Function for starting the high-accuracy source HFCLK. */
void nrfx_clock_hfclk_start(void);
/**
* @brief Function for stoping external high-accuracy source HFCLK.
*/
/** @brief Function for stopping the external high-accuracy source HFCLK. */
void nrfx_clock_hfclk_stop(void);
/**
* @brief Function for checking the HFCLK state.
*
* @retval true If the HFCLK is running (XTAL source).
* @retval false If the HFCLK is not running.
* @retval true The HFCLK is running (XTAL source).
* @retval false The HFCLK is not running.
*/
__STATIC_INLINE bool nrfx_clock_hfclk_is_running(void);
/**
* @brief Function for starting calibration of internal LFCLK.
* @brief Function for starting the calibration of internal LFCLK.
*
* This function starts the calibration process. The process cannot be aborted. LFCLK and HFCLK
* must be running before this function is called.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_INVALID_STATE If the low-frequency of high-frequency clock is off.
* @retval NRFX_ERROR_BUSY If calibration is in progress.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_INVALID_STATE The low-frequency of high-frequency clock is off.
* @retval NRFX_ERROR_BUSY Clock is in the calibration phase.
*/
nrfx_err_t nrfx_clock_calibration_start(void);
@ -146,35 +130,34 @@ nrfx_err_t nrfx_clock_calibration_start(void);
*
* This function indicates that the system is in calibration phase.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If calibration is in progress.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY Clock is in the calibration phase.
*/
nrfx_err_t nrfx_clock_is_calibrating(void);
/**
* @brief Function for starting calibration timer.
* @param interval Time after which the CTTO event and interrupt will be generated (in 0.25 s units).
*
* @param[in] interval Time after which the CTTO event and interrupt will be generated (in 0.25 s units).
*/
void nrfx_clock_calibration_timer_start(uint8_t interval);
/**
* @brief Function for stoping calibration timer.
*/
/** @brief Function for stopping the calibration timer. */
void nrfx_clock_calibration_timer_stop(void);
/**@brief Function for returning a requested task address for the clock driver module.
*
* @param[in] task One of the peripheral tasks.
* @param[in] task One of the peripheral tasks.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_clock_ppi_task_addr(nrf_clock_task_t task);
/**@brief Function for returning a requested event address for the clock driver module.
*
* @param[in] event One of the peripheral events.
* @param[in] event One of the peripheral events.
*
* @return Event address.
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_clock_ppi_event_addr(nrf_clock_event_t event);
@ -201,12 +184,12 @@ __STATIC_INLINE bool nrfx_clock_lfclk_is_running(void)
}
#endif //SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_clock_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

63
ext/hal/nordic/nrfx/drivers/include/nrfx_comp.h
View file

@ -47,19 +47,20 @@ extern "C" {
*/
/**
* @brief Macro to convert the threshold voltage to an integer value
* @brief Macro for converting the threshold voltage to an integer value
* (needed by the COMP_TH register).
*
* @param[in] vol Voltage to be changed to COMP_TH register value. This value
* must not be smaller than reference voltage divided by 64.
* @param[in] ref Reference voltage.
* @param[in] vol Voltage to be changed to COMP_TH register value. This value
* must not be smaller than reference voltage divided by 64.
* @param[in] ref Reference voltage.
*/
#define NRFX_VOLTAGE_THRESHOLD_TO_INT(vol, ref) \
(uint8_t)(((vol) > ((ref) / 64)) ? (NRFX_ROUNDED_DIV((vol) * 64,(ref)) - 1) : 0)
/**
* @brief COMP event handler function type.
* @param[in] event COMP event.
*
* @param[in] event COMP event.
*/
typedef void (* nrfx_comp_event_handler_t)(nrf_comp_event_t event);
@ -88,7 +89,7 @@ typedef struct
nrf_comp_main_mode_t main_mode; /**< Main operation mode. */
nrf_comp_th_t threshold; /**< Structure holding THDOWN and THUP values needed by the COMP_TH register. */
nrf_comp_sp_mode_t speed_mode; /**< Speed and power mode. */
nrf_comp_hyst_t hyst; /**< Comparator hysteresis.*/
nrf_comp_hyst_t hyst; /**< Comparator hysteresis. */
#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
nrf_isource_t isource; /**< Current source selected on analog input. */
#endif
@ -108,6 +109,7 @@ typedef struct
#define NRFX_COMP_DEFAULT_CONFIG(_input) \
{ \
.reference = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF, \
.ext_ref = NRF_COMP_EXT_REF_0, \
.main_mode = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \
.threshold = NRFX_COMP_CONFIG_TH, \
.speed_mode = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE, \
@ -120,6 +122,7 @@ typedef struct
#define NRFX_COMP_DEFAULT_CONFIG(_input) \
{ \
.reference = (nrf_comp_ref_t)NRFX_COMP_CONFIG_REF, \
.ext_ref = NRF_COMP_EXT_REF_0, \
.main_mode = (nrf_comp_main_mode_t)NRFX_COMP_CONFIG_MAIN_MODE, \
.threshold = NRFX_COMP_CONFIG_TH, \
.speed_mode = (nrf_comp_sp_mode_t)NRFX_COMP_CONFIG_SPEED_MODE, \
@ -135,35 +138,34 @@ typedef struct
* This function initializes the COMP driver, but does not enable the peripheral or any interrupts.
* To start the driver, call the function @ref nrfx_comp_start() after initialization.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized.
* @retval NRFX_ERROR_BUSY If the LPCOMP peripheral is already in use.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver has already been initialized.
* @retval NRFX_ERROR_BUSY The LPCOMP peripheral is already in use.
* This is possible only if @ref nrfx_prs module
* is enabled.
*/
nrfx_err_t nrfx_comp_init(nrfx_comp_config_t const * p_config,
nrfx_comp_event_handler_t event_handler);
/**
* @brief Function for uninitializing the COMP driver.
* @brief Function for uninitializing the COMP driver.
*
* This function uninitializes the COMP driver. The COMP peripheral and
* its interrupts are disabled, and local variables are cleaned. After this call, you must
* initialize the driver again by calling nrfx_comp_init() if you want to use it.
* This function uninitializes the COMP driver. The COMP peripheral and
* its interrupts are disabled, and local variables are cleaned. After this call, you must
* initialize the driver again by calling nrfx_comp_init() if you want to use it.
*
* @sa nrfx_comp_stop()
* @sa nrfx_comp_stop
*/
void nrfx_comp_uninit(void);
/**
* @brief Function for setting the analog input.
*
* @param[in] psel COMP analog pin selection.
* @param[in] psel COMP analog pin selection.
*/
void nrfx_comp_pin_select(nrf_comp_input_t psel);
@ -173,38 +175,37 @@ void nrfx_comp_pin_select(nrf_comp_input_t psel);
* Before calling this function, the driver must be initialized. This function
* enables the COMP peripheral and its interrupts.
*
* @param[in] comp_evt_en_mask Mask of events to be enabled. This parameter should be built as
* 'or' of elements from @ref nrfx_comp_evt_en_mask_t.
* @param[in] comp_shorts_mask Mask of shorts to be enabled. This parameter should be built as
* 'or' of elements from @ref nrfx_comp_short_mask_t.
*
* @sa nrfx_comp_init()
* @param[in] comp_evt_en_mask Mask of events to be enabled. This parameter is to be built as
* an OR of elements from @ref nrfx_comp_evt_en_mask_t.
* @param[in] comp_shorts_mask Mask of shortcuts to be enabled. This parameter is to be built as
* an OR of elements from @ref nrfx_comp_short_mask_t.
*
* @sa nrfx_comp_init
*/
void nrfx_comp_start(uint32_t comp_evt_en_mask, uint32_t comp_shorts_mask);
/**@brief Function for stopping the COMP peripheral.
/**
* @brief Function for stopping the COMP peripheral.
*
* Before calling this function, the driver must be enabled. This function disables the COMP
* peripheral and its interrupts.
*
* @sa nrfx_comp_uninit()
*
* @sa nrfx_comp_uninit
*/
void nrfx_comp_stop(void);
/**
* @brief Function for copying the current state of the comparator result to the RESULT register.
*
* @retval 0 If the input voltage is below the threshold (VIN+ < VIN-).
* @retval 1 If the input voltage is above the threshold (VIN+ > VIN-).
* @retval 0 The input voltage is below the threshold (VIN+ < VIN-).
* @retval 1 The input voltage is above the threshold (VIN+ > VIN-).
*/
uint32_t nrfx_comp_sample(void);
/**
* @brief Function for getting the address of a COMP task.
*
* @param[in] task COMP task.
* @param[in] task COMP task.
*
* @return Address of the given COMP task.
*/
@ -225,12 +226,12 @@ __STATIC_INLINE uint32_t nrfx_comp_event_address_get(nrf_comp_event_t event)
return (uint32_t)nrf_comp_event_address_get(event);
}
/** @} */
void nrfx_comp_irq_handler(void);
/** @} **/
#ifdef __cplusplus
}
#endif

44
ext/hal/nordic/nrfx/drivers/include/nrfx_dppi.h
View file

@ -55,8 +55,8 @@ void nrfx_dppi_free(void);
*
* @param[out] p_channel Pointer to the DPPI channel number that has been allocated.
*
* @retval NRFX_SUCCESS If the channel was successfully allocated.
* @retval NRFX_ERROR_NO_MEM If there is no available channel to be used.
* @retval NRFX_SUCCESS The channel was successfully allocated.
* @retval NRFX_ERROR_NO_MEM There is no available channel to be used.
*/
nrfx_err_t nrfx_dppi_channel_alloc(uint8_t * p_channel);
@ -66,8 +66,8 @@ nrfx_err_t nrfx_dppi_channel_alloc(uint8_t * p_channel);
*
* @param[in] channel DPPI channel to be freed.
*
* @retval NRFX_SUCCESS If the channel was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM If the specified channel is not allocated.
* @retval NRFX_SUCCESS The channel was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM The specified channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_free(uint8_t channel);
@ -76,8 +76,8 @@ nrfx_err_t nrfx_dppi_channel_free(uint8_t channel);
*
* @param[in] channel DPPI channel to be enabled.
*
* @retval NRFX_SUCCESS If the channel was successfully enabled.
* @retval NRFX_ERROR_INVALID_PARAM If the specified channel is not allocated.
* @retval NRFX_SUCCESS The channel was successfully enabled.
* @retval NRFX_ERROR_INVALID_PARAM The specified channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_enable(uint8_t channel);
@ -86,8 +86,8 @@ nrfx_err_t nrfx_dppi_channel_enable(uint8_t channel);
*
* @param[in] channel DPPI channel to be disabled.
*
* @retval NRFX_SUCCESS If the channel was successfully disabled.
* @retval NRFX_ERROR_INVALID_PARAM If the specified channel is not allocated.
* @retval NRFX_SUCCESS The channel was successfully disabled.
* @retval NRFX_ERROR_INVALID_PARAM The specified channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_disable(uint8_t channel);
@ -97,8 +97,8 @@ nrfx_err_t nrfx_dppi_channel_disable(uint8_t channel);
*
* @param[out] p_group Pointer to the DPPI channel group that has been allocated.
*
* @retval NRFX_SUCCESS If the channel group was successfully allocated.
* @retval NRFX_ERROR_NO_MEM If there is no available channel group to be used.
* @retval NRFX_SUCCESS The channel group was successfully allocated.
* @retval NRFX_ERROR_NO_MEM There is no available channel group to be used.
*/
nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group);
@ -108,8 +108,8 @@ nrfx_err_t nrfx_dppi_group_alloc(nrf_dppi_channel_group_t * p_group);
*
* @param[in] group DPPI channel group to be freed.
*
* @retval NRFX_SUCCESS If the channel group was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
* @retval NRFX_SUCCESS The channel group was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_free(nrf_dppi_channel_group_t group);
@ -119,8 +119,8 @@ nrfx_err_t nrfx_dppi_group_free(nrf_dppi_channel_group_t group);
* @param[in] channel DPPI channel to be added.
* @param[in] group Channel group in which to include the channel.
*
* @retval NRFX_SUCCESS If the channel was successfully included.
* @retval NRFX_ERROR_INVALID_PARAM If the specified group or channel is not allocated.
* @retval NRFX_SUCCESS The channel was successfully included.
* @retval NRFX_ERROR_INVALID_PARAM The specified group or channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_include_in_group(uint8_t channel,
nrf_dppi_channel_group_t group);
@ -131,8 +131,8 @@ nrfx_err_t nrfx_dppi_channel_include_in_group(uint8_t channel,
* @param[in] channel DPPI channel to be removed.
* @param[in] group Channel group from which to remove the channel.
*
* @retval NRFX_SUCCESS If the channel was successfully removed.
* @retval NRFX_ERROR_INVALID_PARAM If the specified group or channel is not allocated.
* @retval NRFX_SUCCESS The channel was successfully removed.
* @retval NRFX_ERROR_INVALID_PARAM The specified group or channel is not allocated.
*/
nrfx_err_t nrfx_dppi_channel_remove_from_group(uint8_t channel,
nrf_dppi_channel_group_t group);
@ -142,8 +142,8 @@ nrfx_err_t nrfx_dppi_channel_remove_from_group(uint8_t channel,
*
* @param[in] group Channel group to be cleared.
*
* @retval NRFX_SUCCESS If the group was successfully cleared.
* @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
* @retval NRFX_SUCCESS The group was successfully cleared.
* @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_clear(nrf_dppi_channel_group_t group);
@ -152,8 +152,8 @@ nrfx_err_t nrfx_dppi_group_clear(nrf_dppi_channel_group_t group);
*
* @param[in] group Channel group to be enabled.
*
* @retval NRFX_SUCCESS If the group was successfully enabled.
* @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
* @retval NRFX_SUCCESS The group was successfully enabled.
* @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_enable(nrf_dppi_channel_group_t group);
@ -162,8 +162,8 @@ nrfx_err_t nrfx_dppi_group_enable(nrf_dppi_channel_group_t group);
*
* @param[in] group Channel group to be disabled.
*
* @retval NRFX_SUCCESS If the group was successfully disabled.
* @retval NRFX_ERROR_INVALID_PARAM If the specified group is not allocated.
* @retval NRFX_SUCCESS The group was successfully disabled.
* @retval NRFX_ERROR_INVALID_PARAM The specified group is not allocated.
*/
nrfx_err_t nrfx_dppi_group_disable(nrf_dppi_channel_group_t group);

197
ext/hal/nordic/nrfx/drivers/include/nrfx_gpiote.h
View file

@ -44,87 +44,102 @@ extern "C" {
* @defgroup nrfx_gpiote GPIOTE driver
* @{
* @ingroup nrf_gpiote
* @brief GPIOTE peripheral driver.
* @brief GPIO Task Event (GPIOTE) peripheral driver.
*/
/**@brief Input pin configuration. */
/** @brief Input pin configuration. */
typedef struct
{
nrf_gpiote_polarity_t sense; /**< Transition that triggers interrupt. */
nrf_gpiote_polarity_t sense; /**< Transition that triggers the interrupt. */
nrf_gpio_pin_pull_t pull; /**< Pulling mode. */
bool is_watcher : 1; /**< True when the input pin is tracking an output pin. */
bool hi_accuracy : 1; /**< True when high accuracy (IN_EVENT) is used. */
bool skip_gpio_setup : 1; /**< Do not change GPIO configuration */
} nrfx_gpiote_in_config_t;
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
* @details Set hi_accu to true to use IN_EVENT. */
/**
* @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
* @details Set hi_accu to true to use IN_EVENT.
*/
#define NRFX_GPIOTE_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
{ \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.pull = NRF_GPIO_PIN_NOPULL, \
.sense = NRF_GPIOTE_POLARITY_LOTOHI, \
}
{ \
.sense = NRF_GPIOTE_POLARITY_LOTOHI, \
.pull = NRF_GPIO_PIN_NOPULL, \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.skip_gpio_setup = false, \
}
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
* @details Set hi_accu to true to use IN_EVENT. */
/**
* @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
* @details Set hi_accu to true to use IN_EVENT.
*/
#define NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(hi_accu) \
{ \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.pull = NRF_GPIO_PIN_NOPULL, \
.sense = NRF_GPIOTE_POLARITY_HITOLO, \
}
{ \
.sense = NRF_GPIOTE_POLARITY_HITOLO, \
.pull = NRF_GPIO_PIN_NOPULL, \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.skip_gpio_setup = false, \
}
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
* @details Set hi_accu to true to use IN_EVENT.*/
/**
* @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
* @details Set hi_accu to true to use IN_EVENT.
*/
#define NRFX_GPIOTE_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
{ \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.pull = NRF_GPIO_PIN_NOPULL, \
.sense = NRF_GPIOTE_POLARITY_TOGGLE, \
}
{ \
.sense = NRF_GPIOTE_POLARITY_TOGGLE, \
.pull = NRF_GPIO_PIN_NOPULL, \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.skip_gpio_setup = false, \
}
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
/**
* @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect low-to-high transition.
* @details Set hi_accu to true to use IN_EVENT.
* @note This macro prepares configuration that skips GPIO setup. */
* @note This macro prepares configuration that skips the GPIO setup.
*/
#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_LOTOHI(hi_accu) \
{ \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.pull = NRF_GPIO_PIN_NOPULL, \
.sense = NRF_GPIOTE_POLARITY_LOTOHI, \
.skip_gpio_setup = true, \
}
{ \
.sense = NRF_GPIOTE_POLARITY_LOTOHI, \
.pull = NRF_GPIO_PIN_NOPULL, \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.skip_gpio_setup = true, \
}
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
/**
* @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect high-to-low transition.
* @details Set hi_accu to true to use IN_EVENT.
* @note This macro prepares configuration that skips GPIO setup. */
* @note This macro prepares configuration that skips the GPIO setup.
*/
#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_HITOLO(hi_accu) \
{ \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.pull = NRF_GPIO_PIN_NOPULL, \
.sense = NRF_GPIOTE_POLARITY_HITOLO, \
.skip_gpio_setup = true, \
}
{ \
.sense = NRF_GPIOTE_POLARITY_HITOLO, \
.pull = NRF_GPIO_PIN_NOPULL, \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.skip_gpio_setup = true, \
}
/**@brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
/**
* @brief Macro for configuring a pin to use a GPIO IN or PORT EVENT to detect any change on the pin.
* @details Set hi_accu to true to use IN_EVENT.
* @note This macro prepares configuration that skips GPIO setup. */
* @note This macro prepares configuration that skips the GPIO setup.
*/
#define NRFX_GPIOTE_RAW_CONFIG_IN_SENSE_TOGGLE(hi_accu) \
{ \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.pull = NRF_GPIO_PIN_NOPULL, \
.sense = NRF_GPIOTE_POLARITY_TOGGLE, \
.skip_gpio_setup = true, \
}
{ \
.sense = NRF_GPIOTE_POLARITY_TOGGLE, \
.pull = NRF_GPIO_PIN_NOPULL, \
.is_watcher = false, \
.hi_accuracy = hi_accu, \
.skip_gpio_setup = true, \
}
/**@brief Output pin configuration. */
/** @brief Output pin configuration. */
typedef struct
{
nrf_gpiote_polarity_t action; /**< Configuration of the pin task. */
@ -132,15 +147,18 @@ typedef struct
bool task_pin; /**< True if the pin is controlled by a GPIOTE task. */
} nrfx_gpiote_out_config_t;
/**@brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */
/** @brief Macro for configuring a pin to use as output. GPIOTE is not used for the pin. */
#define NRFX_GPIOTE_CONFIG_OUT_SIMPLE(init_high) \
{ \
.action = NRF_GPIOTE_POLARITY_LOTOHI, \
.init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \
.task_pin = false, \
.task_pin = false, \
}
/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low.
* @details The task will clear the pin. Therefore, the pin is set initially. */
/**
* @brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from high to low.
* @details The task will clear the pin. Therefore, the pin is set initially.
*/
#define NRFX_GPIOTE_CONFIG_OUT_TASK_LOW \
{ \
.init_state = NRF_GPIOTE_INITIAL_VALUE_HIGH, \
@ -148,22 +166,26 @@ typedef struct
.action = NRF_GPIOTE_POLARITY_HITOLO, \
}
/**@brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high.
* @details The task will set the pin. Therefore, the pin is cleared initially. */
/**
* @brief Macro for configuring a pin to use the GPIO OUT TASK to change the state from low to high.
* @details The task will set the pin. Therefore, the pin is cleared initially.
*/
#define NRFX_GPIOTE_CONFIG_OUT_TASK_HIGH \
{ \
.action = NRF_GPIOTE_POLARITY_LOTOHI, \
.init_state = NRF_GPIOTE_INITIAL_VALUE_LOW, \
.task_pin = true, \
.action = NRF_GPIOTE_POLARITY_LOTOHI, \
}
/**@brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state.
* @details The initial pin state must be provided. */
/**
* @brief Macro for configuring a pin to use the GPIO OUT TASK to toggle the pin state.
* @details The initial pin state must be provided.
*/
#define NRFX_GPIOTE_CONFIG_OUT_TASK_TOGGLE(init_high) \
{ \
.action = NRF_GPIOTE_POLARITY_TOGGLE, \
.init_state = init_high ? NRF_GPIOTE_INITIAL_VALUE_HIGH : NRF_GPIOTE_INITIAL_VALUE_LOW, \
.task_pin = true, \
.action = NRF_GPIOTE_POLARITY_TOGGLE, \
}
/** @brief Pin. */
@ -172,8 +194,8 @@ typedef uint32_t nrfx_gpiote_pin_t;
/**
* @brief Pin event handler prototype.
*
* @param pin Pin that triggered this event.
* @param action Action that lead to triggering this event.
* @param[in] pin Pin that triggered this event.
* @param[in] action Action that led to triggering this event.
*/
typedef void (*nrfx_gpiote_evt_handler_t)(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action);
@ -183,25 +205,23 @@ typedef void (*nrfx_gpiote_evt_handler_t)(nrfx_gpiote_pin_t pin, nrf_gpiote_pola
* @details Only static configuration is supported to prevent the shared
* resource being customized by the initiator.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
*/
nrfx_err_t nrfx_gpiote_init(void);
/**
* @brief Function for checking if the GPIOTE module is initialized.
*
* @details The GPIOTE module is a shared module. Therefore, you should check if
* @details The GPIOTE module is a shared module. Therefore, check if
* the module is already initialized and skip initialization if it is.
*
* @retval true If the module is already initialized.
* @retval false If the module is not initialized.
* @retval true The module is already initialized.
* @retval false The module is not initialized.
*/
bool nrfx_gpiote_is_init(void);
/**
* @brief Function for uninitializing the GPIOTE module.
*/
/** @brief Function for uninitializing the GPIOTE module. */
void nrfx_gpiote_uninit(void);
/**
@ -214,9 +234,9 @@ void nrfx_gpiote_uninit(void);
* @param[in] pin Pin.
* @param[in] p_config Initial configuration.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used.
* @retval NRFX_ERROR_NO_MEM If no GPIOTE channel is available.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is not initialized or the pin is already used.
* @retval NRFX_ERROR_NO_MEM No GPIOTE channel is available.
*/
nrfx_err_t nrfx_gpiote_out_init(nrfx_gpiote_pin_t pin,
nrfx_gpiote_out_config_t const * p_config);
@ -305,7 +325,7 @@ uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin);
* If high-accuracy mode is used, the driver attempts to allocate one
* of the available GPIOTE channels. If no channel is
* available, an error is returned.
* In low accuracy mode SENSE feature is used. In this case only one active pin
* In low accuracy mode SENSE feature is used. In this case, only one active pin
* can be detected at a time. It can be worked around by setting all of the used
* low accuracy pins to toggle mode.
* For more information about SENSE functionality, refer to Product Specification.
@ -314,9 +334,9 @@ uint32_t nrfx_gpiote_clr_task_addr_get(nrfx_gpiote_pin_t pin);
* @param[in] p_config Initial configuration.
* @param[in] evt_handler User function to be called when the configured transition occurs.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is not initialized or the pin is already used.
* @retval NRFX_ERROR_NO_MEM If no GPIOTE channel is available.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is not initialized or the pin is already used.
* @retval NRFX_ERROR_NO_MEM No GPIOTE channel is available.
*/
nrfx_err_t nrfx_gpiote_in_init(nrfx_gpiote_pin_t pin,
nrfx_gpiote_in_config_t const * p_config,
@ -335,8 +355,7 @@ void nrfx_gpiote_in_uninit(nrfx_gpiote_pin_t pin);
*
* @details If the input pin is configured as high-accuracy pin, the function
* enables an IN_EVENT. Otherwise, the function enables the GPIO sense mechanism.
* Note that a PORT event is shared between multiple pins, therefore the
* interrupt is always enabled.
* The PORT event is shared between multiple pins, therefore the interrupt is always enabled.
*
* @param[in] pin Pin.
* @param[in] int_enable True to enable the interrupt. Always valid for a high-accuracy pin.
@ -355,8 +374,8 @@ void nrfx_gpiote_in_event_disable(nrfx_gpiote_pin_t pin);
*
* @param[in] pin Pin.
*
* @retval true If the input pin is set.
* @retval false If the input pin is not set.
* @retval true The input pin is set.
* @retval false The input pin is not set.
*/
bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin);
@ -365,6 +384,8 @@ bool nrfx_gpiote_in_is_set(nrfx_gpiote_pin_t pin);
* @details If the pin is configured to use low-accuracy mode, the address of the PORT event is returned.
*
* @param[in] pin Pin.
*
* @return Address of the specified input pin event.
*/
uint32_t nrfx_gpiote_in_event_addr_get(nrfx_gpiote_pin_t pin);
@ -401,12 +422,12 @@ void nrfx_gpiote_set_task_trigger(nrfx_gpiote_pin_t pin);
void nrfx_gpiote_clr_task_trigger(nrfx_gpiote_pin_t pin);
#endif // defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
/** @} */
void nrfx_gpiote_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

71
ext/hal/nordic/nrfx/drivers/include/nrfx_i2s.h
View file

@ -82,13 +82,11 @@ typedef struct
/** @brief I2S driver buffers structure. */
typedef struct
{
uint32_t * p_rx_buffer;
uint32_t const * p_tx_buffer;
uint32_t * p_rx_buffer; ///< Pointer to the buffer for received data.
uint32_t const * p_tx_buffer; ///< Pointer to the buffer with data to be sent.
} nrfx_i2s_buffers_t;
/**
* @brief I2S driver default configuration.
*/
/** @brief I2S driver default configuration. */
#define NRFX_I2S_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_I2S_CONFIG_SCK_PIN, \
@ -108,28 +106,28 @@ typedef struct
#define NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED (1UL << 0)
/**< The application should provide buffers that are to be used in the next
* part of the transfer. A call to @ref nrfx_i2s_next_buffers_set should
/**< The application must provide buffers that are to be used in the next
* part of the transfer. A call to @ref nrfx_i2s_next_buffers_set must
* be done before the currently used buffers are completely processed
* (i.e. the time remaining for supplying the next buffers depends on
* (that is, the time remaining for supplying the next buffers depends on
* the used size of the buffers). */
/**
* @brief I2S driver data handler type.
*
* A data handling function of this type must be specified during initialization
* A data handling function of this type must be specified during the initialization
* of the driver. The driver will call this function when it finishes using
* buffers passed to it by the application, and when it needs to be provided
* with buffers for the next part of the transfer.
*
* @note The @c p_released pointer passed to this function is temporary and
* will be invalid after the function returns, hence it cannot be stored
* and used later. If needed, the pointed content (i.e. buffers pointers)
* should be copied instead.
* and used later. If needed, the pointed content (that is, buffers pointers)
* must be copied instead.
*
* @param[in] p_released Pointer to a structure with pointers to buffers
* passed previously to the driver that will no longer
* be access by it (they can be now safely released or
* be accessed by it (they can be now safely released or
* used for another purpose, in particular for a next
* part of the transfer).
* This pointer will be NULL if the application did not
@ -158,13 +156,13 @@ typedef void (* nrfx_i2s_data_handler_t)(nrfx_i2s_buffers_t const * p_released,
/**
* @brief Function for initializing the I2S driver.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] handler Data handler provided by the user. Must not be NULL.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Data handler provided by the user. Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_ERROR_INVALID_PARAM If the requested combination of configuration
* options is not allowed by the I2S peripheral.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
* @retval NRFX_ERROR_INVALID_PARAM The requested combination of configuration
* options is not allowed by the I2S peripheral.
*/
nrfx_err_t nrfx_i2s_init(nrfx_i2s_config_t const * p_config,
nrfx_i2s_data_handler_t handler);
@ -179,7 +177,7 @@ void nrfx_i2s_uninit(void);
* only, TX (transmission) only, or in both directions simultaneously.
* The mode is selected by specifying a proper buffer for a given direction
* in the call to this function or by passing NULL instead if this direction
* should be disabled.
* is to be disabled.
*
* The length of the buffer (which is a common value for RX and TX if both
* directions are enabled) is specified in 32-bit words. One 32-bit memory
@ -192,20 +190,20 @@ void nrfx_i2s_uninit(void);
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_initial_buffers Pointer to a structure specifying the buffers
* to be used in the initial part of the transfer
* (buffers for all consecutive parts are provided
* through the data handler).
* @param[in] buffer_size Size of the buffers (in 32-bit words).
* Must not be 0.
* @param[in] flags Transfer options (0 for default settings).
* Currently, no additional flags are available.
* @param[in] p_initial_buffers Pointer to a structure specifying the buffers
* to be used in the initial part of the transfer
* (buffers for all consecutive parts are provided
* through the data handler).
* @param[in] buffer_size Size of the buffers (in 32-bit words).
* Must not be 0.
* @param[in] flags Transfer options (0 for default settings).
* Currently, no additional flags are available.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_STATE If a transfer was already started or
* the driver has not been initialized.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed
* in the Data RAM region.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_INVALID_STATE Transfer was already started or
* the driver has not been initialized.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed
* in the Data RAM region.
*/
nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
uint16_t buffer_size,
@ -215,7 +213,7 @@ nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
* @brief Function for supplying the buffers to be used in the next part of
* the transfer.
*
* The application should call this function when the data handler receives
* The application must call this function when the data handler receives
* @ref NRFX_I2S_STATUS_NEXT_BUFFERS_NEEDED in the @c status parameter.
* The call can be done immediately from the data handler function or later,
* but it has to be done before the I2S peripheral finishes processing the
@ -223,9 +221,9 @@ nrfx_err_t nrfx_i2s_start(nrfx_i2s_buffers_t const * p_initial_buffers,
*
* @sa nrfx_i2s_data_handler_t
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or
* the peripheral is currently being stopped.
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_STATE If the buffers were already supplied or
* the peripheral is currently being stopped.
*/
nrfx_err_t nrfx_i2s_next_buffers_set(nrfx_i2s_buffers_t const * p_buffers);
@ -243,3 +241,4 @@ void nrfx_i2s_irq_handler(void);
#endif
#endif // NRFX_I2S_H__

67
ext/hal/nordic/nrfx/drivers/include/nrfx_lpcomp.h
View file

@ -48,7 +48,7 @@ extern "C" {
/**
* @brief LPCOMP event handler function type.
* @param[in] event LPCOMP event.
* @param[in] event LPCOMP event.
*/
typedef void (* nrfx_lpcomp_event_handler_t)(nrf_lpcomp_event_t event);
@ -60,24 +60,24 @@ typedef struct
uint8_t interrupt_priority; /**< LPCOMP interrupt priority. */
} nrfx_lpcomp_config_t;
/** @brief LPCOMP driver default configuration including the LPCOMP HAL configuration. */
/** @brief LPCOMP driver default configuration, including the LPCOMP HAL configuration. */
#ifdef NRF52_SERIES
#define NRFX_LPCOMP_DEFAULT_CONFIG \
{ \
.hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
(nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION, \
(nrf_lpcomp_hysteresis_t)NRFX_LPCOMP_CONFIG_HYST }, \
.input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
.interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
}
#define NRFX_LPCOMP_DEFAULT_CONFIG \
{ \
.hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
(nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION, \
(nrf_lpcomp_hysteresis_t)NRFX_LPCOMP_CONFIG_HYST }, \
.input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
.interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
}
#else
#define NRFX_LPCOMP_DEFAULT_CONFIG \
{ \
.hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
(nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION }, \
.input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
.interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
}
#define NRFX_LPCOMP_DEFAULT_CONFIG \
{ \
.hal = { (nrf_lpcomp_ref_t)NRFX_LPCOMP_CONFIG_REFERENCE , \
(nrf_lpcomp_detect_t)NRFX_LPCOMP_CONFIG_DETECTION }, \
.input = (nrf_lpcomp_input_t)NRFX_LPCOMP_CONFIG_INPUT, \
.interrupt_priority = NRFX_LPCOMP_CONFIG_IRQ_PRIORITY \
}
#endif
/**
@ -86,13 +86,13 @@ typedef struct
* This function initializes the LPCOMP driver, but does not enable the peripheral or any interrupts.
* To start the driver, call the function nrfx_lpcomp_enable() after initialization.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver has already been initialized.
* @retval NRFX_ERROR_BUSY If the COMP peripheral is already in use.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver has already been initialized.
* @retval NRFX_ERROR_BUSY The COMP peripheral is already in use.
* This is possible only if @ref nrfx_prs module
* is enabled.
*/
@ -100,39 +100,42 @@ nrfx_err_t nrfx_lpcomp_init(nrfx_lpcomp_config_t const * p_config,
nrfx_lpcomp_event_handler_t event_handler);
/**
* @brief Function for uninitializing the LCOMP driver.
* @brief Function for uninitializing the LCOMP driver.
*
* This function uninitializes the LPCOMP driver. The LPCOMP peripheral and
* its interrupts are disabled, and local variables are cleaned. After this call, you must
* initialize the driver again by calling nrfx_lpcomp_init() if you want to use it.
* This function uninitializes the LPCOMP driver. The LPCOMP peripheral and
* its interrupts are disabled, and local variables are cleaned. After this call, you must
* initialize the driver again by calling nrfx_lpcomp_init() if you want to use it.
*
* @sa nrfx_lpcomp_disable()
* @sa nrfx_lpcomp_init()
* @sa nrfx_lpcomp_disable
* @sa nrfx_lpcomp_init
*/
void nrfx_lpcomp_uninit(void);
/**@brief Function for enabling the LPCOMP peripheral and interrupts.
/**
* @brief Function for enabling the LPCOMP peripheral and interrupts.
*
* Before calling this function, the driver must be initialized. This function
* enables the LPCOMP peripheral and its interrupts.
*
* @sa nrfx_lpcomp_disable()
* @sa nrfx_lpcomp_disable
*/
void nrfx_lpcomp_enable(void);
/**@brief Function for disabling the LPCOMP peripheral.
/**
* @brief Function for disabling the LPCOMP peripheral.
*
* Before calling this function, the driver must be initialized. This function disables the LPCOMP
* peripheral and its interrupts.
*
* @sa nrfx_lpcomp_enable()
* @sa nrfx_lpcomp_enable
*/
void nrfx_lpcomp_disable(void);
/** @} */
void nrfx_lpcomp_irq_handler(void);
/** @} **/
#ifdef __cplusplus
}

94
ext/hal/nordic/nrfx/drivers/include/nrfx_nfct.h
View file

@ -52,9 +52,7 @@ extern "C" {
#define NRFX_NFCT_NFCID1_DEFAULT_LEN NRFX_NFCT_NFCID1_DOUBLE_SIZE ///< Default length of NFC ID. */
/**
* @brief NFCT hardware states.
*/
/** @brief NFCT hardware states. */
typedef enum
{
NRFX_NFCT_STATE_DISABLED = NRF_NFCT_TASK_DISABLE, ///< NFC Tag is disabled (no sensing of an external NFC field).
@ -74,7 +72,7 @@ typedef enum
NRFX_NFCT_ACTIVE_STATE_DEFAULT, ///< NFC Tag is either sleeping or idle, depending on the previous state before being selected by a poller.
} nrfx_nfct_active_state_t;
/**
/**
* @brief NFCT driver event types, passed to the upper-layer callback function
* provided during the initialization.
*/
@ -90,18 +88,14 @@ typedef enum
NRFX_NFCT_EVT_ERROR = NRF_NFCT_INT_ERROR_MASK, ///< Error occurred in an NFC communication.
} nrfx_nfct_evt_id_t;
/**
* @brief NFCT timing-related error types.
*/
/** @brief NFCT timing-related error types. */
typedef enum
{
NRFX_NFCT_ERROR_FRAMEDELAYTIMEOUT, ///< No response frame was transmitted to the poller in the transmit window.
NRFX_NFCT_ERROR_NUM, ///< Total number of possible errors.
} nrfx_nfct_error_t;
/**
* @brief NFCT driver parameter types.
*/
/** @brief NFCT driver parameter types. */
typedef enum
{
NRFX_NFCT_PARAM_ID_FDT, ///< NFC-A Frame Delay Time parameter.
@ -109,18 +103,14 @@ typedef enum
NRFX_NFCT_PARAM_ID_NFCID1, ///< NFC-A NFCID1 setting (NFC tag identifier).
} nrfx_nfct_param_id_t;
/**
* @brief NFCID1 descriptor.
*/
/** @brief NFCID1 descriptor. */
typedef struct
{
uint8_t const * p_id; ///< NFCID1 data.
uint8_t id_size; ///< NFCID1 size.
} nrfx_nfct_nfcid1_t;
/**
* @brief NFCT driver parameter descriptor.
*/
/** @brief NFCT driver parameter descriptor. */
typedef struct
{
nrfx_nfct_param_id_t id; ///< Type of parameter.
@ -129,46 +119,36 @@ typedef struct
uint32_t fdt; ///< NFC-A Frame Delay Time. Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_FDT.
uint8_t sel_res_protocol; ///< NFC-A value of the 'Protocol' field in the SEL_RES frame. Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_SEL_RES.
nrfx_nfct_nfcid1_t nfcid1; ///< NFC-A NFCID1 value (tag identifier). Filled when nrfx_nfct_param_t::id is @ref NRFX_NFCT_PARAM_ID_NFCID1.
} data;
} data; ///< Union to store parameter data.
} nrfx_nfct_param_t;
/**
* @brief NFCT driver RX/TX buffer descriptor.
*/
/** @brief NFCT driver RX/TX buffer descriptor. */
typedef struct
{
uint32_t data_size; ///< RX/TX buffer size.
uint8_t const * p_data; ///< RX/TX buffer.
} nrfx_nfct_data_desc_t;
/**
* @brief Structure used to describe the @ref NRFX_NFCT_EVT_RX_FRAMEEND event type.
*/
/** @brief Structure used to describe the @ref NRFX_NFCT_EVT_RX_FRAMEEND event type. */
typedef struct
{
uint32_t rx_status; ///< RX error status.
nrfx_nfct_data_desc_t rx_data; ///< RX buffer.
} nrfx_nfct_evt_rx_frameend_t;
/**
* @brief Structure used to describe the @ref NRFX_NFCT_EVT_TX_FRAMESTART event type.
*/
/** @brief Structure used to describe the @ref NRFX_NFCT_EVT_TX_FRAMESTART event type. */
typedef struct
{
nrfx_nfct_data_desc_t tx_data; ///< TX buffer.
} nrfx_nfct_evt_tx_framestart_t;
/**
* @brief Structure used to describe the @ref NRFX_NFCT_EVT_ERROR event type.
*/
/** @brief Structure used to describe the @ref NRFX_NFCT_EVT_ERROR event type. */
typedef struct
{
nrfx_nfct_error_t reason; ///< Reason for error.
} nrfx_nfct_evt_error_t;
/**
* @brief NFCT driver event.
*/
/** @brief NFCT driver event. */
typedef struct
{
nrfx_nfct_evt_id_t evt_id; ///< Type of event.
@ -177,32 +157,30 @@ typedef struct
nrfx_nfct_evt_rx_frameend_t rx_frameend; ///< End of the RX frame data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_RX_FRAMEEND.
nrfx_nfct_evt_tx_framestart_t tx_framestart; ///< Start of the TX frame data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_TX_FRAMESTART.
nrfx_nfct_evt_error_t error; ///< Error data. Filled when nrfx_nfct_evt_t::evt_id is @ref NRFX_NFCT_EVT_ERROR.
} params;
} params; ///< Union to store event data.
} nrfx_nfct_evt_t;
/**
/**
* @brief Callback descriptor to pass events from the NFCT driver to the upper layer.
*
* @param[in] p_event Pointer to the event descriptor.
*/
typedef void (*nrfx_nfct_handler_t)(nrfx_nfct_evt_t const * p_event);
/**
* @brief NFCT driver configuration structure.
*/
/** @brief NFCT driver configuration structure. */
typedef struct
{
uint32_t rxtx_int_mask; ///< Mask for enabling RX/TX events. Indicate which events must be forwarded to the upper layer by using @ref nrfx_nfct_evt_id_t. By default, no events are enabled. */
nrfx_nfct_handler_t cb; ///< Callback.
} nrfx_nfct_config_t;
/**
/**
* @brief Function for initializing the NFCT driver.
*
* @param[in] p_config Pointer to the NFCT driver configuration structure.
*
* @retval NRFX_SUCCESS If the NFCT driver was initialized successfully.
* @retval NRFX_ERROR_INVALID_STATE If the NFCT driver is already initialized.
* @retval NRFX_SUCCESS The NFCT driver was initialized successfully.
* @retval NRFX_ERROR_INVALID_STATE The NFCT driver is already initialized.
*/
nrfx_err_t nrfx_nfct_init(nrfx_nfct_config_t const * p_config);
@ -231,26 +209,26 @@ void nrfx_nfct_disable(void);
/**
* @brief Function for checking whether the external NFC field is present in the range of the tag.
*
* @retval true If the NFC field is present.
* @retval false If no NFC field is present.
* @retval true The NFC field is present.
* @retval false No NFC field is present.
*/
bool nrfx_nfct_field_check(void);
/**
/**
* @brief Function for preparing the NFCT driver for receiving an NFC frame.
*
* @param[in] p_rx_data Pointer to the RX buffer.
*/
void nrfx_nfct_rx(nrfx_nfct_data_desc_t const * p_rx_data);
/**
/**
* @brief Function for transmitting an NFC frame.
*
* @param[in] p_tx_data Pointer to the TX buffer.
* @param[in] delay_mode Delay mode of the NFCT frame timer.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_LENGTH If the TX buffer size is invalid.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_INVALID_LENGTH The TX buffer size is invalid.
*/
nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data,
nrf_nfct_frame_delay_mode_t delay_mode);
@ -265,7 +243,7 @@ nrfx_err_t nrfx_nfct_tx(nrfx_nfct_data_desc_t const * p_tx_data,
*/
void nrfx_nfct_state_force(nrfx_nfct_state_t state);
/**
/**
* @brief Function for moving the NFCT to a new initial substate within @ref NRFX_NFCT_STATE_ACTIVATED.
*
* @param[in] sub_state The required substate.
@ -279,12 +257,12 @@ void nrfx_nfct_init_substate_force(nrfx_nfct_active_state_t sub_state);
*
* @param[in] p_param Pointer to parameter descriptor.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_PARAM If the parameter data is invalid.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_INVALID_PARAM The parameter data is invalid.
*/
nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param);
/**
/**
* @brief Function for getting default bytes for NFCID1.
*
* @param[in,out] p_nfcid1_buff In: empty buffer for data;
@ -292,8 +270,8 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param);
* can be used to fill the Type 2 Tag Internal Bytes.
* @param[in] nfcid1_buff_len Length of the NFCID1 buffer.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_LENGTH If length of the NFCID buffer is different than
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_INVALID_LENGTH Length of the NFCID buffer is different than
* @ref NRFX_NFCT_NFCID1_SINGLE_SIZE,
* @ref NRFX_NFCT_NFCID1_DOUBLE_SIZE, or
* @ref NRFX_NFCT_NFCID1_TRIPLE_SIZE.
@ -301,7 +279,7 @@ nrfx_err_t nrfx_nfct_parameter_set(nrfx_nfct_param_t const * p_param);
nrfx_err_t nrfx_nfct_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff,
uint32_t nfcid1_buff_len);
/**
/**
* @brief Function for enabling the automatic collision resolution.
*
* @details As defined by the NFC Forum Digital Protocol Technical Specification (and ISO 14443-3),
@ -310,19 +288,19 @@ nrfx_err_t nrfx_nfct_nfcid1_default_bytes_get(uint8_t * const p_nfcid1_buff,
*/
void nrfx_nfct_autocolres_enable(void);
/**
/**
* @brief Function for disabling the automatic collision resolution.
*
* @details See also details in @ref nrfx_nfct_autocolres_enable.
*/
void nrfx_nfct_autocolres_disable(void);
/** @} */
void nrfx_nfct_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif
@ -338,7 +316,7 @@ void nrfx_nfct_irq_handler(void);
* - 79. NFCT: A false EVENTS_FIELDDETECTED event occurs after the field is lost.
* - 116. NFCT does not release HFCLK when switching from ACTIVATED to SENSE mode.
* To implement the first workaround, an instance of NRF_TIMER is used. After the NFC field is detected,
* the timing module periodically polls its state to determine when the field is turned off.
* the timing module periodically polls its state to determine when the field is turned off.
* To implement the second workaround, power reset is used to release the clock acquired by NFCT
* after the field is turned off. Note that the NFCT register configuration is restored to defaults.
*
@ -358,7 +336,7 @@ void nrfx_nfct_irq_handler(void);
* The application of the implemented workarounds for the nRF52840 chip is determined at runtime and depends
* on the chip variant.
*
* The current code contains a patch for the anomaly 25 (NFCT: Reset value of
* The current code contains a patch for the anomaly 25 (NFCT: Reset value of
* SENSRES register is incorrect), so that the module now works on Windows Phone.
* @}
*/

281
ext/hal/nordic/nrfx/drivers/include/nrfx_nvmc.h Normal file
View file

@ -0,0 +1,281 @@
/*
* Copyright (c) 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRFX_NVMC_H__
#define NRFX_NVMC_H__
#include <nrfx.h>
#include <hal/nrf_nvmc.h>
#include <hal/nrf_ficr.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrfx_nvmc NVMC driver
* @{
* @ingroup nrf_nvmc
* @brief Non-Volatile Memory Controller (NVMC) peripheral driver.
*/
/**
* @brief Function for erasing a page in flash.
*
* This function blocks until the erase operation finishes.
*
* @note Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @param address Address of the first word in the page to erase.
*
* @retval NRFX_SUCCESS Page erase complete.
* @retval NRFX_ERROR_INVALID_ADDR Address is not aligned to the size of the page.
*/
nrfx_err_t nrfx_nvmc_page_erase(uint32_t address);
/**
* @brief Function for erasing the user information configuration register (UICR).
*
* @note Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @retval NRFX_SUCCESS UICR has been successfully erased.
* @retval NRFX_ERROR_NOT_SUPPORTED UICR erase is not supported.
*/
nrfx_err_t nrfx_nvmc_uicr_erase(void);
/**
* @brief Function for erasing the whole flash memory.
*
* @note All user code and UICR will be erased.
*/
void nrfx_nvmc_all_erase(void);
#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
/**
* @brief Function for initiating a complete page erase split into parts (also known as partial erase).
*
* This function initiates a partial erase with the specified duration.
* To execute each part of the partial erase, use @ref nrfx_nvmc_page_partial_erase_continue.
*
* @param address Address of the first word in the page to erase.
* @param duration_ms Time in milliseconds that each partial erase will take.
*
* @retval NRFX_SUCCESS Partial erase started.
* @retval NRFX_ERROR_INVALID_ADDR Address is not aligned to the size of the page.
*
* @sa nrfx_nvmc_page_partial_erase_continue()
*/
nrfx_err_t nrfx_nvmc_page_partial_erase_init(uint32_t address, uint32_t duration_ms);
/**
* @brief Function for performing a part of the complete page erase (also known as partial erase).
*
* Each part takes the amount of time specified during the initialization.
* This function must be called several times to erase the whole page, once for each erase part.
*
* @note Using a page that was not completely erased leads to undefined behavior.
* Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @retval true Partial erase finished.
* @retval false Partial erase not finished.
* Call the function again to process the next part.
*/
bool nrfx_nvmc_page_partial_erase_continue(void);
#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
/**
* @brief Function for checking whether a byte is writable at the specified address.
*
* The NVMC is only able to write '0' to bits in the flash that are erased (set to '1').
* It cannot rewrite a bit back to '1'. This function checks if the value currently
* residing at the specified address can be transformed to the desired value
* without any '0' to '1' transitions.
*
* @param address Address to be checked.
* @param value Value to be checked.
*
* @retval true Byte can be written at the specified address.
* @retval false Byte cannot be written at the specified address.
* Erase the page or change the address.
*/
bool nrfx_nvmc_byte_writable_check(uint32_t address, uint8_t value);
/**
* @brief Function for writing a single byte to flash.
*
* To determine if the flash write has been completed, use @ref nrfx_nvmc_write_done_check().
*
* @note Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @param address Address to write to.
* @param value Value to write.
*/
void nrfx_nvmc_byte_write(uint32_t address, uint8_t value);
/**
* @brief Function for checking whether a word is writable at the specified address.
*
* The NVMC is only able to write '0' to bits in the Flash that are erased (set to '1').
* It cannot rewrite a bit back to '1'. This function checks if the value currently
* residing at the specified address can be transformed to the desired value
* without any '0' to '1' transitions.
*
* @param address Address to be checked. Must be word-aligned.
* @param value Value to be checked.
*
* @retval true Word can be written at the specified address.
* @retval false Word cannot be written at the specified address.
* Erase page or change address.
*/
bool nrfx_nvmc_word_writable_check(uint32_t address, uint32_t value);
/**
* @brief Function for writing a 32-bit word to flash.
*
* To determine if the flash write has been completed, use @ref nrfx_nvmc_write_done_check().
*
* @note Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @param address Address to write to. Must be word-aligned.
* @param value Value to write.
*/
void nrfx_nvmc_word_write(uint32_t address, uint32_t value);
/**
* @brief Function for writing consecutive bytes to flash.
*
* To determine if the last flash write has been completed, use @ref nrfx_nvmc_write_done_check().
*
* @note Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @param address Address to write to.
* @param src Pointer to the data to copy from.
* @param num_bytes Number of bytes to write.
*/
void nrfx_nvmc_bytes_write(uint32_t address, void const * src, uint32_t num_bytes);
/**
* @brief Function for writing consecutive words to flash.
*
* To determine if the last flash write has been completed, use @ref nrfx_nvmc_write_done_check().
*
* @note Depending on the source of the code being executed,
* the CPU may be halted during the operation.
* Refer to the Product Specification for more information.
*
* @param address Address to write to. Must be word-aligned.
* @param src Pointer to data to copy from. Must be word-aligned.
* @param num_words Number of words to write.
*/
void nrfx_nvmc_words_write(uint32_t address, void const * src, uint32_t num_words);
/**
* @brief Function for getting the total flash size in bytes.
*
* @return Flash total size in bytes.
*/
uint32_t nrfx_nvmc_flash_size_get(void);
/**
* @brief Function for getting the flash page size in bytes.
*
* @return Flash page size in bytes.
*/
uint32_t nrfx_nvmc_flash_page_size_get(void);
/**
* @brief Function for getting the flash page count.
*
* @return Flash page count.
*/
uint32_t nrfx_nvmc_flash_page_count_get(void);
/**
* @brief Function for checking if the last flash write has been completed.
*
* @retval true Last write completed successfully.
* @retval false Last write is still in progress.
*/
__STATIC_INLINE bool nrfx_nvmc_write_done_check(void);
#if defined(NRF_NVMC_ICACHE_PRESENT)
/**
* @brief Function for enabling the Instruction Cache (ICache).
*
* Enabling ICache reduces the amount of accesses to flash memory,
* which can boost performance and lower power consumption.
*/
__STATIC_INLINE void nrfx_nvmc_icache_enable(void);
/** @brief Function for disabling ICache. */
__STATIC_INLINE void nrfx_nvmc_icache_disable(void);
#endif // defined(NRF_NVMC_ICACHE_PRESENT)
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrfx_nvmc_write_done_check(void)
{
return nrf_nvmc_ready_check(NRF_NVMC);
}
#if defined(NRF_NVMC_ICACHE_PRESENT)
__STATIC_INLINE void nrfx_nvmc_icache_enable(void)
{
nrf_nvmc_icache_config_set(NRF_NVMC, NRF_NVMC_ICACHE_ENABLE_WITH_PROFILING);
}
__STATIC_INLINE void nrfx_nvmc_icache_disable(void)
{
nrf_nvmc_icache_config_set(NRF_NVMC, NRF_NVMC_ICACHE_DISABLE);
}
#endif // defined(NRF_NVMC_ICACHE_PRESENT)
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_NVMC_H__

75
ext/hal/nordic/nrfx/drivers/include/nrfx_pdm.h
View file

@ -46,32 +46,25 @@ extern "C" {
* @brief Pulse Density Modulation (PDM) peripheral driver.
*/
/** @brief Maximum supported PDM buffer size. */
#define NRFX_PDM_MAX_BUFFER_SIZE 32767
/**
* @brief PDM error type.
*/
/** @brief PDM error type. */
typedef enum
{
NRFX_PDM_NO_ERROR = 0,
NRFX_PDM_ERROR_OVERFLOW = 1
NRFX_PDM_NO_ERROR = 0, ///< No error.
NRFX_PDM_ERROR_OVERFLOW = 1 ///< Overflow error.
} nrfx_pdm_error_t;
/**
* @brief PDM event structure.
*/
/** @brief PDM event structure. */
typedef struct
{
bool buffer_requested; ///< Buffer request flag.
int16_t * buffer_released; ///< Pointer to the released buffer. Can be NULL.
nrfx_pdm_error_t error; ///< Error type.
bool buffer_requested; ///< Buffer request flag.
int16_t * buffer_released; ///< Pointer to the released buffer. Can be NULL.
nrfx_pdm_error_t error; ///< Error type.
} nrfx_pdm_evt_t;
/**
* @brief PDM interface driver configuration structure.
*/
/** @brief PDM interface driver configuration structure. */
typedef struct
{
nrf_pdm_mode_t mode; ///< Interface operation mode.
@ -86,7 +79,7 @@ typedef struct
/**
* @brief Macro for setting @ref nrfx_pdm_config_t to default settings
* in single ended mode.
* in the single-ended mode.
*
* @param _pin_clk CLK output pin.
* @param _pin_din DIN input pin.
@ -104,7 +97,7 @@ typedef struct
}
/**
* @brief Handler for PDM interface ready events.
* @brief Handler for the PDM interface ready events.
*
* This event handler is called on a buffer request, an error or when a buffer
* is full and ready to be processed.
@ -117,12 +110,12 @@ typedef void (*nrfx_pdm_event_handler_t)(nrfx_pdm_evt_t const * const p_evt);
/**
* @brief Function for initializing the PDM interface.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. Cannot be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
* @retval NRFX_ERROR_INVALID_PARAM If invalid configuration was specified.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
* @retval NRFX_ERROR_INVALID_PARAM Invalid configuration was specified.
*/
nrfx_err_t nrfx_pdm_init(nrfx_pdm_config_t const * p_config,
nrfx_pdm_event_handler_t event_handler);
@ -137,9 +130,9 @@ void nrfx_pdm_uninit(void);
/**
* @brief Function for getting the address of a PDM interface task.
*
* @param[in] task Task.
* @param[in] task Task.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task)
{
@ -149,8 +142,8 @@ __STATIC_INLINE uint32_t nrfx_pdm_task_address_get(nrf_pdm_task_t task)
/**
* @brief Function for getting the state of the PDM interface.
*
* @retval true If the PDM interface is enabled.
* @retval false If the PDM interface is disabled.
* @retval true The PDM interface is enabled.
* @retval false The PDM interface is disabled.
*/
__STATIC_INLINE bool nrfx_pdm_enable_check(void)
{
@ -158,46 +151,46 @@ __STATIC_INLINE bool nrfx_pdm_enable_check(void)
}
/**
* @brief Function for starting PDM sampling.
* @brief Function for starting the PDM sampling.
*
* @retval NRFX_SUCCESS If sampling was started successfully or was already in progress.
* @retval NRFX_ERROR_BUSY If a previous start/stop operation is in progress.
* @retval NRFX_SUCCESS Sampling was started successfully or was already in progress.
* @retval NRFX_ERROR_BUSY Previous start/stop operation is in progress.
*/
nrfx_err_t nrfx_pdm_start(void);
/**
* @brief Function for stopping PDM sampling.
* @brief Function for stopping the PDM sampling.
*
* When this function is called, the PDM interface is stopped after finishing
* the current frame.
* The event handler function might be called once more after calling this function.
*
* @retval NRFX_SUCCESS If sampling was stopped successfully or was already stopped before.
* @retval NRFX_ERROR_BUSY If a previous start/stop operation is in progress.
* @retval NRFX_SUCCESS Sampling was stopped successfully or was already stopped before.
* @retval NRFX_ERROR_BUSY Previous start/stop operation is in progress.
*/
nrfx_err_t nrfx_pdm_stop(void);
/**
* @brief Function for supplying the sample buffer.
* @brief Function for supplying the sample buffer.
*
* Call this function after every buffer request event.
*
* @param[in] buffer Pointer to the receive buffer. Cannot be NULL.
* @param[in] buffer_length Length of the receive buffer in 16-bit words.
* @param[in] buffer Pointer to the receive buffer. Cannot be NULL.
* @param[in] buffer_length Length of the receive buffer in 16-bit words.
*
* @retval NRFX_SUCCESS If the buffer was applied successfully.
* @retval NRFX_ERROR_BUSY If the buffer was already supplied or the peripheral is currently being stopped.
* @retval NRFX_ERROR_INVALID_STATE If the driver was not initialized.
* @retval NRFX_ERROR_INVALID_PARAM If invalid parameters were provided.
* @retval NRFX_SUCCESS The buffer was applied successfully.
* @retval NRFX_ERROR_BUSY The buffer was already supplied or the peripheral is currently being stopped.
* @retval NRFX_ERROR_INVALID_STATE The driver was not initialized.
* @retval NRFX_ERROR_INVALID_PARAM Invalid parameters were provided.
*/
nrfx_err_t nrfx_pdm_buffer_set(int16_t * buffer, uint16_t buffer_length);
/** @} */
void nrfx_pdm_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

114
ext/hal/nordic/nrfx/drivers/include/nrfx_power.h
View file

@ -92,26 +92,26 @@ typedef enum
*/
typedef enum
{
NRFX_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected */
NRFX_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready */
NRFX_POWER_USB_STATE_READY /**< From the power point of view USB is ready for working */
NRFX_POWER_USB_STATE_DISCONNECTED, /**< No power on USB lines detected. */
NRFX_POWER_USB_STATE_CONNECTED, /**< The USB power is detected, but USB power regulator is not ready. */
NRFX_POWER_USB_STATE_READY /**< From the power viewpoint, USB is ready for working. */
}nrfx_power_usb_state_t;
#endif /* NRF_POWER_HAS_USBREG */
/**
* @name Callback types
*
* Defined types of callback functions
* Defined types of callback functions.
* @{
*/
/**
* @brief Event handler for power failure warning
* @brief Event handler for power failure warning.
*/
typedef void (*nrfx_power_pofwarn_event_handler_t)(void);
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
* @brief Event handler for entering/exiting sleep
* @brief Event handler for the sleep events.
*
* @param event Event type
*/
@ -120,7 +120,7 @@ typedef void (*nrfx_power_sleep_event_handler_t)(nrfx_power_sleep_evt_t event);
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
* @brief Event handler for USB related power events
* @brief Event handler for the USB-related power events.
*
* @param event Event type
*/
@ -136,22 +136,22 @@ typedef void (*nrfx_power_usb_event_handler_t)(nrfx_power_usb_evt_t event);
typedef struct
{
/**
* @brief Enable main DCDC regulator
* @brief Enable main DCDC regulator.
*
* This bit only informs the driver that elements for DCDC regulator
* are installed and regulator can be used.
* The regulator would be enabled or disabled automatically
* are installed and the regulator can be used.
* The regulator will be enabled or disabled automatically
* by the hardware, basing on current power requirement.
*/
bool dcdcen:1;
#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__)
/**
* @brief Enable HV DCDC regulator
* @brief Enable HV DCDC regulator.
*
* This bit only informs the driver that elements for DCDC regulator
* are installed and regulator can be used.
* The regulator would be enabled or disabled automatically
* are installed and the regulator can be used.
* The regulator will be enabled or disabled automatically
* by the hardware, basing on current power requirement.
*/
bool dcdcenhv: 1;
@ -159,44 +159,44 @@ typedef struct
}nrfx_power_config_t;
/**
* @brief The configuration for power failure comparator
* @brief The configuration for power failure comparator.
*
* Configuration used to enable and configure power failure comparator
* Configuration used to enable and configure the power failure comparator.
*/
typedef struct
{
nrfx_power_pofwarn_event_handler_t handler; //!< Event handler
nrfx_power_pofwarn_event_handler_t handler; //!< Event handler.
#if NRF_POWER_HAS_POFCON || defined(__NRFX_DOXYGEN__)
nrf_power_pof_thr_t thr; //!< Threshold for power failure detection
#endif
#if NRF_POWER_HAS_VDDH || defined(__NRFX_DOXYGEN__)
nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on VDDH pin
nrf_power_pof_thrvddh_t thrvddh; //!< Threshold for power failure detection on the VDDH pin.
#endif
}nrfx_power_pofwarn_config_t;
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
* @brief The configuration of sleep event processing
* @brief The configuration of sleep event processing.
*
* Configuration used to enable and configure sleep event handling
* Configuration used to enable and configure sleep event handling.
*/
typedef struct
{
nrfx_power_sleep_event_handler_t handler; //!< Event handler
bool en_enter:1; //!< Enable event on sleep entering
bool en_exit :1; //!< Enable event on sleep exiting
nrfx_power_sleep_event_handler_t handler; //!< Event handler.
bool en_enter:1; //!< Enable event on sleep entering.
bool en_exit :1; //!< Enable event on sleep exiting.
}nrfx_power_sleepevt_config_t;
#endif
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
* @brief The configuration of USB related power events
* @brief The configuration of the USB-related power events.
*
* Configuration used to enable and configure USB power event handling
* Configuration used to enable and configure USB power event handling.
*/
typedef struct
{
nrfx_power_usb_event_handler_t handler; //!< Event processing
nrfx_power_usb_event_handler_t handler; //!< Event processing.
}nrfx_power_usbevt_config_t;
#endif /* NRF_POWER_HAS_USBREG */
@ -215,11 +215,11 @@ nrfx_power_usb_event_handler_t nrfx_power_usb_handler_get(void);
#endif
/**
* @brief Initialize power module driver
* @brief Function for initializing the power module driver.
*
* Enabled power module driver would process all the interrupts from power system.
* Enabled power module driver processes all the interrupts from the power system.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
*
* @retval NRFX_SUCCESS Successfully initialized.
* @retval NRFX_ERROR_ALREADY_INITIALIZED Module was already initialized.
@ -227,7 +227,7 @@ nrfx_power_usb_event_handler_t nrfx_power_usb_handler_get(void);
nrfx_err_t nrfx_power_init(nrfx_power_config_t const * p_config);
/**
* @brief Unintialize power module driver
* @brief Function for unintializing the power module driver.
*
* Disables all the interrupt handling in the module.
*
@ -237,36 +237,36 @@ void nrfx_power_uninit(void);
#if NRF_POWER_HAS_POFCON || defined(__NRFX_DOXYGEN__)
/**
* @brief Initialize power failure comparator
* @brief Function for initializing the power failure comparator.
*
* Configures the power failure comparator. This function does not setup and enable it.
* Those steps can be done with functions @ref nrfx_power_pof_enable and @ref nrfx_power_pof_disable
* or with Softdevice API (when Softdevice is using).
* Configures the power failure comparator. This function does not set it up and enable it.
* These steps can be done with functions @ref nrfx_power_pof_enable and @ref nrfx_power_pof_disable
* or with the SoftDevice API (when in use).
*
* @param[in] p_config Configuration with values and event handler.
* If event handler is set to NULL, interrupt would be disabled.
* If event handler is set to NULL, the interrupt will be disabled.
*/
void nrfx_power_pof_init(nrfx_power_pofwarn_config_t const * p_config);
/**
* @brief Enable power failure comparator
* Sets and enables interrupt of the power failure comparator. This functions cannot be using
* when Softdevice is enabled. If event handler set in init function is set to NULL, interrupt
* would be disabled.
* @brief Function for enabling the power failure comparator.
* Sets and enables the interrupt of the power failure comparator. This function cannot be in use
* when SoftDevice is enabled. If the event handler set in the init function is set to NULL, the interrupt
* will be disabled.
*
* @param[in] p_config Configuration with values and event handler.
*/
void nrfx_power_pof_enable(nrfx_power_pofwarn_config_t const * p_config);
/**
* @brief Disable the power failure comparator
* @brief Function for disabling the power failure comparator.
*
* Disables the power failure comparator interrupt.
*/
void nrfx_power_pof_disable(void);
/**
* @brief Clear the power failure comparator settings
* @brief Function for clearing the power failure comparator settings.
*
* Clears the settings of the power failure comparator.
*/
@ -275,9 +275,9 @@ void nrfx_power_pof_uninit(void);
#if NRF_POWER_HAS_SLEEPEVT || defined(__NRFX_DOXYGEN__)
/**
* @brief Initialize sleep entering and exiting events processing
* @brief Function for initializing the processing of the sleep events.
*
* Configures and setups the sleep event processing.
* Configures and sets up the sleep event processing.
*
* @param[in] p_config Configuration with values and event handler.
*
@ -287,19 +287,17 @@ void nrfx_power_pof_uninit(void);
void nrfx_power_sleepevt_init(nrfx_power_sleepevt_config_t const * p_config);
/**
* @brief Enable sleep entering and exiting events processing
* @brief Function for enabling the processing of the sleep events.
*
* @param[in] p_config Configuration with values and event handler.
*/
void nrfx_power_sleepevt_enable(nrfx_power_sleepevt_config_t const * p_config);
/**
* @brief Disable sleep entering and exiting events processing
*/
/** @brief Function for disabling the processing of the sleep events. */
void nrfx_power_sleepevt_disable(void);
/**
* @brief Uninitialize sleep entering and exiting events processing
* @brief Function for uninitializing the processing of the sleep events.
*
* @sa nrfx_power_sleepevt_init
*/
@ -308,9 +306,9 @@ void nrfx_power_sleepevt_uninit(void);
#if NRF_POWER_HAS_USBREG || defined(__NRFX_DOXYGEN__)
/**
* @brief Initialize USB power event processing
* @brief Function for initializing the processing of USB power event.
*
* Configures and setups the USB power event processing.
* Configures and sets up the USB power event processing.
*
* @param[in] p_config Configuration with values and event handler.
*
@ -318,27 +316,23 @@ void nrfx_power_sleepevt_uninit(void);
*/
void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config);
/**
* @brief Enable USB power event processing
*/
/** @brief Function for enabling the processing of USB power event. */
void nrfx_power_usbevt_enable(void);
/**
* @brief Disable USB power event processing
*/
/** @brief Function for disabling the processing of USB power event. */
void nrfx_power_usbevt_disable(void);
/**
* @brief Uninitalize USB power event processing
* @brief Function for uninitalizing the processing of USB power event.
*
* @sa nrfx_power_usbevt_init
*/
void nrfx_power_usbevt_uninit(void);
/**
* @brief Get the status of USB power
* @brief Function for getting the status of USB power.
*
* @return Current USB power status
* @return Current USB power status.
*/
__STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void);
@ -364,12 +358,12 @@ __STATIC_INLINE nrfx_power_usb_state_t nrfx_power_usbstatus_get(void)
#endif /* SUPPRESS_INLINE_IMPLEMENTATION */
/** @} */
void nrfx_power_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

4
ext/hal/nordic/nrfx/drivers/include/nrfx_power_clock.h
View file

@ -47,13 +47,15 @@ __STATIC_INLINE void nrfx_power_clock_irq_init(void)
uint8_t priority;
#if NRFX_CHECK(NRFX_POWER_ENABLED) && NRFX_CHECK(NRFX_CLOCK_ENABLED)
#if NRFX_POWER_CONFIG_IRQ_PRIORITY != NRFX_CLOCK_CONFIG_IRQ_PRIORITY
#error "IRQ priority for POWER and CLOCK have to be the same. Check <nrfx_config.h>."
#error "IRQ priorities for POWER and CLOCK must be the same. Check <nrfx_config.h>."
#endif
priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
#elif NRFX_CHECK(NRFX_POWER_ENABLED)
priority = NRFX_POWER_CONFIG_IRQ_PRIORITY;
#elif NRFX_CHECK(NRFX_CLOCK_ENABLED)
priority = NRFX_CLOCK_CONFIG_IRQ_PRIORITY;
#else
#error "This code is not supposed to be compiled when neither POWER nor CLOCK is enabled."
#endif
if (!NRFX_IRQ_IS_ENABLED(nrfx_get_irq_number(NRF_CLOCK)))

119
ext/hal/nordic/nrfx/drivers/include/nrfx_ppi.h
View file

@ -46,23 +46,28 @@
extern "C" {
#endif
#ifndef NRFX_PPI_CHANNELS_USED
#if !defined (NRFX_PPI_CHANNELS_USED) || defined(__NRFX_DOXYGEN__)
/** @brief Bitfield representing PPI channels used by external modules. */
#define NRFX_PPI_CHANNELS_USED 0
#endif
#ifndef NRFX_PPI_GROUPS_USED
#if !defined(NRFX_PPI_GROUPS_USED) || defined(__NRFX_DOXYGEN__)
/** @brief Bitfield representing PPI groups used by external modules. */
#define NRFX_PPI_GROUPS_USED 0
#endif
#if PPI_CH_NUM > 16
#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFFFFFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */
#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x000FFFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */
#if (PPI_CH_NUM > 16) || defined(__NRFX_DOXYGEN__)
/** @brief Bitfield representing all PPI channels available to the application. */
#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFFFFFFFuL & ~(NRFX_PPI_CHANNELS_USED))
/** @brief Bitfield representing programmable PPI channels available to the application. */
#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x000FFFFFuL & ~(NRFX_PPI_CHANNELS_USED))
#else
#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFF0FFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< All PPI channels available to the application. */
#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x0000FFFFuL & ~(NRFX_PPI_CHANNELS_USED)) /**< Programmable PPI channels available to the application. */
#define NRFX_PPI_ALL_APP_CHANNELS_MASK ((uint32_t)0xFFF0FFFFuL & ~(NRFX_PPI_CHANNELS_USED))
#define NRFX_PPI_PROG_APP_CHANNELS_MASK ((uint32_t)0x0000FFFFuL & ~(NRFX_PPI_CHANNELS_USED))
#endif
#define NRFX_PPI_ALL_APP_GROUPS_MASK (((1uL << PPI_GROUP_NUM) - 1) & ~(NRFX_PPI_GROUPS_USED)) /**< All PPI groups available to the application. */
/** @brief Bitfield representing all PPI groups available to the application. */
#define NRFX_PPI_ALL_APP_GROUPS_MASK (((1uL << PPI_GROUP_NUM) - 1) & ~(NRFX_PPI_GROUPS_USED))
/**
* @brief Function for uninitializing the PPI module.
@ -77,8 +82,8 @@ void nrfx_ppi_free_all(void);
*
* @param[out] p_channel Pointer to the PPI channel that has been allocated.
*
* @retval NRFX_SUCCESS If the channel was successfully allocated.
* @retval NRFX_ERROR_NO_MEM If there is no available channel to be used.
* @retval NRFX_SUCCESS The channel was successfully allocated.
* @retval NRFX_ERROR_NO_MEM There is no available channel to be used.
*/
nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel);
@ -88,8 +93,8 @@ nrfx_err_t nrfx_ppi_channel_alloc(nrf_ppi_channel_t * p_channel);
*
* @param[in] channel PPI channel to be freed.
*
* @retval NRFX_SUCCESS If the channel was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable.
* @retval NRFX_SUCCESS The channel was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM The channel is not user-configurable.
*/
nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel);
@ -100,21 +105,21 @@ nrfx_err_t nrfx_ppi_channel_free(nrf_ppi_channel_t channel);
* @param[in] eep Event endpoint address.
* @param[in] tep Task endpoint address.
*
* @retval NRFX_SUCCESS If the channel was successfully assigned.
* @retval NRFX_ERROR_INVALID_STATE If the channel is not allocated for the user.
* @retval NRFX_ERROR_INVALID_PARAM If the channel is not user-configurable.
* @retval NRFX_SUCCESS The channel was successfully assigned.
* @retval NRFX_ERROR_INVALID_STATE The channel is not allocated for the user.
* @retval NRFX_ERROR_INVALID_PARAM The channel is not user-configurable.
*/
nrfx_err_t nrfx_ppi_channel_assign(nrf_ppi_channel_t channel, uint32_t eep, uint32_t tep);
/**
* @brief Function for assigning or clearing fork endpoint to the PPI channel.
* @brief Function for assigning fork endpoint to the PPI channel or clearing it.
*
* @param[in] channel PPI channel to be assigned endpoints.
* @param[in] fork_tep Fork task endpoint address or 0 to clear.
*
* @retval NRFX_SUCCESS If the channel was successfully assigned.
* @retval NRFX_ERROR_INVALID_STATE If the channel is not allocated for the user.
* @retval NRFX_ERROR_NOT_SUPPORTED If function is not supported.
* @retval NRFX_SUCCESS The channel was successfully assigned.
* @retval NRFX_ERROR_INVALID_STATE The channel is not allocated for the user.
* @retval NRFX_ERROR_NOT_SUPPORTED Function is not supported.
*/
nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork_tep);
@ -123,9 +128,9 @@ nrfx_err_t nrfx_ppi_channel_fork_assign(nrf_ppi_channel_t channel, uint32_t fork
*
* @param[in] channel PPI channel to be enabled.
*
* @retval NRFX_SUCCESS If the channel was successfully enabled.
* @retval NRFX_ERROR_INVALID_STATE If the user-configurable channel is not allocated.
* @retval NRFX_ERROR_INVALID_PARAM If the channel cannot be enabled by the user.
* @retval NRFX_SUCCESS The channel was successfully enabled.
* @retval NRFX_ERROR_INVALID_STATE The user-configurable channel is not allocated.
* @retval NRFX_ERROR_INVALID_PARAM The channel cannot be enabled by the user.
*/
nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel);
@ -134,9 +139,9 @@ nrfx_err_t nrfx_ppi_channel_enable(nrf_ppi_channel_t channel);
*
* @param[in] channel PPI channel to be disabled.
*
* @retval NRFX_SUCCESS If the channel was successfully disabled.
* @retval NRFX_ERROR_INVALID_STATE If the user-configurable channel is not allocated.
* @retval NRFX_ERROR_INVALID_PARAM If the channel cannot be disabled by the user.
* @retval NRFX_SUCCESS The channel was successfully disabled.
* @retval NRFX_ERROR_INVALID_STATE The user-configurable channel is not allocated.
* @retval NRFX_ERROR_INVALID_PARAM The channel cannot be disabled by the user.
*/
nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel);
@ -146,8 +151,8 @@ nrfx_err_t nrfx_ppi_channel_disable(nrf_ppi_channel_t channel);
*
* @param[out] p_group Pointer to the PPI channel group that has been allocated.
*
* @retval NRFX_SUCCESS If the channel group was successfully allocated.
* @retval NRFX_ERROR_NO_MEM If there is no available channel group to be used.
* @retval NRFX_SUCCESS The channel group was successfully allocated.
* @retval NRFX_ERROR_NO_MEM There is no available channel group to be used.
*/
nrfx_err_t nrfx_ppi_group_alloc(nrf_ppi_channel_group_t * p_group);
@ -157,8 +162,8 @@ nrfx_err_t nrfx_ppi_group_alloc(nrf_ppi_channel_group_t * p_group);
*
* @param[in] group PPI channel group to be freed.
*
* @retval NRFX_SUCCESS If the channel group was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM If the channel group is not user-configurable.
* @retval NRFX_SUCCESS The channel group was successfully freed.
* @retval NRFX_ERROR_INVALID_PARAM The channel group is not user-configurable.
*/
nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group);
@ -167,7 +172,7 @@ nrfx_err_t nrfx_ppi_group_free(nrf_ppi_channel_group_t group);
*
* @param[in] channel Channel number to transform to a mask.
*
* @retval Channel mask.
* @return Channel mask.
*/
__STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel)
{
@ -180,10 +185,10 @@ __STATIC_INLINE uint32_t nrfx_ppi_channel_to_mask(nrf_ppi_channel_t channel)
* @param[in] channel_mask PPI channels to be added.
* @param[in] group Channel group in which to include the channels.
*
* @retval NRFX_SUCCESS If the channels was successfully included.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channels are not an
* @retval NRFX_SUCCESS The channels was successfully included.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channels are not an
* application channels.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t channel_mask,
nrf_ppi_channel_group_t group);
@ -194,10 +199,10 @@ nrfx_err_t nrfx_ppi_channels_include_in_group(uint32_t channel_ma
* @param[in] channel PPI channel to be added.
* @param[in] group Channel group in which to include the channel.
*
* @retval NRFX_SUCCESS If the channel was successfully included.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channel is not an
* @retval NRFX_SUCCESS The channel was successfully included.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channel is not an
* application channel.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
nrf_ppi_channel_group_t group)
@ -211,24 +216,24 @@ __STATIC_INLINE nrfx_err_t nrfx_ppi_channel_include_in_group(nrf_ppi_channel_t
* @param[in] channel_mask PPI channels to be removed.
* @param[in] group Channel group from which to remove the channels.
*
* @retval NRFX_SUCCESS If the channel was successfully removed.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channels are not an
* @retval NRFX_SUCCESS The channel was successfully removed.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channels are not an
* application channels.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_channels_remove_from_group(uint32_t channel_mask,
nrf_ppi_channel_group_t group);
/**
* @brief Function for removing a PPI channel from a channel group.
* @brief Function for removing a single PPI channel from a channel group.
*
* @param[in] channel PPI channel to be removed.
* @param[in] group Channel group from which to remove the channel.
*
* @retval NRFX_SUCCESS If the channel was successfully removed.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group or channel is not an
* @retval NRFX_SUCCESS The channel was successfully removed.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group or channel is not an
* application channel.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
__STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
nrf_ppi_channel_group_t group)
@ -241,9 +246,9 @@ __STATIC_INLINE nrfx_err_t nrfx_ppi_channel_remove_from_group(nrf_ppi_channel_t
*
* @param[in] group Channel group to be cleared.
*
* @retval NRFX_SUCCESS If the group was successfully cleared.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_SUCCESS The group was successfully cleared.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
__STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group)
{
@ -255,9 +260,9 @@ __STATIC_INLINE nrfx_err_t nrfx_ppi_group_clear(nrf_ppi_channel_group_t group)
*
* @param[in] group Channel group to be enabled.
*
* @retval NRFX_SUCCESS If the group was successfully enabled.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_SUCCESS The group was successfully enabled.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_group_enable(nrf_ppi_channel_group_t group);
@ -266,9 +271,9 @@ nrfx_err_t nrfx_ppi_group_enable(nrf_ppi_channel_group_t group);
*
* @param[in] group Channel group to be disabled.
*
* @retval NRFX_SUCCESS If the group was successfully disabled.
* @retval NRFX_ERROR_INVALID_PARAM If group is not an application group.
* @retval NRFX_ERROR_INVALID_STATE If group is not an allocated group.
* @retval NRFX_SUCCESS The group was successfully disabled.
* @retval NRFX_ERROR_INVALID_PARAM Group is not an application group.
* @retval NRFX_ERROR_INVALID_STATE Group is not an allocated group.
*/
nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group);
@ -277,7 +282,7 @@ nrfx_err_t nrfx_ppi_group_disable(nrf_ppi_channel_group_t group);
*
* @param[in] task Task.
*
* @retval Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task)
{
@ -285,11 +290,11 @@ __STATIC_INLINE uint32_t nrfx_ppi_task_addr_get(nrf_ppi_task_t task)
}
/**
* @brief Function for getting the address of a PPI group enable task.
* @brief Function for getting the address of the enable task of a PPI group.
*
* @param[in] group PPI channel group
*
* @retval Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_group_t group)
{
@ -297,11 +302,11 @@ __STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_enable_get(nrf_ppi_channel_gro
}
/**
* @brief Function for getting the address of a PPI group enable task.
* @brief Function for getting the address of the enable task of a PPI group.
*
* @param[in] group PPI channel group
*
* @retval Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_ppi_task_addr_group_disable_get(nrf_ppi_channel_group_t group)
{

111
ext/hal/nordic/nrfx/drivers/include/nrfx_pwm.h
View file

@ -46,24 +46,21 @@ extern "C" {
* @brief Pulse Width Modulation (PWM) peripheral driver.
*/
/**
* @brief PWM driver instance data structure.
*/
/** @brief PWM driver instance data structure. */
typedef struct
{
NRF_PWM_Type * p_registers; ///< Pointer to the structure with PWM peripheral instance registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_pwm_t;
/**
* @brief Macro for creating a PWM driver instance.
*/
/** @brief Macro for creating a PWM driver instance. */
#define NRFX_PWM_INSTANCE(id) \
{ \
.p_registers = NRFX_CONCAT_2(NRF_PWM, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_PWM, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_PWM0_ENABLED)
NRFX_PWM0_INST_IDX,
@ -79,6 +76,7 @@ enum {
#endif
NRFX_PWM_ENABLED_COUNT
};
#endif
/**
* @brief This value can be provided instead of a pin number for any channel
@ -87,15 +85,10 @@ enum {
*/
#define NRFX_PWM_PIN_NOT_USED 0xFF
/**
* @brief This value can be added to a pin number to inverse its polarity
* (set idle state = 1).
*/
/** @brief This value can be added to a pin number to invert its polarity (set idle state = 1). */
#define NRFX_PWM_PIN_INVERTED 0x80
/**
* @brief PWM driver configuration structure.
*/
/** @brief PWM driver configuration structure. */
typedef struct
{
uint8_t output_pins[NRF_PWM_CHANNEL_COUNT]; ///< Pin numbers for individual output channels (optional).
@ -109,9 +102,7 @@ typedef struct
nrf_pwm_dec_step_t step_mode; ///< Mode of advancing the active sequence.
} nrfx_pwm_config_t;
/**
* @brief PWM driver default configuration.
*/
/** @brief PWM driver default configuration. */
#define NRFX_PWM_DEFAULT_CONFIG \
{ \
.output_pins = { NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN, \
@ -126,14 +117,11 @@ typedef struct
.step_mode = (nrf_pwm_dec_step_t)NRFX_PWM_DEFAULT_CONFIG_STEP_MODE, \
}
/**
* @brief PWM flags providing additional playback options.
*/
/** @brief PWM flags that provide additional playback options. */
typedef enum
{
NRFX_PWM_FLAG_STOP = 0x01, /**< When the requested playback is finished,
the peripheral should be stopped.
the peripheral will be stopped.
@note The STOP task is triggered when
the last value of the final sequence is
loaded from RAM, and the peripheral stops
@ -143,7 +131,7 @@ typedef enum
less than the requested number of repeats
of the last value. */
NRFX_PWM_FLAG_LOOP = 0x02, /**< When the requested playback is finished,
it should be started from the beginning.
it will be started from the beginning.
This flag is ignored if used together
with @ref NRFX_PWM_FLAG_STOP.
@note The playback restart is done via a
@ -157,28 +145,25 @@ typedef enum
the playback restart will occur right
after switching to the final value (this
final value will be played only once). */
NRFX_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler should be
NRFX_PWM_FLAG_SIGNAL_END_SEQ0 = 0x04, /**< The event handler is to be
called when the last value
from sequence 0 is loaded. */
NRFX_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler should be
NRFX_PWM_FLAG_SIGNAL_END_SEQ1 = 0x08, /**< The event handler is to be
called when the last value
from sequence 1 is loaded. */
NRFX_PWM_FLAG_NO_EVT_FINISHED = 0x10, /**< The playback finished event
(enabled by default) should be
(enabled by default) is to be
suppressed. */
NRFX_PWM_FLAG_START_VIA_TASK = 0x80, /**< The playback should not be
NRFX_PWM_FLAG_START_VIA_TASK = 0x80, /**< The playback must not be
started directly by the called
function. Instead, the function
should only prepare it and
must only prepare it and
return the address of the task
to be triggered to start the
playback. */
} nrfx_pwm_flag_t;
/**
* @brief PWM driver event type.
*/
/** @brief PWM driver event type. */
typedef enum
{
NRFX_PWM_EVT_FINISHED, ///< Sequence playback finished.
@ -189,24 +174,20 @@ typedef enum
NRFX_PWM_EVT_STOPPED, ///< The PWM peripheral has been stopped.
} nrfx_pwm_evt_type_t;
/**
* @brief PWM driver event handler type.
*/
/** @brief PWM driver event handler type. */
typedef void (* nrfx_pwm_handler_t)(nrfx_pwm_evt_type_t event_type);
/**
* @brief Function for initializing the PWM driver.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
*
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user. If NULL is passed
* instead, event notifications are not done and PWM
* interrupts are disabled.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
*/
nrfx_err_t nrfx_pwm_init(nrfx_pwm_t const * const p_instance,
nrfx_pwm_config_t const * p_config,
@ -227,20 +208,20 @@ void nrfx_pwm_uninit(nrfx_pwm_t const * const p_instance);
* To take advantage of the looping mechanism in the PWM peripheral, both
* sequences must be used (single sequence can be played back only once by
* the peripheral). Therefore, the provided sequence is internally set and
* played back as both sequence 0 and sequence 1. Consequently, if end of
* sequence notifications are required, events for both sequences should be
* used (that means that both the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ0 flag
* and the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ1 flag should be specified and
* played back as both sequence 0 and sequence 1. Consequently, if the end of
* sequence notifications are required, events for both sequences must be
* used (that is, both the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ0 flag
* and the @ref NRFX_PWM_FLAG_SIGNAL_END_SEQ1 flag must be specified, and
* the @ref NRFX_PWM_EVT_END_SEQ0 event and the @ref NRFX_PWM_EVT_END_SEQ1
* event should be handled in the same way).
* event must be handled in the same way).
*
* Use the @ref NRFX_PWM_FLAG_START_VIA_TASK flag if you want the playback
* to be only prepared by this function, and you want to start it later by
* triggering a task (using PPI for instance). The function will then return
* triggering a task (for example, by using PPI). The function will then return
* the address of the task to be triggered.
*
* @note The array containing the duty cycle values for the specified sequence
* must be in RAM and cannot be allocated on stack.
* must be in RAM and cannot be allocated on the stack.
* For detailed information, see @ref nrf_pwm_sequence_t.
*
* @param[in] p_instance Pointer to the driver instance structure.
@ -267,7 +248,7 @@ uint32_t nrfx_pwm_simple_playback(nrfx_pwm_t const * const p_instance,
* the address of the task to be triggered.
*
* @note The array containing the duty cycle values for the specified sequence
* must be in RAM and cannot be allocated on stack.
* must be in RAM and cannot be allocated on the stack.
* For detailed information, see @ref nrf_pwm_sequence_t.
*
* @param[in] p_instance Pointer to the driver instance structure.
@ -305,7 +286,7 @@ __STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance);
* might appear on the output less times than requested.
*
* @note This function can be instructed to wait until the playback is stopped
* (by setting @p wait_until_stopped to true). Note that, depending on
* (by setting @p wait_until_stopped to true). Depending on
* the length of the PMW period, this might take a significant amount of
* time. Alternatively, the @ref nrfx_pwm_is_stopped function can be
* used to poll the status, or the @ref NRFX_PWM_EVT_STOPPED event can
@ -316,19 +297,18 @@ __STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance);
* @param[in] wait_until_stopped If true, the function will not return until
* the playback is stopped.
*
* @retval true If the PWM peripheral is stopped.
* @retval false If the PWM peripheral is not stopped.
* @retval true The PWM peripheral is stopped.
* @retval false The PWM peripheral is not stopped.
*/
bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance,
bool wait_until_stopped);
bool nrfx_pwm_stop(nrfx_pwm_t const * const p_instance, bool wait_until_stopped);
/**
* @brief Function for checking the status of the PWM peripheral.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true If the PWM peripheral is stopped.
* @retval false If the PWM peripheral is not stopped.
* @retval true The PWM peripheral is stopped.
* @retval false The PWM peripheral is not stopped.
*/
bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance);
@ -339,10 +319,9 @@ bool nrfx_pwm_is_stopped(nrfx_pwm_t const * const p_instance);
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] p_sequence Pointer to the new sequence definition.
*/
__STATIC_INLINE void nrfx_pwm_sequence_update(
nrfx_pwm_t const * const p_instance,
uint8_t seq_id,
nrf_pwm_sequence_t const * p_sequence);
__STATIC_INLINE void nrfx_pwm_sequence_update(nrfx_pwm_t const * const p_instance,
uint8_t seq_id,
nrf_pwm_sequence_t const * p_sequence);
/**
* @brief Function for updating the pointer to the duty cycle values
@ -370,7 +349,7 @@ __STATIC_INLINE void nrfx_pwm_sequence_length_update(nrfx_pwm_t const * const p_
/**
* @brief Function for updating the number of repeats for duty cycle values
* in specified sequence during playback.
* in the specified sequence during playback.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] seq_id Identifier of the sequence (0 or 1).
@ -404,18 +383,18 @@ __STATIC_INLINE void nrfx_pwm_sequence_end_delay_update(nrfx_pwm_t const * const
__STATIC_INLINE uint32_t nrfx_pwm_task_address_get(nrfx_pwm_t const * const p_instance,
nrf_pwm_task_t task);
/**@brief Function for returning the address of a specified PWM event that can
/**
* @brief Function for returning the address of a specified PWM event that can
* be used in PPI module.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Requested event.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Requested event.
*
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_instance,
nrf_pwm_event_t event);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrfx_pwm_step(nrfx_pwm_t const * const p_instance)
@ -472,6 +451,8 @@ __STATIC_INLINE uint32_t nrfx_pwm_event_address_get(nrfx_pwm_t const * const p_i
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_pwm_0_irq_handler(void);
void nrfx_pwm_1_irq_handler(void);
@ -479,8 +460,6 @@ void nrfx_pwm_2_irq_handler(void);
void nrfx_pwm_3_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

100
ext/hal/nordic/nrfx/drivers/include/nrfx_qdec.h
View file

@ -46,7 +46,7 @@ extern "C" {
* @brief Quadrature Decoder (QDEC) peripheral driver.
*/
/**@brief QDEC configuration structure.*/
/** @brief QDEC configuration structure. */
typedef struct
{
nrf_qdec_reportper_t reportper; /**< Report period in samples. */
@ -62,91 +62,102 @@ typedef struct
} nrfx_qdec_config_t;
/**@brief QDEC default configuration. */
#define NRFX_QDEC_DEFAULT_CONFIG \
{ \
.reportper = (nrf_qdec_reportper_t)NRFX_QDEC_CONFIG_REPORTPER, \
.sampleper = (nrf_qdec_sampleper_t)NRFX_QDEC_CONFIG_SAMPLEPER, \
.psela = NRFX_QDEC_CONFIG_PIO_A, \
.pselb = NRFX_QDEC_CONFIG_PIO_B, \
.pselled = NRFX_QDEC_CONFIG_PIO_LED, \
.ledpre = NRFX_QDEC_CONFIG_LEDPRE, \
.ledpol = (nrf_qdec_ledpol_t)NRFX_QDEC_CONFIG_LEDPOL, \
.interrupt_priority = NRFX_QDEC_CONFIG_IRQ_PRIORITY, \
.dbfen = NRFX_QDEC_CONFIG_DBFEN, \
.sample_inten = NRFX_QDEC_CONFIG_SAMPLE_INTEN \
}
#define NRFX_QDEC_DEFAULT_CONFIG \
{ \
.reportper = (nrf_qdec_reportper_t)NRFX_QDEC_CONFIG_REPORTPER, \
.sampleper = (nrf_qdec_sampleper_t)NRFX_QDEC_CONFIG_SAMPLEPER, \
.psela = NRFX_QDEC_CONFIG_PIO_A, \
.pselb = NRFX_QDEC_CONFIG_PIO_B, \
.pselled = NRFX_QDEC_CONFIG_PIO_LED, \
.ledpre = NRFX_QDEC_CONFIG_LEDPRE, \
.ledpol = (nrf_qdec_ledpol_t)NRFX_QDEC_CONFIG_LEDPOL, \
.dbfen = NRFX_QDEC_CONFIG_DBFEN, \
.sample_inten = NRFX_QDEC_CONFIG_SAMPLE_INTEN, \
.interrupt_priority = NRFX_QDEC_CONFIG_IRQ_PRIORITY, \
}
/**@brief QDEC sample event data.*/
/** @brief QDEC sample event data. */
typedef struct
{
int8_t value; /**< Sample value. */
} nrfx_qdec_sample_data_evt_t;
/**@brief QDEC report event data.*/
/** @brief QDEC report event data. */
typedef struct
{
int16_t acc; /**< Accumulated transitions. */
uint16_t accdbl; /**< Accumulated double transitions. */
uint16_t accdbl; /**< Accumulated double transitions. */
} nrfx_qdec_report_data_evt_t;
/**@brief QDEC event handler structure. */
/** @brief QDEC event handler structure. */
typedef struct
{
nrf_qdec_event_t type;
nrf_qdec_event_t type; /**< Event type. */
union
{
nrfx_qdec_sample_data_evt_t sample; /**< Sample event data. */
nrfx_qdec_report_data_evt_t report; /**< Report event data. */
} data;
} data; /**< Union to store event data. */
} nrfx_qdec_event_t;
/**@brief QDEC event handler.
* @param[in] event QDEC event structure.
/**
* @brief QDEC event handler.
*
* @param[in] event QDEC event structure.
*/
typedef void (*nrfx_qdec_event_handler_t)(nrfx_qdec_event_t event);
/**@brief Function for initializing QDEC.
/**
* @brief Function for initializing QDEC.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If QDEC was already initialized.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The QDEC was already initialized.
*/
nrfx_err_t nrfx_qdec_init(nrfx_qdec_config_t const * p_config,
nrfx_qdec_event_handler_t event_handler);
/**@brief Function for uninitializing QDEC.
* @note Function asserts if module is uninitialized.
/**
* @brief Function for uninitializing QDEC.
*
* @note Function asserts if module is uninitialized.
*/
void nrfx_qdec_uninit(void);
/**@brief Function for enabling QDEC.
* @note Function asserts if module is uninitialized or enabled.
/**
* @brief Function for enabling QDEC.
*
* @note Function asserts if module is uninitialized or enabled.
*/
void nrfx_qdec_enable(void);
/**@brief Function for disabling QDEC.
* @note Function asserts if module is uninitialized or disabled.
/**
* @brief Function for disabling QDEC.
*
* @note Function asserts if module is uninitialized or disabled.
*/
void nrfx_qdec_disable(void);
/**@brief Function for reading accumulated transitions QDEC.
* @note Function asserts if module is not enabled.
* @note Accumulators are cleared after reading.
/**
* @brief Function for reading accumulated transitions from the QDEC peripheral.
*
* @param[out] p_acc Pointer to store accumulated transitions.
* @param[out] p_accdbl Pointer to store accumulated double transitions.
* @note Function asserts if module is not enabled.
* @note Accumulators are cleared after reading.
*
* @param[out] p_acc Pointer to store the accumulated transitions.
* @param[out] p_accdbl Pointer to store the accumulated double transitions.
*/
void nrfx_qdec_accumulators_read(int16_t * p_acc, int16_t * p_accdbl);
/**
* @brief Function for returning the address of a specific QDEC task.
* @brief Function for returning the address of the specified QDEC task.
*
* @param task QDEC task.
* @param task QDEC task.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task)
{
@ -154,21 +165,22 @@ __STATIC_INLINE uint32_t nrfx_qdec_task_address_get(nrf_qdec_task_t task)
}
/**
* @brief Function for returning the address of a specific QDEC event.
* @brief Function for returning the address of the specified QDEC event.
*
* @param event QDEC event.
* @param event QDEC event.
*
* @return Event address.
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_qdec_event_address_get(nrf_qdec_event_t event)
{
return (uint32_t)nrf_qdec_event_address_get(event);
}
/** @} */
void nrfx_qdec_irq_handler(void);
/** @} */
#ifdef __cplusplus
}

138
ext/hal/nordic/nrfx/drivers/include/nrfx_qspi.h
View file

@ -46,21 +46,17 @@ extern "C" {
* @brief Quad Serial Peripheral Interface (QSPI) peripheral driver.
*/
/**
* @brief QSPI driver instance configuration structure.
*/
/** @brief QSPI driver instance configuration structure. */
typedef struct
{
uint32_t xip_offset; /**< Address offset into the external memory for Execute in Place operation. */
nrf_qspi_pins_t pins; /**< Pins configuration structure. */
nrf_qspi_pins_t pins; /**< Pin configuration structure. */
nrf_qspi_prot_conf_t prot_if; /**< Protocol layer interface configuration structure. */
nrf_qspi_phy_conf_t phy_if; /**< Physical layer interface configuration structure. */
uint8_t irq_priority; /**< Interrupt priority. */
} nrfx_qspi_config_t;
/**
* @brief QSPI instance default configuration.
*/
/** @brief QSPI instance default configuration. */
#define NRFX_QSPI_DEFAULT_CONFIG \
{ \
.xip_offset = NRFX_QSPI_CONFIG_XIP_OFFSET, \
@ -72,7 +68,6 @@ typedef struct
.io2_pin = NRFX_QSPI_PIN_IO2, \
.io3_pin = NRFX_QSPI_PIN_IO3, \
}, \
.irq_priority = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY, \
.prot_if = { \
.readoc = (nrf_qspi_readoc_t)NRFX_QSPI_CONFIG_READOC, \
.writeoc = (nrf_qspi_writeoc_t)NRFX_QSPI_CONFIG_WRITEOC, \
@ -80,16 +75,15 @@ typedef struct
.dpmconfig = false, \
}, \
.phy_if = { \
.sck_freq = (nrf_qspi_frequency_t)NRFX_QSPI_CONFIG_FREQUENCY, \
.sck_delay = (uint8_t)NRFX_QSPI_CONFIG_SCK_DELAY, \
.dpmen = false, \
.spi_mode = (nrf_qspi_spi_mode_t)NRFX_QSPI_CONFIG_MODE, \
.dpmen = false \
.sck_freq = (nrf_qspi_frequency_t)NRFX_QSPI_CONFIG_FREQUENCY, \
}, \
.irq_priority = (uint8_t)NRFX_QSPI_CONFIG_IRQ_PRIORITY, \
}
/**
* @brief QSPI custom instruction helper with default configuration.
*/
/** @brief QSPI custom instruction helper with the default configuration. */
#define NRFX_QSPI_DEFAULT_CINSTR(opc, len) \
{ \
.opcode = (opc), \
@ -109,16 +103,14 @@ typedef enum
NRFX_QSPI_EVENT_DONE, /**< Transfer done. */
} nrfx_qspi_evt_t;
/**
* @brief QSPI driver event handler type.
*/
/** @brief QSPI driver event handler type. */
typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context);
/**
* @brief Function for initializing the QSPI driver instance.
*
* This function configures the peripheral and its interrupts and activates it. During the
* activation process, the internal clocks are started and the QSPI peripheral tries to read
* This function configures the peripheral and its interrupts, and activates it. During the
* activation process, the internal clocks are started and the QSPI peripheral tries to read
* the status byte to read the busy bit. Reading the status byte is done in a simple poll and wait
* mechanism.
* If the busy bit is 1, this indicates issues with the external memory device. As a result,
@ -129,32 +121,30 @@ typedef void (*nrfx_qspi_handler_t)(nrfx_qspi_evt_t event, void * p_context);
* - Make sure that the memory device does not perform other operations like erasing or writing.
* - Check if there is a short circuit.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
* @param[in] p_context Pointer to context. Use in interrupt handler.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
* @param[in] p_context Pointer to context. Use in the interrupt handler.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_TIMEOUT If the peripheral cannot connect with external memory.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_ERROR_INVALID_PARAM If the pin configuration was incorrect.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_TIMEOUT The peripheral cannot connect with external memory.
* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
* @retval NRFX_ERROR_INVALID_PARAM The pin configuration was incorrect.
*/
nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrfx_qspi_handler_t handler,
void * p_context);
/**
* @brief Function for uninitializing the QSPI driver instance.
*/
/** @brief Function for uninitializing the QSPI driver instance. */
void nrfx_qspi_uninit(void);
/**
* @brief Function for reading data from QSPI memory.
* @brief Function for reading data from the QSPI memory.
*
* Write, read, and erase operations check memory device busy state before starting the operation.
* If the memory is busy, the resulting action depends on the mode in which the read operation is used:
* - blocking mode (without handler) - a delay occurs until the last operation still runs and
* until operation data is still being read.
* - blocking mode (without handler) - a delay occurs until the last operation runs and
* until the operation data is being read.
* - interrupt mode (with handler) - event emission occurs after the last operation
* and reading of data are finished.
*
@ -162,10 +152,10 @@ void nrfx_qspi_uninit(void);
* @param[in] rx_buffer_length Size of the data to read.
* @param[in] src_address Address in memory to read from.
*
* @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
*/
nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
size_t rx_buffer_length,
@ -176,8 +166,8 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
*
* Write, read, and erase operations check memory device busy state before starting the operation.
* If the memory is busy, the resulting action depends on the mode in which the write operation is used:
* - blocking mode (without handler) - a delay occurs until the last operation still runs and
* until operation data is still being sent.
* - blocking mode (without handler) - a delay occurs until the last operation runs or
* until the operation data is being sent.
* - interrupt mode (with handler) - event emission occurs after the last operation
* and sending of operation data are finished.
* To manually control operation execution in the memory device, use @ref nrfx_qspi_mem_busy_check
@ -189,10 +179,10 @@ nrfx_err_t nrfx_qspi_read(void * p_rx_buffer,
* @param[in] tx_buffer_length Size of the data to write.
* @param[in] dst_address Address in memory to write to.
*
* @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_BUSY If the driver currently handles other operation.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region.
* @retval NRFX_ERROR_BUSY The driver currently handles other operation.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
*/
nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
size_t tx_buffer_length,
@ -203,8 +193,8 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
*
* Write, read, and erase operations check memory device busy state before starting the operation.
* If the memory is busy, the resulting action depends on the mode in which the erase operation is used:
* - blocking mode (without handler) - a delay occurs until the last operation still runs and
* until operation data is still being sent.
* - blocking mode (without handler) - a delay occurs until the last operation runs or
* until the operation data is being sent.
* - interrupt mode (with handler) - event emission occurs after the last operation
* and sending of operation data are finished.
* To manually control operation execution in the memory device, use @ref nrfx_qspi_mem_busy_check
@ -216,9 +206,9 @@ nrfx_err_t nrfx_qspi_write(void const * p_tx_buffer,
* @param[in] start_address Memory address to start erasing. If chip erase is performed, address
* field is ommited.
*
* @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
uint32_t start_address);
@ -226,9 +216,9 @@ nrfx_err_t nrfx_qspi_erase(nrf_qspi_erase_len_t length,
/**
* @brief Function for starting an erase operation of the whole chip.
*
* @retval NRFX_SUCCESS If the operation was successful (blocking mode) or operation
* @retval NRFX_SUCCESS The operation was successful (blocking mode) or operation
* was commissioned (handler mode).
* @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_chip_erase(void);
@ -236,8 +226,8 @@ nrfx_err_t nrfx_qspi_chip_erase(void);
* @brief Function for getting the current driver status and status byte of memory device with
* testing WIP (write in progress) bit.
*
* @retval NRFX_SUCCESS If the driver and memory are ready to handle a new operation.
* @retval NRFX_ERROR_BUSY If the driver or memory currently handle another operation.
* @retval NRFX_SUCCESS The driver and memory are ready to handle a new operation.
* @retval NRFX_ERROR_BUSY The driver or memory currently handle another operation.
*/
nrfx_err_t nrfx_qspi_mem_busy_check(void);
@ -252,13 +242,14 @@ nrfx_err_t nrfx_qspi_mem_busy_check(void);
* @param[in] p_tx_buffer Pointer to the array with data to send. Can be NULL if only opcode is transmitted.
* @param[out] p_rx_buffer Pointer to the array for data to receive. Can be NULL if there is nothing to receive.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_TIMEOUT If the external memory is busy or there are connection issues.
* @retval NRFX_ERROR_BUSY If the driver currently handles other operation.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_TIMEOUT The external memory is busy or there are connection issues.
* @retval NRFX_ERROR_BUSY The driver currently handles other operation.
*/
nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
void const * p_tx_buffer,
void * p_rx_buffer);
/**
* @brief Function for sending operation code and data to the memory device with simpler configuration.
*
@ -269,17 +260,56 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
* @param[in] length Length of the data to send and opcode. See @ref nrf_qspi_cinstr_len_t.
* @param[in] p_tx_buffer Pointer to input data array.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_BUSY If the driver currently handles another operation.
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_BUSY The driver currently handles another operation.
*/
nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode,
nrf_qspi_cinstr_len_t length,
void const * p_tx_buffer);
/**
* @brief Function for starting the custom instruction long frame mode.
*
* The long frame mode is a mechanism that allows for arbitrary byte length custom instructions.
* Use this function to initiate a custom transaction by sending custom instruction opcode.
* To send and receive data, use @ref nrfx_qspi_lfm_xfer.
*
* @param[in] p_config Pointer to the structure with custom instruction opcode and transfer
* configuration. Transfer length must be set to @ref NRF_QSPI_CINSTR_LEN_1B.
*
* @retval NRFX_SUCCESS Operation was successful.
* @retval NRFX_ERROR_BUSY Driver currently handles other operation.
* @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues.
*/
nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config);
/**
* @brief Function for sending and receiving data in the custom instruction long frame mode.
*
* Both specified buffers must be at least @p transfer_length bytes in size.
*
* @param[in] p_tx_buffer Pointer to the array with data to send.
* Can be NULL if there is nothing to send.
* @param[out] p_rx_buffer Pointer to the array for receiving data.
* Can be NULL if there is nothing to receive.
* @param[in] transfer_length Number of bytes to send and receive.
* @param[in] finalize True if custom instruction long frame mode is to be finalized
* after this transfer.
*
* @retval NRFX_SUCCESS Operation was successful.
* @retval NRFX_ERROR_TIMEOUT External memory is busy or there are connection issues.
* Long frame mode becomes deactivated.
*/
nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer,
void * p_rx_buffer,
size_t transfer_length,
bool finalize);
/** @} */
void nrfx_qspi_irq_handler(void);
/** @} */
#ifdef __cplusplus
}

44
ext/hal/nordic/nrfx/drivers/include/nrfx_rng.h
View file

@ -45,13 +45,11 @@ extern "C" {
* @brief Random Number Generator (RNG) peripheral driver.
*/
/**
* @brief Struct for RNG configuration.
*/
/** @brief Struct for RNG configuration. */
typedef struct
{
bool error_correction : 1; /**< Error correction flag. */
uint8_t interrupt_priority; /**< interrupt priority */
uint8_t interrupt_priority; /**< Interrupt priority. */
} nrfx_rng_config_t;
/**
@ -63,53 +61,49 @@ typedef struct
* { ...
* @endcode
*/
#define NRFX_RNG_DEFAULT_CONFIG \
{ \
.error_correction = NRFX_RNG_CONFIG_ERROR_CORRECTION, \
.interrupt_priority = NRFX_RNG_CONFIG_IRQ_PRIORITY, \
}
#define NRFX_RNG_DEFAULT_CONFIG \
{ \
.error_correction = NRFX_RNG_CONFIG_ERROR_CORRECTION, \
.interrupt_priority = NRFX_RNG_CONFIG_IRQ_PRIORITY, \
}
/**
* @brief RNG driver event handler type.
*/
/** @brief RNG driver event handler type. */
typedef void (* nrfx_rng_evt_handler_t)(uint8_t rng_data);
/**
* @brief Function for initializing the nrfx_rng module.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] handler Event handler provided by the user. Must not be NULL.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user. Must not be NULL.
*
* @retval NRFX_SUCCESS Driver was successfully initialized.
* @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
* @retval NRFX_SUCCESS Driver was successfully initialized.
* @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
*/
nrfx_err_t nrfx_rng_init(nrfx_rng_config_t const * p_config, nrfx_rng_evt_handler_t handler);
/**
* @brief Function for starting the random value generation.
* @brief Function for starting the generation of random values.
*
* Function enables interrupts in perihperal and start them.
* New data should be handled by handler passed to the @ref nrfx_rng_init() function.
*/
void nrfx_rng_start(void);
/**
* @brief Function for stoping the random value generation.
* @brief Function for stopping the generation of random values.
*
* Function disables interrupts in perihperal and stop generation of new random values.
* Function disables interrupts in peripheral and stops the generation of new random values.
*/
void nrfx_rng_stop(void);
/**
* @brief Function for uninitializing the nrfx_rng module.
*/
/** @brief Function for uninitializing the nrfx_rng module. */
void nrfx_rng_uninit(void);
/** @} */
void nrfx_rng_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

209
ext/hal/nordic/nrfx/drivers/include/nrfx_rtc.h
View file

@ -46,10 +46,10 @@ extern "C" {
* @brief Real Timer Counter (RTC) peripheral driver.
*/
/**@brief Macro to convert microseconds into ticks. */
/** @brief Macro for converting microseconds into ticks. */
#define NRFX_RTC_US_TO_TICKS(us,freq) (((us) * (freq)) / 1000000U)
/**@brief RTC driver interrupt types. */
/** @brief RTC driver interrupt types. */
typedef enum
{
NRFX_RTC_INT_COMPARE0 = 0, /**< Interrupt from COMPARE0 event. */
@ -60,16 +60,16 @@ typedef enum
NRFX_RTC_INT_OVERFLOW = 5 /**< Interrupt from OVERFLOW event. */
} nrfx_rtc_int_type_t;
/**@brief RTC driver instance structure. */
/** @brief RTC driver instance structure. */
typedef struct
{
NRF_RTC_Type * p_reg; /**< Pointer to instance register set. */
IRQn_Type irq; /**< Instance IRQ ID. */
uint8_t instance_id; /**< Instance index. */
uint8_t instance_id; /**< Index of the driver instance. For internal use only. */
uint8_t cc_channel_count; /**< Number of capture/compare channels. */
} nrfx_rtc_t;
/**@brief Macro for creating RTC driver instance.*/
/** @brief Macro for creating an RTC driver instance. */
#define NRFX_RTC_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_RTC, id), \
@ -78,6 +78,7 @@ typedef struct
.cc_channel_count = NRF_RTC_CC_CHANNEL_COUNT(id), \
}
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_RTC0_ENABLED)
NRFX_RTC0_INST_IDX,
@ -90,215 +91,223 @@ enum {
#endif
NRFX_RTC_ENABLED_COUNT
};
#endif
/**@brief RTC driver instance configuration structure. */
/** @brief RTC driver instance configuration structure. */
typedef struct
{
uint16_t prescaler; /**< Prescaler. */
uint8_t interrupt_priority; /**< Interrupt priority. */
uint8_t tick_latency; /**< Maximum length of interrupt handler in ticks (max 7.7 ms). */
uint8_t tick_latency; /**< Maximum length of the interrupt handler in ticks (maximum 7.7 ms). */
bool reliable; /**< Reliable mode flag. */
} nrfx_rtc_config_t;
/**@brief RTC instance default configuration. */
/** @brief RTC instance default configuration. */
#define NRFX_RTC_DEFAULT_CONFIG \
{ \
.prescaler = RTC_FREQ_TO_PRESCALER(NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \
.interrupt_priority = NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY, \
.reliable = NRFX_RTC_DEFAULT_CONFIG_RELIABLE, \
.tick_latency = NRFX_RTC_US_TO_TICKS(NRFX_RTC_MAXIMUM_LATENCY_US, \
NRFX_RTC_DEFAULT_CONFIG_FREQUENCY), \
.reliable = NRFX_RTC_DEFAULT_CONFIG_RELIABLE, \
}
/**@brief RTC driver instance handler type. */
/** @brief RTC driver instance handler type. */
typedef void (*nrfx_rtc_handler_t)(nrfx_rtc_int_type_t int_type);
/**@brief Function for initializing the RTC driver instance.
/**
* @brief Function for initializing the RTC driver instance.
*
* After initialization, the instance is in power off state.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] handler Event handler provided by the user.
* Must not be NULL.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If successfully initialized.
* @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
* @retval NRFX_SUCCESS Successfully initialized.
* @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
*/
nrfx_err_t nrfx_rtc_init(nrfx_rtc_t const * const p_instance,
nrfx_rtc_config_t const * p_config,
nrfx_rtc_handler_t handler);
/**@brief Function for uninitializing the RTC driver instance.
/**
* @brief Function for uninitializing the RTC driver instance.
*
* After uninitialization, the instance is in idle state. The hardware should return to the state
* before initialization. The function asserts if the instance is in idle state.
* before initialization.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_uninit(nrfx_rtc_t const * const p_instance);
/**@brief Function for enabling the RTC driver instance.
/**
* @brief Function for enabling the RTC driver instance.
*
* @note Function asserts if instance is enabled.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_enable(nrfx_rtc_t const * const p_instance);
/**@brief Function for disabling the RTC driver instance.
/**
* @brief Function for disabling the RTC driver instance.
*
* @note Function asserts if instance is disabled.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_disable(nrfx_rtc_t const * const p_instance);
/**@brief Function for setting a compare channel.
/**
* @brief Function for setting a compare channel.
*
* The function asserts if the instance is not initialized or if the channel parameter is
* wrong. The function powers on the instance if the instance was in power off state.
* The function powers on the instance if the instance was in power off state.
*
* The driver is not entering a critical section when configuring RTC, which means that it can be
* preempted for a certain amount of time. When the driver was preempted and the value to be set
* is short in time, there is a risk that the driver sets a compare value that is
* behind. If RTCn_CONFIG_RELIABLE is 1 for the given instance, the Reliable mode handles that case.
* However, to detect if the requested value is behind, this mode makes the following assumptions:
* - The maximum preemption time in ticks (8 - bit value) is known and is less than 7.7 ms
* (for prescaler = 0, RTC frequency 32 kHz).
* - The requested absolute compare value is not bigger than (0x00FFFFFF) - tick_latency. It is
* the user's responsibility to ensure that.
* preempted for a certain amount of time. When the driver was preempted and the value to be set
* is short in time, there is a risk that the driver sets a compare value that is
* behind. In this case, if the reliable mode is enabled for the specified instance,
* the risk is handled.
* However, to detect if the requested value is behind, this mode makes the following assumptions:
* - The maximum preemption time in ticks (8-bit value) is known and is less than 7.7 ms
* (for prescaler = 0, RTC frequency 32 kHz).
* - The requested absolute compare value is not bigger than (0x00FFFFFF)-tick_latency. It is
* the user's responsibility to ensure this.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel One of the instance's channels.
* @param[in] val Absolute value to be set in the compare register.
* @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel One of the channels of the instance.
* @param[in] val Absolute value to be set in the compare register.
* @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_TIMEOUT If the compare was not set because the request value is behind the current counter
* value. This error can only be reported if RTCn_CONFIG_RELIABLE = 1.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_TIMEOUT The compare is not set because the request value is behind the
* current counter value. This error can only be reported
* if the reliable mode is enabled.
*/
nrfx_err_t nrfx_rtc_cc_set(nrfx_rtc_t const * const p_instance,
uint32_t channel,
uint32_t val,
bool enable_irq);
/**@brief Function for disabling a channel.
/**
* @brief Function for disabling a channel.
*
* This function disables channel events and channel interrupts. The function asserts if the instance is not
* initialized or if the channel parameter is wrong.
* This function disables channel events and channel interrupts.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel One of the instance's channels.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel One of the channels of the instance.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_TIMEOUT If an interrupt was pending on the requested channel.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_TIMEOUT Interrupt is pending on the requested channel.
*/
nrfx_err_t nrfx_rtc_cc_disable(nrfx_rtc_t const * const p_instance, uint32_t channel);
/**@brief Function for enabling tick.
/**
* @brief Function for enabling the TICK event.
*
* This function enables the tick event and optionally the interrupt. The function asserts if the instance is not
* powered on.
* This function enables the tick event and optionally the interrupt.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
*/
void nrfx_rtc_tick_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
/**@brief Function for disabling tick.
/**
* @brief Function for disabling the TICK event.
*
* This function disables the tick event and interrupt.
* This function disables the TICK event and interrupt.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_tick_disable(nrfx_rtc_t const * const p_instance);
/**@brief Function for enabling overflow.
/**
* @brief Function for enabling overflow.
*
* This function enables the overflow event and optionally the interrupt. The function asserts if the instance is
* not powered on.
* This function enables the overflow event and optionally the interrupt.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] enable_irq True to enable the interrupt. False to disable the interrupt.
*/
void nrfx_rtc_overflow_enable(nrfx_rtc_t const * const p_instance, bool enable_irq);
/**@brief Function for disabling overflow.
/**
* @brief Function for disabling overflow.
*
* This function disables the overflow event and interrupt.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_rtc_overflow_disable(nrfx_rtc_t const * const p_instance);
/**@brief Function for getting the maximum relative ticks value that can be set in the compare channel.
/**
* @brief Function for getting the maximum relative tick value that can be set in the compare channel.
*
* When a stack (for example SoftDevice) is used and it occupies high priority interrupts,
* the application code can be interrupted at any moment for a certain period of time.
* If Reliable mode is enabled, the provided maximum latency is taken into account
* If the reliable mode is enabled, the provided maximum latency is taken into account
* and the return value is smaller than the RTC counter resolution.
* If Reliable mode is disabled, the return value equals the counter resolution.
* If the reliable mode is disabled, the return value equals the counter resolution.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval ticks Maximum ticks value.
* @return Maximum ticks value.
*/
uint32_t nrfx_rtc_max_ticks_get(nrfx_rtc_t const * const p_instance);
/**@brief Function for disabling all instance interrupts.
/**
* @brief Function for disabling all instance interrupts.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_mask Pointer to the location where the mask is filled.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_mask Pointer to the location where the mask is filled.
*/
__STATIC_INLINE void nrfx_rtc_int_disable(nrfx_rtc_t const * const p_instance,
uint32_t * p_mask);
/**@brief Function for enabling instance interrupts.
/**
* @brief Function for enabling instance interrupts.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] mask Mask of interrupts to enable.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] mask Mask of interrupts to enable.
*/
__STATIC_INLINE void nrfx_rtc_int_enable(nrfx_rtc_t const * const p_instance, uint32_t mask);
/**@brief Function for retrieving the current counter value.
/**
* @brief Function for retrieving the current counter value.
*
* This function asserts if the instance is not powered on or if p_val is NULL.
* @param[in] p_instance Pointer to the driver instance structure.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval value Counter value.
* @return Counter value.
*/
__STATIC_INLINE uint32_t nrfx_rtc_counter_get(nrfx_rtc_t const * const p_instance);
/**@brief Function for clearing the counter value.
/**
* @brief Function for clearing the counter value.
*
* This function asserts if the instance is not powered on.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
__STATIC_INLINE void nrfx_rtc_counter_clear(nrfx_rtc_t const * const p_instance);
/**@brief Function for returning a requested task address for the RTC driver instance.
/**
* @brief Function for returning a requested task address for the RTC driver instance.
*
* This function asserts if the output pointer is NULL. The task address can be used by the PPI module.
* The task address can be used by the PPI module.
*
* @param[in] p_instance Pointer to the instance.
* @param[in] task One of the peripheral tasks.
* @param[in] p_instance Pointer to the instance.
* @param[in] task One of the peripheral tasks.
*
* @retval Address of task register.
* @return Address of task register.
*/
__STATIC_INLINE uint32_t nrfx_rtc_task_address_get(nrfx_rtc_t const * const p_instance,
nrf_rtc_task_t task);
/**@brief Function for returning a requested event address for the RTC driver instance.
/**
* @brief Function for returning a requested event address for the RTC driver instance.
*
* This function asserts if the output pointer is NULL. The event address can be used by the PPI module.
* The event address can be used by the PPI module.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event One of the peripheral events.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event One of the peripheral events.
*
* @retval Address of event register.
* @return Address of event register.
*/
__STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_instance,
nrf_rtc_event_t event);
@ -345,14 +354,14 @@ __STATIC_INLINE uint32_t nrfx_rtc_event_address_get(nrfx_rtc_t const * const p_i
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_rtc_0_irq_handler(void);
void nrfx_rtc_1_irq_handler(void);
void nrfx_rtc_2_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

120
ext/hal/nordic/nrfx/drivers/include/nrfx_saadc.h
View file

@ -46,18 +46,12 @@ extern "C" {
* @brief Successive Approximation Analog-to-Digital Converter (SAADC) peripheral driver.
*/
/**
* @brief Value that should be set as high limit to disable limit detection.
*/
/** @brief Value to be set as high limit to disable limit detection. */
#define NRFX_SAADC_LIMITH_DISABLED (2047)
/**
* @brief Value that should be set as low limit to disable limit detection.
*/
/** @brief Value to be set as low limit to disable limit detection. */
#define NRFX_SAADC_LIMITL_DISABLED (-2048)
/**
* @brief Macro for setting @ref nrfx_saadc_config_t to default settings.
*/
/** @brief Macro for setting @ref nrfx_saadc_config_t to default settings. */
#define NRFX_SAADC_DEFAULT_CONFIG \
{ \
.resolution = (nrf_saadc_resolution_t)NRFX_SAADC_CONFIG_RESOLUTION, \
@ -68,7 +62,7 @@ extern "C" {
/**
* @brief Macro for setting @ref nrf_saadc_channel_config_t to default settings
* in single ended mode.
* in single-ended mode.
*
* @param PIN_P Analog input.
*/
@ -100,13 +94,12 @@ extern "C" {
.reference = NRF_SAADC_REFERENCE_INTERNAL, \
.acq_time = NRF_SAADC_ACQTIME_10US, \
.mode = NRF_SAADC_MODE_DIFFERENTIAL, \
.burst = NRF_SAADC_BURST_DISABLED, \
.pin_p = (nrf_saadc_input_t)(PIN_P), \
.pin_n = (nrf_saadc_input_t)(PIN_N) \
}
/**
* @brief Analog-to-digital converter driver configuration structure.
*/
/** @brief SAADC driver configuration structure. */
typedef struct
{
nrf_saadc_resolution_t resolution; ///< Resolution configuration.
@ -115,9 +108,7 @@ typedef struct
bool low_power_mode; ///< Indicates if low power mode is active.
} nrfx_saadc_config_t;
/**
* @brief Driver event types.
*/
/** @brief SAADC driver event types. */
typedef enum
{
NRFX_SAADC_EVT_DONE, ///< Event generated when the buffer is filled with samples.
@ -125,27 +116,21 @@ typedef enum
NRFX_SAADC_EVT_CALIBRATEDONE ///< Event generated when the calibration is complete.
} nrfx_saadc_evt_type_t;
/**
* @brief Analog-to-digital converter driver done event data.
*/
/** @brief SAADC driver done event data. */
typedef struct
{
nrf_saadc_value_t * p_buffer; ///< Pointer to buffer with converted samples.
uint16_t size; ///< Number of samples in the buffer.
} nrfx_saadc_done_evt_t;
/**
* @brief Analog-to-digital converter driver limit event data.
*/
/** @brief SAADC driver limit event data. */
typedef struct
{
uint8_t channel; ///< Channel on which the limit was detected.
nrf_saadc_limit_t limit_type; ///< Type of limit detected.
} nrfx_saadc_limit_evt_t;
/**
* @brief Analog-to-digital converter driver event structure.
*/
/** @brief SAADC driver event structure. */
typedef struct
{
nrfx_saadc_evt_type_t type; ///< Event type.
@ -153,15 +138,14 @@ typedef struct
{
nrfx_saadc_done_evt_t done; ///< Data for @ref NRFX_SAADC_EVT_DONE event.
nrfx_saadc_limit_evt_t limit; ///< Data for @ref NRFX_SAADC_EVT_LIMIT event.
} data;
} data; ///< Union to store event data.
} nrfx_saadc_evt_t;
/**
* @brief ADC event handler.
* @brief SAADC driver event handler.
*
* @param[in] p_event Pointer to an ADC event. The event structure is allocated on
* the stack, so it is valid only within the context of
* the event handler.
* @param[in] p_event Pointer to an SAADC driver event. The event structure is allocated on
* the stack, so it is valid only within the context of the event handler.
*/
typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event);
@ -172,8 +156,8 @@ typedef void (* nrfx_saadc_event_handler_t)(nrfx_saadc_evt_t const * p_event);
* @param[in] event_handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
*/
nrfx_err_t nrfx_saadc_init(nrfx_saadc_config_t const * p_config,
nrfx_saadc_event_handler_t event_handler);
@ -189,7 +173,7 @@ void nrfx_saadc_uninit(void);
/**
* @brief Function for getting the address of a SAMPLE SAADC task.
*
* @return Task address.
* @return Task address.
*/
uint32_t nrfx_saadc_sample_task_get(void);
@ -198,43 +182,47 @@ uint32_t nrfx_saadc_sample_task_get(void);
*
* This function configures and enables the channel.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the ADC was not initialized.
* @retval NRFX_ERROR_NO_MEM If the specified channel was already allocated.
* @param[in] channel Channel index.
* @param[in] p_config Pointer to the structure with the initial configuration.
*
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The SAADC was not initialized.
* @retval NRFX_ERROR_NO_MEM The specified channel was already allocated.
*/
nrfx_err_t nrfx_saadc_channel_init(uint8_t channel,
nrf_saadc_channel_config_t const * const p_config);
/**
* @brief Function for uninitializing an SAADC channel.
*
* @retval NRFX_SUCCESS If uninitialization was successful.
* @retval NRFX_ERROR_BUSY If the ADC is busy.
* @param[in] channel Channel index.
*
* @retval NRFX_SUCCESS Uninitialization was successful.
* @retval NRFX_ERROR_BUSY The SAADC is busy.
*/
nrfx_err_t nrfx_saadc_channel_uninit(uint8_t channel);
/**
* @brief Function for starting SAADC sampling.
* @brief Function for starting the SAADC sampling.
*
* @retval NRFX_SUCCESS If ADC sampling was triggered.
* @retval NRFX_ERROR_INVALID_STATE If ADC is in idle state.
* @retval NRFX_SUCCESS The SAADC sampling was triggered.
* @retval NRFX_ERROR_INVALID_STATE The SAADC is in idle state.
*/
nrfx_err_t nrfx_saadc_sample(void);
/**
* @brief Blocking function for executing a single ADC conversion.
* @brief Blocking function for executing a single SAADC conversion.
*
* This function selects the desired input, starts a single conversion,
* waits for it to finish, and returns the result.
*
* The function will fail if ADC is busy.
* The function fails if the SAADC is busy.
*
* @param[in] channel Channel.
* @param[out] p_value Pointer to the location where the result should be placed.
* @param[out] p_value Pointer to the location where the result is to be placed.
*
* @retval NRFX_SUCCESS If conversion was successful.
* @retval NRFX_ERROR_BUSY If the ADC driver is busy.
* @retval NRFX_SUCCESS The conversion was successful.
* @retval NRFX_ERROR_BUSY The SAADC driver is busy.
*/
nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_value);
@ -242,45 +230,47 @@ nrfx_err_t nrfx_saadc_sample_convert(uint8_t channel, nrf_saadc_value_t * p_valu
* @brief Function for issuing conversion of data to the buffer.
*
* This function is non-blocking. The application is notified about filling the buffer by the event
* handler. Conversion will be done on all enabled channels. If the ADC is in idle state, the
* function will set up Easy DMA for the conversion. The ADC will be ready for sampling and wait for
* the SAMPLE task. It can be triggered manually by the @ref nrfx_saadc_sample function or by PPI
* using the @ref NRF_SAADC_TASK_SAMPLE task. If one buffer is already set and the conversion is
* ongoing, calling this function will result in queuing the given buffer. The driver will start
* filling the issued buffer when the first one is completed. If the function is called again before
* the first buffer is filled or calibration is in progress, it will return with error.
* handler. Conversion will be done on all enabled channels. If the SAADC is in idle state, the
* function will set up EasyDMA for the conversion. The SAADC will be ready for sampling and wait
* for the SAMPLE task. It can be triggered manually by the @ref nrfx_saadc_sample function
* or by PPI using the @ref NRF_SAADC_TASK_SAMPLE task. If one buffer is already set and the
* conversion is ongoing, calling this function will result in queuing the given buffer.
* The driver will start filling the issued buffer when the first one is completed.
* If the function is called again before the first buffer is filled or calibration
* is in progress, it will return with error.
*
* @param[in] buffer Result buffer.
* @param[in] size Buffer size in words.
*
* @retval NRFX_SUCCESS If conversion was successful.
* @retval NRFX_ERROR_BUSY If the driver already has two buffers set or calibration is in progress.
* @retval NRFX_SUCCESS The conversion was successful.
* @retval NRFX_ERROR_BUSY The driver already has two buffers set or the calibration is in progress.
*/
nrfx_err_t nrfx_saadc_buffer_convert(nrf_saadc_value_t * buffer, uint16_t size);
/**
* @brief Function for triggering the ADC offset calibration.
* @brief Function for triggering the SAADC offset calibration.
*
* This function is non-blocking. The application is notified about completion by the event handler.
* Calibration will also trigger DONE and RESULTDONE events.
*
* The function will fail if ADC is busy or calibration is already in progress.
* The function will fail if the SAADC is busy or calibration is already in progress.
*
* @retval NRFX_SUCCESS If calibration was started successfully.
* @retval NRFX_ERROR_BUSY If the ADC driver is busy.
* @retval NRFX_SUCCESS The calibration was started successfully.
* @retval NRFX_ERROR_BUSY The SAADC driver is busy.
*/
nrfx_err_t nrfx_saadc_calibrate_offset(void);
/**
* @brief Function for retrieving the SAADC state.
*
* @retval true If the ADC is busy.
* @retval false If the ADC is ready.
* @retval true The SAADC is busy.
* @retval false The SAADC is ready.
*/
bool nrfx_saadc_is_busy(void);
/**
* @brief Function for aborting ongoing and buffered conversions.
* @brief Function for aborting the ongoing and buffered conversions.
*
* @note @ref NRFX_SAADC_EVT_DONE event will be generated if there is a conversion in progress.
* Event will contain number of words in the sample buffer.
*/
@ -303,12 +293,12 @@ void nrfx_saadc_abort(void);
*/
void nrfx_saadc_limits_set(uint8_t channel, int16_t limit_low, int16_t limit_high);
/** @} */
void nrfx_saadc_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

88
ext/hal/nordic/nrfx/drivers/include/nrfx_spi.h
View file

@ -43,16 +43,14 @@ extern "C" {
* @defgroup nrfx_spi SPI driver
* @{
* @ingroup nrf_spi
* @brief SPI peripheral driver.
* @brief Serial Peripheral Interface master (SPI) driver.
*/
/**
* @brief SPI master driver instance data structure.
*/
/** @brief Data structure of the Serial Peripheral Interface master (SPI) driver instance. */
typedef struct
{
NRF_SPI_Type * p_reg; ///< Pointer to a structure with SPI registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_spi_t;
enum {
@ -68,9 +66,7 @@ enum {
NRFX_SPI_ENABLED_COUNT
};
/**
* @brief Macro for creating an SPI master driver instance.
*/
/** @brief Macro for creating an instance of the SPI master driver. */
#define NRFX_SPI_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPI, id), \
@ -84,9 +80,7 @@ enum {
*/
#define NRFX_SPI_PIN_NOT_USED 0xFF
/**
* @brief SPI master driver instance configuration structure.
*/
/** @brief Configuration structure of the SPI master driver instance. */
typedef struct
{
uint8_t sck_pin; ///< SCK pin number.
@ -100,10 +94,10 @@ typedef struct
/**< Set to @ref NRFX_SPI_PIN_NOT_USED
* if this signal is not needed. The driver
* supports only active low for this signal.
* If the signal should be active high,
* If the signal must be active high,
* it must be controlled externally. */
uint8_t irq_priority; ///< Interrupt priority.
uint8_t orc; ///< Over-run character.
uint8_t orc; ///< Overrun character.
/**< This character is used when all bytes from the TX buffer are sent,
but the transfer continues due to RX. */
nrf_spi_frequency_t frequency; ///< SPI frequency.
@ -111,9 +105,7 @@ typedef struct
nrf_spi_bit_order_t bit_order; ///< SPI bit order.
} nrfx_spi_config_t;
/**
* @brief SPI master instance default configuration.
*/
/** @brief SPI master instance default configuration. */
#define NRFX_SPI_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_SPI_PIN_NOT_USED, \
@ -127,45 +119,37 @@ typedef struct
.bit_order = NRF_SPI_BIT_ORDER_MSB_FIRST, \
}
/**
* @brief Single transfer descriptor structure.
*/
/** @brief Single transfer descriptor structure. */
typedef struct
{
uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
size_t tx_length; ///< TX buffer length.
uint8_t * p_rx_buffer; ///< Pointer to RX buffer.
size_t rx_length; ///< RX buffer length.
} nrfx_spi_xfer_desc_t;
}nrfx_spi_xfer_desc_t;
/**
* @brief Macro for setting up single transfer descriptor.
*
* This macro is for internal use only.
*/
#define NRFX_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
{ \
.p_tx_buffer = (uint8_t const *)(p_tx), \
.tx_length = (tx_len), \
.p_rx_buffer = (p_rx), \
.rx_length = (rx_len), \
}
#define NRFX_SPI_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
{ \
.p_tx_buffer = (uint8_t const *)(p_tx), \
.tx_length = (tx_len), \
.p_rx_buffer = (p_rx), \
.rx_length = (rx_len), \
}
/**
* @brief Macro for setting duplex TX RX transfer.
*/
/** @brief Macro for setting the duplex TX RX transfer. */
#define NRFX_SPI_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
NRFX_SPI_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
/**
* @brief Macro for setting TX transfer.
*/
/** @brief Macro for setting the TX transfer. */
#define NRFX_SPI_XFER_TX(p_buf, length) \
NRFX_SPI_SINGLE_XFER(p_buf, length, NULL, 0)
/**
* @brief Macro for setting RX transfer.
*/
/** @brief Macro for setting the RX transfer. */
#define NRFX_SPI_XFER_RX(p_buf, length) \
NRFX_SPI_SINGLE_XFER(NULL, 0, p_buf, length)
@ -178,15 +162,14 @@ typedef enum
NRFX_SPI_EVENT_DONE, ///< Transfer done.
} nrfx_spi_evt_type_t;
/** @brief SPI master event description with transmission details. */
typedef struct
{
nrfx_spi_evt_type_t type; ///< Event type.
nrfx_spi_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_spi_evt_t;
/**
* @brief SPI master driver event handler type.
*/
/** @brief SPI master driver event handler type. */
typedef void (* nrfx_spi_evt_handler_t)(nrfx_spi_evt_t const * p_event,
void * p_context);
@ -196,15 +179,14 @@ typedef void (* nrfx_spi_evt_handler_t)(nrfx_spi_evt_t const * p_event,
* This function configures and enables the specified peripheral.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
*
* @param handler Event handler provided by the user. If NULL, transfers
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
* @param p_context Context passed to event handler.
* @param[in] p_context Context passed to the event handler.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@ -219,7 +201,7 @@ nrfx_err_t nrfx_spi_init(nrfx_spi_t const * const p_instance,
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
/**
* @brief Function for starting the SPI data transfer.
@ -234,29 +216,29 @@ void nrfx_spi_uninit(nrfx_spi_t const * const p_instance);
* @param flags Transfer options (0 for default settings).
* Currently, no additional flags are available.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
*/
nrfx_err_t nrfx_spi_xfer(nrfx_spi_t const * const p_instance,
nrfx_spi_xfer_desc_t const * p_xfer_desc,
uint32_t flags);
/**
* @brief Function for aborting ongoing transfer.
* @brief Function for aborting the ongoing transfer.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spi_abort(nrfx_spi_t const * p_instance);
/** @} */
void nrfx_spi_0_irq_handler(void);
void nrfx_spi_1_irq_handler(void);
void nrfx_spi_2_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

159
ext/hal/nordic/nrfx/drivers/include/nrfx_spim.h
View file

@ -43,18 +43,17 @@ extern "C" {
* @defgroup nrfx_spim SPIM driver
* @{
* @ingroup nrf_spim
* @brief SPIM peripheral driver.
* @brief Serial Peripheral Interface Master with EasyDMA (SPIM) driver.
*/
/**
* @brief SPIM master driver instance data structure.
*/
/** @brief Data structure of the Serial Peripheral Interface Master with EasyDMA (SPIM) driver instance. */
typedef struct
{
NRF_SPIM_Type * p_reg; ///< Pointer to a structure with SPIM registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_spim_t;
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_SPIM0_ENABLED)
NRFX_SPIM0_INST_IDX,
@ -70,10 +69,9 @@ enum {
#endif
NRFX_SPIM_ENABLED_COUNT
};
#endif
/**
* @brief Macro for creating an SPIM master driver instance.
*/
/** @brief Macro for creating an instance of the SPIM driver. */
#define NRFX_SPIM_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPIM, id), \
@ -87,9 +85,7 @@ enum {
*/
#define NRFX_SPIM_PIN_NOT_USED 0xFF
/**
* @brief SPIM master driver instance configuration structure.
*/
/** @brief Configuration structure of the SPIM driver instance. */
typedef struct
{
uint8_t sck_pin; ///< SCK pin number.
@ -104,44 +100,42 @@ typedef struct
* if this signal is not needed. */
bool ss_active_high; ///< Polarity of the Slave Select pin during transmission.
uint8_t irq_priority; ///< Interrupt priority.
uint8_t orc; ///< Over-run character.
uint8_t orc; ///< Overrun character.
/**< This character is used when all bytes from the TX buffer are sent,
but the transfer continues due to RX. */
nrf_spim_frequency_t frequency; ///< SPI frequency.
nrf_spim_mode_t mode; ///< SPI mode.
nrf_spim_bit_order_t bit_order; ///< SPI bit order.
nrf_spim_frequency_t frequency; ///< SPIM frequency.
nrf_spim_mode_t mode; ///< SPIM mode.
nrf_spim_bit_order_t bit_order; ///< SPIM bit order.
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
uint8_t dcx_pin; ///< D/CX pin number (optional).
uint8_t rx_delay; ///< Sample delay for input serial data on MISO.
/**< The value specifies the delay, in number of 64 MHz clock cycles
* (15.625 ns), from the the sampling edge of SCK (leading edge for
* CONFIG.CPHA = 0, trailing edge for CONFIG.CPHA = 1) until
* the input serial data is sampled.*/
* the input serial data is sampled. */
bool use_hw_ss; ///< Indication to use software or hardware controlled Slave Select pin.
uint8_t ss_duration; ///< Slave Select duration before and after transmission.
/**< Minimum duration between the edge of CSN and the edge of SCK and minimum
* duration of CSN must stay inactive between transactions.
* The value is specified in number of 64 MHz clock cycles (15.625 ns).
* Supported only for hardware controlled Slave Select.*/
* Supported only for hardware-controlled Slave Select. */
#endif
} nrfx_spim_config_t;
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
/**
* @brief SPIM master instance extended default configuration.
* @brief Extended default configuration of the SPIM instance.
*/
#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
.dcx_pin = NRFX_SPIM_PIN_NOT_USED, \
.rx_delay = 0x02, \
.ss_duration = 0x02, \
.use_hw_ss = false,
.use_hw_ss = false, \
.ss_duration = 0x02,
#else
#define NRFX_SPIM_DEFAULT_EXTENDED_CONFIG
#endif
/**
* @brief SPIM master instance default configuration.
*/
/** @brief The default configuration of the SPIM master instance. */
#define NRFX_SPIM_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_SPIM_PIN_NOT_USED, \
@ -157,15 +151,18 @@ typedef struct
NRFX_SPIM_DEFAULT_EXTENDED_CONFIG \
}
#define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */
#define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */
#define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
#define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */
#define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */
/** @brief Flag indicating that TX buffer address will be incremented after transfer. */
#define NRFX_SPIM_FLAG_TX_POSTINC (1UL << 0)
/** @brief Flag indicating that RX buffer address will be incremented after transfer. */
#define NRFX_SPIM_FLAG_RX_POSTINC (1UL << 1)
/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
#define NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
/** @brief Flag indicating that the transfer will be set up, but not started. */
#define NRFX_SPIM_FLAG_HOLD_XFER (1UL << 3)
/** @brief Flag indicating that the transfer will be executed multiple times. */
#define NRFX_SPIM_FLAG_REPEATED_XFER (1UL << 4)
/**
* @brief Single transfer descriptor structure.
*/
/** @brief Single transfer descriptor structure. */
typedef struct
{
uint8_t const * p_tx_buffer; ///< Pointer to TX buffer.
@ -179,29 +176,23 @@ typedef struct
*
* This macro is for internal use only.
*/
#define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
{ \
.p_tx_buffer = (uint8_t const *)(p_tx), \
.tx_length = (tx_len), \
.p_rx_buffer = (p_rx), \
.rx_length = (rx_len), \
#define NRFX_SPIM_SINGLE_XFER(p_tx, tx_len, p_rx, rx_len) \
{ \
.p_tx_buffer = (uint8_t const *)(p_tx), \
.tx_length = (tx_len), \
.p_rx_buffer = (p_rx), \
.rx_length = (rx_len), \
}
/**
* @brief Macro for setting duplex TX RX transfer.
*/
#define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
/** @brief Macro for setting the duplex TX RX transfer. */
#define NRFX_SPIM_XFER_TRX(p_tx_buf, tx_length, p_rx_buf, rx_length) \
NRFX_SPIM_SINGLE_XFER(p_tx_buf, tx_length, p_rx_buf, rx_length)
/**
* @brief Macro for setting TX transfer.
*/
/** @brief Macro for setting the TX transfer. */
#define NRFX_SPIM_XFER_TX(p_buf, length) \
NRFX_SPIM_SINGLE_XFER(p_buf, length, NULL, 0)
/**
* @brief Macro for setting RX transfer.
*/
/** @brief Macro for setting the RX transfer. */
#define NRFX_SPIM_XFER_RX(p_buf, length) \
NRFX_SPIM_SINGLE_XFER(NULL, 0, p_buf, length)
@ -214,37 +205,35 @@ typedef enum
NRFX_SPIM_EVENT_DONE, ///< Transfer done.
} nrfx_spim_evt_type_t;
/** @brief SPIM event description with transmission details. */
typedef struct
{
nrfx_spim_evt_type_t type; ///< Event type.
nrfx_spim_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_spim_evt_t;
/**
* @brief SPIM master driver event handler type.
*/
/** @brief SPIM driver event handler type. */
typedef void (* nrfx_spim_evt_handler_t)(nrfx_spim_evt_t const * p_event,
void * p_context);
/**
* @brief Function for initializing the SPI master driver instance.
* @brief Function for initializing the SPIM driver instance.
*
* This function configures and enables the specified peripheral.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
*
* @param handler Event handler provided by the user. If NULL, transfers
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] handler Event handler provided by the user. If NULL, transfers
* will be performed in blocking mode.
* @param p_context Context passed to event handler.
* @param[in] p_context Context passed to event handler.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver was already initialized.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver was already initialized.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
* @retval NRFX_ERROR_NOT_SUPPORTED If requested configuration is not supported
* @retval NRFX_ERROR_NOT_SUPPORTED Requested configuration is not supported
* by the SPIM instance.
*/
nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
@ -253,30 +242,30 @@ nrfx_err_t nrfx_spim_init(nrfx_spim_t const * const p_instance,
void * p_context);
/**
* @brief Function for uninitializing the SPI master driver instance.
* @brief Function for uninitializing the SPIM driver instance.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
/**
* @brief Function for starting the SPI data transfer.
* @brief Function for starting the SPIM data transfer.
*
* Additional options are provided using the @c flags parameter:
*
* - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC<span></span>:
* Post-incrementation of buffer addresses. Supported only by SPIM.
* - @ref NRFX_SPIM_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this
* flag if the transfer is triggered externally by PPI. Supported only by SPIM. Use
* - @ref NRFX_SPIM_FLAG_TX_POSTINC and @ref NRFX_SPIM_FLAG_RX_POSTINC -
* Post-incrementation of buffer addresses.
* - @ref NRFX_SPIM_FLAG_HOLD_XFER - Driver is not starting the transfer. Use this
* flag if the transfer is triggered externally by PPI. Use
* @ref nrfx_spim_start_task_get to get the address of the start task.
* - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer
* completion. This also means no interrupt at the end of the transfer. Supported only by SPIM.
* - @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer
* completion. This also means no interrupt at the end of the transfer.
* If @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER is used, the driver does not set the instance into
* busy state, so you must ensure that the next transfers are set up when SPIM is not active.
* @ref nrfx_spim_end_event_get function can be used to detect end of transfer. Option can be used
* together with @ref NRFX_SPIM_FLAG_REPEATED_XFER to prepare a sequence of SPI transfers
* without interruptions.
* - @ref NRFX_SPIM_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set
* - @ref NRFX_SPIM_FLAG_REPEATED_XFER - Prepare for repeated transfers. You can set
* up a number of transfers that will be triggered externally (for example by PPI). An example is
* a TXRX transfer with the options @ref NRFX_SPIM_FLAG_RX_POSTINC,
* @ref NRFX_SPIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_SPIM_FLAG_REPEATED_XFER. After the
@ -285,7 +274,7 @@ void nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
* @ref nrfx_spim_end_event_get can be used to get the address of the END event, which can be
* used to count the number of transfers. If @ref NRFX_SPIM_FLAG_REPEATED_XFER is used,
* the driver does not set the instance into busy state, so you must ensure that the next
* transfers are set up when SPIM is not active. Supported only by SPIM.
* transfers are set up when SPIM is not active.
*
* @note Peripherals using EasyDMA (including SPIM) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
@ -295,10 +284,10 @@ void nrfx_spim_uninit(nrfx_spim_t const * const p_instance);
* @param p_xfer_desc Pointer to the transfer descriptor.
* @param flags Transfer options (0 for default settings).
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
* RAM region.
*/
nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance,
@ -307,7 +296,7 @@ nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance,
#if NRFX_CHECK(NRFX_SPIM_EXTENDED_ENABLED) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for starting the SPI data transfer with DCX control.
* @brief Function for starting the SPIM data transfer with DCX control.
*
* See @ref nrfx_spim_xfer for description of additional options of transfer
* provided by the @c flags parameter.
@ -328,11 +317,11 @@ nrfx_err_t nrfx_spim_xfer(nrfx_spim_t const * const p_instance,
* @c cmd_length parameter causes all transmitted bytes
* to be marked as command bytes.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
* RAM region.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
* RAM region.
*/
nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance,
nrfx_spim_xfer_desc_t const * p_xfer_desc,
@ -343,12 +332,12 @@ nrfx_err_t nrfx_spim_xfer_dcx(nrfx_spim_t const * const p_instance,
/**
* @brief Function for returning the address of a SPIM start task.
*
* This function should be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER.
* This function is to be used if @ref nrfx_spim_xfer was called with the flag @ref NRFX_SPIM_FLAG_HOLD_XFER.
* In that case, the transfer is not started by the driver, but it must be started externally by PPI.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*
* @return Start task address.
* @return Start task address.
*/
uint32_t nrfx_spim_start_task_get(nrfx_spim_t const * p_instance);
@ -367,10 +356,12 @@ uint32_t nrfx_spim_end_event_get(nrfx_spim_t const * p_instance);
/**
* @brief Function for aborting ongoing transfer.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_spim_abort(nrfx_spim_t const * p_instance);
/** @} */
void nrfx_spim_0_irq_handler(void);
void nrfx_spim_1_irq_handler(void);
@ -378,8 +369,6 @@ void nrfx_spim_2_irq_handler(void);
void nrfx_spim_3_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

56
ext/hal/nordic/nrfx/drivers/include/nrfx_spis.h
View file

@ -41,19 +41,20 @@ extern "C" {
#endif
/**
* @defgroup nrfx_spis SPI slave driver
* @defgroup nrfx_spis SPIS driver
* @{
* @ingroup nrf_spis
* @brief SPI Slave peripheral driver.
* @brief Serial Peripheral Interface Slave with EasyDMA (SPIS) driver.
*/
/** @brief SPI slave driver instance data structure. */
/** @brief Data structure for the Serial Peripheral Interface Slave with EasyDMA (SPIS) driver instance. */
typedef struct
{
NRF_SPIS_Type * p_reg; //!< Pointer to a structure with SPIS registers.
uint8_t drv_inst_idx; //!< Driver instance index.
uint8_t drv_inst_idx; //!< Index of the driver instance. For internal use only.
} nrfx_spis_t;
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_SPIS0_ENABLED)
NRFX_SPIS0_INST_IDX,
@ -69,8 +70,9 @@ enum {
#endif
NRFX_SPIS_ENABLED_COUNT
};
#endif
/** @brief Macro for creating an SPI slave driver instance. */
/** @brief Macro for creating an instance of the SPI slave driver. */
#define NRFX_SPIS_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_SPIS, id), \
@ -105,12 +107,12 @@ typedef struct
size_t tx_amount; //!< Number of bytes transmitted in the last transaction. This parameter is only valid for @ref NRFX_SPIS_XFER_DONE events.
} nrfx_spis_evt_t;
/** @brief SPI slave instance default configuration. */
/** @brief The default configuration of the SPI slave instance. */
#define NRFX_SPIS_DEFAULT_CONFIG \
{ \
.sck_pin = NRFX_SPIS_PIN_NOT_USED, \
.mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
.miso_pin = NRFX_SPIS_PIN_NOT_USED, \
.mosi_pin = NRFX_SPIS_PIN_NOT_USED, \
.sck_pin = NRFX_SPIS_PIN_NOT_USED, \
.csn_pin = NRFX_SPIS_PIN_NOT_USED, \
.mode = NRF_SPIS_MODE_0, \
.bit_order = NRF_SPIS_BIT_ORDER_MSB_FIRST, \
@ -161,15 +163,15 @@ typedef void (*nrfx_spis_event_handler_t)(nrfx_spis_evt_t const * p_event,
* to detect falling edges on CSN pin.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Function to be called by the SPI slave driver upon event.
* Must not be NULL.
* @param[in] p_context Context passed to the event handler.
*
* @retval NRFX_SUCCESS If the initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
* @retval NRFX_ERROR_INVALID_PARAM If an invalid parameter is supplied.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* @retval NRFX_SUCCESS The initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
* @retval NRFX_ERROR_INVALID_PARAM Invalid parameter is supplied.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@ -197,30 +199,30 @@ void nrfx_spis_uninit(nrfx_spis_t const * const p_instance);
*
* When either the memory buffer configuration or the SPI transaction has been
* completed, the event callback function will be called with the appropriate event
* @ref nrfx_spis_evt_type_t. Note that the callback function can be called before returning from
* @ref nrfx_spis_evt_type_t. The callback function can be called before returning from
* this function, because it is called from the SPI slave interrupt context.
*
* @note This function can be called from the callback function context.
*
* @note Client applications must call this function after every @ref NRFX_SPIS_XFER_DONE event if
* the SPI slave driver should be prepared for a possible new SPI transaction.
* the SPI slave driver must be prepared for a possible new SPI transaction.
*
* @note Peripherals using EasyDMA (including SPIS) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
* @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
* @param[in] tx_buffer_length Length of the TX buffer in bytes.
* @param[in] rx_buffer_length Length of the RX buffer in bytes.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_tx_buffer Pointer to the TX buffer. Can be NULL when the buffer length is zero.
* @param[in] p_rx_buffer Pointer to the RX buffer. Can be NULL when the buffer length is zero.
* @param[in] tx_buffer_length Length of the TX buffer in bytes.
* @param[in] rx_buffer_length Length of the RX buffer in bytes.
*
* @retval NRFX_SUCCESS If the operation was successful.
* @retval NRFX_ERROR_INVALID_STATE If the operation failed because the SPI slave device is in an incorrect state.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data
* @retval NRFX_SUCCESS The operation was successful.
* @retval NRFX_ERROR_INVALID_STATE The operation failed because the SPI slave device is in an incorrect state.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data
* RAM region.
* @retval NRFX_ERROR_INVALID_LENGTH If provided lengths exceed the EasyDMA limits for the peripheral.
* @retval NRFX_ERROR_INTERNAL If the operation failed because of an internal error.
* @retval NRFX_ERROR_INVALID_LENGTH Provided lengths exceed the EasyDMA limits for the peripheral.
* @retval NRFX_ERROR_INTERNAL The operation failed because of an internal error.
*/
nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
uint8_t const * p_tx_buffer,
@ -228,6 +230,8 @@ nrfx_err_t nrfx_spis_buffers_set(nrfx_spis_t const * const p_instance,
uint8_t * p_rx_buffer,
size_t rx_buffer_length);
/** @} */
void nrfx_spis_0_irq_handler(void);
void nrfx_spis_1_irq_handler(void);
@ -235,8 +239,6 @@ void nrfx_spis_2_irq_handler(void);
void nrfx_spis_3_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

60
ext/hal/nordic/nrfx/drivers/include/nrfx_swi.h
View file

@ -78,23 +78,22 @@ typedef uint16_t nrfx_swi_flags_t;
*/
typedef void (*nrfx_swi_handler_t)(nrfx_swi_t swi, nrfx_swi_flags_t flags);
/**
* @brief Function for allocating the first unused SWI instance and setting a handler.
*
* If provided handler is not NULL, an allocated SWI has its interrupt enabled by default.
* The interrupt can be disabled by @ref nrfx_swi_int_disable.
*
* @param[out] p_swi Points to a place where the allocated SWI instance
* number is to be stored.
* @param[in] event_handler Event handler function.
* If NULL, no interrupt will be enabled.
* It can be NULL only if the EGU driver is enabled.
* For classic SWI, it must be a valid handler pointer.
* @param[in] irq_priority Interrupt priority.
* @param[out] p_swi Points to a place where the allocated SWI instance
* number is to be stored.
* @param[in] event_handler Event handler function.
* If NULL, no interrupt will be enabled.
* It can be NULL only if the EGU driver is enabled.
* For classic SWI, it must be a valid handler pointer.
* @param[in] irq_priority Interrupt priority.
*
* @retval NRFX_SUCCESS If the SWI was successfully allocated.
* @retval NRFX_ERROR_NO_MEM If there is no available SWI to be used.
* @retval NRFX_SUCCESS The SWI was successfully allocated.
* @retval NRFX_ERROR_NO_MEM There is no available SWI to be used.
*/
nrfx_err_t nrfx_swi_alloc(nrfx_swi_t * p_swi,
nrfx_swi_handler_t event_handler,
@ -105,22 +104,22 @@ nrfx_err_t nrfx_swi_alloc(nrfx_swi_t * p_swi,
*
* Use @ref nrfx_swi_int_enable to re-enable the interrupt.
*
* @param[in] swi SWI instance.
* @param[in] swi SWI instance.
*/
void nrfx_swi_int_disable(nrfx_swi_t swi);
/**
* @brief Function for enabling an allocated SWI interrupt.
*
* @param[in] swi SWI instance.
* @param[in] swi SWI instance.
*/
void nrfx_swi_int_enable(nrfx_swi_t swi);
/**
* @brief Function for freeing a previously allocated SWI.
*
* @param[in,out] p_swi SWI instance to free. The value is changed to
* @ref NRFX_SWI_UNALLOCATED on success.
* @param[in,out] p_swi SWI instance to free. The value is changed to
* @ref NRFX_SWI_UNALLOCATED on success.
*/
void nrfx_swi_free(nrfx_swi_t * p_swi);
@ -130,8 +129,8 @@ void nrfx_swi_all_free(void);
/**
* @brief Function for triggering the SWI.
*
* @param[in] swi SWI to trigger.
* @param[in] flag_number Number of user flag to trigger.
* @param[in] swi SWI to trigger.
* @param[in] flag_number Number of user flag to trigger.
*/
void nrfx_swi_trigger(nrfx_swi_t swi,
uint8_t flag_number);
@ -139,10 +138,10 @@ void nrfx_swi_trigger(nrfx_swi_t swi,
/**
* @brief Function for checking if the specified SWI is currently allocated.
*
* @param[in] swi SWI instance.
* @param[in] swi SWI instance.
*
* @retval true If the SWI instance is allocated.
* @retval false Otherwise.
* @retval true The SWI instance is allocated.
* @retval false The SWI instance is not allocated.
*/
bool nrfx_swi_is_allocated(nrfx_swi_t swi);
@ -152,10 +151,10 @@ bool nrfx_swi_is_allocated(nrfx_swi_t swi);
* @brief Function for returning the base address of the EGU peripheral
* associated with the specified SWI instance.
*
* @param[in] swi SWI instance.
* @param[in] swi SWI instance.
*
* @returns EGU base address or NULL if the specified SWI instance number
* is too high.
* @return EGU base address or NULL if the specified SWI instance number
* is too high.
*/
__STATIC_INLINE NRF_EGU_Type * nrfx_swi_egu_instance_get(nrfx_swi_t swi)
{
@ -172,10 +171,10 @@ __STATIC_INLINE NRF_EGU_Type * nrfx_swi_egu_instance_get(nrfx_swi_t swi)
/**
* @brief Function for returning the EGU trigger task address.
*
* @param[in] swi SWI instance.
* @param[in] channel Number of the EGU channel.
* @param[in] swi SWI instance.
* @param[in] channel Number of the EGU channel.
*
* @returns Address of EGU trigger task.
* @return Address of the EGU trigger task.
*/
__STATIC_INLINE uint32_t nrfx_swi_task_trigger_address_get(nrfx_swi_t swi,
uint8_t channel)
@ -194,12 +193,12 @@ __STATIC_INLINE uint32_t nrfx_swi_task_trigger_address_get(nrfx_swi_t swi,
}
/**
* @brief Function for returning the EGU triggered event address.
* @brief Function for returning the EGU-triggered event address.
*
* @param[in] swi SWI instance.
* @param[in] channel Number of the EGU channel.
* @param[in] swi SWI instance.
* @param[in] channel Number of the EGU channel.
*
* @returns Address of EGU triggered event.
* @return Address of the EGU-triggered event.
*/
__STATIC_INLINE uint32_t nrfx_swi_event_triggered_address_get(nrfx_swi_t swi,
uint8_t channel)
@ -219,6 +218,8 @@ __STATIC_INLINE uint32_t nrfx_swi_event_triggered_address_get(nrfx_swi_t swi,
#endif // NRFX_CHECK(NRFX_EGU_ENABLED) || defined(__NRFX_DOXYGEN__)
/** @} */
void nrfx_swi_0_irq_handler(void);
void nrfx_swi_1_irq_handler(void);
@ -227,7 +228,6 @@ void nrfx_swi_3_irq_handler(void);
void nrfx_swi_4_irq_handler(void);
void nrfx_swi_5_irq_handler(void);
/** @} */
#ifdef __cplusplus
}

40
ext/hal/nordic/nrfx/drivers/include/nrfx_systick.h
View file

@ -49,71 +49,71 @@ extern "C" {
* This driver configures ARM(R) SysTick as a free-running timer.
* This timer is used to generate delays and pool for timeouts.
* Only relatively short timeouts are supported.
* The SysTick works on 64MHz and is 24-bits wide.
* It means that it overflows around 4 times per second and around 250&nbsp;ms
* would be the highest supported time in the library.
* But it would be really hard to detect if overflow was generated without
* using interrupts. For safety we would limit the maximum delay range by half.
* The SysTick works on 64MHz and is 24-bit wide.
* This means that it overflows around 4 times per second and
* around 250 microseconds will be the highest supported time in the library.
* As it is hard to detect if the overflow is generated without
* using interrupts, the maximum delay range is halved for safety reasons.
*/
/**
* @brief The value type that holds the SysTick state
* @brief The value type that holds the SysTick state.
*
* This variable is used to count the requested timeout.
* @sa nrfx_systick_get
*/
typedef struct {
uint32_t time; //!< Registered time value
uint32_t time; //!< Registered time value.
} nrfx_systick_state_t;
/**
* @brief Configure and start the timer
* @brief Function for configuring and starting the timer.
*
* Function configures SysTick as a free-running timer without interrupt.
*/
void nrfx_systick_init(void);
/**
* @brief Get current SysTick state
* @brief Function for getting the current SysTick state.
*
* Function gets current state of the SysTick timer.
* Function gets the current state of the SysTick timer.
* It can be used to check time-out by @ref nrfx_systick_test.
*
* @param[out] p_state The pointer to the state variable to be filled
* @param[out] p_state The pointer to the state variable to be filled.
*/
void nrfx_systick_get(nrfx_systick_state_t * p_state);
/**
* @brief Test if specified time is up in relation to remembered state
* @brief Function for testing if the current time is higher in relation to the remembered state.
*
* @param[in] p_state Remembered state set by @ref nrfx_systick_get
* @param[in] us Required time-out.
*
* @retval true If current time is higher than specified state plus given time-out.
* @retval false If current time is lower than specified state plus given time-out
* @retval true The current time is higher than the specified state plus the given time-out.
* @retval false The current time is lower than the specified state plus the given time-out.
*/
bool nrfx_systick_test(nrfx_systick_state_t const * p_state, uint32_t us);
/**
* @brief Blocking delay in CPU ticks
* @brief Function for delaying the execution for the specified amount of CPU ticks.
*
* @param[in] ticks Number of CPU ticks to delay.
* @param[in] ticks Number of CPU ticks when the execution is blocked.
*/
void nrfx_systick_delay_ticks(uint32_t ticks);
/**
* @brief Blocking delay in us
* @brief Function for delaying the execution for the specified amount of microseconds.
*
* @param[in] us Number of microseconds to delay.
* @param[in] us Number of microseconds when the execution is blocked.
*/
void nrfx_systick_delay_us(uint32_t us);
/**
* @brief Blocking delay in ms
* @brief Function for delaying the execution for the specified amount of milliseconds.
*
* This delay function removes the limits of the highest possible delay value.
*
* @param[in] ms Number of milliseconds to delay.
* @param[in] ms Number of milliseconds when the execution is blocked.
*/
void nrfx_systick_delay_ms(uint32_t ms);

153
ext/hal/nordic/nrfx/drivers/include/nrfx_temp.h Normal file
View file

@ -0,0 +1,153 @@
/*
* Copyright (c) 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRFX_TEMP_H__
#define NRFX_TEMP_H__
#include <nrfx.h>
#include <hal/nrf_temp.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrfx_temp TEMP driver
* @{
* @ingroup nrf_temp
* @brief Temperature sensor (TEMP) driver.
*/
/** @brief Structure for TEMP configuration. */
typedef struct
{
uint8_t interrupt_priority; /**< Interrupt priority. */
} nrfx_temp_config_t;
/** @brief TEMP default configuration. */
#define NRFX_TEMP_DEFAULT_CONFIG \
{ \
.interrupt_priority = NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
/**
* @brief TEMP driver data ready handler type.
*
* @param temperature Raw temperature in a 2's complement signed value
* representation. This value can be converted to Celsius
* scale using the @ref nrfx_temp_calculate() function.
*/
typedef void (* nrfx_temp_data_handler_t)(int32_t raw_temperature);
/**
* @brief Function for initializing the TEMP driver.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] handler Data handler provided by the user. If not provided,
* the driver is initialized in blocking mode.
*
* @retval NRFX_SUCCESS Driver was successfully initialized.
* @retval NRFX_ERROR_ALREADY_INITIALIZED Driver was already initialized.
*/
nrfx_err_t nrfx_temp_init(nrfx_temp_config_t const * p_config, nrfx_temp_data_handler_t handler);
/** @brief Function for uninitializing the TEMP driver. */
void nrfx_temp_uninit(void);
/**
* @brief Function for getting the temperature measurement in a 2's complement
* signed value representation.
*
* This function returns the last value prepared by the TEMP peripheral.
* In blocking mode, it should be used after calling the @ref nrfx_temp_measure()
* function. In non-blocking mode, it is called internally by the driver,
* and the value it returns is passed to the data handler.
*
* @return Temperature measurement result in a 2's complement signed value
* representation.
*/
__STATIC_INLINE int32_t nrfx_temp_result_get(void);
/**
* @brief Function for calculating the temperature value in Celsius scale from raw data.
*
* The returned temperature value is in Celsius scale, multiplied by 100
* For example, the actual temperature of 25.75[C] will be returned as a 2575 signed integer.
* Measurement accuracy is 0.25[C].
*
* @param[in] raw_measurement Temperature value in a 2's complement signed
* value representation.
*
* @return Temperature measurement result.
*/
int32_t nrfx_temp_calculate(int32_t raw_measurement);
/**
* @brief Function for starting the temperature measurement.
*
* Non-blocking mode:
* This function returns immediately. After a measurement, the handler specified
* during initialization is called, with measurement result as the parameter.
*
* Blocking mode:
* This function waits until the measurement is finished. The value should be read
* using the @ref nrfx_temp_result_get() function.
*
* @retval NRFX_SUCCESS In non-blocking mode: Measurement was started.
* An interrupt will be generated soon. <br>
* In blocking mode:
* Measurement was started and finished. Data can
* be read using the @ref nrfx_temp_result_get() function.
* @retval NRFX_ERROR_INTERNAL In non-blocking mode:
* Not applicable. <br>
* In blocking mode:
* Measurement data ready event did not occur.
*/
nrfx_err_t nrfx_temp_measure(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE int32_t nrfx_temp_result_get(void)
{
return nrf_temp_result_get(NRF_TEMP);
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_temp_irq_handler(void);
#ifdef __cplusplus
}
#endif
#endif // NRFX_TEMP_H__

46
ext/hal/nordic/nrfx/drivers/include/nrfx_timer.h
View file

@ -52,13 +52,11 @@ extern "C" {
typedef struct
{
NRF_TIMER_Type * p_reg; ///< Pointer to the structure with TIMER peripheral instance registers.
uint8_t instance_id; ///< Driver instance index.
uint8_t instance_id; ///< Index of the driver instance. For internal use only.
uint8_t cc_channel_count; ///< Number of capture/compare channels.
} nrfx_timer_t;
/**
* @brief Macro for creating a timer driver instance.
*/
/** @brief Macro for creating a timer driver instance. */
#define NRFX_TIMER_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_TIMER, id), \
@ -66,6 +64,7 @@ typedef struct
.cc_channel_count = NRF_TIMER_CC_CHANNEL_COUNT(id), \
}
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TIMER0_ENABLED)
NRFX_TIMER0_INST_IDX,
@ -84,10 +83,9 @@ enum {
#endif
NRFX_TIMER_ENABLED_COUNT
};
#endif
/**
* @brief Timer driver instance configuration structure.
*/
/** @brief The configuration structure of the timer driver instance. */
typedef struct
{
nrf_timer_frequency_t frequency; ///< Frequency.
@ -97,9 +95,7 @@ typedef struct
void * p_context; ///< Context passed to interrupt handler.
} nrfx_timer_config_t;
/**
* @brief Timer driver instance default configuration.
*/
/** @brief Timer driver instance default configuration. */
#define NRFX_TIMER_DEFAULT_CONFIG \
{ \
.frequency = (nrf_timer_frequency_t)NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY,\
@ -125,12 +121,12 @@ typedef void (* nrfx_timer_event_handler_t)(nrf_timer_event_t event_type,
* @brief Function for initializing the timer.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] timer_event_handler Event handler provided by the user.
* Must not be NULL.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the instance is already initialized.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The instance is already initialized.
*/
nrfx_err_t nrfx_timer_init(nrfx_timer_t const * const p_instance,
nrfx_timer_config_t const * p_config,
@ -153,7 +149,7 @@ void nrfx_timer_enable(nrfx_timer_t const * const p_instance);
/**
* @brief Function for turning off the timer.
*
* Note that the timer will allow to enter the lowest possible SYSTEM_ON state
* The timer will allow to enter the lowest possible SYSTEM_ON state
* only after this function is called.
*
* @param[in] p_instance Pointer to the driver instance structure.
@ -165,7 +161,8 @@ void nrfx_timer_disable(nrfx_timer_t const * const p_instance);
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @return True if timer is enabled, false otherwise.
* @retval true Timer is enabled.
* @retval false Timer is not enabled.
*/
bool nrfx_timer_is_enabled(nrfx_timer_t const * const p_instance);
@ -198,7 +195,7 @@ void nrfx_timer_clear(nrfx_timer_t const * const p_instance);
void nrfx_timer_increment(nrfx_timer_t const * const p_instance);
/**
* @brief Function for returning the address of a specific timer task.
* @brief Function for returning the address of the specified timer task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] timer_task Timer task.
@ -209,7 +206,7 @@ __STATIC_INLINE uint32_t nrfx_timer_task_address_get(nrfx_timer_t const * const
nrf_timer_task_t timer_task);
/**
* @brief Function for returning the address of a specific timer capture task.
* @brief Function for returning the address of the specified timer capture task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel Capture channel number.
@ -220,7 +217,7 @@ __STATIC_INLINE uint32_t nrfx_timer_capture_task_address_get(nrfx_timer_t const
uint32_t channel);
/**
* @brief Function for returning the address of a specific timer event.
* @brief Function for returning the address of the specified timer event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] timer_event Timer event.
@ -231,7 +228,7 @@ __STATIC_INLINE uint32_t nrfx_timer_event_address_get(nrfx_timer_t const * const
nrf_timer_event_t timer_event);
/**
* @brief Function for returning the address of a specific timer compare event.
* @brief Function for returning the address of the specified timer compare event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] channel Compare channel number.
@ -253,7 +250,7 @@ uint32_t nrfx_timer_capture(nrfx_timer_t const * const p_instance,
nrf_timer_cc_channel_t cc_channel);
/**
* @brief Function for returning the capture value from a specific channel.
* @brief Function for returning the capture value from the specified channel.
*
* Use this function to read channel values when PPI is used for capturing.
*
@ -279,15 +276,14 @@ void nrfx_timer_compare(nrfx_timer_t const * const p_instance,
bool enable_int);
/**
* @brief Function for setting the timer channel in extended compare mode.
* @brief Function for setting the timer channel in the extended compare mode.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] cc_channel Compare channel number.
* @param[in] cc_value Compare value.
* @param[in] timer_short_mask Shortcut between the compare event on the channel
* and the timer task (STOP or CLEAR).
* @param[in] enable_int Enable or disable the interrupt for the compare
* channel.
* @param[in] enable_int Enable or disable the interrupt for the compare channel.
*/
void nrfx_timer_extended_compare(nrfx_timer_t const * const p_instance,
nrf_timer_cc_channel_t cc_channel,
@ -386,6 +382,8 @@ __STATIC_INLINE uint32_t nrfx_timer_ms_to_ticks(nrfx_timer_t const * const p_ins
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_timer_0_irq_handler(void);
void nrfx_timer_1_irq_handler(void);
@ -394,8 +392,6 @@ void nrfx_timer_3_irq_handler(void);
void nrfx_timer_4_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

216
ext/hal/nordic/nrfx/drivers/include/nrfx_twi.h
View file

@ -43,7 +43,7 @@ extern "C" {
* @defgroup nrfx_twi TWI driver
* @{
* @ingroup nrf_twi
* @brief TWI peripheral driver.
* @brief Two Wire Interface master (TWI) peripheral driver.
*/
/**
@ -52,18 +52,17 @@ extern "C" {
typedef struct
{
NRF_TWI_Type * p_twi; ///< Pointer to a structure with TWI registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_twi_t;
/**
* @brief Macro for creating a TWI master driver instance.
*/
/** @brief Macro for creating a TWI master driver instance. */
#define NRFX_TWI_INSTANCE(id) \
{ \
.p_twi = NRFX_CONCAT_2(NRF_TWI, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWI, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TWI0_ENABLED)
NRFX_TWI0_INST_IDX,
@ -73,22 +72,19 @@ enum {
#endif
NRFX_TWI_ENABLED_COUNT
};
#endif
/**
* @brief Structure for the TWI master driver instance configuration.
*/
/** @brief Structure for the configuration of the TWI master driver instance. */
typedef struct
{
uint32_t scl; ///< SCL pin number.
uint32_t sda; ///< SDA pin number.
nrf_twi_frequency_t frequency; ///< TWI frequency.
uint8_t interrupt_priority; ///< Interrupt priority.
bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit.
uint32_t scl; ///< SCL pin number.
uint32_t sda; ///< SDA pin number.
nrf_twi_frequency_t frequency; ///< TWI frequency.
uint8_t interrupt_priority; ///< Interrupt priority.
bool hold_bus_uninit; ///< Hold pull up state on GPIO pins after uninit.
} nrfx_twi_config_t;
/**
* @brief TWI master driver instance default configuration.
*/
/** @brief The default configuration of the TWI master driver instance. */
#define NRFX_TWI_DEFAULT_CONFIG \
{ \
.frequency = (nrf_twi_frequency_t)NRFX_TWI_DEFAULT_CONFIG_FREQUENCY, \
@ -98,12 +94,12 @@ typedef struct
.hold_bus_uninit = NRFX_TWI_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \
}
#define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
#define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */
/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
#define NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
/** @brief Flag indicating that the TX transfer will not end with a stop condition. */
#define NRFX_TWI_FLAG_TX_NO_STOP (1UL << 5)
/**
* @brief TWI master driver event types.
*/
/** @brief TWI master driver event types. */
typedef enum
{
NRFX_TWI_EVT_DONE, ///< Transfer completed event.
@ -111,20 +107,16 @@ typedef enum
NRFX_TWI_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte.
} nrfx_twi_evt_type_t;
/**
* @brief TWI master driver transfer types.
*/
/** @brief TWI master driver transfer types. */
typedef enum
{
NRFX_TWI_XFER_TX, ///< TX transfer.
NRFX_TWI_XFER_RX, ///< RX transfer.
NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
NRFX_TWI_XFER_TX, ///< TX transfer.
NRFX_TWI_XFER_RX, ///< RX transfer.
NRFX_TWI_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
NRFX_TWI_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
} nrfx_twi_xfer_type_t;
/**
* @brief Structure for a TWI transfer descriptor.
*/
/** @brief Structure for a TWI transfer descriptor. */
typedef struct
{
nrfx_twi_xfer_type_t type; ///< Type of transfer.
@ -136,72 +128,72 @@ typedef struct
} nrfx_twi_xfer_desc_t;
/**@brief Macro for setting the TX transfer descriptor. */
/** @brief Macro for setting the TX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TX(addr, p_data, length) \
{ \
.type = NRFX_TWI_XFER_TX, \
.address = addr, \
.primary_length = length, \
.p_primary_buf = p_data, \
}
{ \
.type = NRFX_TWI_XFER_TX, \
.address = addr, \
.primary_length = length, \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_secondary_buf = NULL, \
}
/**@brief Macro for setting the RX transfer descriptor. */
/** @brief Macro for setting the RX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_RX(addr, p_data, length) \
{ \
.type = NRFX_TWI_XFER_RX, \
.address = addr, \
.primary_length = length, \
.p_primary_buf = p_data, \
}
{ \
.type = NRFX_TWI_XFER_RX, \
.address = addr, \
.primary_length = length, \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_secondary_buf = NULL, \
}
/**@brief Macro for setting the TXRX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
{ \
.type = NRFX_TWI_XFER_TXRX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = rx_len, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_rx, \
}
/** @brief Macro for setting the TX-RX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
{ \
.type = NRFX_TWI_XFER_TXRX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = rx_len, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_rx, \
}
/**@brief Macro for setting the TXTX transfer descriptor. */
/** @brief Macro for setting the TX-TX transfer descriptor. */
#define NRFX_TWI_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
{ \
.type = NRFX_TWI_XFER_TXTX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = tx_len2, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_tx2, \
}
{ \
.type = NRFX_TWI_XFER_TXTX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = tx_len2, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_tx2, \
}
/**
* @brief Structure for a TWI event.
*/
/** @brief Structure for a TWI event. */
typedef struct
{
nrfx_twi_evt_type_t type; ///< Event type.
nrfx_twi_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_twi_evt_t;
/**
* @brief TWI event handler prototype.
*/
/** @brief TWI event handler prototype. */
typedef void (* nrfx_twi_evt_handler_t)(nrfx_twi_evt_t const * p_event,
void * p_context);
/**
* @brief Function for initializing the TWI driver instance.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
* @param[in] p_context Context passed to event handler.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
* @param[in] p_context Context passed to event handler.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* @retval NRFX_SUCCESS Initialization is successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is in invalid state.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@ -246,11 +238,11 @@ void nrfx_twi_disable(nrfx_twi_t const * p_instance);
* after the transfer has completed successfully (allowing
* for a repeated start in the next transfer).
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
uint8_t address,
@ -269,12 +261,12 @@ nrfx_err_t nrfx_twi_tx(nrfx_twi_t const * p_instance,
* @param[in] p_data Pointer to a receive buffer.
* @param[in] length Number of bytes to be received.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
*/
nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
uint8_t address,
@ -285,32 +277,32 @@ nrfx_err_t nrfx_twi_rx(nrfx_twi_t const * p_instance,
* @brief Function for preparing a TWI transfer.
*
* The following transfer types can be configured (@ref nrfx_twi_xfer_desc_t::type):
* - @ref NRFX_TWI_XFER_TXRX<span></span>: Write operation followed by a read operation (without STOP condition in between).
* - @ref NRFX_TWI_XFER_TXTX<span></span>: Write operation followed by a write operation (without STOP condition in between).
* - @ref NRFX_TWI_XFER_TX<span></span>: Write operation (with or without STOP condition).
* - @ref NRFX_TWI_XFER_RX<span></span>: Read operation (with STOP condition).
* - @ref NRFX_TWI_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
* - @ref NRFX_TWI_XFER_TXTX - Write operation followed by a write operation (without STOP condition in between).
* - @ref NRFX_TWI_XFER_TX - Write operation (with or without STOP condition).
* - @ref NRFX_TWI_XFER_RX - Read operation (with STOP condition).
*
* @note TXRX and TXTX transfers are supported only in non-blocking mode.
* @note TX-RX and TX-TX transfers are supported only in non-blocking mode.
*
* Additional options are provided using the flags parameter:
* - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
* - @ref NRFX_TWI_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
* - @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER - No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
* - @ref NRFX_TWI_FLAG_TX_NO_STOP - No stop condition after TX transfer.
*
* @note
* Some flag combinations are invalid:
* - @ref NRFX_TWI_FLAG_TX_NO_STOP with @ref nrfx_twi_xfer_desc_t::type different than @ref NRFX_TWI_XFER_TX
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_xfer_desc Pointer to the transfer descriptor.
* @param[in] flags Transfer options (0 for default settings).
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_xfer_desc Pointer to the transfer descriptor.
* @param[in] flags Transfer options (0 for default settings).
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
* @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN If the unread data was replaced by new data (TXRX and RX)
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
* @retval NRFX_ERROR_INTERNAL An error is detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_OVERRUN The unread data is replaced by new data (TXRX and RX)
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte.
*/
nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance,
nrfx_twi_xfer_desc_t const * p_xfer_desc,
@ -321,8 +313,8 @@ nrfx_err_t nrfx_twi_xfer(nrfx_twi_t const * p_instance,
*
* @param[in] p_instance TWI instance.
*
* @retval true If the TWI driver is currently busy performing a transfer.
* @retval false If the TWI driver is ready for a new transfer.
* @retval true The TWI driver is currently busy performing a transfer.
* @retval false The TWI driver is ready for a new transfer.
*/
bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance);
@ -331,7 +323,7 @@ bool nrfx_twi_is_busy(nrfx_twi_t const * p_instance);
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @return Data count.
* @return Data count.
*/
size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance);
@ -341,16 +333,18 @@ size_t nrfx_twi_data_count_get(nrfx_twi_t const * const p_instance);
* A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWI_FLAG_NO_XFER_EVT_HANDLER
* option is used.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*
* @return STOPPED event address.
* @return STOPPED event address.
*/
uint32_t nrfx_twi_stopped_event_get(nrfx_twi_t const * p_instance);
/** @} */
void nrfx_twi_0_irq_handler(void);
void nrfx_twi_1_irq_handler(void);
/** @} */
#ifdef __cplusplus
}

259
ext/hal/nordic/nrfx/drivers/include/nrfx_twim.h
View file

@ -43,27 +43,24 @@ extern "C" {
* @defgroup nrfx_twim TWIM driver
* @{
* @ingroup nrf_twim
* @brief TWIM peripheral driver.
* @brief Two Wire Interface Master with EasyDMA (TWIM) peripheral driver.
*/
/**
* @brief Structure for the TWI master driver instance.
*/
/** @brief Structure for the TWI master driver instance. */
typedef struct
{
NRF_TWIM_Type * p_twim; ///< Pointer to a structure with TWIM registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_twim_t;
/**
* @brief Macro for creating a TWI master driver instance.
*/
/** @brief Macro for creating a TWI master driver instance. */
#define NRFX_TWIM_INSTANCE(id) \
{ \
.p_twim = NRFX_CONCAT_2(NRF_TWIM, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIM, id, _INST_IDX), \
}
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TWIM0_ENABLED)
NRFX_TWIM0_INST_IDX,
@ -79,41 +76,42 @@ enum {
#endif
NRFX_TWIM_ENABLED_COUNT
};
#endif
/**
* @brief Structure for the TWI master driver instance configuration.
*/
/** @brief Structure for the TWI master driver instance configuration. */
typedef struct
{
uint32_t scl; ///< SCL pin number.
uint32_t sda; ///< SDA pin number.
nrf_twim_frequency_t frequency; ///< TWIM frequency.
uint8_t interrupt_priority; ///< Interrupt priority.
bool hold_bus_uninit; ///< Hold pull up state on gpio pins after uninit.
uint32_t scl; ///< SCL pin number.
uint32_t sda; ///< SDA pin number.
nrf_twim_frequency_t frequency; ///< TWIM frequency.
uint8_t interrupt_priority; ///< Interrupt priority.
bool hold_bus_uninit; ///< Hold pull up state on GPIO pins after uninit.
} nrfx_twim_config_t;
/**
* @brief TWI master driver instance default configuration.
*/
/** @brief TWI master driver instance default configuration. */
#define NRFX_TWIM_DEFAULT_CONFIG \
{ \
.frequency = (nrf_twim_frequency_t)NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY, \
.scl = 31, \
.sda = 31, \
.frequency = (nrf_twim_frequency_t)NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY, \
.interrupt_priority = NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY, \
.hold_bus_uninit = NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT, \
}
#define NRFX_TWIM_FLAG_TX_POSTINC (1UL << 0) /**< TX buffer address incremented after transfer. */
#define NRFX_TWIM_FLAG_RX_POSTINC (1UL << 1) /**< RX buffer address incremented after transfer. */
#define NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2) /**< Interrupt after each transfer is suppressed, and the event handler is not called. */
#define NRFX_TWIM_FLAG_HOLD_XFER (1UL << 3) /**< Set up the transfer but do not start it. */
#define NRFX_TWIM_FLAG_REPEATED_XFER (1UL << 4) /**< Flag indicating that the transfer will be executed multiple times. */
#define NRFX_TWIM_FLAG_TX_NO_STOP (1UL << 5) /**< Flag indicating that the TX transfer will not end with a stop condition. */
/** @brief Flag indicating that TX buffer address will be incremented after the transfer. */
#define NRFX_TWIM_FLAG_TX_POSTINC (1UL << 0)
/** @brief Flag indicating that RX buffer address will be incremented after the transfer. */
#define NRFX_TWIM_FLAG_RX_POSTINC (1UL << 1)
/** @brief Flag indicating that the interrupt after each transfer will be suppressed, and the event handler will not be called. */
#define NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER (1UL << 2)
/** @brief Flag indicating that the transfer will be set up, but not started. */
#define NRFX_TWIM_FLAG_HOLD_XFER (1UL << 3)
/** @brief Flag indicating that the transfer will be executed multiple times. */
#define NRFX_TWIM_FLAG_REPEATED_XFER (1UL << 4)
/** @brief Flag indicating that the TX transfer will not end with a stop condition. */
#define NRFX_TWIM_FLAG_TX_NO_STOP (1UL << 5)
/**
* @brief TWI master driver event types.
*/
/** @brief TWI master driver event types. */
typedef enum
{
NRFX_TWIM_EVT_DONE, ///< Transfer completed event.
@ -121,97 +119,93 @@ typedef enum
NRFX_TWIM_EVT_DATA_NACK ///< Error event: NACK received after sending a data byte.
} nrfx_twim_evt_type_t;
/**
* @brief TWI master driver transfer types.
*/
/** @brief TWI master driver transfer types. */
typedef enum
{
NRFX_TWIM_XFER_TX, ///< TX transfer.
NRFX_TWIM_XFER_RX, ///< RX transfer.
NRFX_TWIM_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
NRFX_TWIM_XFER_TX, ///< TX transfer.
NRFX_TWIM_XFER_RX, ///< RX transfer.
NRFX_TWIM_XFER_TXRX, ///< TX transfer followed by RX transfer with repeated start.
NRFX_TWIM_XFER_TXTX ///< TX transfer followed by TX transfer with repeated start.
} nrfx_twim_xfer_type_t;
/**
* @brief Structure for a TWI transfer descriptor.
*/
/** @brief Structure for a TWI transfer descriptor. */
typedef struct
{
nrfx_twim_xfer_type_t type; ///< Type of transfer.
uint8_t address; ///< Slave address.
size_t primary_length; ///< Number of bytes transferred.
size_t secondary_length; ///< Number of bytes transferred.
uint8_t * p_primary_buf; ///< Pointer to transferred data.
uint8_t * p_secondary_buf; ///< Pointer to transferred data.
nrfx_twim_xfer_type_t type; ///< Type of transfer.
uint8_t address; ///< Slave address.
size_t primary_length; ///< Number of bytes transferred.
size_t secondary_length; ///< Number of bytes transferred.
uint8_t * p_primary_buf; ///< Pointer to transferred data.
uint8_t * p_secondary_buf; ///< Pointer to transferred data.
} nrfx_twim_xfer_desc_t;
/**@brief Macro for setting the TX transfer descriptor. */
/** @brief Macro for setting the TX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TX(addr, p_data, length) \
{ \
.type = NRFX_TWIM_XFER_TX, \
.address = addr, \
.primary_length = length, \
.p_primary_buf = p_data, \
}
{ \
.type = NRFX_TWIM_XFER_TX, \
.address = addr, \
.primary_length = length, \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_secondary_buf = NULL, \
}
/**@brief Macro for setting the RX transfer descriptor. */
/** @brief Macro for setting the RX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_RX(addr, p_data, length) \
{ \
.type = NRFX_TWIM_XFER_RX, \
.address = addr, \
.primary_length = length, \
.p_primary_buf = p_data, \
}
{ \
.type = NRFX_TWIM_XFER_RX, \
.address = addr, \
.primary_length = length, \
.secondary_length = 0, \
.p_primary_buf = p_data, \
.p_secondary_buf = NULL, \
}
/**@brief Macro for setting the TXRX transfer descriptor. */
/** @brief Macro for setting the TX-RX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TXRX(addr, p_tx, tx_len, p_rx, rx_len) \
{ \
.type = NRFX_TWIM_XFER_TXRX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = rx_len, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_rx, \
}
{ \
.type = NRFX_TWIM_XFER_TXRX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = rx_len, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_rx, \
}
/**@brief Macro for setting the TXTX transfer descriptor. */
/** @brief Macro for setting the TX-TX transfer descriptor. */
#define NRFX_TWIM_XFER_DESC_TXTX(addr, p_tx, tx_len, p_tx2, tx_len2) \
{ \
.type = NRFX_TWIM_XFER_TXTX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = tx_len2, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_tx2, \
}
{ \
.type = NRFX_TWIM_XFER_TXTX, \
.address = addr, \
.primary_length = tx_len, \
.secondary_length = tx_len2, \
.p_primary_buf = p_tx, \
.p_secondary_buf = p_tx2, \
}
/**
* @brief Structure for a TWI event.
*/
/** @brief Structure for a TWI event. */
typedef struct
{
nrfx_twim_evt_type_t type; ///< Event type.
nrfx_twim_xfer_desc_t xfer_desc; ///< Transfer details.
} nrfx_twim_evt_t;
/**
* @brief TWI event handler prototype.
*/
/** @brief TWI event handler prototype. */
typedef void (* nrfx_twim_evt_handler_t)(nrfx_twim_evt_t const * p_event,
void * p_context);
/**
* @brief Function for initializing the TWI driver instance.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
* @param[in] p_context Context passed to event handler.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. If NULL, blocking mode is enabled.
* @param[in] p_context Context passed to event handler.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is in invalid state.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is in invalid state.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
@ -250,7 +244,7 @@ void nrfx_twim_disable(nrfx_twim_t const * p_instance);
*
* @note Peripherals using EasyDMA (including TWIM) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
* this function fails with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] address Address of a specific slave device (only 7 LSB).
@ -263,12 +257,12 @@ void nrfx_twim_disable(nrfx_twim_t const * p_instance);
* after the transfer has completed successfully (allowing
* for a repeated start in the next transfer).
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffer is not placed in the Data RAM region.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL Error is detected by hardware.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffer is not placed in the Data RAM region.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
*/
nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance,
uint8_t address,
@ -290,11 +284,11 @@ nrfx_err_t nrfx_twim_tx(nrfx_twim_t const * p_instance,
* description in the Product Specification). The driver
* checks it with assertion.
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte in polling mode.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_INTERNAL Error is detected by hardware.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address in polling mode.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte in polling mode.
*/
nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
uint8_t address,
@ -305,26 +299,26 @@ nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
* @brief Function for preparing a TWI transfer.
*
* The following transfer types can be configured (@ref nrfx_twim_xfer_desc_t::type):
* - @ref NRFX_TWIM_XFER_TXRX<span></span>: Write operation followed by a read operation (without STOP condition in between).
* - @ref NRFX_TWIM_XFER_TXTX<span></span>: Write operation followed by a write operation (without STOP condition in between).
* - @ref NRFX_TWIM_XFER_TX<span></span>: Write operation (with or without STOP condition).
* - @ref NRFX_TWIM_XFER_RX<span></span>: Read operation (with STOP condition).
* - @ref NRFX_TWIM_XFER_TXRX - Write operation followed by a read operation (without STOP condition in between).
* - @ref NRFX_TWIM_XFER_TXTX - Write operation followed by a write operation (without STOP condition in between).
* - @ref NRFX_TWIM_XFER_TX - Write operation (with or without STOP condition).
* - @ref NRFX_TWIM_XFER_RX - Read operation (with STOP condition).
*
* @note TXRX and TXTX transfers are supported only in non-blocking mode.
* @note TX-RX and TX-TX transfers are supported only in non-blocking mode.
*
* Additional options are provided using the flags parameter:
* - @ref NRFX_TWIM_FLAG_TX_POSTINC and @ref NRFX_TWIM_FLAG_RX_POSTINC<span></span>: Post-incrementation of buffer addresses. Supported only by TWIM.
* - @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER<span></span>: No user event handler after transfer completion. In most cases, this also means no interrupt at the end of the transfer.
* - @ref NRFX_TWIM_FLAG_HOLD_XFER<span></span>: Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI. Supported only by TWIM.
* - @ref NRFX_TWIM_FLAG_TX_POSTINC and @ref NRFX_TWIM_FLAG_RX_POSTINC - Post-incrementation of buffer addresses.
* - @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER - No user event handler after the transfer completion. In most cases, this also means no interrupt at the end of the transfer.
* - @ref NRFX_TWIM_FLAG_HOLD_XFER - Driver is not starting the transfer. Use this flag if the transfer is triggered externally by PPI.
* Use @ref nrfx_twim_start_task_get to get the address of the start task.
* - @ref NRFX_TWIM_FLAG_REPEATED_XFER<span></span>: Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI).
* - @ref NRFX_TWIM_FLAG_REPEATED_XFER - Prepare for repeated transfers. You can set up a number of transfers that will be triggered externally (for example by PPI).
* An example is a TXRX transfer with the options @ref NRFX_TWIM_FLAG_RX_POSTINC, @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER, and @ref NRFX_TWIM_FLAG_REPEATED_XFER.
* After the transfer is set up, a set of transfers can be triggered by PPI that will read, for example, the same register of an
* external component and put it into a RAM buffer without any interrupts. @ref nrfx_twim_stopped_event_get can be used to get the
* address of the STOPPED event, which can be used to count the number of transfers. If @ref NRFX_TWIM_FLAG_REPEATED_XFER is used,
* the driver does not set the driver instance into busy state, so you must ensure that the next transfers are set up
* when TWIM is not active. Supported only by TWIM.
* - @ref NRFX_TWIM_FLAG_TX_NO_STOP<span></span>: No stop condition after TX transfer.
* when TWIM is not active.
* - @ref NRFX_TWIM_FLAG_TX_NO_STOP - No stop condition after the TX transfer.
*
* @note
* Some flag combinations are invalid:
@ -339,17 +333,17 @@ nrfx_err_t nrfx_twim_rx(nrfx_twim_t const * p_instance,
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_xfer_desc Pointer to the transfer descriptor.
* @param[in] flags Transfer options (0 for default settings).
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_xfer_desc Pointer to the transfer descriptor.
* @param[in] flags Transfer options (0 for default settings).
*
* @retval NRFX_SUCCESS If the procedure was successful.
* @retval NRFX_ERROR_BUSY If the driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED If the provided parameters are not supported.
* @retval NRFX_ERROR_INTERNAL If an error was detected by hardware.
* @retval NRFX_ERROR_INVALID_ADDR If the provided buffers are not placed in the Data RAM region.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK If NACK received after sending the address.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK If NACK received after sending a data byte.
* @retval NRFX_SUCCESS The procedure is successful.
* @retval NRFX_ERROR_BUSY The driver is not ready for a new transfer.
* @retval NRFX_ERROR_NOT_SUPPORTED The provided parameters are not supported.
* @retval NRFX_ERROR_INTERNAL Error is detected by hardware.
* @retval NRFX_ERROR_INVALID_ADDR The provided buffers are not placed in the Data RAM region.
* @retval NRFX_ERROR_DRV_TWI_ERR_ANACK NACK is received after sending the address.
* @retval NRFX_ERROR_DRV_TWI_ERR_DNACK NACK is received after sending a data byte.
*/
nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance,
nrfx_twim_xfer_desc_t const * p_xfer_desc,
@ -360,8 +354,8 @@ nrfx_err_t nrfx_twim_xfer(nrfx_twim_t const * p_instance,
*
* @param[in] p_instance TWI instance.
*
* @retval true If the TWI driver is currently busy performing a transfer.
* @retval false If the TWI driver is ready for a new transfer.
* @retval true The TWI driver is currently busy performing a transfer.
* @retval false The TWI driver is ready for a new transfer.
*/
bool nrfx_twim_is_busy(nrfx_twim_t const * p_instance);
@ -369,13 +363,13 @@ bool nrfx_twim_is_busy(nrfx_twim_t const * p_instance);
/**
* @brief Function for returning the address of a TWIM start task.
*
* This function should be used if @ref nrfx_twim_xfer was called with the flag @ref NRFX_TWIM_FLAG_HOLD_XFER.
* This function is to be used if @ref nrfx_twim_xfer was called with the flag @ref NRFX_TWIM_FLAG_HOLD_XFER.
* In that case, the transfer is not started by the driver, but it must be started externally by PPI.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] xfer_type Transfer type used in the last call of the @ref nrfx_twim_xfer function.
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] xfer_type Transfer type used in the last call of the @ref nrfx_twim_xfer function.
*
* @return Start task address (TX or RX) depending on the value of xfer_type.
* @return Start task address (TX or RX) depending on the value of xfer_type.
*/
uint32_t nrfx_twim_start_task_get(nrfx_twim_t const * p_instance, nrfx_twim_xfer_type_t xfer_type);
@ -385,12 +379,13 @@ uint32_t nrfx_twim_start_task_get(nrfx_twim_t const * p_instance, nrfx_twim_xfer
* A STOPPED event can be used to detect the end of a transfer if the @ref NRFX_TWIM_FLAG_NO_XFER_EVT_HANDLER
* option is used.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_instance Pointer to the driver instance structure.
*
* @return STOPPED event address.
* @return STOPPED event address.
*/
uint32_t nrfx_twim_stopped_event_get(nrfx_twim_t const * p_instance);
/** @} */
void nrfx_twim_0_irq_handler(void);
void nrfx_twim_1_irq_handler(void);
@ -398,8 +393,6 @@ void nrfx_twim_2_irq_handler(void);
void nrfx_twim_3_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

192
ext/hal/nordic/nrfx/drivers/include/nrfx_twis.h
View file

@ -44,18 +44,17 @@ extern "C" {
* @defgroup nrfx_twis TWIS driver
* @{
* @ingroup nrf_twis
* @brief Two Wire Slave interface (TWIS) peripheral driver.
* @brief Two Wire Interface Slave with EasyDMA (TWIS) peripheral driver.
*/
/**
* @brief TWIS driver instance data structure.
*/
/** @brief TWIS driver instance data structure. */
typedef struct
{
NRF_TWIS_Type * p_reg; ///< Pointer to a structure with TWIS registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_twis_t;
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_TWIS0_ENABLED)
NRFX_TWIS0_INST_IDX,
@ -71,32 +70,29 @@ enum {
#endif
NRFX_TWIS_ENABLED_COUNT
};
#endif
/**
* @brief Macro for creating a TWIS driver instance.
*/
/** @brief Macro for creating a TWIS driver instance. */
#define NRFX_TWIS_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_TWIS, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_TWIS, id, _INST_IDX), \
}
/**
* @brief Event callback function event definitions.
*/
/** @brief Event callback function event definitions. */
typedef enum
{
NRFX_TWIS_EVT_READ_REQ, ///< Read request detected.
/**< If there is no buffer prepared, buf_req flag in the even will be set.
Call then @ref nrfx_twis_tx_prepare to give parameters for buffer.
*/
NRFX_TWIS_EVT_READ_DONE, ///< Read request has finished - free any data.
NRFX_TWIS_EVT_READ_DONE, ///< Read request finished - free any data.
NRFX_TWIS_EVT_READ_ERROR, ///< Read request finished with error.
NRFX_TWIS_EVT_WRITE_REQ, ///< Write request detected.
/**< If there is no buffer prepared, buf_req flag in the even will be set.
Call then @ref nrfx_twis_rx_prepare to give parameters for buffer.
*/
NRFX_TWIS_EVT_WRITE_DONE, ///< Write request has finished - process data.
NRFX_TWIS_EVT_WRITE_DONE, ///< Write request finished - process data.
NRFX_TWIS_EVT_WRITE_ERROR, ///< Write request finished with error.
NRFX_TWIS_EVT_GENERAL_ERROR ///< Error that happens not inside WRITE or READ transaction.
} nrfx_twis_evt_type_t;
@ -106,7 +102,7 @@ typedef enum
*
* This is flag enum - values from this enum can be connected using logical or operator.
* @note
* We could use directly @ref nrf_twis_error_t. Error type enum is redefined here because
* You can use directly @ref nrf_twis_error_t. Error type enum is redefined here because
* of possible future extension (eg. supporting timeouts and synchronous mode).
*/
typedef enum
@ -117,9 +113,7 @@ typedef enum
NRFX_TWIS_ERROR_UNEXPECTED_EVENT = 1 << 8 /**< Unexpected event detected by state machine. */
} nrfx_twis_error_t;
/**
* @brief TWIS driver event structure.
*/
/** @brief TWIS driver event structure. */
typedef struct
{
nrfx_twis_evt_type_t type; ///< Event type.
@ -130,7 +124,7 @@ typedef struct
uint32_t tx_amount; ///< Data for @ref NRFX_TWIS_EVT_READ_DONE.
uint32_t rx_amount; ///< Data for @ref NRFX_TWIS_EVT_WRITE_DONE.
uint32_t error; ///< Data for @ref NRFX_TWIS_EVT_GENERAL_ERROR.
} data;
} data; ///< Union to store event data.
} nrfx_twis_evt_t;
/**
@ -140,9 +134,7 @@ typedef struct
*/
typedef void (*nrfx_twis_event_handler_t)(nrfx_twis_evt_t const * p_event);
/**
* @brief Structure for TWIS configuration.
*/
/** @brief Structure for TWIS configuration. */
typedef struct
{
uint32_t addr[2]; //!< Set addresses that this slave should respond. Set 0 to disable.
@ -150,19 +142,17 @@ typedef struct
uint32_t sda; //!< SDA pin number.
nrf_gpio_pin_pull_t scl_pull; //!< SCL pin pull.
nrf_gpio_pin_pull_t sda_pull; //!< SDA pin pull.
uint8_t interrupt_priority; //!< The priority of interrupt for the module to set.
uint8_t interrupt_priority; //!< The priority of interrupt for the module to be set.
} nrfx_twis_config_t;
/**
* @brief Generate default configuration for TWIS driver instance.
*/
#define NRFX_TWIS_DEFAULT_CONFIG \
{ \
/** @brief Generate the default configuration for the TWIS driver instance. */
#define NRFX_TWIS_DEFAULT_CONFIG \
{ \
.addr = { NRFX_TWIS_DEFAULT_CONFIG_ADDR0, \
NRFX_TWIS_DEFAULT_CONFIG_ADDR1 }, \
.scl = 31, \
.scl_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL, \
.sda = 31, \
.scl_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL, \
.sda_pull = (nrf_gpio_pin_pull_t)NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL, \
.interrupt_priority = NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY \
}
@ -170,19 +160,19 @@ typedef struct
/**
* @brief Function for initializing the TWIS driver instance.
*
* Function initializes and enables TWIS driver.
* @attention After driver initialization enable it by @ref nrfx_twis_enable.
* Function initializes and enables the TWIS driver.
* @attention After driver initialization enable it with @ref nrfx_twis_enable.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @attention @em p_instance has to be global object.
* It would be used by interrupts so make it sure that object
* would not be destroyed when function is leaving.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] event_handler Event handler provided by the user.
* @param[in] p_instance Pointer to the driver instance structure.
* @attention @em p_instance has to be global object.
* It will be used by interrupts so make it sure that object
* is not destroyed when function is leaving.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If the driver is already initialized.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* @retval NRFX_SUCCESS Initialization is successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if NRFX_PRS_ENABLED
* is set to a value other than zero.
@ -194,24 +184,25 @@ nrfx_err_t nrfx_twis_init(nrfx_twis_t const * p_instance,
/**
* @brief Function for uninitializing the TWIS driver instance.
*
* Function initializes the peripheral and resets all registers to default values.
* Function uninitializes the peripheral and resets all registers to default values.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @note
* It is safe to call nrfx_twis_uninit even before initialization.
* Actually @ref nrfx_twis_init function calls this function to
* Actually, @ref nrfx_twis_init function calls this function to
* make sure that TWIS state is known.
* @note
* If TWIS driver was in uninitialized state before calling this function,
* selected pins would not be reset to default configuration.
* the selected pins would not be reset to default configuration.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_twis_uninit(nrfx_twis_t const * p_instance);
/**
* @brief Enable TWIS instance.
* @brief Function for enabling the TWIS instance.
*
* This function enables TWIS instance.
* Function defined if there is needs for dynamically enabling and disabling the peripheral.
* This function enables the TWIS instance.
* Function defined if there is need for dynamically enabling and disabling the peripheral.
* Use @ref nrfx_twis_enable and @ref nrfx_twis_disable functions.
* They do not change any configuration registers.
*
@ -220,9 +211,9 @@ void nrfx_twis_uninit(nrfx_twis_t const * p_instance);
void nrfx_twis_enable(nrfx_twis_t const * p_instance);
/**
* @brief Disable TWIS instance.
* @brief Function for disabling the TWIS instance.
*
* Disabling TWIS instance gives possibility to turn off the TWIS while
* This function disables the TWIS instance, which gives possibility to turn off the TWIS while
* holding configuration done by @ref nrfx_twis_init.
*
* @param p_instance Pointer to the driver instance structure.
@ -230,47 +221,47 @@ void nrfx_twis_enable(nrfx_twis_t const * p_instance);
void nrfx_twis_disable(nrfx_twis_t const * p_instance);
/**
* @brief Get and clear last error flags.
* @brief Function for getting and clearing the last error flags.
*
* Function gets information about errors.
* This is also the only possibility to exit from error substate of the internal state machine.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @return Error flags defined in @ref nrfx_twis_error_t.
* This function gets the information about errors.
* This is also the only possibility to exit from the error substate of the internal state machine.
* @attention
* This function clears error state and flags.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @return Error flags defined in @ref nrfx_twis_error_t.
*/
uint32_t nrfx_twis_error_get_and_clear(nrfx_twis_t const * p_instance);
/**
* @brief Prepare data for sending.
* @brief Function for preparing the data for sending.
*
* This function should be used in response for @ref NRFX_TWIS_EVT_READ_REQ event.
* This function is to be used in response to the @ref NRFX_TWIS_EVT_READ_REQ event.
*
* @note Peripherals using EasyDMA (including TWIS) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
* @attention Transmission buffer must be placed in RAM.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_buf Transmission buffer.
* @attention Transmission buffer has to be placed in RAM.
* @param size Maximum number of bytes that master may read from buffer given.
* @param[in] size Maximum number of bytes that master may read from buffer given.
*
* @retval NRFX_SUCCESS Preparation finished properly.
* @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM.
* @retval NRFX_ERROR_INVALID_LENGTH Wrong value in @em size parameter.
* @retval NRFX_ERROR_INVALID_STATE Module not initialized or not enabled.
* @retval NRFX_SUCCESS The preparation finished properly.
* @retval NRFX_ERROR_INVALID_ADDR The given @em p_buf is not placed inside the RAM.
* @retval NRFX_ERROR_INVALID_LENGTH There is a wrong value in the @em size parameter.
* @retval NRFX_ERROR_INVALID_STATE The module is not initialized or not enabled.
*/
nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance,
void const * p_buf,
size_t size);
/**
* @brief Get number of transmitted bytes.
* @brief Function for getting the number of transmitted bytes.
*
* Function returns number of bytes sent.
* This function may be called after @ref NRFX_TWIS_EVT_READ_DONE or @ref NRFX_TWIS_EVT_READ_ERROR events.
* This function returns the number of bytes sent.
* This function can be called after @ref NRFX_TWIS_EVT_READ_DONE or @ref NRFX_TWIS_EVT_READ_ERROR events.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
@ -279,33 +270,32 @@ nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance,
__STATIC_INLINE size_t nrfx_twis_tx_amount(nrfx_twis_t const * p_instance);
/**
* @brief Prepare data for receiving
* @brief Function for preparing the data for receiving.
*
* This function should be used in response for @ref NRFX_TWIS_EVT_WRITE_REQ event.
* This function must be used in response to the @ref NRFX_TWIS_EVT_WRITE_REQ event.
*
* @note Peripherals using EasyDMA (including TWIS) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
* this function fails with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_buf Buffer that would be filled with received data.
* @attention Receiving buffer has to be placed in RAM.
* @param size Size of the buffer (maximum amount of data to receive).
* @param[in] p_buf Buffer that is to be filled with received data.
* @param[in] size Size of the buffer (maximum amount of data to receive).
*
* @retval NRFX_SUCCESS Preparation finished properly.
* @retval NRFX_ERROR_INVALID_ADDR Given @em p_buf is not placed inside the RAM.
* @retval NRFX_ERROR_INVALID_LENGTH Wrong value in @em size parameter.
* @retval NRFX_ERROR_INVALID_STATE Module not initialized or not enabled.
* @retval NRFX_SUCCESS The preparation finished properly.
* @retval NRFX_ERROR_INVALID_ADDR The given @em p_buf is not placed inside the RAM.
* @retval NRFX_ERROR_INVALID_LENGTH There is a wrong value in the @em size parameter.
* @retval NRFX_ERROR_INVALID_STATE The module is not initialized or not enabled.
*/
nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance,
void * p_buf,
size_t size);
/**
* @brief Get number of received bytes.
* @brief Function for getting the number of received bytes.
*
* Function returns number of bytes received.
* This function may be called after @ref NRFX_TWIS_EVT_WRITE_DONE or @ref NRFX_TWIS_EVT_WRITE_ERROR events.
* This function returns number of bytes received.
* It can be called after @ref NRFX_TWIS_EVT_WRITE_DONE or @ref NRFX_TWIS_EVT_WRITE_ERROR events.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
@ -314,65 +304,65 @@ nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance,
__STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance);
/**
* @brief Function checks if driver is busy right now.
* @brief Function for checking if the driver is busy right now.
*
* Actual driver substate is tested.
* If driver is in any other state than IDLE or ERROR this function returns true.
* This function tests the actual driver substate.
* If the driver is in any other state than IDLE or ERROR, this function returns true.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true Driver is in state other than ERROR or IDLE.
* @retval true The driver is in state other than ERROR or IDLE.
* @retval false There is no transmission pending.
*/
bool nrfx_twis_is_busy(nrfx_twis_t const * p_instance);
/**
* @brief Function checks if driver is waiting for tx buffer.
* @brief Function for checking if the driver is waiting for a TX buffer.
*
* If this function returns true, it means that driver is stalled expecting
* If this function returns true, the driver is stalled expecting
* of the @ref nrfx_twis_tx_prepare function call.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true Driver waits for @ref nrfx_twis_tx_prepare.
* @retval false Driver is not in the state where it waits for preparing tx buffer.
* @retval true The driver is waiting for @ref nrfx_twis_tx_prepare.
* @retval false The driver is not in the state where it is waiting for preparing a TX buffer.
*/
bool nrfx_twis_is_waiting_tx_buff(nrfx_twis_t const * p_instance);
/**
* @brief Function checks if driver is waiting for rx buffer.
* @brief Function for checking if the driver is waiting for an RX buffer.
*
* If this function returns true, it means that driver is staled expecting
* If this function returns true, the driver is stalled expecting
* of the @ref nrfx_twis_rx_prepare function call.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true Driver waits for @ref nrfx_twis_rx_prepare.
* @retval false Driver is not in the state where it waits for preparing rx buffer.
* @retval true The driver is waiting for @ref nrfx_twis_rx_prepare.
* @retval false The driver is not in the state where it is waiting for preparing an RX buffer.
*/
bool nrfx_twis_is_waiting_rx_buff(nrfx_twis_t const * p_instance);
/**
* @brief Check if driver is sending data.
* @brief Function for checking if the driver is sending data.
*
* If this function returns true, it means that there is ongoing output transmission.
* If this function returns true, there is an ongoing output transmission.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true There is ongoing output transmission.
* @retval false Driver is in other state.
* @retval true There is an ongoing output transmission.
* @retval false The driver is in other state.
*/
bool nrfx_twis_is_pending_tx(nrfx_twis_t const * p_instance);
/**
* @brief Check if driver is receiving data.
* @brief Function for checking if the driver is receiving data.
*
* If this function returns true, it means that there is ongoing input transmission.
* If this function returns true, there is an ongoing input transmission.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true There is ongoing input transmission.
* @retval false Driver is in other state.
* @retval true There is an ongoing input transmission.
* @retval false The driver is in other state.
*/
bool nrfx_twis_is_pending_rx(nrfx_twis_t const * p_instance);
@ -388,6 +378,8 @@ __STATIC_INLINE size_t nrfx_twis_rx_amount(nrfx_twis_t const * p_instance)
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_twis_0_irq_handler(void);
void nrfx_twis_1_irq_handler(void);
@ -395,8 +387,6 @@ void nrfx_twis_2_irq_handler(void);
void nrfx_twis_3_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

124
ext/hal/nordic/nrfx/drivers/include/nrfx_uart.h
View file

@ -46,34 +46,30 @@ extern "C" {
* @brief UART peripheral driver.
*/
/**
* @brief UART driver instance data structure.
*/
/** @brief Data structure of the UART driver instance. */
typedef struct
{
NRF_UART_Type * p_reg; ///< Pointer to a structure with UART registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_uart_t;
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_UART0_ENABLED)
NRFX_UART0_INST_IDX,
#endif
NRFX_UART_ENABLED_COUNT
};
#endif
/**
* @brief Macro for creating a UART driver instance.
*/
/** @brief Macro for creating a UART driver instance. */
#define NRFX_UART_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_UART, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_UART, id, _INST_IDX), \
}
/**
* @brief Types of UART driver events.
*/
/** @brief Types of UART driver events. */
typedef enum
{
NRFX_UART_EVT_TX_DONE, ///< Requested TX transfer completed.
@ -81,9 +77,7 @@ typedef enum
NRFX_UART_EVT_ERROR, ///< Error reported by UART peripheral.
} nrfx_uart_evt_type_t;
/**
* @brief Structure for UART configuration.
*/
/** @brief Structure for the UART configuration. */
typedef struct
{
uint32_t pseltxd; ///< TXD pin number.
@ -93,13 +87,11 @@ typedef struct
void * p_context; ///< Context passed to interrupt handler.
nrf_uart_hwfc_t hwfc; ///< Flow control configuration.
nrf_uart_parity_t parity; ///< Parity configuration.
nrf_uart_baudrate_t baudrate; ///< Baudrate.
nrf_uart_baudrate_t baudrate; ///< Baud rate.
uint8_t interrupt_priority; ///< Interrupt priority.
} nrfx_uart_config_t;
/**
* @brief UART default configuration.
*/
/** @brief UART default configuration. */
#define NRFX_UART_DEFAULT_CONFIG \
{ \
.pseltxd = NRF_UART_PSEL_DISCONNECTED, \
@ -113,27 +105,21 @@ typedef struct
.interrupt_priority = NRFX_UART_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
/**
* @brief Structure for UART transfer completion event.
*/
/** @brief Structure for the UART transfer completion event. */
typedef struct
{
uint8_t * p_data; ///< Pointer to memory used for transfer.
uint32_t bytes; ///< Number of bytes transfered.
} nrfx_uart_xfer_evt_t;
/**
* @brief Structure for UART error event.
*/
/** @brief Structure for the UART error event. */
typedef struct
{
nrfx_uart_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transferred.
nrfx_uart_xfer_evt_t rxtx; ///< Transfer details, including number of bytes transferred.
uint32_t error_mask; ///< Mask of error flags that generated the event.
} nrfx_uart_error_evt_t;
/**
* @brief Structure for UART event.
*/
/** @brief Structure for the UART event. */
typedef struct
{
nrfx_uart_evt_type_t type; ///< Event type.
@ -141,15 +127,15 @@ typedef struct
{
nrfx_uart_xfer_evt_t rxtx; ///< Data provided for transfer completion events.
nrfx_uart_error_evt_t error; ///< Data provided for error event.
} data;
} data; ///< Union to store event data.
} nrfx_uart_event_t;
/**
* @brief UART interrupt event handler.
*
* @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
* only within the context of the event handler.
* @param[in] p_context Context passed to interrupt handler, set on initialization.
* @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
* only within the context of the event handler.
* @param[in] p_context Context passed to the interrupt handler, set on initialization.
*/
typedef void (*nrfx_uart_event_handler_t)(nrfx_uart_event_t const * p_event,
void * p_context);
@ -160,45 +146,46 @@ typedef void (*nrfx_uart_event_handler_t)(nrfx_uart_event_t const * p_event,
* This function configures and enables UART. After this function GPIO pins are controlled by UART.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] event_handler Event handler provided by the user. If not provided driver works in
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. If not provided, the driver works in
* blocking mode.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If driver is already initialized.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
* @retval NRFX_SUCCESS Initialization is successful.
* @retval NRFX_ERROR_INVALID_STATE The driver is already initialized.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
*/
nrfx_err_t nrfx_uart_init(nrfx_uart_t const * p_instance,
nrfx_uart_config_t const * p_config,
nrfx_uart_event_handler_t event_handler);
/**
* @brief Function for uninitializing the UART driver.
* @brief Function for uninitializing the UART driver.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_uart_uninit(nrfx_uart_t const * p_instance);
/**
* @brief Function for getting the address of a specific UART task.
* @brief Function for getting the address of the specified UART task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] task Task.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_uart_task_address_get(nrfx_uart_t const * p_instance,
nrf_uart_task_t task);
/**
* @brief Function for getting the address of a specific UART event.
* @brief Function for getting the address of the specified UART event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Event.
*
* @return Event address.
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_instance,
nrf_uart_event_t event);
@ -208,7 +195,7 @@ __STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_insta
*
* If an event handler was provided in nrfx_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt
* so there is no context switching inside the function.
*
@ -216,10 +203,10 @@ __STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_insta
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to send.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_BUSY If driver is already transferring.
* @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only).
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_BUSY Driver is already transferring.
* @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context
* (blocking mode only).
*/
nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance,
uint8_t const * p_data,
@ -230,15 +217,15 @@ nrfx_err_t nrfx_uart_tx(nrfx_uart_t const * p_instance,
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true If UART is transmitting.
* @retval false If UART is not transmitting.
* @retval true The UART is transmitting.
* @retval false The UART is not transmitting.
*/
bool nrfx_uart_tx_in_progress(nrfx_uart_t const * p_instance);
/**
* @brief Function for aborting any ongoing transmission.
* @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode.
* It will contain number of bytes sent until abort was called. The event
* It will contain number of bytes sent until the abort was called. The event
* handler will be called from the function context.
*
* @param[in] p_instance Pointer to the driver instance structure.
@ -248,15 +235,14 @@ void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance);
/**
* @brief Function for receiving data over UART.
*
* If an event handler was provided in the nrfx_uart_init() call, this function
* If an event handler is provided in the nrfx_uart_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, meaning that this function
* Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
*
* The receive buffer pointer is double buffered in non-blocking mode. The secondary
* The receive buffer pointer is double-buffered in non-blocking mode. The secondary
* buffer can be set immediately after starting the transfer and will be filled
* when the primary buffer is full. The double buffering feature allows
* when the primary buffer is full. The double-buffering feature allows
* receiving data continuously.
*
* If this function is used without a previous call to @ref nrfx_uart_rx_enable, the reception
@ -272,28 +258,26 @@ void nrfx_uart_tx_abort(nrfx_uart_t const * p_instance);
* @param[in] p_data Pointer to data.
* @param[in] length Number of bytes to receive.
*
* @retval NRFX_SUCCESS If reception is complete (in case of blocking mode) or it is
* @retval NRFX_SUCCESS Reception is complete (in case of blocking mode) or it is
* successfully started (in case of non-blocking mode).
* @retval NRFX_ERROR_BUSY If the driver is already receiving
* @retval NRFX_ERROR_BUSY The driver is already receiving
* (and the secondary buffer has already been set
* in non-blocking mode).
* @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
* @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context
* (blocking mode only, also see @ref nrfx_uart_rx_disable).
* @retval NRFX_ERROR_INTERNAL If UART peripheral reported an error.
* @retval NRFX_ERROR_INTERNAL The UART peripheral reported an error.
*/
nrfx_err_t nrfx_uart_rx(nrfx_uart_t const * p_instance,
uint8_t * p_data,
size_t length);
/**
* @brief Function for testing the receiver state in blocking mode.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true If the receiver has at least one byte of data to get.
* @retval false If the receiver is empty.
* @retval true The receiver has at least one byte of data to get.
* @retval false The receiver is empty.
*/
bool nrfx_uart_rx_ready(nrfx_uart_t const * p_instance);
@ -321,7 +305,7 @@ void nrfx_uart_rx_disable(nrfx_uart_t const * p_instance);
/**
* @brief Function for aborting any ongoing reception.
* @note @ref NRFX_UART_EVT_TX_DONE event will be generated in non-blocking mode.
* It will contain number of bytes received until abort was called. The event
* It will contain number of bytes received until the abort was called. The event
* handler will be called from the UART interrupt context.
*
* @param[in] p_instance Pointer to the driver instance structure.
@ -330,12 +314,12 @@ void nrfx_uart_rx_abort(nrfx_uart_t const * p_instance);
/**
* @brief Function for reading error source mask. Mask contains values from @ref nrf_uart_error_mask_t.
* @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is
* @note Function must be used in blocking mode only. In case of non-blocking mode, an error event is
* generated. Function clears error sources after reading.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval Mask of reported errors.
* @return Mask of reported errors.
*/
uint32_t nrfx_uart_errorsrc_get(nrfx_uart_t const * p_instance);
@ -354,12 +338,12 @@ __STATIC_INLINE uint32_t nrfx_uart_event_address_get(nrfx_uart_t const * p_insta
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_uart_0_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

136
ext/hal/nordic/nrfx/drivers/include/nrfx_uarte.h
View file

@ -46,15 +46,14 @@ extern "C" {
* @brief UARTE peripheral driver.
*/
/**
* @brief Structure for the UARTE driver instance.
*/
/** @brief Structure for the UARTE driver instance. */
typedef struct
{
NRF_UARTE_Type * p_reg; ///< Pointer to a structure with UARTE registers.
uint8_t drv_inst_idx; ///< Driver instance index.
uint8_t drv_inst_idx; ///< Index of the driver instance. For internal use only.
} nrfx_uarte_t;
#ifndef __NRFX_DOXYGEN__
enum {
#if NRFX_CHECK(NRFX_UARTE0_ENABLED)
NRFX_UARTE0_INST_IDX,
@ -70,19 +69,16 @@ enum {
#endif
NRFX_UARTE_ENABLED_COUNT
};
#endif
/**
* @brief Macro for creating a UARTE driver instance.
*/
/** @brief Macro for creating a UARTE driver instance. */
#define NRFX_UARTE_INSTANCE(id) \
{ \
.p_reg = NRFX_CONCAT_2(NRF_UARTE, id), \
.drv_inst_idx = NRFX_CONCAT_3(NRFX_UARTE, id, _INST_IDX), \
}
/**
* @brief Types of UARTE driver events.
*/
/** @brief Types of UARTE driver events. */
typedef enum
{
NRFX_UARTE_EVT_TX_DONE, ///< Requested TX transfer completed.
@ -90,9 +86,7 @@ typedef enum
NRFX_UARTE_EVT_ERROR, ///< Error reported by UART peripheral.
} nrfx_uarte_evt_type_t;
/**
* @brief Structure for UARTE configuration.
*/
/** @brief Structure for the UARTE configuration. */
typedef struct
{
uint32_t pseltxd; ///< TXD pin number.
@ -102,13 +96,11 @@ typedef struct
void * p_context; ///< Context passed to interrupt handler.
nrf_uarte_hwfc_t hwfc; ///< Flow control configuration.
nrf_uarte_parity_t parity; ///< Parity configuration.
nrf_uarte_baudrate_t baudrate; ///< Baudrate.
nrf_uarte_baudrate_t baudrate; ///< Baud rate.
uint8_t interrupt_priority; ///< Interrupt priority.
} nrfx_uarte_config_t;
/**
* @brief UARTE default configuration.
*/
/** @brief UARTE default configuration. */
#define NRFX_UARTE_DEFAULT_CONFIG \
{ \
.pseltxd = NRF_UARTE_PSEL_DISCONNECTED, \
@ -122,27 +114,21 @@ typedef struct
.interrupt_priority = NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY, \
}
/**
* @brief Structure for UARTE transfer completion event.
*/
/** @brief Structure for the UARTE transfer completion event. */
typedef struct
{
uint8_t * p_data; ///< Pointer to memory used for transfer.
size_t bytes; ///< Number of bytes transfered.
} nrfx_uarte_xfer_evt_t;
/**
* @brief Structure for UARTE error event.
*/
/** @brief Structure for UARTE error event. */
typedef struct
{
nrfx_uarte_xfer_evt_t rxtx; ///< Transfer details includes number of bytes transferred.
nrfx_uarte_xfer_evt_t rxtx; ///< Transfer details, including number of bytes transferred.
uint32_t error_mask; ///< Mask of error flags that generated the event.
} nrfx_uarte_error_evt_t;
/**
* @brief Structure for UARTE event.
*/
/** @brief Structure for UARTE event. */
typedef struct
{
nrfx_uarte_evt_type_t type; ///< Event type.
@ -150,15 +136,15 @@ typedef struct
{
nrfx_uarte_xfer_evt_t rxtx; ///< Data provided for transfer completion events.
nrfx_uarte_error_evt_t error; ///< Data provided for error event.
} data;
} data; ///< Union to store event data.
} nrfx_uarte_event_t;
/**
* @brief UARTE interrupt event handler.
*
* @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
* only within the context of the event handler.
* @param[in] p_context Context passed to interrupt handler, set on initialization.
* @param[in] p_event Pointer to event structure. Event is allocated on the stack so it is available
* only within the context of the event handler.
* @param[in] p_context Context passed to the interrupt handler, set on initialization.
*/
typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event,
void * p_context);
@ -169,45 +155,46 @@ typedef void (*nrfx_uarte_event_handler_t)(nrfx_uarte_event_t const * p_event,
* This function configures and enables UARTE. After this function GPIO pins are controlled by UARTE.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] event_handler Event handler provided by the user. If not provided driver works in
* blocking mode.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE If driver is already initialized.
* @retval NRFX_ERROR_BUSY If some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_INVALID_STATE Driver is already initialized.
* @retval NRFX_ERROR_BUSY Some other peripheral with the same
* instance ID is already in use. This is
* possible only if @ref nrfx_prs module
* is enabled.
*/
nrfx_err_t nrfx_uarte_init(nrfx_uarte_t const * p_instance,
nrfx_uarte_config_t const * p_config,
nrfx_uarte_event_handler_t event_handler);
/**
* @brief Function for uninitializing the UARTE driver.
* @brief Function for uninitializing the UARTE driver.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
void nrfx_uarte_uninit(nrfx_uarte_t const * p_instance);
/**
* @brief Function for getting the address of a specific UARTE task.
* @brief Function for getting the address of the specified UARTE task.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] task Task.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_uarte_task_address_get(nrfx_uarte_t const * p_instance,
nrf_uarte_task_t task);
/**
* @brief Function for getting the address of a specific UARTE event.
* @brief Function for getting the address of the specified UARTE event.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] event Event.
*
* @return Event address.
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_instance,
nrf_uarte_event_t event);
@ -215,9 +202,9 @@ __STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_ins
/**
* @brief Function for sending data over UARTE.
*
* If an event handler was provided in nrfx_uarte_init() call, this function
* If an event handler is provided in nrfx_uarte_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt
* so there is no context switching inside the function.
*
@ -232,11 +219,11 @@ __STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_ins
* description in the Product Specification). The driver
* checks it with assertion.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_BUSY If driver is already transferring.
* @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only).
* @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer.
* @retval NRFX_SUCCESS Initialization was successful.
* @retval NRFX_ERROR_BUSY Driver is already transferring.
* @retval NRFX_ERROR_FORBIDDEN The transfer was aborted from a different context
* (blocking mode only).
* @retval NRFX_ERROR_INVALID_ADDR p_data does not point to RAM buffer.
*/
nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance,
uint8_t const * p_data,
@ -247,16 +234,16 @@ nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance,
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true If UARTE is transmitting.
* @retval false If UARTE is not transmitting.
* @retval true The UARTE is transmitting.
* @retval false The UARTE is not transmitting.
*/
bool nrfx_uarte_tx_in_progress(nrfx_uarte_t const * p_instance);
/**
* @brief Function for aborting any ongoing transmission.
* @note @ref NRFX_UARTE_EVT_TX_DONE event will be generated in non-blocking mode.
* It will contain number of bytes sent until abort was called. The event
* handler will be called from UARTE interrupt context.
* It will contain number of bytes sent until the abort was called. The event
* handler will be called from the UARTE interrupt context.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
@ -265,19 +252,19 @@ void nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance);
/**
* @brief Function for receiving data over UARTE.
*
* If an event handler was provided in the nrfx_uarte_init() call, this function
* If an event handler is provided in the nrfx_uarte_init() call, this function
* returns immediately and the handler is called when the transfer is done.
* Otherwise, the transfer is performed in blocking mode, i.e. this function
* Otherwise, the transfer is performed in blocking mode, that is this function
* returns when the transfer is finished. Blocking mode is not using interrupt so
* there is no context switching inside the function.
* The receive buffer pointer is double buffered in non-blocking mode. The secondary
* The receive buffer pointer is double-buffered in non-blocking mode. The secondary
* buffer can be set immediately after starting the transfer and will be filled
* when the primary buffer is full. The double buffering feature allows
* when the primary buffer is full. The double-buffering feature allows
* receiving data continuously.
*
* @note Peripherals using EasyDMA (including UARTE) require the transfer buffers
* to be placed in the Data RAM region. If this condition is not met,
* this function will fail with the error code NRFX_ERROR_INVALID_ADDR.
* this function fails with the error code NRFX_ERROR_INVALID_ADDR.
*
* @param[in] p_instance Pointer to the driver instance structure.
* @param[in] p_data Pointer to data.
@ -286,14 +273,14 @@ void nrfx_uarte_tx_abort(nrfx_uarte_t const * p_instance);
* description in the Product Specification). The driver
* checks it with assertion.
*
* @retval NRFX_SUCCESS If initialization was successful.
* @retval NRFX_ERROR_BUSY If the driver is already receiving
* (and the secondary buffer has already been set
* in non-blocking mode).
* @retval NRFX_ERROR_FORBIDDEN If the transfer was aborted from a different context
* (blocking mode only).
* @retval NRFX_ERROR_INTERNAL If UARTE peripheral reported an error.
* @retval NRFX_ERROR_INVALID_ADDR If p_data does not point to RAM buffer.
* @retval NRFX_SUCCESS Initialization is successful.
* @retval NRFX_ERROR_BUSY The driver is already receiving
* (and the secondary buffer has already been set
* in non-blocking mode).
* @retval NRFX_ERROR_FORBIDDEN The transfer is aborted from a different context
* (blocking mode only).
* @retval NRFX_ERROR_INTERNAL The UARTE peripheral reports an error.
* @retval NRFX_ERROR_INVALID_ADDR p_data does not point to RAM buffer.
*/
nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance,
uint8_t * p_data,
@ -306,16 +293,16 @@ nrfx_err_t nrfx_uarte_rx(nrfx_uarte_t const * p_instance,
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval true If the receiver has at least one byte of data to get.
* @retval false If the receiver is empty.
* @retval true The receiver has at least one byte of data to get.
* @retval false The receiver is empty.
*/
bool nrfx_uarte_rx_ready(nrfx_uarte_t const * p_instance);
/**
* @brief Function for aborting any ongoing reception.
* @note @ref NRFX_UARTE_EVT_RX_DONE event will be generated in non-blocking mode.
* It will contain number of bytes received until abort was called. The event
* handler will be called from UARTE interrupt context.
* It will contain number of bytes received until the abort was called. The event
* handler will be called from the UARTE interrupt context.
*
* @param[in] p_instance Pointer to the driver instance structure.
*/
@ -323,12 +310,12 @@ void nrfx_uarte_rx_abort(nrfx_uarte_t const * p_instance);
/**
* @brief Function for reading error source mask. Mask contains values from @ref nrf_uarte_error_mask_t.
* @note Function should be used in blocking mode only. In case of non-blocking mode, an error event is
* @note Function must be used in the blocking mode only. In case of non-blocking mode, an error event is
* generated. Function clears error sources after reading.
*
* @param[in] p_instance Pointer to the driver instance structure.
*
* @retval Mask of reported errors.
* @return Mask of reported errors.
*/
uint32_t nrfx_uarte_errorsrc_get(nrfx_uarte_t const * p_instance);
@ -347,13 +334,14 @@ __STATIC_INLINE uint32_t nrfx_uarte_event_address_get(nrfx_uarte_t const * p_ins
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
void nrfx_uarte_0_irq_handler(void);
void nrfx_uarte_1_irq_handler(void);
void nrfx_uarte_2_irq_handler(void);
void nrfx_uarte_3_irq_handler(void);
/** @} */
#ifdef __cplusplus
}

14
ext/hal/nordic/nrfx/drivers/include/nrfx_usbd.h
View file

@ -169,7 +169,7 @@ typedef enum
NRFX_USBD_EP_ABORTED, /**< EP0 transfer can be aborted when new setup comes.
* Any other transfer can be aborted by USB reset or driver stopping.
*/
NRFX_USBD_EP_BUSY, /**< A transfer is in progress. */
NRFX_USBD_EP_BUSY, /**< Transfer is in progress. */
} nrfx_usbd_ep_status_t;
/**
@ -179,12 +179,12 @@ typedef enum
*/
typedef struct
{
nrfx_usbd_event_type_t type;
nrfx_usbd_event_type_t type; /**< Event type. */
union
{
struct {
uint16_t framecnt; /**< Current value of frame counter. */
} sof; /**< Data available for @ref NRFX_USBD_EVT_SOF. */
uint16_t framecnt; /**< Current value of frame counter. */
} sof; /**< Data available for @ref NRFX_USBD_EVT_SOF. */
struct {
nrfx_usbd_ep_t ep; /**< Endpoint number. */
} isocrc;
@ -192,7 +192,7 @@ typedef struct
nrfx_usbd_ep_t ep; /**< Endpoint number. */
nrfx_usbd_ep_status_t status; /**< Status for the endpoint. */
} eptransfer;
} data;
} data; /**< Union to store event data. */
} nrfx_usbd_evt_t;
/**
@ -850,12 +850,12 @@ nrfx_usbd_ep_t nrfx_usbd_last_setup_dir_get(void);
*/
void nrfx_usbd_transfer_out_drop(nrfx_usbd_ep_t ep);
/** @} */
void nrfx_usbd_irq_handler(void);
/** @} */
#ifdef __cplusplus
}
#endif

55
ext/hal/nordic/nrfx/drivers/include/nrfx_wdt.h
View file

@ -47,9 +47,7 @@ extern "C" {
*/
#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ) || defined(__NRFX_DOXYGEN__)
/**
* @brief WDT instance interrupt priority configuration.
*/
/** @brief WDT instance interrupt priority configuration. */
#define NRFX_WDT_IRQ_CONFIG .interrupt_priority = NRFX_WDT_CONFIG_IRQ_PRIORITY
#else
#define NRFX_WDT_IRQ_CONFIG
@ -65,12 +63,13 @@ typedef struct
#endif
} nrfx_wdt_config_t;
/**@brief WDT event handler function type. */
/** @brief WDT event handler function type. */
typedef void (*nrfx_wdt_event_handler_t)(void);
/**@brief WDT channel id type. */
/** @brief WDT channel ID type. */
typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id;
/** @brief WDT driver default configuration. */
#define NRFX_WDT_DEAFULT_CONFIG \
{ \
.behaviour = (nrf_wdt_behaviour_t)NRFX_WDT_CONFIG_BEHAVIOUR, \
@ -78,80 +77,80 @@ typedef nrf_wdt_rr_register_t nrfx_wdt_channel_id;
NRFX_WDT_IRQ_CONFIG \
}
/**
* @brief This function initializes watchdog.
* @brief This function initializes the watchdog.
*
* @param[in] p_config Pointer to the structure with initial configuration.
* @param[in] p_config Pointer to the structure with the initial configuration.
* @param[in] wdt_event_handler Event handler provided by the user. Ignored when
* @ref NRFX_WDT_CONFIG_NO_IRQ option is enabled.
*
* @return NRFX_SUCCESS on success, otherwise an error code.
* @return NRFX_SUCCESS on success, otherwise an error code.
*/
nrfx_err_t nrfx_wdt_init(nrfx_wdt_config_t const * p_config,
nrfx_wdt_event_handler_t wdt_event_handler);
/**
* @brief This function allocate watchdog channel.
* @brief Function for allocating a watchdog channel.
*
* @note This function can not be called after nrfx_wdt_start(void).
*
* @param[out] p_channel_id ID of granted channel.
* @param[out] p_channel_id ID of granted channel.
*
* @return NRFX_SUCCESS on success, otherwise an error code.
* @return NRFX_SUCCESS on success, otherwise an error code.
*/
nrfx_err_t nrfx_wdt_channel_alloc(nrfx_wdt_channel_id * p_channel_id);
/**
* @brief This function starts watchdog.
* @brief Function for starting the watchdog.
*
* @note After calling this function the watchdog is started, so the user needs to feed all allocated
* watchdog channels to avoid reset. At least one watchdog channel has to be allocated.
* watchdog channels to avoid reset. At least one watchdog channel must be allocated.
*/
void nrfx_wdt_enable(void);
/**
* @brief This function feeds the watchdog.
* @brief Function for feeding the watchdog.
*
* @details Function feeds all allocated watchdog channels.
*/
void nrfx_wdt_feed(void);
/**
* @brief This function feeds the invidual watchdog channel.
* @brief Function for feeding an invidual watchdog channel.
*
* @param[in] channel_id ID of watchdog channel.
* @param[in] channel_id ID of watchdog channel.
*/
void nrfx_wdt_channel_feed(nrfx_wdt_channel_id channel_id);
/**@brief Function for returning a requested task address for the wdt driver module.
/**
* @brief Function for returning a requested task address for the WDT driver module.
*
* @param[in] task One of the peripheral tasks.
* @param[in] task One of the peripheral tasks.
*
* @retval Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrfx_wdt_ppi_task_addr(nrf_wdt_task_t task)
{
return nrf_wdt_task_address_get(task);
}
/**@brief Function for returning a requested event address for the wdt driver module.
/**
* @brief Function for returning a requested event address for the wdt driver module.
*
* @param[in] event One of the peripheral events.
* @param[in] event One of the peripheral events.
*
* @retval Event address
* @return Event address.
*/
__STATIC_INLINE uint32_t nrfx_wdt_ppi_event_addr(nrf_wdt_event_t event)
{
return nrf_wdt_event_address_get(event);
}
#if !NRFX_CHECK(NRFX_WDT_CONFIG_NO_IRQ)
void nrfx_wdt_irq_handler(void);
#endif
/** @} */
void nrfx_wdt_irq_handler(void);
#ifdef __cplusplus
}
#endif

88
ext/hal/nordic/nrfx/drivers/nrfx_common.h
View file

@ -55,7 +55,7 @@ extern "C" {
* a non-zero value.
*
* Normally, preprocessors treat all undefined identifiers as having the value
* zero. However, some tools, like static code analyzers, may issue a warning
* zero. However, some tools, like static code analyzers, can issue a warning
* when such identifier is evaluated. This macro gives the possibility to suppress
* such warnings only in places where this macro is used for evaluation, not in
* the whole analyzed code.
@ -68,8 +68,8 @@ extern "C" {
* @note This macro is expanded in two steps so that tokens given as macros
* themselves are fully expanded before they are merged.
*
* @param p1 First token.
* @param p2 Second token.
* @param[in] p1 First token.
* @param[in] p2 Second token.
*
* @return The two tokens merged into one, unless they cannot together form
* a valid token (in such case, the preprocessor issues a warning and
@ -78,10 +78,8 @@ extern "C" {
* @sa NRFX_CONCAT_3
*/
#define NRFX_CONCAT_2(p1, p2) NRFX_CONCAT_2_(p1, p2)
/**
* @brief Internal macro used by @ref NRFX_CONCAT_2 to perform the expansion
* in two steps.
*/
/** @brief Internal macro used by @ref NRFX_CONCAT_2 to perform the expansion in two steps. */
#define NRFX_CONCAT_2_(p1, p2) p1 ## p2
/**
@ -90,9 +88,9 @@ extern "C" {
* @note This macro is expanded in two steps so that tokens given as macros
* themselves are fully expanded before they are merged.
*
* @param p1 First token.
* @param p2 Second token.
* @param p3 Third token.
* @param[in] p1 First token.
* @param[in] p2 Second token.
* @param[in] p3 Third token.
*
* @return The three tokens merged into one, unless they cannot together form
* a valid token (in such case, the preprocessor issues a warning and
@ -101,29 +99,29 @@ extern "C" {
* @sa NRFX_CONCAT_2
*/
#define NRFX_CONCAT_3(p1, p2, p3) NRFX_CONCAT_3_(p1, p2, p3)
/**
* @brief Internal macro used by @ref NRFX_CONCAT_3 to perform the expansion
* in two steps.
*/
/** @brief Internal macro used by @ref NRFX_CONCAT_3 to perform the expansion in two steps. */
#define NRFX_CONCAT_3_(p1, p2, p3) p1 ## p2 ## p3
/**@brief Macro for performing rounded integer division (as opposed to
/**
* @brief Macro for performing rounded integer division (as opposed to
* truncating the result).
*
* @param a Numerator.
* @param b Denominator.
* @param[in] a Numerator.
* @param[in] b Denominator.
*
* @return Rounded (integer) result of dividing @c a by @c b.
*/
#define NRFX_ROUNDED_DIV(a, b) (((a) + ((b) / 2)) / (b))
/**@brief Macro for performing integer division, making sure the result is rounded up.
/**
* @brief Macro for performing integer division, making sure the result is rounded up.
*
* @details A typical use case for this macro is to compute the number of objects
* @details A typical use case for this macro is to compute the number of objects
* with size @c b required to hold @c a number of bytes.
*
* @param a Numerator.
* @param b Denominator.
* @param[in] a Numerator.
* @param[in] b Denominator.
*
* @return Integer result of dividing @c a by @c b, rounded up.
*/
@ -132,7 +130,7 @@ extern "C" {
/**
* @brief Macro for getting the number of elements in an array.
*
* @param array Name of the array.
* @param[in] array Name of the array.
*
* @return Array element count.
*/
@ -141,17 +139,19 @@ extern "C" {
/**@brief Macro for checking if given lengths of EasyDMA transfers do not exceed
* the limit of the specified peripheral.
*
* @param peripheral Peripheral to check the lengths against.
* @param length1 First length to be checked.
* @param length2 Second length to be checked (pass 0 if not needed).
* @param[in] peripheral Peripheral to check the lengths against.
* @param[in] length1 First length to be checked.
* @param[in] length2 Second length to be checked (pass 0 if not needed).
*
* @return
* @retval true The length of buffers does not exceed the limit of the specified peripheral.
* @retval false The length of buffers exceeds the limit of the specified peripheral.
*/
#define NRFX_EASYDMA_LENGTH_VALIDATE(peripheral, length1, length2) \
(((length1) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))) && \
((length2) < (1U << NRFX_CONCAT_2(peripheral, _EASYDMA_MAXCNT_SIZE))))
/**@brief Macro for waiting until condition is met.
/**
* @brief Macro for waiting until condition is met.
*
* @param[in] condition Condition to meet.
* @param[in] attempts Maximum number of condition checks. Must not be 0.
@ -180,7 +180,7 @@ do { \
* ID numbers and their base addresses. See the chapter "Peripheral interface"
* (section "Peripheral ID") in the Product Specification.
*
* @param[in] base_addr Peripheral base address or pointer.
* @param[in] base_addr Peripheral base address or pointer.
*
* @return ID number associated with the specified peripheral.
*/
@ -194,20 +194,16 @@ do { \
* equal to its ID number. See the chapter "Peripheral interface" (sections
* "Peripheral ID" and "Interrupts") in the Product Specification.
*
* @param[in] base_addr Peripheral base address or pointer.
* @param[in] base_addr Peripheral base address or pointer.
*
* @return Interrupt number associated with the specified peripheral.
*/
#define NRFX_IRQ_NUMBER_GET(base_addr) NRFX_PERIPHERAL_ID_GET(base_addr)
/**
* @brief IRQ handler type.
*/
/** @brief IRQ handler type. */
typedef void (* nrfx_irq_handler_t)(void);
/**
* @brief Driver state.
*/
/** @brief Driver state. */
typedef enum
{
NRFX_DRV_STATE_UNINITIALIZED, ///< Uninitialized.
@ -223,14 +219,13 @@ typedef enum
* to be placed in the Data RAM region. This function can be used to check if
* this condition is met.
*
* @param[in] p_object Pointer to an object whose location is to be checked.
* @param[in] p_object Pointer to an object whose location is to be checked.
*
* @retval true If the pointed object is located in the Data RAM region.
* @retval false Otherwise.
* @retval true The pointed object is located in the Data RAM region.
* @retval false The pointed object is not located in the Data RAM region.
*/
__STATIC_INLINE bool nrfx_is_in_ram(void const * p_object);
/**
* @brief Function for checking if an object is aligned to a 32-bit word
*
@ -240,16 +235,15 @@ __STATIC_INLINE bool nrfx_is_in_ram(void const * p_object);
*
* @param[in] p_object Pointer to an object whose location is to be checked.
*
* @retval true if the pointed object is aligned to a 32-bit word.
* @retval false otherwise.
* @retval true The pointed object is aligned to a 32-bit word.
* @retval false The pointed object is not aligned to a 32-bit word.
*/
__STATIC_INLINE bool nrfx_is_word_aligned(void const * p_object);
/**
* @brief Function for getting the interrupt number for a specific peripheral.
* @brief Function for getting the interrupt number for the specified peripheral.
*
* @param[in] p_reg Peripheral base pointer.
* @param[in] p_reg Peripheral base pointer.
*
* @return Interrupt number associated with the pointed peripheral.
*/
@ -262,8 +256,8 @@ __STATIC_INLINE IRQn_Type nrfx_get_irq_number(void const * p_reg);
* The event identifier is the offset between the event register address and
* the peripheral base address, and is equal (thus, can be directly cast) to
* the corresponding value of the enumerated type from HAL (nrf_*_event_t).
* @param bit INTEN register bit position.
*
* @param[in] bit INTEN register bit position.
*
* @return Event identifier.
*
@ -279,7 +273,7 @@ __STATIC_INLINE uint32_t nrfx_bitpos_to_event(uint32_t bit);
* the peripheral base address, and is equal (thus, can be directly cast) to
* the corresponding value of the enumerated type from HAL (nrf_*_event_t).
*
* @param event Event identifier.
* @param[in] event Event identifier.
*
* @return INTEN register bit position.
*

5
ext/hal/nordic/nrfx/drivers/nrfx_errors.h
View file

@ -39,10 +39,13 @@
* @{
* @ingroup nrfx
*
* @brief Global error codes definitions.
* @brief Global error code definitions.
*/
/** @brief Base number of error codes. */
#define NRFX_ERROR_BASE_NUM 0x0BAD0000
/** @brief Base number of driver error codes. */
#define NRFX_ERROR_DRIVERS_BASE_NUM (NRFX_ERROR_BASE_NUM + 0x10000)
/** @brief Enumerated type for error codes. */

62
ext/hal/nordic/nrfx/drivers/src/nrfx_clock.c
View file

@ -58,15 +58,31 @@ extern bool nrfx_power_irq_enabled;
#endif
#endif
#if defined(NRF52810_XXAA) || \
defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
defined(NRF52840_XXAA)
// Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong
// after calibration, exceeding 500 ppm).
#define USE_WORKAROUND_FOR_ANOMALY_192
#if !defined(USE_WORKAROUND_FOR_ANOMALY_132) && \
(defined(NRF52832_XXAA) || defined(NRF52832_XXAB))
// ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution
// applies delay of 138us before starting LFCLK.
#define USE_WORKAROUND_FOR_ANOMALY_132 1
// Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice).
#define USE_WORKAROUND_FOR_ANOMALY_201
// Convert time to cycles (nRF52832 is clocked with 64 MHz, use delay of 138 us).
#define ANOMALY_132_DELAY_CYCLES (64UL * 138)
#endif
#if !defined(USE_WORKAROUND_FOR_ANOMALY_192) && \
(defined(NRF52810_XXAA) || \
defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
defined(NRF52840_XXAA))
// Enable workaround for nRF52 anomaly 192 (LFRC oscillator frequency is wrong
// after calibration, exceeding 500 ppm).
#define USE_WORKAROUND_FOR_ANOMALY_192 1
#endif
#if !defined(USE_WORKAROUND_FOR_ANOMALY_201) && \
(defined(NRF52810_XXAA) || \
defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
defined(NRF52840_XXAA))
// Enable workaround for nRF52 anomaly 201 (EVENTS_HFCLKSTARTED might be generated twice).
#define USE_WORKAROUND_FOR_ANOMALY_201 1
#endif
#if NRFX_CHECK(NRFX_CLOCK_CONFIG_LF_CAL_ENABLED)
@ -82,7 +98,7 @@ typedef struct
{
nrfx_clock_event_handler_t event_handler;
bool module_initialized; /*< Indicate the state of module */
#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
bool hfclk_started; /*< Anomaly 201 workaround. */
#endif
@ -101,18 +117,7 @@ static nrfx_clock_cb_t m_clock_cb;
bool nrfx_clock_irq_enabled;
#endif
#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
// ANOMALY 132 - LFCLK needs to avoid frame from 66us to 138us after LFCLK stop. This solution
// applies delay of 138us before starting LFCLK.
#define ANOMALY_132_REQ_DELAY_US 138UL
// nRF52832 is clocked with 64MHz.
#define ANOMALY_132_NRF52832_FREQ_MHZ 64UL
// Convert time to cycles.
#define ANOMALY_132_DELAY_CYCLES (ANOMALY_132_REQ_DELAY_US * ANOMALY_132_NRF52832_FREQ_MHZ)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
/**
* @brief Function for applying delay of 138us before starting LFCLK.
*/
@ -143,8 +148,7 @@ static void nrfx_clock_anomaly_132(void)
DWT->CTRL = dwt_ctrl;
CoreDebug->DEMCR = core_debug;
}
#endif // defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
#endif // NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
{
@ -162,7 +166,7 @@ nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t event_handler)
#endif
m_clock_cb.event_handler = event_handler;
m_clock_cb.module_initialized = true;
#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
m_clock_cb.hfclk_started = false;
#endif
}
@ -222,7 +226,7 @@ void nrfx_clock_lfclk_start(void)
nrf_clock_event_clear(NRF_CLOCK_EVENT_LFCLKSTARTED);
nrf_clock_int_enable(NRF_CLOCK_INT_LF_STARTED_MASK);
#if defined(NRF52832_XXAA) || defined(NRF52832_XXAB)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_132)
nrfx_clock_anomaly_132();
#endif
@ -251,7 +255,7 @@ void nrfx_clock_hfclk_stop(void)
nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTOP);
while (nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY))
{}
#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
m_clock_cb.hfclk_started = false;
#endif
}
@ -276,7 +280,7 @@ nrfx_err_t nrfx_clock_calibration_start(void)
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);
nrf_clock_int_enable(NRF_CLOCK_INT_DONE_MASK);
m_clock_cb.cal_state = CAL_STATE_CAL;
#if defined(USE_WORKAROUND_FOR_ANOMALY_192)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
*(volatile uint32_t *)0x40000C34 = 0x00000002;
#endif
nrf_clock_task_trigger(NRF_CLOCK_TASK_CAL);
@ -330,7 +334,7 @@ void nrfx_clock_irq_handler(void)
NRFX_LOG_DEBUG("Event: %s.", EVT_TO_STR(NRF_CLOCK_EVENT_HFCLKSTARTED));
nrf_clock_int_disable(NRF_CLOCK_INT_HF_STARTED_MASK);
#if defined(USE_WORKAROUND_FOR_ANOMALY_201)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_201)
if (!m_clock_cb.hfclk_started)
{
m_clock_cb.hfclk_started = true;
@ -361,7 +365,7 @@ void nrfx_clock_irq_handler(void)
if (nrf_clock_event_check(NRF_CLOCK_EVENT_DONE))
{
#if defined(USE_WORKAROUND_FOR_ANOMALY_192)
#if NRFX_CHECK(USE_WORKAROUND_FOR_ANOMALY_192)
*(volatile uint32_t *)0x40000C34 = 0x00000000;
#endif
nrf_clock_event_clear(NRF_CLOCK_EVENT_DONE);

421
ext/hal/nordic/nrfx/drivers/src/nrfx_nvmc.c Normal file
View file

@ -0,0 +1,421 @@
/*
* Copyright (c) 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <nrfx.h>
#if NRFX_CHECK(NRFX_NVMC_ENABLED)
#include <nrfx_nvmc.h>
/**
* Value representing the number of bytes in a word.
*
* It is used in loops iterating over bytes contained in a word
* or in word-alignment checks.
*/
#define NVMC_BYTES_IN_WORD 4
/**
* Value representing non-volatile memory (NVM) page count.
*
* This symbol is needed to determine NVM page count for chips that cannot
* always access FICR for this information.
*/
#if defined(NRF9160_XXAA)
#define NVMC_FLASH_PAGE_COUNT 256
#endif
/**
* Value representing non-volatile memory (NVM) page size in bytes.
*
* This symbol is needed to determine NVM page size for chips that cannot
* always access FICR for this information.
*/
#if defined(NRF9160_XXAA)
#define NVMC_FLASH_PAGE_SIZE 0x1000 ///< 4 kB
#endif
#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
/**
* Value representing the page erase time.
*
* This value is used to determine whether the partial erase is still in progress.
*/
#if defined(NRF52810_XXAA) || defined(NRF52811_XXAA) || defined(NRF52840_XXAA)
#define NVMC_PAGE_ERASE_DURATION_MS 85
#elif defined(NRF9160_XXAA)
#define NVMC_PAGE_ERASE_DURATION_MS 87
#else
#error "Page partial erase present but could not determine its total duration for given SoC"
#endif
/**
* Value representing the invalid page partial erase address.
*
* This value is used for representing a NULL pointer for
* partial erase, as that address 0 can be a valid
* memory address in flash.
*/
#define NVMC_PARTIAL_ERASE_INVALID_ADDR 0xFFFFFFFF
/** Internal counter for page partial erase. */
static uint32_t m_partial_erase_time_elapsed;
/** Partial erase page address. */
static uint32_t m_partial_erase_page_addr = NVMC_PARTIAL_ERASE_INVALID_ADDR;
#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
static uint32_t flash_page_size_get(void)
{
uint32_t flash_page_size = 0;
#if defined(NRF51) || defined(NRF52_SERIES)
flash_page_size = nrf_ficr_codepagesize_get(NRF_FICR);
#elif defined(NVMC_FLASH_PAGE_SIZE)
flash_page_size = NVMC_FLASH_PAGE_SIZE;
#else
#error "Cannot determine flash page size for a given SoC."
#endif
return flash_page_size;
}
static uint32_t flash_page_count_get(void)
{
uint32_t page_count = 0;
#if defined(NRF51) || defined(NRF52_SERIES)
page_count = nrf_ficr_codesize_get(NRF_FICR);
#elif defined(NVMC_FLASH_PAGE_COUNT)
page_count = NVMC_FLASH_PAGE_COUNT;
#else
#error "Cannot determine flash page count for a given SoC."
#endif
return page_count;
}
static uint32_t flash_total_size_get(void)
{
return flash_page_size_get() * flash_page_count_get();
}
static bool is_page_aligned_check(uint32_t addr)
{
/* If the modulo operation returns '0', then the address is aligned. */
return !(addr % flash_page_size_get());
}
static uint32_t partial_word_create(uint32_t addr, uint8_t const * bytes, uint32_t bytes_count)
{
uint32_t value32;
uint32_t byte_shift;
byte_shift = addr % NVMC_BYTES_IN_WORD;
NRFX_ASSERT(bytes_count <= (NVMC_BYTES_IN_WORD - byte_shift));
value32 = 0xFFFFFFFF;
for (uint32_t i = 0; i < bytes_count; i++)
{
((uint8_t *)&value32)[byte_shift] = bytes[i];
byte_shift++;
}
return value32;
}
static void nvmc_readonly_mode_set(void)
{
#if defined(NRF_TRUSTZONE_NONSECURE)
nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_READONLY);
#else
nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_READONLY);
#endif
}
static void nvmc_write_mode_set(void)
{
#if defined(NRF_TRUSTZONE_NONSECURE)
nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_WRITE);
#else
nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_WRITE);
#endif
}
static void nvmc_erase_mode_set(void)
{
#if defined(NRF_TRUSTZONE_NONSECURE)
nrf_nvmc_nonsecure_mode_set(NRF_NVMC, NRF_NVMC_NS_MODE_ERASE);
#else
nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_ERASE);
#endif
}
static void nvmc_word_write(uint32_t addr, uint32_t value)
{
#if defined(NRF9160_XXAA)
while (!nrf_nvmc_write_ready_check(NRF_NVMC))
{}
#else
while (!nrf_nvmc_ready_check(NRF_NVMC))
{}
#endif
*(volatile uint32_t *)addr = value;
__DMB();
}
static void nvmc_words_write(uint32_t addr, void const * src, uint32_t num_words)
{
for (uint32_t i = 0; i < num_words; i++)
{
nvmc_word_write(addr + (NVMC_BYTES_IN_WORD * i), ((uint32_t const *)src)[i]);
}
}
nrfx_err_t nrfx_nvmc_page_erase(uint32_t addr)
{
NRFX_ASSERT(addr < flash_total_size_get());
if (!is_page_aligned_check(addr))
{
return NRFX_ERROR_INVALID_ADDR;
}
nvmc_erase_mode_set();
nrf_nvmc_page_erase_start(NRF_NVMC, addr);
while (!nrf_nvmc_ready_check(NRF_NVMC))
{}
nvmc_readonly_mode_set();
return NRFX_SUCCESS;
}
nrfx_err_t nrfx_nvmc_uicr_erase(void)
{
#if defined(NVMC_ERASEUICR_ERASEUICR_Msk)
nvmc_erase_mode_set();
nrf_nvmc_uicr_erase_start(NRF_NVMC);
while (!nrf_nvmc_ready_check(NRF_NVMC))
{}
nvmc_readonly_mode_set();
return NRFX_SUCCESS;
#else
return NRFX_ERROR_NOT_SUPPORTED;
#endif
}
void nrfx_nvmc_all_erase(void)
{
nvmc_erase_mode_set();
nrf_nvmc_erase_all_start(NRF_NVMC);
while (!nrf_nvmc_ready_check(NRF_NVMC))
{}
nvmc_readonly_mode_set();
}
#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
nrfx_err_t nrfx_nvmc_page_partial_erase_init(uint32_t addr, uint32_t duration_ms)
{
NRFX_ASSERT(addr < flash_total_size_get());
if (!is_page_aligned_check(addr))
{
return NRFX_ERROR_INVALID_ADDR;
}
m_partial_erase_time_elapsed = 0;
m_partial_erase_page_addr = addr;
nrf_nvmc_partial_erase_duration_set(NRF_NVMC, duration_ms);
return NRFX_SUCCESS;
}
bool nrfx_nvmc_page_partial_erase_continue(void)
{
NRFX_ASSERT(m_partial_erase_page_addr != NVMC_PARTIAL_ERASE_INVALID_ADDR);
uint32_t duration_ms = nrf_nvmc_partial_erase_duration_get(NRF_NVMC);
#if defined(NVMC_CONFIG_WEN_PEen)
nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_PARTIAL_ERASE);
#else
nrf_nvmc_mode_set(NRF_NVMC, NRF_NVMC_MODE_ERASE);
#endif
nrf_nvmc_page_partial_erase_start(NRF_NVMC, m_partial_erase_page_addr);
while (!nrf_nvmc_ready_check(NRF_NVMC))
{}
nvmc_readonly_mode_set();
m_partial_erase_time_elapsed += duration_ms;
if (m_partial_erase_time_elapsed < NVMC_PAGE_ERASE_DURATION_MS)
{
return false;
}
else
{
m_partial_erase_page_addr = NVMC_PARTIAL_ERASE_INVALID_ADDR;
return true;
}
}
#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
bool nrfx_nvmc_byte_writable_check(uint32_t addr, uint8_t val_to_check)
{
NRFX_ASSERT(addr < flash_total_size_get());
uint8_t val_on_addr = *(uint8_t const *)addr;
return (val_to_check & val_on_addr) == val_to_check;
}
bool nrfx_nvmc_word_writable_check(uint32_t addr, uint32_t val_to_check)
{
NRFX_ASSERT(addr < flash_total_size_get());
NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));
uint32_t val_on_addr = *(uint32_t const *)addr;
return (val_to_check & val_on_addr) == val_to_check;
}
void nrfx_nvmc_byte_write(uint32_t addr, uint8_t value)
{
uint32_t aligned_addr = addr & ~(0x03UL);
nrfx_nvmc_word_write(aligned_addr, partial_word_create(addr, &value, 1));
}
void nrfx_nvmc_word_write(uint32_t addr, uint32_t value)
{
NRFX_ASSERT(addr < flash_total_size_get());
NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));
nvmc_write_mode_set();
nvmc_word_write(addr, value);
nvmc_readonly_mode_set();
}
void nrfx_nvmc_bytes_write(uint32_t addr, void const * src, uint32_t num_bytes)
{
NRFX_ASSERT(addr < flash_total_size_get());
nvmc_write_mode_set();
uint8_t const * bytes_src = (uint8_t const *)src;
uint32_t unaligned_bytes = addr % NVMC_BYTES_IN_WORD;
if (unaligned_bytes != 0)
{
uint32_t leading_bytes = NVMC_BYTES_IN_WORD - unaligned_bytes;
if (leading_bytes > num_bytes)
{
leading_bytes = num_bytes;
}
nvmc_word_write(addr - unaligned_bytes,
partial_word_create(addr, bytes_src, leading_bytes));
num_bytes -= leading_bytes;
addr += leading_bytes;
bytes_src += leading_bytes;
}
#if defined(__CORTEX_M) && (__CORTEX_M == 0U)
if (!nrfx_is_word_aligned((void const *)bytes_src))
{
/* Cortex-M0 allows only word-aligned RAM access.
If source address is not word-aligned, bytes are combined
into words explicitly. */
for (uint32_t i = 0; i < num_bytes / NVMC_BYTES_IN_WORD; i++)
{
uint32_t word = (uint32_t)bytes_src[0]
| ((uint32_t)bytes_src[1]) << 8
| ((uint32_t)bytes_src[2]) << 16
| ((uint32_t)bytes_src[3]) << 24;
nvmc_word_write(addr, word);
bytes_src += NVMC_BYTES_IN_WORD;
addr += NVMC_BYTES_IN_WORD;
}
}
else
#endif
{
uint32_t word_count = num_bytes / NVMC_BYTES_IN_WORD;
nvmc_words_write(addr, (uint32_t const *)bytes_src, word_count);
addr += word_count * NVMC_BYTES_IN_WORD;
bytes_src += word_count * NVMC_BYTES_IN_WORD;
}
uint32_t trailing_bytes = num_bytes % NVMC_BYTES_IN_WORD;
if (trailing_bytes != 0)
{
nvmc_word_write(addr, partial_word_create(addr, bytes_src, trailing_bytes));
}
nvmc_readonly_mode_set();
}
void nrfx_nvmc_words_write(uint32_t addr, void const * src, uint32_t num_words)
{
NRFX_ASSERT(addr < flash_total_size_get());
NRFX_ASSERT(nrfx_is_word_aligned((void const *)addr));
NRFX_ASSERT(nrfx_is_word_aligned(src));
nvmc_write_mode_set();
nvmc_words_write(addr, src, num_words);
nvmc_readonly_mode_set();
}
uint32_t nrfx_nvmc_flash_size_get(void)
{
return flash_total_size_get();
}
uint32_t nrfx_nvmc_flash_page_size_get(void)
{
return flash_page_size_get();
}
uint32_t nrfx_nvmc_flash_page_count_get(void)
{
return flash_page_count_get();
}
#endif // NRFX_CHECK(NRFX_NVMC_ENABLED)

2
ext/hal/nordic/nrfx/drivers/src/nrfx_power.c
View file

@ -225,6 +225,8 @@ void nrfx_power_sleepevt_uninit(void)
#if NRF_POWER_HAS_USBREG
void nrfx_power_usbevt_init(nrfx_power_usbevt_config_t const * p_config)
{
NRFX_ASSERT(p_config != NULL);
nrfx_power_usbevt_uninit();
if (p_config->handler != NULL)
{

168
ext/hal/nordic/nrfx/drivers/src/nrfx_qspi.c
View file

@ -35,38 +35,25 @@
#include <nrfx_qspi.h>
/**
* @brief Command byte used to read status register.
*
*/
/** @brief Command byte used to read status register. */
#define QSPI_STD_CMD_RDSR 0x05
/**
* @brief Byte used to mask status register and retrieve the write-in-progess bit.
*
*/
/** @brief Byte used to mask status register and retrieve the write-in-progess bit. */
#define QSPI_MEM_STATUSREG_WIP_Pos 0x01
/**
* @brief Default time used in timeout function.
*/
/** @brief Default time used in timeout function. */
#define QSPI_DEF_WAIT_TIME_US 10
/**
* @brief Default number of tries in timeout function.
*/
/** @brief Default number of tries in timeout function. */
#define QSPI_DEF_WAIT_ATTEMPTS 100
/**
* @brief Control block - driver instance local data.
*/
/** @brief Control block - driver instance local data. */
typedef struct
{
nrfx_qspi_handler_t handler; /**< Handler. */
nrfx_drv_state_t state; /**< Driver state. */
volatile bool interrupt_driven; /**< Information if the current operation is performed and is interrupt-driven. */
void * p_context; /**< Driver context used in interrupt. */
nrfx_qspi_handler_t handler; /**< Handler. */
nrfx_drv_state_t state; /**< Driver state. */
volatile bool is_busy; /**< Flag indicating that an operation is currently being performed. */
void * p_context; /**< Driver context used in interrupt. */
} qspi_control_block_t;
static qspi_control_block_t m_cb;
@ -74,7 +61,7 @@ static qspi_control_block_t m_cb;
static nrfx_err_t qspi_task_perform(nrf_qspi_task_t task)
{
// Wait for peripheral
if (m_cb.interrupt_driven)
if (m_cb.is_busy)
{
return NRFX_ERROR_BUSY;
}
@ -83,7 +70,7 @@ static nrfx_err_t qspi_task_perform(nrf_qspi_task_t task)
if (m_cb.handler)
{
m_cb.interrupt_driven = true;
m_cb.is_busy = true;
nrf_qspi_int_enable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
}
@ -113,6 +100,21 @@ static bool qspi_pins_configure(nrf_qspi_pins_t const * p_config)
return true;
}
static nrfx_err_t qspi_ready_wait(void)
{
bool result;
NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
QSPI_DEF_WAIT_ATTEMPTS,
QSPI_DEF_WAIT_TIME_US,
result);
if (!result)
{
return NRFX_ERROR_TIMEOUT;
}
return NRFX_SUCCESS;
}
nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrfx_qspi_handler_t handler,
void * p_context)
@ -132,7 +134,7 @@ nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrf_qspi_ifconfig0_set(NRF_QSPI, &p_config->prot_if);
nrf_qspi_ifconfig1_set(NRF_QSPI, &p_config->phy_if);
m_cb.interrupt_driven = false;
m_cb.is_busy = false;
m_cb.handler = handler;
m_cb.p_context = p_context;
@ -154,18 +156,8 @@ nrfx_err_t nrfx_qspi_init(nrfx_qspi_config_t const * p_config,
nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_ACTIVATE);
// Waiting for the peripheral to activate
bool result;
NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
QSPI_DEF_WAIT_ATTEMPTS,
QSPI_DEF_WAIT_TIME_US,
result);
if (!result)
{
return NRFX_ERROR_TIMEOUT;
}
return NRFX_SUCCESS;
return qspi_ready_wait();
}
nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
@ -174,7 +166,7 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
if (m_cb.interrupt_driven)
if (m_cb.is_busy)
{
return NRFX_ERROR_BUSY;
}
@ -191,13 +183,7 @@ nrfx_err_t nrfx_qspi_cinstr_xfer(nrf_qspi_cinstr_conf_t const * p_config,
nrf_qspi_cinstr_transfer_start(NRF_QSPI, p_config);
bool result;
NRFX_WAIT_FOR(nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY),
QSPI_DEF_WAIT_ATTEMPTS,
QSPI_DEF_WAIT_TIME_US,
result);
if (!result)
if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT)
{
// This timeout should never occur when WIPWAIT is not active, since in this
// case the QSPI peripheral should send the command immediately, without any
@ -225,6 +211,93 @@ nrfx_err_t nrfx_qspi_cinstr_quick_send(uint8_t opcode,
return nrfx_qspi_cinstr_xfer(&config, p_tx_buffer, NULL);
}
nrfx_err_t nrfx_qspi_lfm_start(nrf_qspi_cinstr_conf_t const * p_config)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(!(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI)));
NRFX_ASSERT(p_config->length == NRF_QSPI_CINSTR_LEN_1B);
if (m_cb.is_busy)
{
return NRFX_ERROR_BUSY;
}
nrf_qspi_cinstr_long_transfer_start(NRF_QSPI, p_config);
if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT)
{
/* In case of error, abort long frame mode */
nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true);
return NRFX_ERROR_TIMEOUT;
}
m_cb.is_busy = true;
return NRFX_SUCCESS;
}
nrfx_err_t nrfx_qspi_lfm_xfer(void const * p_tx_buffer,
void * p_rx_buffer,
size_t transfer_length,
bool finalize)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
NRFX_ASSERT(nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI));
nrfx_err_t status = NRFX_SUCCESS;
/* Perform transfers in packets of 8 bytes. Last transfer may be shorter. */
nrf_qspi_cinstr_len_t length = NRF_QSPI_CINSTR_LEN_9B;
for (uint32_t curr_byte = 0; curr_byte < transfer_length; curr_byte += 8)
{
uint32_t remaining_bytes = transfer_length - curr_byte;
if (remaining_bytes < 8)
{
length = (nrf_qspi_cinstr_len_t)(remaining_bytes + 1);
}
if (p_tx_buffer)
{
nrf_qspi_cinstrdata_set(NRF_QSPI,
length,
&((uint8_t const *)p_tx_buffer)[curr_byte]);
}
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
if (remaining_bytes <= 8)
{
nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, length, finalize);
}
else
{
nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, length, false);
}
if (qspi_ready_wait() == NRFX_ERROR_TIMEOUT)
{
/* In case of error, abort long frame mode */
nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true);
status = NRFX_ERROR_TIMEOUT;
break;
}
if (p_rx_buffer)
{
nrf_qspi_cinstrdata_get(NRF_QSPI,
length,
&((uint8_t *)p_rx_buffer)[curr_byte]);
}
}
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
if ((finalize) || (status == NRFX_ERROR_TIMEOUT))
{
m_cb.is_busy = false;
}
return status;
}
nrfx_err_t nrfx_qspi_mem_busy_check(void)
{
nrfx_err_t ret_code;
@ -252,6 +325,11 @@ void nrfx_qspi_uninit(void)
{
NRFX_ASSERT(m_cb.state != NRFX_DRV_STATE_UNINITIALIZED);
if (nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI))
{
nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI, NRF_QSPI_CINSTR_LEN_1B, true);
}
nrf_qspi_int_disable(NRF_QSPI, NRF_QSPI_INT_READY_MASK);
nrf_qspi_task_trigger(NRF_QSPI, NRF_QSPI_TASK_DEACTIVATE);
@ -320,7 +398,7 @@ void nrfx_qspi_irq_handler(void)
// Catch Event ready interrupts
if (nrf_qspi_event_check(NRF_QSPI, NRF_QSPI_EVENT_READY))
{
m_cb.interrupt_driven = false;
m_cb.is_busy = false;
nrf_qspi_event_clear(NRF_QSPI, NRF_QSPI_EVENT_READY);
m_cb.handler(NRFX_QSPI_EVENT_DONE, m_cb.p_context);
}

146
ext/hal/nordic/nrfx/drivers/src/nrfx_temp.c Normal file
View file

@ -0,0 +1,146 @@
/*
* Copyright (c) 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#include <nrfx.h>
#if NRFX_CHECK(NRFX_TEMP_ENABLED)
#include <nrfx_temp.h>
#if !defined(USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY) && defined(NRF51)
// Enable workaround for nRF51 series anomaly 28
// (TEMP: Temperature offset value has to be manually loaded to the TEMP module).
#define USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY 1
#endif
/** @brief Time of one check attempt.*/
#define NRFX_TEMP_TIME_US 4
/** @brief Maximum attempts to check whether conversion passed.*/
#define NRFX_TEMP_ATTEMPTS 10
/** @brief Internal state of TEMP driver. */
static nrfx_drv_state_t m_temp_state;
/** @brief Pointer to handler to be called from interrupt routine. */
static nrfx_temp_data_handler_t m_data_handler;
nrfx_err_t nrfx_temp_init(nrfx_temp_config_t const * p_config, nrfx_temp_data_handler_t handler)
{
NRFX_ASSERT(p_config);
if (m_temp_state != NRFX_DRV_STATE_UNINITIALIZED)
{
return NRFX_ERROR_ALREADY_INITIALIZED;
}
#if NRFX_CHECK(USE_WORKAROUND_FOR_TEMP_OFFSET_ANOMALY)
*(uint32_t volatile *)0x4000C504 = 0;
#endif
m_data_handler = handler;
if (m_data_handler)
{
nrf_temp_int_enable(NRF_TEMP, NRF_TEMP_INT_DATARDY_MASK);
NRFX_IRQ_PRIORITY_SET(TEMP_IRQn, p_config->interrupt_priority);
NRFX_IRQ_ENABLE(TEMP_IRQn);
}
m_temp_state = NRFX_DRV_STATE_INITIALIZED;
return NRFX_SUCCESS;
}
void nrfx_temp_uninit(void)
{
NRFX_ASSERT(m_temp_state == NRFX_DRV_STATE_INITIALIZED);
nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_STOP);
if (m_data_handler)
{
nrf_temp_int_disable(NRF_TEMP, NRF_TEMP_INT_DATARDY_MASK);
NRFX_IRQ_DISABLE(TEMP_IRQn);
}
m_temp_state = NRFX_DRV_STATE_UNINITIALIZED;
}
int32_t nrfx_temp_calculate(int32_t raw_measurement)
{
/* Raw temperature is a 2's complement signed value. Moreover, it is represented
* by 0.25[C] intervals, so division by 4 is needed. To preserve
* fractional part, raw value is multiplied by 100 before division.*/
return (raw_measurement * 100) / 4;
}
nrfx_err_t nrfx_temp_measure(void)
{
NRFX_ASSERT(m_temp_state == NRFX_DRV_STATE_INITIALIZED);
nrfx_err_t result = NRFX_SUCCESS;
nrf_temp_event_clear(NRF_TEMP, NRF_TEMP_EVENT_DATARDY);
nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_START);
if (!m_data_handler)
{
bool ev_result;
NRFX_WAIT_FOR(nrf_temp_event_check(NRF_TEMP, NRF_TEMP_EVENT_DATARDY),
NRFX_TEMP_ATTEMPTS,
NRFX_TEMP_TIME_US,
ev_result);
if (!ev_result)
{
result = NRFX_ERROR_INTERNAL;
}
else
{
nrf_temp_event_clear(NRF_TEMP, NRF_TEMP_EVENT_DATARDY);
}
nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_STOP);
}
return result;
}
void nrfx_temp_irq_handler(void)
{
NRFX_ASSERT(m_data_handler);
nrf_temp_task_trigger(NRF_TEMP, NRF_TEMP_TASK_STOP);
nrf_temp_event_clear(NRF_TEMP, NRF_TEMP_EVENT_DATARDY);
uint32_t raw_temp = nrfx_temp_result_get();
m_data_handler(raw_temp);
}
#endif // NRFX_CHECK(NRFX_TEMP_ENABLED)

4
ext/hal/nordic/nrfx/drivers/src/nrfx_twis.c
View file

@ -730,7 +730,7 @@ nrfx_err_t nrfx_twis_tx_prepare(nrfx_twis_t const * p_instance,
nrf_twis_tx_prepare(p_instance->p_reg,
(uint8_t const *)p_buf,
(nrf_twis_amount_t)size);
size);
err_code = NRFX_SUCCESS;
NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;
@ -774,7 +774,7 @@ nrfx_err_t nrfx_twis_rx_prepare(nrfx_twis_t const * p_instance,
nrf_twis_rx_prepare(p_instance->p_reg,
(uint8_t *)p_buf,
(nrf_twis_amount_t)size);
size);
err_code = NRFX_SUCCESS;
NRFX_LOG_INFO("Function: %s, error code: %s.", __func__, NRFX_LOG_ERROR_STRING_GET(err_code));
return err_code;

30
ext/hal/nordic/nrfx/drivers/src/nrfx_uarte.c
View file

@ -138,10 +138,12 @@ static void interrupts_enable(nrfx_uarte_t const * p_instance,
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ENDTX);
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_ERROR);
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_RXTO);
nrf_uarte_event_clear(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED);
nrf_uarte_int_enable(p_instance->p_reg, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
NRF_UARTE_INT_RXTO_MASK);
NRF_UARTE_INT_RXTO_MASK |
NRF_UARTE_INT_TXSTOPPED_MASK);
NRFX_IRQ_PRIORITY_SET(nrfx_get_irq_number((void *)p_instance->p_reg),
interrupt_priority);
NRFX_IRQ_ENABLE(nrfx_get_irq_number((void *)p_instance->p_reg));
@ -152,7 +154,8 @@ static void interrupts_disable(nrfx_uarte_t const * p_instance)
nrf_uarte_int_disable(p_instance->p_reg, NRF_UARTE_INT_ENDRX_MASK |
NRF_UARTE_INT_ENDTX_MASK |
NRF_UARTE_INT_ERROR_MASK |
NRF_UARTE_INT_RXTO_MASK);
NRF_UARTE_INT_RXTO_MASK |
NRF_UARTE_INT_TXSTOPPED_MASK);
NRFX_IRQ_DISABLE(nrfx_get_irq_number((void *)p_instance->p_reg));
}
@ -336,6 +339,15 @@ nrfx_err_t nrfx_uarte_tx(nrfx_uarte_t const * p_instance,
{
err_code = NRFX_ERROR_FORBIDDEN;
}
else
{
// Transmitter has to be stopped by triggering the STOPTX task to achieve
// the lowest possible level of the UARTE power consumption.
nrf_uarte_task_trigger(p_instance->p_reg, NRF_UARTE_TASK_STOPTX);
while (!nrf_uarte_event_check(p_instance->p_reg, NRF_UARTE_EVENT_TXSTOPPED))
{}
}
p_cb->tx_buffer_length = 0;
}
@ -585,6 +597,20 @@ static void uarte_irq_handler(NRF_UARTE_Type * p_uarte,
if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_ENDTX))
{
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_ENDTX);
// Transmitter has to be stopped by triggering STOPTX task to achieve
// the lowest possible level of the UARTE power consumption.
nrf_uarte_task_trigger(p_uarte, NRF_UARTE_TASK_STOPTX);
if (p_cb->tx_buffer_length != 0)
{
tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte));
}
}
if (nrf_uarte_event_check(p_uarte, NRF_UARTE_EVENT_TXSTOPPED))
{
nrf_uarte_event_clear(p_uarte, NRF_UARTE_EVENT_TXSTOPPED);
if (p_cb->tx_buffer_length != 0)
{
tx_done_event(p_cb, nrf_uarte_tx_amount_get(p_uarte));

19
ext/hal/nordic/nrfx/drivers/src/nrfx_usbd.c
View file

@ -1155,6 +1155,25 @@ static void usbd_ep_data_handler(nrfx_usbd_ep_t ep, uint8_t bitpos)
if (NRF_USBD_EPIN_CHECK(ep))
{
/* IN endpoint (Device -> Host) */
/* Secure against the race condition that occurs when an IN transfer is interrupted
* by an OUT transaction, which in turn is interrupted by a process with higher priority.
* If the IN events ENDEPIN and EPDATA arrive during that high priority process,
* the OUT handler might call usbd_ep_data_handler without calling
* nrf_usbd_epin_dma_handler (or nrf_usbd_ep0in_dma_handler) for the IN transaction.
*/
if (nrf_usbd_event_get_and_clear(nrfx_usbd_ep_to_endevent(ep)))
{
if (ep != NRFX_USBD_EPIN0)
{
nrf_usbd_epin_dma_handler(ep);
}
else
{
nrf_usbd_ep0in_dma_handler();
}
}
if (0 == (m_ep_dma_waiting & (1U << bitpos)))
{
NRFX_LOG_DEBUG("USBD event: EndpointData: In finished");

2
ext/hal/nordic/nrfx/drivers/src/prs/nrfx_prs.h
View file

@ -133,6 +133,7 @@ nrfx_err_t nrfx_prs_acquire(void const * p_base_addr,
*/
void nrfx_prs_release(void const * p_base_addr);
/** @} */
void nrfx_prs_box_0_irq_handler(void);
void nrfx_prs_box_1_irq_handler(void);
@ -140,7 +141,6 @@ void nrfx_prs_box_2_irq_handler(void);
void nrfx_prs_box_3_irq_handler(void);
void nrfx_prs_box_4_irq_handler(void);
/** @} */
#ifdef __cplusplus
}

376
ext/hal/nordic/nrfx/hal/nrf_aar.h Normal file
View file

@ -0,0 +1,376 @@
/*
* Copyright (c) 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF_AAR_H__
#define NRF_AAR_H__
#include <nrfx.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrf_aar_hal AAR HAL
* @{
* @ingroup nrf_aar
* @brief Hardware access layer for managing the Accelerated Address Resolver (AAR) peripheral.
*/
/** @brief AAR events. */
typedef enum
{
NRF_AAR_EVENT_END = offsetof(NRF_AAR_Type, EVENTS_END), ///< Address resolution procedure complete.
NRF_AAR_EVENT_RESOLVED = offsetof(NRF_AAR_Type, EVENTS_RESOLVED), ///< Address resolved.
NRF_AAR_EVENT_NOTRESOLVED = offsetof(NRF_AAR_Type, EVENTS_NOTRESOLVED), ///< Address not resolved.
} nrf_aar_event_t;
/** @brief AAR interrupts. */
typedef enum
{
NRF_AAR_INT_END_MASK = AAR_INTENSET_END_Msk, ///< Interrupt on END event.
NRF_AAR_INT_RESOLVED_MASK = AAR_INTENSET_RESOLVED_Msk, ///< Interrupt on RESOLVED event.
NRF_AAR_INT_NOTRESOLVED_MASK = AAR_INTENSET_NOTRESOLVED_Msk, ///< Interrupt on NOTRESOLVED event.
} nrf_aar_int_mask_t;
/** @brief AAR tasks. */
typedef enum
{
NRF_AAR_TASK_START = offsetof(NRF_AAR_Type, TASKS_START), ///< Start address resolution procedure.
NRF_AAR_TASK_STOP = offsetof(NRF_AAR_Type, TASKS_STOP), ///< Stop address resolution procedure.
} nrf_aar_task_t;
/**
* @brief Function for retrieving the state of the AAR event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true Event is set.
* @retval false Event is not set.
*/
__STATIC_INLINE bool nrf_aar_event_check(NRF_AAR_Type const * p_reg,
nrf_aar_event_t event);
/**
* @brief Function for clearing the specified AAR event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_aar_event_clear(NRF_AAR_Type * p_reg,
nrf_aar_event_t event);
/**
* @brief Function for getting the address of the specified AAR event register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to get the address of.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_aar_event_address_get(NRF_AAR_Type const * p_reg,
nrf_aar_event_t event);
/**
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_aar_int_enable(NRF_AAR_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of the specified interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of the interrupt to be checked.
*
* @retval true Interrupt is enabled.
* @retval false Interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_aar_int_enable_check(NRF_AAR_Type const * p_reg,
nrf_aar_int_mask_t mask);
/**
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_aar_int_disable(NRF_AAR_Type * p_reg, uint32_t mask);
/**
* @brief Function for starting an AAR task.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task to be activated.
*/
__STATIC_INLINE void nrf_aar_task_trigger(NRF_AAR_Type * p_reg, nrf_aar_task_t task);
/**
* @brief Function for getting the address of a specific AAR task register.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Requested AAR task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_aar_task_address_get(NRF_AAR_Type const * p_reg,
nrf_aar_task_t task);
/**
* @brief Function for enabling AAR.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_aar_enable(NRF_AAR_Type * p_reg);
/**
* @brief Function for disabling AAR.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_aar_disable(NRF_AAR_Type * p_reg);
/**
* @brief Function for setting the pointer to the Identity Resolving Keys (IRK) data structure.
*
* The size of the provided data structure must correspond to the number of keys available.
* Each key occupies 16 bytes.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param irk_ptr Pointer to the IRK data structure. Must point to the Data RAM region.
*
* @sa nrf_aar_irk_number_set
*/
__STATIC_INLINE void nrf_aar_irk_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * irk_ptr);
/**
* @brief Function for getting the pointer to the Identity Resolving Keys
* data structure.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the IRK data structure.
*/
__STATIC_INLINE uint8_t const * nrf_aar_irk_pointer_get(NRF_AAR_Type const * p_reg);
/**
* @brief Function for setting the number of keys available in the Identity Resolving Keys
* data structure.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param irk_num Number of keys available in the IRK data structure. Maximum is 16.
* Must correspond to the size of the provided IRK data structure.
*
* @sa nrf_aar_irk_pointer_set
*/
__STATIC_INLINE void nrf_aar_irk_number_set(NRF_AAR_Type * p_reg, uint8_t irk_num);
/**
* @brief Function for getting the number of keys available in the Identity Resolving Keys
* data structure.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Number of keys in the IRK data structure.
*/
__STATIC_INLINE uint8_t nrf_aar_irk_number_get(NRF_AAR_Type const * p_reg);
/**
* @brief Function for setting the pointer to the resolvable address.
*
* The resolvable address must consist of 6 bytes.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param addr_ptr Pointer to the address to resolve using the available IRK keys.
* Must point to the Data RAM region.
*/
__STATIC_INLINE void nrf_aar_addr_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * addr_ptr);
/**
* @brief Function for getting the pointer to the resolvable address.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the address to resolve.
*/
__STATIC_INLINE uint8_t const * nrf_aar_addr_pointer_get(NRF_AAR_Type const * p_reg);
/**
* @brief Function for setting the pointer to the scratch data area.
*
* The scratch data area is used for temporary storage during the address resolution procedure.
* A space of minimum 3 bytes must be reserved for the scratch data area.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param scratch_ptr Pointer to the scratch data area. Must point to the Data RAM region.
*/
__STATIC_INLINE void nrf_aar_scratch_pointer_set(NRF_AAR_Type * p_reg, uint8_t * scratch_ptr);
/**
* @brief Function for getting the pointer to the scratch data area.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the scratch data area.
*/
__STATIC_INLINE uint8_t * nrf_aar_scratch_pointer_get(NRF_AAR_Type const * p_reg);
/**
* @brief Function for getting the index of the Identity Resolving Key that was used
* the last time an address was resolved.
*
* This function can be used to get the IRK index that matched the resolvable address,
* provided that @ref NRF_AAR_EVENT_RESOLVED occured. Otherwise, it will return
* the index of the last IRK stored in the IRK data structure.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return The index of the IRK that was used the last time an address was resolved.
*/
__STATIC_INLINE uint8_t nrf_aar_resolution_status_get(NRF_AAR_Type const * p_reg);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrf_aar_event_check(NRF_AAR_Type const * p_reg,
nrf_aar_event_t aar_event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)aar_event);
}
__STATIC_INLINE void nrf_aar_event_clear(NRF_AAR_Type * p_reg,
nrf_aar_event_t aar_event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)aar_event)) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)aar_event));
(void)dummy;
#endif
}
__STATIC_INLINE uint32_t nrf_aar_event_address_get(NRF_AAR_Type const * p_reg,
nrf_aar_event_t aar_event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)aar_event);
}
__STATIC_INLINE void nrf_aar_int_enable(NRF_AAR_Type * p_reg, uint32_t mask)
{
p_reg->INTENSET = mask;
}
__STATIC_INLINE bool nrf_aar_int_enable_check(NRF_AAR_Type const * p_reg,
nrf_aar_int_mask_t mask)
{
return (bool)(p_reg->INTENSET & mask);
}
__STATIC_INLINE void nrf_aar_int_disable(NRF_AAR_Type * p_reg, uint32_t mask)
{
p_reg->INTENCLR = mask;
}
__STATIC_INLINE void nrf_aar_task_trigger(NRF_AAR_Type * p_reg, nrf_aar_task_t task)
{
*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task) = 1;
}
__STATIC_INLINE uint32_t nrf_aar_task_address_get(NRF_AAR_Type const * p_reg,
nrf_aar_task_t task)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
}
__STATIC_INLINE void nrf_aar_enable(NRF_AAR_Type * p_reg)
{
p_reg->ENABLE = AAR_ENABLE_ENABLE_Enabled << AAR_ENABLE_ENABLE_Pos;
}
__STATIC_INLINE void nrf_aar_disable(NRF_AAR_Type * p_reg)
{
p_reg->ENABLE = AAR_ENABLE_ENABLE_Disabled << AAR_ENABLE_ENABLE_Pos;
}
__STATIC_INLINE void nrf_aar_irk_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * irk_ptr)
{
p_reg->IRKPTR = (uint32_t)irk_ptr;
}
__STATIC_INLINE uint8_t const * nrf_aar_irk_pointer_get(NRF_AAR_Type const * p_reg)
{
return (uint8_t const *)(p_reg->IRKPTR);
}
__STATIC_INLINE void nrf_aar_irk_number_set(NRF_AAR_Type * p_reg, uint8_t irk_num)
{
p_reg->NIRK = irk_num;
}
__STATIC_INLINE uint8_t nrf_aar_irk_number_get(NRF_AAR_Type const * p_reg)
{
return (uint8_t)(p_reg->NIRK);
}
__STATIC_INLINE void nrf_aar_addr_pointer_set(NRF_AAR_Type * p_reg, uint8_t const * addr_ptr)
{
p_reg->ADDRPTR = (uint32_t)addr_ptr;
}
__STATIC_INLINE uint8_t const * nrf_aar_addr_pointer_get(NRF_AAR_Type const * p_reg)
{
return (uint8_t const *)(p_reg->ADDRPTR);
}
__STATIC_INLINE void nrf_aar_scratch_pointer_set(NRF_AAR_Type * p_reg, uint8_t * scratch_ptr)
{
p_reg->SCRATCHPTR = (uint32_t)scratch_ptr;
}
__STATIC_INLINE uint8_t * nrf_aar_scratch_pointer_get(NRF_AAR_Type const * p_reg)
{
return (uint8_t *)(p_reg->SCRATCHPTR);
}
__STATIC_INLINE uint8_t nrf_aar_resolution_status_get(NRF_AAR_Type const * p_reg)
{
return (uint8_t)(p_reg->STATUS);
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_AAR_H__

14
ext/hal/nordic/nrfx/hal/nrf_acl.h
View file

@ -38,6 +38,8 @@
extern "C" {
#endif
#define NRF_ACL_REGION_SIZE_MAX (512 * 1024UL)
/**
* @defgroup nrf_acl_hal ACL HAL
* @{
@ -45,8 +47,6 @@ extern "C" {
* @brief Hardware access layer for managing the Access Control List (ACL) peripheral.
*/
#define NRF_ACL_REGION_SIZE_MAX (512 * 1024UL)
/** @brief ACL permissions. */
typedef enum
{
@ -56,11 +56,11 @@ typedef enum
} nrf_acl_perm_t;
/**
* @brief Function for setting region parameters for given ACL region.
* @brief Function for setting region parameters for given ACL region.
*
* Address must be word and page aligned. Size must be page aligned.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
* @param[in] address Start address.
* @param[in] size Size of region to protect in bytes.
@ -75,7 +75,7 @@ __STATIC_INLINE void nrf_acl_region_set(NRF_ACL_Type * p_reg,
/**
* @brief Function for getting the configured region address of a specific ACL region.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
*
* @return Configured region address of given ACL region.
@ -85,7 +85,7 @@ __STATIC_INLINE uint32_t nrf_acl_region_address_get(NRF_ACL_Type * p_reg, uint32
/**
* @brief Function for getting the configured region size of a specific ACL region.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
*
* @return Configured region size of given ACL region.
@ -95,7 +95,7 @@ __STATIC_INLINE size_t nrf_acl_region_size_get(NRF_ACL_Type * p_reg, uint32_t re
/**
* @brief Function for getting the configured region permissions of a specific ACL region.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id ACL region index.
*
* @return Configured region permissions of given ACL region.

82
ext/hal/nordic/nrfx/hal/nrf_adc.h
View file

@ -72,9 +72,7 @@ typedef enum
} nrf_adc_config_scaling_t;
/**
* @brief External reference selection of the analog-to-digital converter.
*/
/** @brief External reference selection of the analog-to-digital converter. */
typedef enum
{
NRF_ADC_CONFIG_EXTREFSEL_NONE = ADC_CONFIG_EXTREFSEL_None, /**< Analog reference inputs disabled. */
@ -82,15 +80,13 @@ typedef enum
NRF_ADC_CONFIG_EXTREFSEL_AREF1 = ADC_CONFIG_EXTREFSEL_AnalogReference1 /**< AREF1 as analog reference. */
} nrf_adc_config_extref_t;
/**
* @brief Reference selection of the analog-to-digital converter.
*/
/** @brief Reference selection of the analog-to-digital converter. */
typedef enum
{
NRF_ADC_CONFIG_REF_VBG = ADC_CONFIG_REFSEL_VBG, /**< 1.2 V reference. */
NRF_ADC_CONFIG_REF_SUPPLY_ONE_HALF = ADC_CONFIG_REFSEL_SupplyOneHalfPrescaling, /**< 1/2 of power supply. */
NRF_ADC_CONFIG_REF_SUPPLY_ONE_THIRD = ADC_CONFIG_REFSEL_SupplyOneThirdPrescaling, /**< 1/3 of power supply. */
NRF_ADC_CONFIG_REF_EXT = ADC_CONFIG_REFSEL_External /**< External reference. See @ref nrf_adc_config_extref_t for further configuration.*/
NRF_ADC_CONFIG_REF_EXT = ADC_CONFIG_REFSEL_External /**< External reference. See @ref nrf_adc_config_extref_t for further configuration. */
} nrf_adc_config_reference_t;
/** @brief Input selection of the analog-to-digital converter. */
@ -110,21 +106,17 @@ typedef enum
/** @brief Analog-to-digital converter tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_ADC_TASK_START = offsetof(NRF_ADC_Type, TASKS_START), /**< ADC start sampling task. */
NRF_ADC_TASK_STOP = offsetof(NRF_ADC_Type, TASKS_STOP) /**< ADC stop sampling task. */
/*lint -restore*/
} nrf_adc_task_t;
/** @brief Analog-to-digital converter events. */
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
typedef enum
{
/*lint -save -e30*/
NRF_ADC_EVENT_END = offsetof(NRF_ADC_Type, EVENTS_END) /**< End of a conversion event. */
/*lint -restore*/
} nrf_adc_event_t;
/**@brief Analog-to-digital converter configuration. */
/** @brief Analog-to-digital converter configuration. */
typedef struct
{
nrf_adc_config_resolution_t resolution; /**< ADC resolution. */
@ -134,13 +126,14 @@ typedef struct
nrf_adc_config_extref_t extref; /**< ADC external reference selection. */
} nrf_adc_config_t;
/**@brief Analog-to-digital value type. */
/** @brief Analog-to-digital value type. */
typedef uint16_t nrf_adc_value_t;
/**
* @brief Function for activating a specific ADC task.
* @brief Function for activating the specified ADC task.
*
* @param[in] task Task to activate.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task);
@ -154,12 +147,12 @@ __STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task);
__STATIC_INLINE uint32_t nrf_adc_task_address_get(nrf_adc_task_t task);
/**
* @brief Function for checking the state of an ADC event.
* @brief Function for retrieving the state of an ADC event.
*
* @param[in] event Event to check.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event);
@ -171,7 +164,7 @@ __STATIC_INLINE bool nrf_adc_event_check(nrf_adc_event_t event);
__STATIC_INLINE void nrf_adc_event_clear(nrf_adc_event_t event);
/**
* @brief Function for getting the address of a specific ADC event register.
* @brief Function for getting the address of the specified ADC event register.
*
* @param[in] adc_event ADC event.
*
@ -182,54 +175,48 @@ __STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event);
/**
* @brief Function for enabling the specified interrupts.
*
* @param[in] int_mask Interrupts to enable.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask);
__STATIC_INLINE void nrf_adc_int_enable(uint32_t mask);
/**
* @brief Function for disabling the specified interrupts.
*
* @param[in] int_mask Interrupts to disable.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask);
__STATIC_INLINE void nrf_adc_int_disable(uint32_t mask);
/**
* @brief Function for retrieving the state of the specified ADC interrupts.
*
* @param[in] int_mask Interrupts to check.
* @param[in] mask Mask of interrupts to be checked.
*
* @retval true If all specified interrupts are enabled.
* @retval false If at least one of the given interrupts is not enabled.
* @retval true All specified interrupts are enabled.
* @retval false At least one of the given interrupts is not enabled.
*/
__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask);
__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t mask);
/**
* @brief Function for checking whether the ADC is busy.
*
* This function checks whether the ADC converter is busy with a conversion.
*
* @retval true If the ADC is busy.
* @retval false If the ADC is not busy.
* @retval true The ADC is busy.
* @retval false The ADC is not busy.
*/
__STATIC_INLINE bool nrf_adc_busy_check(void);
/**
* @brief Function for enabling the ADC.
*
*/
/** @brief Function for enabling the ADC. */
__STATIC_INLINE void nrf_adc_enable(void);
/**
* @brief Function for disabling the ADC.
*
*/
/** @brief Function for disabling the ADC. */
__STATIC_INLINE void nrf_adc_disable(void);
/**
* @brief Function for checking if the ADC is enabled.
*
* @retval true If the ADC is enabled.
* @retval false If the ADC is not enabled.
* @retval true The ADC is enabled.
* @retval false The ADC is not enabled.
*/
__STATIC_INLINE bool nrf_adc_enable_check(void);
@ -252,6 +239,7 @@ __STATIC_INLINE nrf_adc_value_t nrf_adc_result_get(void);
*/
__STATIC_INLINE void nrf_adc_init(nrf_adc_config_t const * p_config);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_adc_task_trigger(nrf_adc_task_t task)
@ -279,19 +267,19 @@ __STATIC_INLINE uint32_t nrf_adc_event_address_get(nrf_adc_event_t adc_event)
return (uint32_t)((uint8_t *)NRF_ADC + (uint32_t)adc_event);
}
__STATIC_INLINE void nrf_adc_int_enable(uint32_t int_mask)
__STATIC_INLINE void nrf_adc_int_enable(uint32_t mask)
{
NRF_ADC->INTENSET = int_mask;
NRF_ADC->INTENSET = mask;
}
__STATIC_INLINE void nrf_adc_int_disable(uint32_t int_mask)
__STATIC_INLINE void nrf_adc_int_disable(uint32_t mask)
{
NRF_ADC->INTENCLR = int_mask;
NRF_ADC->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t int_mask)
__STATIC_INLINE bool nrf_adc_int_enable_check(uint32_t mask)
{
return (bool)(NRF_ADC->INTENSET & int_mask);
return (bool)(NRF_ADC->INTENSET & mask);
}
__STATIC_INLINE bool nrf_adc_busy_check(void)

106
ext/hal/nordic/nrfx/hal/nrf_ccm.h
View file

@ -45,36 +45,26 @@ extern "C" {
* @brief Hardware access layer for managing the AES CCM peripheral.
*/
/**
* @brief CCM tasks.
*/
/** @brief CCM tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_CCM_TASK_KSGEN = offsetof(NRF_CCM_Type, TASKS_KSGEN), ///< Start generation of key-stream.
NRF_CCM_TASK_CRYPT = offsetof(NRF_CCM_Type, TASKS_CRYPT), ///< Start encryption/decryption.
NRF_CCM_TASK_STOP = offsetof(NRF_CCM_Type, TASKS_STOP), ///< Stop encryption/decryption.
#if defined(CCM_RATEOVERRIDE_RATEOVERRIDE_Pos) || defined(__NRFX_DOXYGEN__)
NRF_CCM_TASK_RATEOVERRIDE = offsetof(NRF_CCM_Type, TASKS_RATEOVERRIDE), ///< Override DATARATE setting in MODE register.
#endif
/*lint -restore*/
} nrf_ccm_task_t;
/**
* @brief CCM events.
*/
/** @brief CCM events. */
typedef enum
{
/*lint -save -e30*/
NRF_CCM_EVENT_ENDKSGEN = offsetof(NRF_CCM_Type, EVENTS_ENDKSGEN), ///< Keystream generation complete.
NRF_CCM_EVENT_ENDCRYPT = offsetof(NRF_CCM_Type, EVENTS_ENDCRYPT), ///< Encrypt/decrypt complete.
NRF_CCM_EVENT_ERROR = offsetof(NRF_CCM_Type, EVENTS_ERROR), ///< CCM error event.
/*lint -restore*/
} nrf_ccm_event_t;
/**
* @brief CCM interrupts.
*/
/** @brief CCM interrupts. */
typedef enum
{
NRF_CCM_INT_ENDKSGEN_MASK = CCM_INTENSET_ENDKSGEN_Msk, ///< Interrupt on ENDKSGEN event.
@ -82,9 +72,7 @@ typedef enum
NRF_CCM_INT_ERROR_MASK = CCM_INTENSET_ERROR_Msk, ///< Interrupt on ERROR event.
} nrf_ccm_int_mask_t;
/**
* @brief CCM modes of operation.
*/
/** @brief CCM modes of operation. */
typedef enum
{
NRF_CCM_MODE_ENCRYPTION = CCM_MODE_MODE_Encryption, ///< Encryption mode.
@ -92,9 +80,7 @@ typedef enum
} nrf_ccm_mode_t;
#if defined(CCM_MODE_DATARATE_Pos) || defined(__NRFX_DOXYGEN__)
/**
* @brief CCM data rates.
*/
/** @brief CCM data rates. */
typedef enum
{
NRF_CCM_DATARATE_1M = CCM_MODE_DATARATE_1Mbit, ///< 1 Mbps.
@ -109,9 +95,7 @@ typedef enum
#endif // defined(CCM_MODE_DATARATE_Pos) || defined(__NRFX_DOXYGEN__)
#if defined(CCM_MODE_LENGTH_Pos) || defined(__NRFX_DOXYGEN__)
/**
* @brief CCM packet length options.
*/
/** @brief CCM packet length options. */
typedef enum
{
NRF_CCM_LENGTH_DEFAULT = CCM_MODE_LENGTH_Default, ///< Default length.
@ -119,24 +103,22 @@ typedef enum
} nrf_ccm_length_t;
#endif // defined(CCM_MODE_LENGTH_Pos) || defined(__NRFX_DOXYGEN__)
/**
* @brief CCM configuration.
*/
/** @brief CCM configuration. */
typedef struct {
nrf_ccm_mode_t mode;
nrf_ccm_mode_t mode; ///< Operation mode.
#if defined(CCM_MODE_DATARATE_Pos) || defined(__NRFX_DOXYGEN__)
nrf_ccm_datarate_t datarate;
nrf_ccm_datarate_t datarate; ///< Data rate.
#endif
#if defined(CCM_MODE_LENGTH_Pos) || defined(__NRFX_DOXYGEN__)
nrf_ccm_length_t length;
nrf_ccm_length_t length; ///< Lenght of the CCM packet.
#endif
} nrf_ccm_config_t;
/**
* @brief Function for activating a specific CCM task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_ccm_task_trigger(NRF_CCM_Type * p_reg,
nrf_ccm_task_t task);
@ -144,7 +126,7 @@ __STATIC_INLINE void nrf_ccm_task_trigger(NRF_CCM_Type * p_reg,
/**
* @brief Function for getting the address of a specific CCM task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
*
* @return Address of the specified task register.
@ -155,20 +137,20 @@ __STATIC_INLINE uint32_t nrf_ccm_task_address_get(NRF_CCM_Type const * p_reg,
/**
* @brief Function for clearing a specific CCM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_ccm_event_clear(NRF_CCM_Type * p_reg,
nrf_ccm_event_t event);
/**
* @brief Function for checking the state of a specific CCM event.
* @brief Function for retrieving the state of a specific CCM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_ccm_event_check(NRF_CCM_Type const * p_reg,
nrf_ccm_event_t event);
@ -176,7 +158,7 @@ __STATIC_INLINE bool nrf_ccm_event_check(NRF_CCM_Type const * p_reg,
/**
* @brief Function for getting the address of a specific CCM event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
*
* @return Address of the specified event register.
@ -187,27 +169,27 @@ __STATIC_INLINE uint32_t nrf_ccm_event_address_get(NRF_CCM_Type const * p_reg,
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_ccm_int_enable(NRF_CCM_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_ccm_int_disable(NRF_CCM_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] ccm_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ccm_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_ccm_int_enable_check(NRF_CCM_Type const * p_reg,
nrf_ccm_int_mask_t ccm_int);
@ -215,21 +197,21 @@ __STATIC_INLINE bool nrf_ccm_int_enable_check(NRF_CCM_Type const * p_reg,
/**
* @brief Function for enabling the CCM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_ccm_enable(NRF_CCM_Type * p_reg);
/**
* @brief Function for disabling the CCM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_ccm_disable(NRF_CCM_Type * p_reg);
/**
* @brief Function for setting the CCM peripheral configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the structure with configuration to be set.
*/
__STATIC_INLINE void nrf_ccm_configure(NRF_CCM_Type * p_reg,
@ -240,7 +222,7 @@ __STATIC_INLINE void nrf_ccm_configure(NRF_CCM_Type * p_reg,
* @brief Function for setting the length of key-stream generated
* when the packet length is configured as extended.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] size Maximum length of the key-stream.
*/
__STATIC_INLINE void nrf_ccm_maxpacketsize_set(NRF_CCM_Type * p_reg,
@ -250,10 +232,10 @@ __STATIC_INLINE void nrf_ccm_maxpacketsize_set(NRF_CCM_Type * p_reg,
/**
* @brief Function for getting the MIC check result.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true If the MIC check passed.
* @retval false If the MIC check failed.
* @retval true The MIC check passed.
* @retval false The MIC check failed.
*/
__STATIC_INLINE bool nrf_ccm_micstatus_get(NRF_CCM_Type const * p_reg);
@ -261,7 +243,7 @@ __STATIC_INLINE bool nrf_ccm_micstatus_get(NRF_CCM_Type const * p_reg);
* @brief Function for setting the pointer to the data structure
* holding the AES key and the CCM NONCE vector.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_data Pointer to the data structure.
*/
__STATIC_INLINE void nrf_ccm_cnfptr_set(NRF_CCM_Type * p_reg,
@ -271,7 +253,7 @@ __STATIC_INLINE void nrf_ccm_cnfptr_set(NRF_CCM_Type * p_reg,
* @brief Function for getting the pointer to the data structure
* holding the AES key and the CCM NONCE vector.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the data structure.
*/
@ -280,7 +262,7 @@ __STATIC_INLINE uint32_t * nrf_ccm_cnfptr_get(NRF_CCM_Type const * p_reg);
/**
* @brief Function for setting the input data pointer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_data Input data pointer.
*/
__STATIC_INLINE void nrf_ccm_inptr_set(NRF_CCM_Type * p_reg,
@ -289,7 +271,7 @@ __STATIC_INLINE void nrf_ccm_inptr_set(NRF_CCM_Type * p_reg,
/**
* @brief Function for getting the input data pointer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Input data pointer.
*/
@ -298,7 +280,7 @@ __STATIC_INLINE uint32_t * nrf_ccm_inptr_get(NRF_CCM_Type const * p_reg);
/**
* @brief Function for setting the output data pointer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_data Output data pointer.
*/
__STATIC_INLINE void nrf_ccm_outptr_set(NRF_CCM_Type * p_reg,
@ -307,7 +289,7 @@ __STATIC_INLINE void nrf_ccm_outptr_set(NRF_CCM_Type * p_reg,
/**
* @brief Function for getting the output data pointer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Output data pointer.
*/
@ -317,7 +299,7 @@ __STATIC_INLINE uint32_t * nrf_ccm_outptr_get(NRF_CCM_Type const * p_reg);
* @brief Function for setting the pointer to the scratch area used for
* temporary storage.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_area Pointer to the scratch area.
*/
__STATIC_INLINE void nrf_ccm_scratchptr_set(NRF_CCM_Type * p_reg,
@ -326,7 +308,7 @@ __STATIC_INLINE void nrf_ccm_scratchptr_set(NRF_CCM_Type * p_reg,
/**
* @brief Function for getting the pointer to the scratch area.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Pointer to the scratch area.
*/
@ -336,7 +318,7 @@ __STATIC_INLINE uint32_t * nrf_ccm_stratchptr_get(NRF_CCM_Type const * p_reg);
/**
* @brief Function for setting the data rate override value.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] datarate Override value to be applied when the RATEOVERRIDE task
* is triggered.
*/

101
ext/hal/nordic/nrfx/hal/nrf_clock.h
View file

@ -48,9 +48,6 @@ extern "C" {
* (HFCLK) settings.
*/
#define NRF_CLOCK_TASK_TRIGGER (1UL)
#define NRF_CLOCK_EVENT_CLEAR (0UL)
#if defined(NRF52810_XXAA) || \
defined(NRF52832_XXAA) || defined(NRF52832_XXAB) || \
defined(NRF52840_XXAA)
@ -107,9 +104,7 @@ typedef enum
#endif // defined(NRF_CLOCK_USE_EXTERNAL_LFCLK_SOURCES) || defined(__NRFX_DOXYGEN__)
} nrf_clock_lfclk_t;
/**
* @brief High-frequency clock sources.
*/
/** @brief High-frequency clock sources. */
typedef enum
{
#if defined(CLOCK_HFCLKSTAT_SRC_RC) || defined(__NRFX_DOXYGEN__)
@ -132,9 +127,7 @@ typedef enum
NRF_CLOCK_START_TASK_TRIGGERED = CLOCK_LFCLKRUN_STATUS_Triggered /**< Task LFCLKSTART/HFCLKSTART has been triggered. */
} nrf_clock_start_task_status_t;
/**
* @brief Interrupts.
*/
/** @brief Interrupts. */
typedef enum
{
NRF_CLOCK_INT_HF_STARTED_MASK = CLOCK_INTENSET_HFCLKSTARTED_Msk, /**< Interrupt on HFCLKSTARTED event. */
@ -151,7 +144,7 @@ typedef enum
* @details The NRF_CLOCK_TASK_LFCLKSTOP task cannot be set when the low-frequency clock is not running.
* The NRF_CLOCK_TASK_HFCLKSTOP task cannot be set when the high-frequency clock is not running.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
typedef enum
{
NRF_CLOCK_TASK_HFCLKSTART = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTART), /**< Start HFCLK clock source.*/
NRF_CLOCK_TASK_HFCLKSTOP = offsetof(NRF_CLOCK_Type, TASKS_HFCLKSTOP), /**< Stop HFCLK clock source.*/
@ -162,12 +155,10 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
NRF_CLOCK_TASK_CTSTART = offsetof(NRF_CLOCK_Type, TASKS_CTSTART), /**< Start calibration timer.*/
NRF_CLOCK_TASK_CTSTOP = offsetof(NRF_CLOCK_Type, TASKS_CTSTOP) /**< Stop calibration timer.*/
#endif
} nrf_clock_task_t; /*lint -restore */
} nrf_clock_task_t;
/**
* @brief Events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief Events. */
typedef enum
{
NRF_CLOCK_EVENT_HFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_HFCLKSTARTED), /**< HFCLK oscillator started.*/
NRF_CLOCK_EVENT_LFCLKSTARTED = offsetof(NRF_CLOCK_Type, EVENTS_LFCLKSTARTED), /**< LFCLK oscillator started.*/
@ -175,73 +166,73 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
NRF_CLOCK_EVENT_DONE = offsetof(NRF_CLOCK_Type, EVENTS_DONE), /**< Calibration of LFCLK RC oscillator completed.*/
NRF_CLOCK_EVENT_CTTO = offsetof(NRF_CLOCK_Type, EVENTS_CTTO) /**< Calibration timer time-out.*/
#endif
} nrf_clock_event_t; /*lint -restore */
} nrf_clock_event_t;
/**
* @brief Function for enabling a specific interrupt.
* @brief Function for enabling the specified interrupt.
*
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_clock_int_enable(uint32_t int_mask);
/**
* @brief Function for disabling a specific interrupt.
* @brief Function for disabling the specified interrupt.
*
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_clock_int_disable(uint32_t int_mask);
/**
* @brief Function for retrieving the state of a specific interrupt.
* @brief Function for retrieving the state of the specified interrupt.
*
* @param[in] int_mask Interrupt.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_clock_int_enable_check(nrf_clock_int_mask_t int_mask);
/**
* @brief Function for retrieving the address of a specific task.
* @brief Function for retrieving the address of the specified task.
* @details This function can be used by the PPI module.
*
* @param[in] task Task.
* @param[in] task CLOCK Task.
*
* @return Address of the requested task register.
*/
__STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task);
/**
* @brief Function for setting a specific task.
* @brief Function for setting the specified task.
*
* @param[in] task Task.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task);
/**
* @brief Function for retrieving the address of a specific event.
* @brief Function for retrieving the address of the specified event.
* @details This function can be used by the PPI module.
*
* @param[in] event Event.
* @param[in] event CLOCK Event.
*
* @return Address of the requested event register.
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event);
/**
* @brief Function for clearing a specific event.
* @brief Function for clearing the specified event.
*
* @param[in] event Event.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event);
/**
* @brief Function for retrieving the state of a specific event.
* @brief Function for retrieving the state of the specified event.
*
* @param[in] event Event.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_clock_event_check(nrf_clock_event_t event);
@ -256,11 +247,11 @@ __STATIC_INLINE void nrf_clock_lf_src_set(nrf_clock_lfclk_t source);
/**
* @brief Function for retrieving the selected source for the low-frequency clock.
*
* @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
* @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
* is the selected source for the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
* @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
* is the selected source for the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
* @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesizer from
* the HFCLK is the selected source for the low-frequency clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
@ -268,11 +259,11 @@ __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_src_get(void);
/**
* @brief Function for retrieving the active source of the low-frequency clock.
*
* @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
* @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
* is the active source of the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
* @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
* is the active source of the low-frequency clock.
* @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
* @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesizer from
* the HFCLK is the active source of the low-frequency clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
@ -281,11 +272,11 @@ __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_actv_src_get(void);
* @brief Function for retrieving the clock source for the LFCLK clock when
* the task LKCLKSTART is triggered.
*
* @retval NRF_CLOCK_LFCLK_RC If the internal 32 kHz RC oscillator
* @retval NRF_CLOCK_LFCLK_RC The internal 32 kHz RC oscillator
* is running and generating the LFCLK clock.
* @retval NRF_CLOCK_LFCLK_Xtal If an external 32 kHz crystal oscillator
* @retval NRF_CLOCK_LFCLK_Xtal An external 32 kHz crystal oscillator
* is running and generating the LFCLK clock.
* @retval NRF_CLOCK_LFCLK_Synth If the internal 32 kHz synthesizer from
* @retval NRF_CLOCK_LFCLK_Synth The internal 32 kHz synthesizer from
* the HFCLK is running and generating the LFCLK clock.
*/
__STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
@ -293,25 +284,25 @@ __STATIC_INLINE nrf_clock_lfclk_t nrf_clock_lf_srccopy_get(void);
/**
* @brief Function for retrieving the state of the LFCLK clock.
*
* @retval false If the LFCLK clock is not running.
* @retval true If the LFCLK clock is running.
* @retval false The LFCLK clock is not running.
* @retval true The LFCLK clock is running.
*/
__STATIC_INLINE bool nrf_clock_lf_is_running(void);
/**
* @brief Function for retrieving the trigger status of the task LFCLKSTART.
*
* @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task LFCLKSTART has not been triggered.
* @retval NRF_CLOCK_START_TASK_TRIGGERED If the task LFCLKSTART has been triggered.
* @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task LFCLKSTART has not been triggered.
* @retval NRF_CLOCK_START_TASK_TRIGGERED The task LFCLKSTART has been triggered.
*/
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_lf_start_task_status_get(void);
/**
* @brief Function for retrieving the active source of the high-frequency clock.
*
* @retval NRF_CLOCK_HFCLK_LOW_ACCURACY If the internal RC oscillator is the active
* @retval NRF_CLOCK_HFCLK_LOW_ACCURACY The internal RC oscillator is the active
* source of the high-frequency clock.
* @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY If an external crystal oscillator is the active
* @retval NRF_CLOCK_HFCLK_HIGH_ACCURACY An external crystal oscillator is the active
* source of the high-frequency clock.
*/
__STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
@ -321,16 +312,16 @@ __STATIC_INLINE nrf_clock_hfclk_t nrf_clock_hf_src_get(void);
*
* @param[in] clk_src Clock source to be checked.
*
* @retval false If the HFCLK clock is not running.
* @retval true If the HFCLK clock is running.
* @retval false The HFCLK clock is not running.
* @retval true The HFCLK clock is running.
*/
__STATIC_INLINE bool nrf_clock_hf_is_running(nrf_clock_hfclk_t clk_src);
/**
* @brief Function for retrieving the trigger status of the task HFCLKSTART.
*
* @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED If the task HFCLKSTART has not been triggered.
* @retval NRF_CLOCK_START_TASK_TRIGGERED If the task HFCLKSTART has been triggered.
* @retval NRF_CLOCK_START_TASK_NOT_TRIGGERED The task HFCLKSTART has not been triggered.
* @retval NRF_CLOCK_START_TASK_TRIGGERED The task HFCLKSTART has been triggered.
*/
__STATIC_INLINE nrf_clock_start_task_status_t nrf_clock_hf_start_task_status_get(void);
@ -406,7 +397,7 @@ __STATIC_INLINE uint32_t nrf_clock_task_address_get(nrf_clock_task_t task)
__STATIC_INLINE void nrf_clock_task_trigger(nrf_clock_task_t task)
{
*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = NRF_CLOCK_TASK_TRIGGER;
*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
@ -416,7 +407,7 @@ __STATIC_INLINE uint32_t nrf_clock_event_address_get(nrf_clock_event_t event)
__STATIC_INLINE void nrf_clock_event_clear(nrf_clock_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = NRF_CLOCK_EVENT_CLEAR;
*((volatile uint32_t *)((uint8_t *)NRF_CLOCK + event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_CLOCK + (uint32_t)event));
(void)dummy;

302
ext/hal/nordic/nrfx/hal/nrf_comp.h
View file

@ -42,221 +42,174 @@ extern "C" {
* @defgroup nrf_comp_hal COMP HAL
* @{
* @ingroup nrf_comp
* @brief Hardware access layer for managing the Comparator (COMP) peripheral.
* @brief Hardware access layer (HAL) for managing the Comparator (COMP) peripheral.
*/
/**
* @enum nrf_comp_input_t
* @brief COMP analog pin selection.
*/
/** @brief COMP analog pin selection. */
typedef enum
{
NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */
NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */
NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */
NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */
NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */
NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */
NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */
NRF_COMP_INPUT_0 = COMP_PSEL_PSEL_AnalogInput0, /*!< AIN0 selected as analog input. */
NRF_COMP_INPUT_1 = COMP_PSEL_PSEL_AnalogInput1, /*!< AIN1 selected as analog input. */
NRF_COMP_INPUT_2 = COMP_PSEL_PSEL_AnalogInput2, /*!< AIN2 selected as analog input. */
NRF_COMP_INPUT_3 = COMP_PSEL_PSEL_AnalogInput3, /*!< AIN3 selected as analog input. */
NRF_COMP_INPUT_4 = COMP_PSEL_PSEL_AnalogInput4, /*!< AIN4 selected as analog input. */
NRF_COMP_INPUT_5 = COMP_PSEL_PSEL_AnalogInput5, /*!< AIN5 selected as analog input. */
NRF_COMP_INPUT_6 = COMP_PSEL_PSEL_AnalogInput6, /*!< AIN6 selected as analog input. */
#if defined (COMP_PSEL_PSEL_AnalogInput7) || defined (__NRFX_DOXYGEN__)
NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */
NRF_COMP_INPUT_7 = COMP_PSEL_PSEL_AnalogInput7, /*!< AIN7 selected as analog input. */
#endif
#if defined (COMP_PSEL_PSEL_VddDiv2) || defined (__NRFX_DOXYGEN__)
NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */
NRF_COMP_VDD_DIV2 = COMP_PSEL_PSEL_VddDiv2, /*!< VDD/2 selected as analog input. */
#endif
}nrf_comp_input_t;
} nrf_comp_input_t;
/**
* @enum nrf_comp_ref_t
* @brief COMP reference selection.
*/
/** @brief COMP reference selection. */
typedef enum
{
NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */
NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */
NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */
NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */
NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */
}nrf_comp_ref_t;
NRF_COMP_REF_Int1V2 = COMP_REFSEL_REFSEL_Int1V2, /*!< VREF = internal 1.2 V reference (VDD >= 1.7 V). */
NRF_COMP_REF_Int1V8 = COMP_REFSEL_REFSEL_Int1V8, /*!< VREF = internal 1.8 V reference (VDD >= VREF + 0.2 V). */
NRF_COMP_REF_Int2V4 = COMP_REFSEL_REFSEL_Int2V4, /*!< VREF = internal 2.4 V reference (VDD >= VREF + 0.2 V). */
NRF_COMP_REF_VDD = COMP_REFSEL_REFSEL_VDD, /*!< VREF = VDD. */
NRF_COMP_REF_ARef = COMP_REFSEL_REFSEL_ARef /*!< VREF = AREF (VDD >= VREF >= AREFMIN). */
} nrf_comp_ref_t;
/**
* @enum nrf_comp_ext_ref_t
* @brief COMP external analog reference selection.
*/
/** @brief COMP external analog reference selection. */
typedef enum
{
NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */
NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */
}nrf_comp_ext_ref_t;
NRF_COMP_EXT_REF_0 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference0, /*!< Use AIN0 as external analog reference. */
NRF_COMP_EXT_REF_1 = COMP_EXTREFSEL_EXTREFSEL_AnalogReference1 /*!< Use AIN1 as external analog reference. */
} nrf_comp_ext_ref_t;
/**
* @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP.
*/
/** @brief COMP THDOWN and THUP values that are used to calculate the threshold voltages VDOWN and VUP. */
typedef struct
{
uint8_t th_down; /*!< THDOWN value. */
uint8_t th_up; /*!< THUP value. */
}nrf_comp_th_t;
} nrf_comp_th_t;
/**
* @enum nrf_comp_main_mode_t
* @brief COMP main operation mode.
*/
/** @brief COMP main operation mode. */
typedef enum
{
NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single ended mode. */
NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */
}nrf_comp_main_mode_t;
NRF_COMP_MAIN_MODE_SE = COMP_MODE_MAIN_SE, /*!< Single-ended mode. */
NRF_COMP_MAIN_MODE_Diff = COMP_MODE_MAIN_Diff /*!< Differential mode. */
} nrf_comp_main_mode_t;
/**
* @enum nrf_comp_sp_mode_t
* @brief COMP speed and power mode.
*/
/** @brief COMP speed and power mode. */
typedef enum
{
NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */
NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */
NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High speed mode. */
}nrf_comp_sp_mode_t;
NRF_COMP_SP_MODE_Low = COMP_MODE_SP_Low, /*!< Low power mode. */
NRF_COMP_SP_MODE_Normal = COMP_MODE_SP_Normal, /*!< Normal mode. */
NRF_COMP_SP_MODE_High = COMP_MODE_SP_High /*!< High-speed mode. */
} nrf_comp_sp_mode_t;
/**
* @enum nrf_comp_hyst_t
* @brief COMP comparator hysteresis.
*/
/** @brief COMP comparator hysteresis. */
typedef enum
{
NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */
NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */
}nrf_comp_hyst_t;
NRF_COMP_HYST_NoHyst = COMP_HYST_HYST_NoHyst, /*!< Comparator hysteresis disabled. */
NRF_COMP_HYST_50mV = COMP_HYST_HYST_Hyst50mV /*!< Comparator hysteresis enabled. */
} nrf_comp_hyst_t;
#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
/**
* @brief COMP current source selection on analog input.
*/
/** @brief COMP current source selection on analog input. */
typedef enum
{
NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */
NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */
NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */
NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */
}nrf_isource_t;
NRF_COMP_ISOURCE_Off = COMP_ISOURCE_ISOURCE_Off, /*!< Current source disabled. */
NRF_COMP_ISOURCE_Ien2uA5 = COMP_ISOURCE_ISOURCE_Ien2mA5, /*!< Current source enabled (+/- 2.5 uA). */
NRF_COMP_ISOURCE_Ien5uA = COMP_ISOURCE_ISOURCE_Ien5mA, /*!< Current source enabled (+/- 5 uA). */
NRF_COMP_ISOURCE_Ien10uA = COMP_ISOURCE_ISOURCE_Ien10mA /*!< Current source enabled (+/- 10 uA). */
} nrf_isource_t;
#endif
/**
* @enum nrf_comp_task_t
* @brief COMP tasks.
*/
/** @brief COMP tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_COMP_TASK_START = offsetof(NRF_COMP_Type, TASKS_START), /*!< COMP start sampling task. */
NRF_COMP_TASK_STOP = offsetof(NRF_COMP_Type, TASKS_STOP), /*!< COMP stop sampling task. */
NRF_COMP_TASK_SAMPLE = offsetof(NRF_COMP_Type, TASKS_SAMPLE) /*!< Sample comparator value. */
/*lint -restore*/
}nrf_comp_task_t;
} nrf_comp_task_t;
/**
* @enum nrf_comp_event_t
* @brief COMP events.
*/
/** @brief COMP events. */
typedef enum
{
/*lint -save -e30*/
NRF_COMP_EVENT_READY = offsetof(NRF_COMP_Type, EVENTS_READY), /*!< COMP is ready and output is valid. */
NRF_COMP_EVENT_DOWN = offsetof(NRF_COMP_Type, EVENTS_DOWN), /*!< Input voltage crossed the threshold going down. */
NRF_COMP_EVENT_UP = offsetof(NRF_COMP_Type, EVENTS_UP), /*!< Input voltage crossed the threshold going up. */
NRF_COMP_EVENT_CROSS = offsetof(NRF_COMP_Type, EVENTS_CROSS) /*!< Input voltage crossed the threshold in any direction. */
/*lint -restore*/
}nrf_comp_event_t;
} nrf_comp_event_t;
/**
* @brief COMP reference configuration.
*/
/** @brief COMP reference configuration. */
typedef struct
{
nrf_comp_ref_t reference; /*!< COMP reference selection. */
nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */
}nrf_comp_ref_conf_t;
nrf_comp_ref_t reference; /*!< COMP reference selection. */
nrf_comp_ext_ref_t external; /*!< COMP external analog reference selection. */
} nrf_comp_ref_conf_t;
/**
* @brief Function for enabling the COMP peripheral.
*/
/** @brief Function for enabling the COMP peripheral. */
__STATIC_INLINE void nrf_comp_enable(void);
/**
* @brief Function for disabling the COMP peripheral.
*/
/** @brief Function for disabling the COMP peripheral. */
__STATIC_INLINE void nrf_comp_disable(void);
/**
* @brief Function for checking if the COMP peripheral is enabled.
*
* @retval true If the COMP peripheral is enabled.
* @retval false If the COMP peripheral is not enabled.
* @retval true The COMP peripheral is enabled.
* @retval false The COMP peripheral is not enabled.
*/
__STATIC_INLINE bool nrf_comp_enable_check(void);
/**
* @brief Function for setting the reference source.
*
* @param[in] reference COMP reference selection.
* @param[in] reference COMP reference selection.
*/
__STATIC_INLINE void nrf_comp_ref_set(nrf_comp_ref_t reference);
/**
* @brief Function for setting the external analog reference source.
*
* @param[in] ext_ref COMP external analog reference selection.
* @param[in] ext_ref COMP external analog reference selection.
*/
__STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref);
/**
* @brief Function for setting threshold voltages.
*
* @param[in] threshold COMP VDOWN and VUP thresholds.
* @param[in] threshold COMP VDOWN and VUP thresholds.
*/
__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold);
/**
* @brief Function for setting the main mode.
*
* @param[in] main_mode COMP main operation mode.
* @param[in] main_mode COMP main operation mode.
*/
__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode);
/**
* @brief Function for setting the speed mode.
*
* @param[in] speed_mode COMP speed and power mode.
* @param[in] speed_mode COMP speed and power mode.
*/
__STATIC_INLINE void nrf_comp_speed_mode_set(nrf_comp_sp_mode_t speed_mode);
/**
* @brief Function for setting the hysteresis.
*
* @param[in] hyst COMP comparator hysteresis.
* @param[in] hyst COMP comparator hysteresis.
*/
__STATIC_INLINE void nrf_comp_hysteresis_set(nrf_comp_hyst_t hyst);
#if defined (COMP_ISOURCE_ISOURCE_Msk) || defined (__NRFX_DOXYGEN__)
/**
* @brief Function for setting the current source on the analog input.
*
* @param[in] isource COMP current source selection on analog input.
* @param[in] isource COMP current source selection on analog input.
*/
__STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource);
#endif
/**
* @brief Function for selecting the active input of the COMP.
*
@ -264,110 +217,99 @@ __STATIC_INLINE void nrf_comp_isource_set(nrf_isource_t isource);
*/
__STATIC_INLINE void nrf_comp_input_select(nrf_comp_input_t input);
/**
* @brief Function for getting the last COMP compare result.
*
* @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-.
*
* @note If VIN+ == VIN-, the return value depends on the previous result.
*
* @return The last compare result. If 0, then VIN+ < VIN-. If 1, then VIN+ > VIN-.
*/
__STATIC_INLINE uint32_t nrf_comp_result_get(void);
/**
* @brief Function for enabling interrupts from COMP.
*
* @param[in] comp_int_mask Mask of interrupts to be enabled.
* @param[in] mask Mask of interrupts to be enabled.
*
* @sa nrf_comp_int_enable_check()
* @sa nrf_comp_int_enable_check
*/
__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask);
__STATIC_INLINE void nrf_comp_int_enable(uint32_t mask);
/**
* @brief Function for disabling interrupts from COMP.
*
* @param[in] comp_int_mask Mask of interrupts to be disabled.
* @param[in] mask Mask of interrupts to be disabled.
*
* @sa nrf_comp_int_enable_check()
* @sa nrf_comp_int_enable_check
*/
__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask);
__STATIC_INLINE void nrf_comp_int_disable(uint32_t mask);
/**
* @brief Function for getting the enabled interrupts of COMP.
*
* @param[in] comp_int_mask Mask of interrupts to be checked.
* @param[in] mask Mask of interrupts to be checked.
*
* @retval true If any interrupts of the specified mask are enabled.
* @retval true At least one interrupt from the specified mask is enabled.
* @retval false No interrupt provided by the specified mask are enabled.
*/
__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask);
__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t mask);
/**
* @brief Function for getting the address of a specific COMP task register.
* @brief Function for getting the address of the specified COMP task register.
*
* @param[in] comp_task COMP task.
* @param[in] task COMP task.
*
* @return Address of the specified COMP task.
*/
__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task);
__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t task);
/**
* @brief Function for getting the address of a specific COMP event register.
* @brief Function for getting the address of the specified COMP event register.
*
* @param[in] comp_event COMP event.
* @param[in] event COMP event.
*
* @return Address of the specified COMP event.
*/
__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event);
__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t event);
/**
* @brief Function for setting COMP shorts.
*
* @param[in] comp_short_mask COMP shorts by mask.
* @brief Function for setting COMP shortcuts.
*
* @param[in] mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask);
__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing COMP shorts by mask.
*
* @param[in] comp_short_mask COMP shorts to be cleared.
* @brief Function for clearing COMP shortcuts by mask.
*
* @param[in] mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask);
__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t mask);
/**
* @brief Function for setting a specific COMP task.
*
* @param[in] comp_task COMP task to be set.
* @brief Function for setting the specified COMP task.
*
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task);
__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t task);
/**
* @brief Function for clearing a specific COMP event.
*
* @param[in] comp_event COMP event to be cleared.
* @brief Function for clearing the specified COMP event.
*
* @param[in] event COMP event to be cleared.
*/
__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event);
__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t event);
/**
* @brief Function for getting the state of a specific COMP event.
* @brief Function for retrieving the state of the UARTE event.
*
* @retval true If the specified COMP event is active.
* @param[in] event Event to be checked.
*
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event);
__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t event);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -399,8 +341,8 @@ __STATIC_INLINE void nrf_comp_ext_ref_set(nrf_comp_ext_ref_t ext_ref)
__STATIC_INLINE void nrf_comp_th_set(nrf_comp_th_t threshold)
{
NRF_COMP->TH =
((threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) |
((threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk);
(((uint32_t)threshold.th_down << COMP_TH_THDOWN_Pos) & COMP_TH_THDOWN_Msk) |
(((uint32_t)threshold.th_up << COMP_TH_THUP_Pos) & COMP_TH_THUP_Msk);
}
__STATIC_INLINE void nrf_comp_main_mode_set(nrf_comp_main_mode_t main_mode)
@ -435,58 +377,58 @@ __STATIC_INLINE uint32_t nrf_comp_result_get(void)
return (uint32_t)NRF_COMP->RESULT;
}
__STATIC_INLINE void nrf_comp_int_enable(uint32_t comp_int_mask)
__STATIC_INLINE void nrf_comp_int_enable(uint32_t mask)
{
NRF_COMP->INTENSET = comp_int_mask;
NRF_COMP->INTENSET = mask;
}
__STATIC_INLINE void nrf_comp_int_disable(uint32_t comp_int_mask)
__STATIC_INLINE void nrf_comp_int_disable(uint32_t mask)
{
NRF_COMP->INTENCLR = comp_int_mask;
NRF_COMP->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t comp_int_mask)
__STATIC_INLINE bool nrf_comp_int_enable_check(uint32_t mask)
{
return (NRF_COMP->INTENSET & comp_int_mask); // when read this register will return the value of INTEN.
return (NRF_COMP->INTENSET & mask); // When read, this register returns the value of INTEN.
}
__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t comp_task)
__STATIC_INLINE uint32_t * nrf_comp_task_address_get(nrf_comp_task_t task)
{
return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_task);
return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)task);
}
__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t comp_event)
__STATIC_INLINE uint32_t * nrf_comp_event_address_get(nrf_comp_event_t event)
{
return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event);
return (uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)event);
}
__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t comp_short_mask)
__STATIC_INLINE void nrf_comp_shorts_enable(uint32_t mask)
{
NRF_COMP->SHORTS |= comp_short_mask;
NRF_COMP->SHORTS |= mask;
}
__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t comp_short_mask)
__STATIC_INLINE void nrf_comp_shorts_disable(uint32_t mask)
{
NRF_COMP->SHORTS &= ~comp_short_mask;
NRF_COMP->SHORTS &= ~mask;
}
__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t comp_task)
__STATIC_INLINE void nrf_comp_task_trigger(nrf_comp_task_t task)
{
*( (volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_task) ) = 1;
*( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)task) ) = 1;
}
__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t comp_event)
__STATIC_INLINE void nrf_comp_event_clear(nrf_comp_event_t event)
{
*( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)comp_event) ) = 0;
*( (volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)event) ) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)comp_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_COMP + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t comp_event)
__STATIC_INLINE bool nrf_comp_event_check(nrf_comp_event_t event)
{
return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + comp_event));
return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_COMP + (uint32_t)event));
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION

8
ext/hal/nordic/nrfx/hal/nrf_dppi.h
View file

@ -78,7 +78,7 @@ typedef enum
* @brief Function for activating a DPPI task.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dppi_task Task to activate.
* @param[in] dppi_task Task to be activated.
*/
__STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task_t dppi_task);
@ -86,10 +86,10 @@ __STATIC_INLINE void nrf_dppi_task_trigger(NRF_DPPIC_Type * p_reg, nrf_dppi_task
* @brief Function for checking the state of a specific DPPI channel.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] channel Channel to check.
* @param[in] channel Channel to be checked.
*
* @retval true If the channel is enabled.
* @retval false If the channel is not enabled.
* @retval true The channel is enabled.
* @retval false The channel is not enabled.
*/
__STATIC_INLINE bool nrf_dppi_channel_check(NRF_DPPIC_Type const * p_reg, uint8_t channel);

2
ext/hal/nordic/nrfx/hal/nrf_ecb.c
View file

@ -29,8 +29,6 @@
* POSSIBILITY OF SUCH DAMAGE.
*/
//lint -e438
#include <nrfx.h>
#include "nrf_ecb.h"
#include <string.h>

67
ext/hal/nordic/nrfx/hal/nrf_ecb.h
View file

@ -42,7 +42,7 @@ extern "C" {
* @defgroup nrf_ecb_drv AES ECB encryption driver
* @{
* @ingroup nrf_ecb
* @brief Driver for the AES Electronic Code Book (ECB) peripheral.
* @brief Driver for the Advanced Encryption Standard (AES) Electronic Code Book (ECB) peripheral.
*
* To encrypt data, the peripheral must first be powered on
* using @ref nrf_ecb_init. Next, the key must be set using @ref nrf_ecb_set_key.
@ -52,8 +52,9 @@ extern "C" {
* @brief Function for initializing and powering on the ECB peripheral.
*
* This function allocates memory for the ECBDATAPTR.
* @retval true If initialization was successful.
* @retval false If powering on failed.
*
* @retval true The initialization was successful.
* @retval false The power-on failed.
*/
bool nrf_ecb_init(void);
@ -66,8 +67,8 @@ bool nrf_ecb_init(void);
* @param dst Result of encryption, 16 bytes will be written.
* @param src Source with 16-byte data to be encrypted.
*
* @retval true If the encryption operation completed.
* @retval false If the encryption operation did not complete.
* @retval true The encryption operation completed.
* @retval false The encryption operation did not complete.
*/
bool nrf_ecb_crypt(uint8_t * dst, const uint8_t * src);
@ -84,34 +85,24 @@ void nrf_ecb_set_key(const uint8_t * key);
* @defgroup nrf_ecb_hal AES ECB encryption HAL
* @{
* @ingroup nrf_ecb
* @brief Hardware access layer for managing the AES Electronic Codebook (ECB) peripheral.
* @brief Hardware access layer (HAL) for managing the Advanced Encryption Standard (AES) Electronic Codebook (ECB) peripheral.
*/
/**
* @brief ECB tasks.
*/
/** @brief ECB tasks. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_ECB_TASK_STARTECB = offsetof(NRF_ECB_Type, TASKS_STARTECB), /**< Task for starting ECB block encryption. */
NRF_ECB_TASK_STOPECB = offsetof(NRF_ECB_Type, TASKS_STOPECB), /**< Task for stopping ECB block encryption. */
/*lint -restore*/
NRF_ECB_TASK_STARTECB = offsetof(NRF_ECB_Type, TASKS_STARTECB), /**< Task for starting the ECB block encryption. */
NRF_ECB_TASK_STOPECB = offsetof(NRF_ECB_Type, TASKS_STOPECB), /**< Task for stopping the ECB block encryption. */
} nrf_ecb_task_t;
/**
* @brief ECB events.
*/
/** @brief ECB events. */
typedef enum
{
/*lint -save -e30*/
NRF_ECB_EVENT_ENDECB = offsetof(NRF_ECB_Type, EVENTS_ENDECB), /**< ECB block encrypt complete. */
NRF_ECB_EVENT_ERRORECB = offsetof(NRF_ECB_Type, EVENTS_ERRORECB), /**< ECB block encrypt aborted because of a STOPECB task or due to an error. */
/*lint -restore*/
} nrf_ecb_event_t;
/**
* @brief ECB interrupts.
*/
/** @brief ECB interrupts. */
typedef enum
{
NRF_ECB_INT_ENDECB_MASK = ECB_INTENSET_ENDECB_Msk, ///< Interrupt on ENDECB event.
@ -120,15 +111,15 @@ typedef enum
/**
* @brief Function for activating a specific ECB task.
* @brief Function for activating the specified ECB task.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] task Task to activate.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_ecb_task_trigger(NRF_ECB_Type * p_reg, nrf_ecb_task_t task);
/**
* @brief Function for getting the address of a specific ECB task register.
* @brief Function for getting the address of the specified ECB task register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] task Requested task.
@ -139,7 +130,7 @@ __STATIC_INLINE uint32_t nrf_ecb_task_address_get(NRF_ECB_Type const * p_reg,
nrf_ecb_task_t task);
/**
* @brief Function for clearing a specific ECB event.
* @brief Function for clearing the specified ECB event.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] event Event to clear.
@ -147,18 +138,18 @@ __STATIC_INLINE uint32_t nrf_ecb_task_address_get(NRF_ECB_Type const * p_reg,
__STATIC_INLINE void nrf_ecb_event_clear(NRF_ECB_Type * p_reg, nrf_ecb_event_t event);
/**
* @brief Function for checking the state of a specific ECB event.
* @brief Function for retrieving the state of the ECB event.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_ecb_event_check(NRF_ECB_Type const * p_reg, nrf_ecb_event_t event);
/**
* @brief Function for getting the address of a specific ECB event register.
* @brief Function for getting the address of the specified ECB event register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] event Requested event.
@ -169,18 +160,18 @@ __STATIC_INLINE uint32_t nrf_ecb_event_address_get(NRF_ECB_Type const * p_reg,
nrf_ecb_event_t event);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] mask Interrupts to enable.
* @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_ecb_int_enable(NRF_ECB_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] mask Interrupts to disable.
* @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_ecb_int_disable(NRF_ECB_Type * p_reg, uint32_t mask);
@ -188,10 +179,10 @@ __STATIC_INLINE void nrf_ecb_int_disable(NRF_ECB_Type * p_reg, uint32_t mask);
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] ecb_int Interrupt to check.
* @param[in] ecb_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_ecb_int_enable_check(NRF_ECB_Type const * p_reg,
nrf_ecb_int_mask_t ecb_int);

134
ext/hal/nordic/nrfx/hal/nrf_egu.h
View file

@ -45,13 +45,9 @@ extern "C" {
* @brief Hardware access layer for managing the Event Generator Unit (EGU) peripheral.
*/
/**
* @enum nrf_egu_task_t
* @brief EGU tasks.
*/
/** @brief EGU tasks. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_EGU_TASK_TRIGGER0 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[0]), /**< Trigger 0 for triggering the corresponding TRIGGERED[0] event. */
NRF_EGU_TASK_TRIGGER1 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[1]), /**< Trigger 1 for triggering the corresponding TRIGGERED[1] event. */
NRF_EGU_TASK_TRIGGER2 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[2]), /**< Trigger 2 for triggering the corresponding TRIGGERED[2] event. */
@ -68,16 +64,11 @@ typedef enum
NRF_EGU_TASK_TRIGGER13 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[13]), /**< Trigger 13 for triggering the corresponding TRIGGERED[13] event. */
NRF_EGU_TASK_TRIGGER14 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[14]), /**< Trigger 14 for triggering the corresponding TRIGGERED[14] event. */
NRF_EGU_TASK_TRIGGER15 = offsetof(NRF_EGU_Type, TASKS_TRIGGER[15]) /**< Trigger 15 for triggering the corresponding TRIGGERED[15] event. */
/*lint -restore*/
} nrf_egu_task_t;
/**
* @enum nrf_egu_event_t
* @brief EGU events.
*/
/** @brief EGU events. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_EGU_EVENT_TRIGGERED0 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[0]), /**< Event number 0 generated by triggering the corresponding TRIGGER[0] task. */
NRF_EGU_EVENT_TRIGGERED1 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[1]), /**< Event number 1 generated by triggering the corresponding TRIGGER[1] task. */
NRF_EGU_EVENT_TRIGGERED2 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[2]), /**< Event number 2 generated by triggering the corresponding TRIGGER[2] task. */
@ -94,13 +85,9 @@ typedef enum
NRF_EGU_EVENT_TRIGGERED13 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[13]), /**< Event number 13 generated by triggering the corresponding TRIGGER[13] task. */
NRF_EGU_EVENT_TRIGGERED14 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[14]), /**< Event number 14 generated by triggering the corresponding TRIGGER[14] task. */
NRF_EGU_EVENT_TRIGGERED15 = offsetof(NRF_EGU_Type, EVENTS_TRIGGERED[15]) /**< Event number 15 generated by triggering the corresponding TRIGGER[15] task. */
/*lint -restore*/
} nrf_egu_event_t;
/**
* @enum nrf_egu_int_mask_t
* @brief EGU interrupts.
*/
/** @brief EGU interrupts. */
typedef enum
{
NRF_EGU_INT_TRIGGERED0 = EGU_INTENSET_TRIGGERED0_Msk, /**< Interrupt on EVENTS_TRIGGERED[0] event. */
@ -122,16 +109,18 @@ typedef enum
NRF_EGU_INT_ALL = 0xFFFFuL
} nrf_egu_int_mask_t;
/**@brief Function for getting max channel number of given EGU.
/**
* @brief Function for getting the maximum channel number of the given EGU.
*
* @param NRF_EGUx EGU instance.
*
* @returns number of available channels.
* @return Number of available channels.
*/
__STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx);
/**
* @brief Function for triggering a specific EGU task.
* @brief Function for triggering the specified EGU task.
*
* @param NRF_EGUx EGU instance.
* @param egu_task EGU task.
@ -139,110 +128,125 @@ __STATIC_INLINE uint32_t nrf_egu_channel_count(NRF_EGU_Type * NRF_EGUx);
__STATIC_INLINE void nrf_egu_task_trigger(NRF_EGU_Type * NRF_EGUx, nrf_egu_task_t egu_task);
/**
* @brief Function for returning the address of a specific EGU task register.
* @brief Function for returning the address of the specified EGU task register.
*
* @param NRF_EGUx EGU instance.
* @param egu_task EGU task.
*
* @return Address of the specified EGU task register.
*/
__STATIC_INLINE uint32_t * nrf_egu_task_address_get(NRF_EGU_Type * NRF_EGUx,
nrf_egu_task_t egu_task);
/**
* @brief Function for returning the address of a specific EGU TRIGGER task register.
* @brief Function for returning the address of the specified EGU TRIGGER task register.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*
* @return Address of the specified EGU TRIGGER task register.
*/
__STATIC_INLINE uint32_t * nrf_egu_task_trigger_address_get(NRF_EGU_Type * NRF_EGUx,
uint8_t channel);
uint8_t channel);
/**
* @brief Function for returning the specific EGU TRIGGER task.
* @brief Function for returning the specified EGU TRIGGER task.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*
* @return The specified EGU TRIGGER task.
*/
__STATIC_INLINE nrf_egu_task_t nrf_egu_task_trigger_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
/**
* @brief Function for returning the state of a specific EGU event.
* @brief Function for retrieving the state of the UARTE event.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event to check.
* @param egu_event EGU event to be checked.
*
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
__STATIC_INLINE bool nrf_egu_event_check(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event);
/**
* @brief Function for clearing a specific EGU event.
* @brief Function for clearing the specified EGU event.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event to clear.
*/
__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
__STATIC_INLINE void nrf_egu_event_clear(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event);
/**
* @brief Function for returning the address of a specific EGU event register.
* @brief Function for returning the address of the specified EGU event register.
*
* @param NRF_EGUx EGU instance.
* @param egu_event EGU event.
*
* @return Address of the specified EGU event register.
*/
__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
__STATIC_INLINE uint32_t * nrf_egu_event_address_get(NRF_EGU_Type * NRF_EGUx,
nrf_egu_event_t egu_event);
/**
* @brief Function for returning the address of a specific EGU TRIGGERED event register.
* @brief Function for returning address of the specified EGU TRIGGERED event register.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*
* @return Address of the specified EGU TRIGGERED event register.
*/
__STATIC_INLINE uint32_t * nrf_egu_event_triggered_address_get(NRF_EGU_Type * NRF_EGUx,
uint8_t channel);
uint8_t channel);
/**
* @brief Function for returning the specific EGU TRIGGERED event.
* @brief Function for returning the specified EGU TRIGGERED event.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*
* @return The specified EGU TRIGGERED event.
*/
__STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_EGUx,
uint8_t channel);
uint8_t channel);
/**
* @brief Function for enabling one or more specific EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param egu_int_mask Interrupts to enable.
*/
__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
/**
* @brief Function for retrieving the state of one or more EGU interrupts.
* @brief Function for enabling one or more of the EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param egu_int_mask Interrupts to check.
*
* @retval true If all of the specified interrupts are enabled.
* @retval false If at least one of the specified interrupts is disabled.
* @param mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
/**
* @brief Function for disabling one or more specific EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param egu_int_mask Interrupts to disable.
*/
__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask);
/**
* @brief Function for retrieving one or more specific EGU interrupts.
* @brief Function for retrieving the state of one or more of the EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
* @param mask Mask of interrupts to be checked.
*
* @returns EGU interrupt mask.
* @retval true All of the specified interrupts are enabled.
* @retval false At least one of the specified interrupts is disabled.
*/
__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
/**
* @brief Function for disabling one or more of the EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t mask);
/**
* @brief Function for retrieving one or more of the EGU interrupts.
*
* @param NRF_EGUx EGU instance.
* @param channel Channel number.
*
* @return EGU interrupt mask.
*/
__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel);
@ -388,22 +392,22 @@ __STATIC_INLINE nrf_egu_event_t nrf_egu_event_triggered_get(NRF_EGU_Type * NRF_E
return (nrf_egu_event_t)((uint32_t) NRF_EGU_EVENT_TRIGGERED0 + (channel * sizeof(uint32_t)));
}
__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
__STATIC_INLINE void nrf_egu_int_enable(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
{
NRFX_ASSERT(NRF_EGUx);
NRF_EGUx->INTENSET = egu_int_mask;
NRF_EGUx->INTENSET = mask;
}
__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
__STATIC_INLINE bool nrf_egu_int_enable_check(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
{
NRFX_ASSERT(NRF_EGUx);
return (bool)(NRF_EGUx->INTENSET & egu_int_mask);
return (bool)(NRF_EGUx->INTENSET & mask);
}
__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t egu_int_mask)
__STATIC_INLINE void nrf_egu_int_disable(NRF_EGU_Type * NRF_EGUx, uint32_t mask)
{
NRFX_ASSERT(NRF_EGUx);
NRF_EGUx->INTENCLR = egu_int_mask;
NRF_EGUx->INTENCLR = mask;
}
__STATIC_INLINE nrf_egu_int_mask_t nrf_egu_int_get(NRF_EGU_Type * NRF_EGUx, uint8_t channel)

150
ext/hal/nordic/nrfx/hal/nrf_ficr.h Normal file
View file

@ -0,0 +1,150 @@
/*
* Copyright (c) 2018 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* 3. Neither the name of the copyright holder nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef NRF_FICR_H__
#define NRF_FICR_H__
#include <nrfx.h>
#ifdef __cplusplus
extern "C" {
#endif
/**
* @defgroup nrf_ficr_hal FICR HAL
* @{
* @ingroup nrf_ficr
* @brief Hardware access layer (HAL) for getting data from
* the Factory Information Configuration Registers (FICR).
*/
/**
* @brief Function for getting the size of the code memory page.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Code memory page size in bytes.
*/
__STATIC_INLINE uint32_t nrf_ficr_codepagesize_get(NRF_FICR_Type const * p_reg);
/**
* @brief Function for getting the size of the code memory rendered as number of pages.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Code memory size rendered as number of pages.
*/
__STATIC_INLINE uint32_t nrf_ficr_codesize_get(NRF_FICR_Type const * p_reg);
/**
* @brief Function for getting the unique device identifier.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] reg_id Register index.
*
* @return Unique device identifier.
*/
__STATIC_INLINE uint32_t nrf_ficr_deviceid_get(NRF_FICR_Type const * p_reg, uint32_t reg_id);
#if defined(FICR_NFC_TAGHEADER0_MFGID_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for getting the default header values for the NFC tag.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] tagheader_id Tag header index.
*
* @return The default header value of the NFC tag for the specified header index.
*/
__STATIC_INLINE uint32_t nrf_ficr_nfc_tagheader_get(NRF_FICR_Type const * p_reg,
uint32_t tagheader_id);
#endif // defined(FICR_NFC_TAGHEADER0_MFGID_Msk) || defined(__NRFX_DOXYGEN__)
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE uint32_t nrf_ficr_codepagesize_get(NRF_FICR_Type const * p_reg)
{
#if defined(FICR_INFO_CODEPAGESIZE_CODEPAGESIZE_Msk)
return p_reg->INFO.CODEPAGESIZE;
#else
return p_reg->CODEPAGESIZE;
#endif
}
__STATIC_INLINE uint32_t nrf_ficr_codesize_get(NRF_FICR_Type const * p_reg)
{
#if defined(FICR_INFO_CODESIZE_CODESIZE_Msk)
return p_reg->INFO.CODESIZE;
#else
return p_reg->CODESIZE;
#endif
}
__STATIC_INLINE uint32_t nrf_ficr_deviceid_get(NRF_FICR_Type const * p_reg, uint32_t reg_id)
{
#if defined(FICR_INFO_DEVICEID_DEVICEID_Msk)
return p_reg->INFO.DEVICEID[reg_id];
#else
return p_reg->DEVICEID[reg_id];
#endif
}
#if defined(FICR_NFC_TAGHEADER0_MFGID_Msk)
__STATIC_INLINE uint32_t nrf_ficr_nfc_tagheader_get(NRF_FICR_Type const * p_reg,
uint32_t tagheader_id)
{
switch(tagheader_id) {
case 0:
return p_reg->NFC.TAGHEADER0;
break;
case 1:
return p_reg->NFC.TAGHEADER1;
break;
case 2:
return p_reg->NFC.TAGHEADER2;
break;
case 3:
return p_reg->NFC.TAGHEADER3;
break;
default:
return 0;
}
}
#endif // defined(FICR_NFC_TAGHEADER0_MFGID_Msk)
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#ifdef __cplusplus
}
#endif
#endif // NRF_FICR_H__

149
ext/hal/nordic/nrfx/hal/nrf_gpio.h
View file

@ -38,13 +38,6 @@
extern "C" {
#endif
/**
* @defgroup nrf_gpio_hal GPIO HAL
* @{
* @ingroup nrf_gpio
* @brief Hardware access layer for managing the GPIO peripheral.
*/
#ifndef NRF_P0
#define NRF_P0 NRF_GPIO
#endif
@ -59,24 +52,25 @@ extern "C" {
#error "Not supported."
#endif
/**
* @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions.
* @defgroup nrf_gpio_hal GPIO HAL
* @{
* @ingroup nrf_gpio
* @brief Hardware access layer for managing the GPIO peripheral.
*/
/** @brief Macro for mapping port and pin numbers to values understandable for nrf_gpio functions. */
#define NRF_GPIO_PIN_MAP(port, pin) (((port) << 5) | ((pin) & 0x1F))
/**
* @brief Pin direction definitions.
*/
/** @brief Pin direction definitions. */
typedef enum
{
NRF_GPIO_PIN_DIR_INPUT = GPIO_PIN_CNF_DIR_Input, ///< Input.
NRF_GPIO_PIN_DIR_OUTPUT = GPIO_PIN_CNF_DIR_Output ///< Output.
} nrf_gpio_pin_dir_t;
/**
* @brief Connection of input buffer.
*/
/** @brief Connection of input buffer. */
typedef enum
{
NRF_GPIO_PIN_INPUT_CONNECT = GPIO_PIN_CNF_INPUT_Connect, ///< Connect input buffer.
@ -84,7 +78,8 @@ typedef enum
} nrf_gpio_pin_input_t;
/**
* @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin configuration.
* @brief Enumerator used for selecting the pin to be pulled down or up at the time of pin
* configuration.
*/
typedef enum
{
@ -93,9 +88,7 @@ typedef enum
NRF_GPIO_PIN_PULLUP = GPIO_PIN_CNF_PULL_Pullup, ///< Pin pull-up resistor enabled.
} nrf_gpio_pin_pull_t;
/**
* @brief Enumerator used for selecting output drive mode.
*/
/** @brief Enumerator used for selecting output drive mode. */
typedef enum
{
NRF_GPIO_PIN_S0S1 = GPIO_PIN_CNF_DRIVE_S0S1, ///< !< Standard '0', standard '1'.
@ -108,9 +101,7 @@ typedef enum
NRF_GPIO_PIN_H0D1 = GPIO_PIN_CNF_DRIVE_H0D1, ///< !< High-drive '0', disconnect '1'.
} nrf_gpio_pin_drive_t;
/**
* @brief Enumerator used for selecting the pin to sense high or low level on the pin input.
*/
/** @brief Enumerator used for selecting the pin to sense high or low level on the pin input. */
typedef enum
{
NRF_GPIO_PIN_NOSENSE = GPIO_PIN_CNF_SENSE_Disabled, ///< Pin sense level disabled.
@ -118,16 +109,16 @@ typedef enum
NRF_GPIO_PIN_SENSE_HIGH = GPIO_PIN_CNF_SENSE_High, ///< Pin sense high level.
} nrf_gpio_pin_sense_t;
/**
* @brief Function for configuring the GPIO pin range as output pins with normal drive strength.
* This function can be used to configure pin range as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
*
* @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @note For configuring only one pin as output, use @ref nrf_gpio_cfg_output.
* Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
*
* @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
* @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*/
__STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_t pin_range_end);
@ -135,14 +126,12 @@ __STATIC_INLINE void nrf_gpio_range_cfg_output(uint32_t pin_range_start, uint32_
* @brief Function for configuring the GPIO pin range as input pins with given initial value set, hiding inner details.
* This function can be used to configure pin range as simple input.
*
* @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
*
* @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*
* @note For configuring only one pin as input, use @ref nrf_gpio_cfg_input.
* Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
*
* @param pin_range_start Specifies the start number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
* @param pin_range_end Specifies the end number (inclusive) in the range of pin numbers to be configured (allowed values 0-30).
* @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*/
__STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_start,
uint32_t pin_range_end,
@ -153,6 +142,7 @@ __STATIC_INLINE void nrf_gpio_range_cfg_input(uint32_t pin_range_star
*
* The main pin configuration function.
* This function allows to set any aspect in PIN_CNF register.
*
* @param pin_number Specifies the pin number.
* @param dir Pin direction.
* @param input Connect or disconnect the input buffer.
@ -172,9 +162,9 @@ __STATIC_INLINE void nrf_gpio_cfg(
* @brief Function for configuring the given GPIO pin number as output, hiding inner details.
* This function can be used to configure a pin as simple output with gate driving GPIO_PIN_CNF_DRIVE_S0S1 (normal cases).
*
* @param pin_number Specifies the pin number.
*
* @note Sense capability on the pin is disabled and input is disconnected from the buffer as the pins are configured as output.
*
* @param pin_number Specifies the pin number.
*/
__STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
@ -182,10 +172,10 @@ __STATIC_INLINE void nrf_gpio_cfg_output(uint32_t pin_number);
* @brief Function for configuring the given GPIO pin number as input, hiding inner details.
* This function can be used to configure a pin as simple input.
*
* @param pin_number Specifies the pin number.
* @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*
* @note Sense capability on the pin is disabled and input is connected to buffer so that the GPIO->IN register is readable.
*
* @param pin_number Specifies the pin number.
* @param pull_config State of the pin range pull resistor (no pull, pulled down, or pulled high).
*/
__STATIC_INLINE void nrf_gpio_cfg_input(uint32_t pin_number, nrf_gpio_pin_pull_t pull_config);
@ -208,7 +198,6 @@ __STATIC_INLINE void nrf_gpio_cfg_watcher(uint32_t pin_number);
* @brief Function for disconnecting input for the given GPIO.
*
* @param pin_number Specifies the pin number.
*
*/
__STATIC_INLINE void nrf_gpio_input_disconnect(uint32_t pin_number);
@ -230,7 +219,6 @@ __STATIC_INLINE void nrf_gpio_cfg_sense_input(uint32_t pin_number,
*
* @param pin_number Specifies the pin number.
* @param sense_config Sense configuration.
*
*/
__STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_sense_t sense_config);
@ -238,25 +226,23 @@ __STATIC_INLINE void nrf_gpio_cfg_sense_set(uint32_t pin_number, nrf_gpio_pin_se
* @brief Function for setting the direction for a GPIO pin.
*
* @param pin_number Specifies the pin number for which to set the direction.
*
* @param direction Specifies the direction.
* @param direction Specifies the direction.
*/
__STATIC_INLINE void nrf_gpio_pin_dir_set(uint32_t pin_number, nrf_gpio_pin_dir_t direction);
/**
* @brief Function for setting a GPIO pin.
*
* Note that the pin must be configured as an output for this function to have any effect.
* For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to set.
* @param pin_number Specifies the pin number to be set.
*/
__STATIC_INLINE void nrf_gpio_pin_set(uint32_t pin_number);
/**
* @brief Function for clearing a GPIO pin.
*
* Note that the pin must be configured as an output for this
* function to have any effect.
* For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to clear.
*/
@ -265,8 +251,7 @@ __STATIC_INLINE void nrf_gpio_pin_clear(uint32_t pin_number);
/**
* @brief Function for toggling a GPIO pin.
*
* Note that the pin must be configured as an output for this
* function to have any effect.
* For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to toggle.
*/
@ -275,12 +260,10 @@ __STATIC_INLINE void nrf_gpio_pin_toggle(uint32_t pin_number);
/**
* @brief Function for writing a value to a GPIO pin.
*
* Note that the pin must be configured as an output for this
* function to have any effect.
* For this function to have any effect, the pin must be configured as an output.
*
* @param pin_number Specifies the pin number to write.
*
* @param value Specifies the value to be written to the pin.
* @param value Specifies the value to be written to the pin.
* @arg 0 Clears the pin.
* @arg >=1 Sets the pin.
*/
@ -289,8 +272,7 @@ __STATIC_INLINE void nrf_gpio_pin_write(uint32_t pin_number, uint32_t value);
/**
* @brief Function for reading the input level of a GPIO pin.
*
* Note that the pin must have input connected for the value
* returned from this function to be valid.
* If the value returned by this function is to be valid, the pin's input buffer must be connected.
*
* @param pin_number Specifies the pin number to read.
*
@ -312,7 +294,7 @@ __STATIC_INLINE uint32_t nrf_gpio_pin_out_read(uint32_t pin_number);
*
* @param pin_number Specifies the pin number to read.
*
* @retval Sense configuration.
* @return Sense configuration.
*/
__STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number);
@ -321,7 +303,7 @@ __STATIC_INLINE nrf_gpio_pin_sense_t nrf_gpio_pin_sense_get(uint32_t pin_number)
*
* @param pin_number Specifies the pin number to read.
*
* @retval Direction configuration.
* @return Direction configuration.
*/
__STATIC_INLINE nrf_gpio_pin_dir_t nrf_gpio_pin_dir_get(uint32_t pin_number);
@ -344,88 +326,82 @@ __STATIC_INLINE nrf_gpio_pin_input_t nrf_gpio_pin_input_get(uint32_t pin_number)
__STATIC_INLINE nrf_gpio_pin_pull_t nrf_gpio_pin_pull_get(uint32_t pin_number);
/**
* @brief Function for setting output direction on selected pins on a given port.
* @brief Function for setting output direction on the selected pins on the given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param out_mask Mask specifying the pins to set as output.
*
*/
__STATIC_INLINE void nrf_gpio_port_dir_output_set(NRF_GPIO_Type * p_reg, uint32_t out_mask);
/**
* @brief Function for setting input direction on selected pins on a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param in_mask Mask specifying the pins to set as input.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param in_mask Mask that specifies the pins to be set as input.
*/
__STATIC_INLINE void nrf_gpio_port_dir_input_set(NRF_GPIO_Type * p_reg, uint32_t in_mask);
/**
* @brief Function for writing the direction configuration of GPIO pins in a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param dir_mask Mask specifying the direction of pins. Bit set means that the given pin is configured as output.
* @brief Function for writing the direction configuration of the GPIO pins in the given port.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param dir_mask Mask that specifies the direction of pins. Bit set means that the given pin is configured as output.
*/
__STATIC_INLINE void nrf_gpio_port_dir_write(NRF_GPIO_Type * p_reg, uint32_t dir_mask);
/**
* @brief Function for reading the direction configuration of a GPIO port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Pin configuration of the current direction settings. Bit set means that the given pin is configured as output.
* @return Pin configuration of the current direction settings. Bit set means that the given pin is configured as output.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_dir_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for reading the input signals of GPIO pins on a given port.
* @brief Function for reading the input signals of the GPIO pins on the given port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
* @retval Port input values.
* @return Port input values.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_in_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for reading the output signals of GPIO pins of a given port.
* @brief Function for reading the output signals of the GPIO pins on the given port.
*
* @param p_reg Pointer to the peripheral registers structure.
*
* @retval Port output values.
* @return Port output values.
*/
__STATIC_INLINE uint32_t nrf_gpio_port_out_read(NRF_GPIO_Type const * p_reg);
/**
* @brief Function for writing the GPIO pins output on a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param value Output port mask.
*
*/
__STATIC_INLINE void nrf_gpio_port_out_write(NRF_GPIO_Type * p_reg, uint32_t value);
/**
* @brief Function for setting high level on selected GPIO pins of a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param set_mask Mask with pins to set as logical high level.
* @brief Function for setting high level on selected the GPIO pins on the given port.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param set_mask Mask with pins to be set as logical high level.
*/
__STATIC_INLINE void nrf_gpio_port_out_set(NRF_GPIO_Type * p_reg, uint32_t set_mask);
/**
* @brief Function for setting low level on selected GPIO pins of a given port.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param clr_mask Mask with pins to set as logical low level.
* @brief Function for setting low level on selected the GPIO pins on the given port.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param clr_mask Mask with pins to be set as logical low level.
*/
__STATIC_INLINE void nrf_gpio_port_out_clear(NRF_GPIO_Type * p_reg, uint32_t clr_mask);
/**
* @brief Function for reading pins state of multiple consecutive ports.
* @brief Function for reading pin state of multiple consecutive ports.
*
* @param start_port Index of the first port to read.
* @param length Number of ports to read.
@ -448,8 +424,8 @@ __STATIC_INLINE void nrf_gpio_latches_read(uint32_t start_port, uint32_t length,
* @brief Function for reading latch state of single pin.
*
* @param pin_number Pin number.
* @return 0 if latch is not set. Positive value otherwise.
*
* @return 0 if latch is not set. Positive value otherwise.
*/
__STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number);
@ -457,20 +433,19 @@ __STATIC_INLINE uint32_t nrf_gpio_pin_latch_get(uint32_t pin_number);
* @brief Function for clearing latch state of a single pin.
*
* @param pin_number Pin number.
*
*/
__STATIC_INLINE void nrf_gpio_pin_latch_clear(uint32_t pin_number);
#endif
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
/**
* @brief Function for extracting port and relative pin number from absolute pin number.
* @brief Function for extracting port and the relative pin number from the absolute pin number.
*
* @param[inout] Pointer to absolute pin number which is overriden by relative to port pin number.
* @param[in,out] p_pin Pointer to the absolute pin number overriden by the pin number that is relative to the port.
*
* @return Pointer to port register set.
*
*/
__STATIC_INLINE NRF_GPIO_Type * nrf_gpio_pin_port_decode(uint32_t * p_pin)
{

219
ext/hal/nordic/nrfx/hal/nrf_gpiote.h
View file

@ -42,19 +42,18 @@ extern "C" {
* @defgroup nrf_gpiote_hal GPIOTE HAL
* @{
* @ingroup nrf_gpiote
* @brief Hardware access layer for managing the GPIOTE peripheral.
* @brief Hardware access layer (HAL) for managing the GPIOTE peripheral.
*/
#ifdef GPIOTE_CONFIG_PORT_Msk
#if defined(GPIOTE_CONFIG_PORT_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Mask for covering port and pin bits in registers. */
#define GPIOTE_CONFIG_PORT_PIN_Msk (GPIOTE_CONFIG_PORT_Msk | GPIOTE_CONFIG_PSEL_Msk)
#else
#define GPIOTE_CONFIG_PORT_PIN_Msk GPIOTE_CONFIG_PSEL_Msk
#endif
/**
* @enum nrf_gpiote_polarity_t
* @brief Polarity for the GPIOTE channel.
*/
/** @brief Polarity for the GPIOTE channel. */
typedef enum
{
NRF_GPIOTE_POLARITY_LOTOHI = GPIOTE_CONFIG_POLARITY_LoToHi, ///< Low to high.
@ -62,78 +61,65 @@ typedef enum
NRF_GPIOTE_POLARITY_TOGGLE = GPIOTE_CONFIG_POLARITY_Toggle ///< Toggle.
} nrf_gpiote_polarity_t;
/**
* @enum nrf_gpiote_outinit_t
* @brief Initial output value for the GPIOTE channel.
*/
/** @brief Initial output value for the GPIOTE channel. */
typedef enum
{
NRF_GPIOTE_INITIAL_VALUE_LOW = GPIOTE_CONFIG_OUTINIT_Low, ///< Low to high.
NRF_GPIOTE_INITIAL_VALUE_HIGH = GPIOTE_CONFIG_OUTINIT_High ///< High to low.
} nrf_gpiote_outinit_t;
/**
* @brief Tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief GPIOTE tasks. */
typedef enum
{
NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0.*/
NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1.*/
NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2.*/
NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3.*/
NRF_GPIOTE_TASKS_OUT_0 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[0]), /**< Out task 0. */
NRF_GPIOTE_TASKS_OUT_1 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[1]), /**< Out task 1. */
NRF_GPIOTE_TASKS_OUT_2 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[2]), /**< Out task 2. */
NRF_GPIOTE_TASKS_OUT_3 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[3]), /**< Out task 3. */
#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4.*/
NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5.*/
NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6.*/
NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7.*/
NRF_GPIOTE_TASKS_OUT_4 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[4]), /**< Out task 4. */
NRF_GPIOTE_TASKS_OUT_5 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[5]), /**< Out task 5. */
NRF_GPIOTE_TASKS_OUT_6 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[6]), /**< Out task 6. */
NRF_GPIOTE_TASKS_OUT_7 = offsetof(NRF_GPIOTE_Type, TASKS_OUT[7]), /**< Out task 7. */
#endif
#if defined(GPIOTE_FEATURE_SET_PRESENT) || defined(__NRFX_DOXYGEN__)
NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0.*/
NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1.*/
NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2.*/
NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3.*/
NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4.*/
NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5.*/
NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6.*/
NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7.*/
NRF_GPIOTE_TASKS_SET_0 = offsetof(NRF_GPIOTE_Type, TASKS_SET[0]), /**< Set task 0. */
NRF_GPIOTE_TASKS_SET_1 = offsetof(NRF_GPIOTE_Type, TASKS_SET[1]), /**< Set task 1. */
NRF_GPIOTE_TASKS_SET_2 = offsetof(NRF_GPIOTE_Type, TASKS_SET[2]), /**< Set task 2. */
NRF_GPIOTE_TASKS_SET_3 = offsetof(NRF_GPIOTE_Type, TASKS_SET[3]), /**< Set task 3. */
NRF_GPIOTE_TASKS_SET_4 = offsetof(NRF_GPIOTE_Type, TASKS_SET[4]), /**< Set task 4. */
NRF_GPIOTE_TASKS_SET_5 = offsetof(NRF_GPIOTE_Type, TASKS_SET[5]), /**< Set task 5. */
NRF_GPIOTE_TASKS_SET_6 = offsetof(NRF_GPIOTE_Type, TASKS_SET[6]), /**< Set task 6. */
NRF_GPIOTE_TASKS_SET_7 = offsetof(NRF_GPIOTE_Type, TASKS_SET[7]), /**< Set task 7. */
#endif
#if defined(GPIOTE_FEATURE_CLR_PRESENT) || defined(__NRFX_DOXYGEN__)
NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0.*/
NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1.*/
NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2.*/
NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3.*/
NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4.*/
NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5.*/
NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6.*/
NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7.*/
NRF_GPIOTE_TASKS_CLR_0 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[0]), /**< Clear task 0. */
NRF_GPIOTE_TASKS_CLR_1 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[1]), /**< Clear task 1. */
NRF_GPIOTE_TASKS_CLR_2 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[2]), /**< Clear task 2. */
NRF_GPIOTE_TASKS_CLR_3 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[3]), /**< Clear task 3. */
NRF_GPIOTE_TASKS_CLR_4 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[4]), /**< Clear task 4. */
NRF_GPIOTE_TASKS_CLR_5 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[5]), /**< Clear task 5. */
NRF_GPIOTE_TASKS_CLR_6 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[6]), /**< Clear task 6. */
NRF_GPIOTE_TASKS_CLR_7 = offsetof(NRF_GPIOTE_Type, TASKS_CLR[7]), /**< Clear task 7. */
#endif
/*lint -restore*/
} nrf_gpiote_tasks_t;
/**
* @brief Events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief GPIOTE events. */
typedef enum
{
NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0.*/
NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1.*/
NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2.*/
NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3.*/
NRF_GPIOTE_EVENTS_IN_0 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[0]), /**< In event 0. */
NRF_GPIOTE_EVENTS_IN_1 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[1]), /**< In event 1. */
NRF_GPIOTE_EVENTS_IN_2 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[2]), /**< In event 2. */
NRF_GPIOTE_EVENTS_IN_3 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[3]), /**< In event 3. */
#if (GPIOTE_CH_NUM > 4) || defined(__NRFX_DOXYGEN__)
NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4.*/
NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5.*/
NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6.*/
NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7.*/
NRF_GPIOTE_EVENTS_IN_4 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[4]), /**< In event 4. */
NRF_GPIOTE_EVENTS_IN_5 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[5]), /**< In event 5. */
NRF_GPIOTE_EVENTS_IN_6 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[6]), /**< In event 6. */
NRF_GPIOTE_EVENTS_IN_7 = offsetof(NRF_GPIOTE_Type, EVENTS_IN[7]), /**< In event 7. */
#endif
NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event.*/
/*lint -restore*/
NRF_GPIOTE_EVENTS_PORT = offsetof(NRF_GPIOTE_Type, EVENTS_PORT), /**< Port event. */
} nrf_gpiote_events_t;
/**
* @enum nrf_gpiote_int_t
* @brief GPIOTE interrupts.
*/
/** @brief GPIOTE interrupts. */
typedef enum
{
NRF_GPIOTE_INT_IN0_MASK = GPIOTE_INTENSET_IN0_Msk, /**< GPIOTE interrupt from IN0. */
@ -149,10 +135,11 @@ typedef enum
NRF_GPIOTE_INT_PORT_MASK = (int)GPIOTE_INTENSET_PORT_Msk, /**< GPIOTE interrupt from PORT event. */
} nrf_gpiote_int_t;
#if (GPIOTE_CH_NUM == 4) || defined(__NRFX_DOXYGEN__)
/** @brief Mask holding positions of available GPIOTE input interrupts. */
#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK)
#if (GPIOTE_CH_NUM > 4)
#undef NRF_GPIOTE_INT_IN_MASK
#else
#define NRF_GPIOTE_INT_IN_MASK (NRF_GPIOTE_INT_IN0_MASK | NRF_GPIOTE_INT_IN1_MASK |\
NRF_GPIOTE_INT_IN2_MASK | NRF_GPIOTE_INT_IN3_MASK |\
NRF_GPIOTE_INT_IN4_MASK | NRF_GPIOTE_INT_IN5_MASK |\
@ -160,61 +147,67 @@ typedef enum
#endif
/**
* @brief Function for activating a specific GPIOTE task.
* @brief Function for activating the specified GPIOTE task.
*
* @param[in] task Task.
* @param[in] task Task.
*/
__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task);
/**
* @brief Function for getting the address of a specific GPIOTE task.
* @brief Function for getting the address of the specified GPIOTE task.
*
* @param[in] task Task.
*
* @returns Address.
* @return Address of the specified task.
*/
__STATIC_INLINE uint32_t nrf_gpiote_task_addr_get(nrf_gpiote_tasks_t task);
/**
* @brief Function for getting the state of a specific GPIOTE event.
* @brief Function for getting the state of the specified GPIOTE event.
*
* @param[in] event Event.
*
* @retval true The event is set.
* @retval false The event is not set.
*/
__STATIC_INLINE bool nrf_gpiote_event_is_set(nrf_gpiote_events_t event);
/**
* @brief Function for clearing a specific GPIOTE event.
* @brief Function for clearing the specified GPIOTE event.
*
* @param[in] event Event.
*/
__STATIC_INLINE void nrf_gpiote_event_clear(nrf_gpiote_events_t event);
/**
* @brief Function for getting the address of a specific GPIOTE event.
* @brief Function for getting the address of the specified GPIOTE event.
*
* @param[in] event Event.
*
* @return Address
* @return Address of the specified event.
*/
__STATIC_INLINE uint32_t nrf_gpiote_event_addr_get(nrf_gpiote_events_t event);
/**@brief Function for enabling interrupts.
/**
* @brief Function for enabling interrupts.
*
* @param[in] mask Interrupt mask to be enabled.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_gpiote_int_enable(uint32_t mask);
/**@brief Function for disabling interrupts.
/**
* @brief Function for disabling interrupts.
*
* @param[in] mask Interrupt mask to be disabled.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_gpiote_int_disable(uint32_t mask);
/**@brief Function for checking if interrupts are enabled.
/**
* @brief Function for checking if interrupts are enabled.
*
* @param[in] mask Mask of interrupt flags to check.
* @param[in] mask Mask of interrupts to be checked.
*
* @return Mask with enabled interrupts.
* @return Mask with enabled interrupts.
*/
__STATIC_INLINE uint32_t nrf_gpiote_int_is_enabled(uint32_t mask);
@ -256,77 +249,90 @@ __STATIC_INLINE void nrf_gpiote_publish_set(nrf_gpiote_events_t event,
__STATIC_INLINE void nrf_gpiote_publish_clear(nrf_gpiote_events_t event);
#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**@brief Function for enabling a GPIOTE event.
/**
* @brief Function for enabling a GPIOTE event.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_event_enable(uint32_t idx);
/**@brief Function for disabling a GPIOTE event.
/**
* @brief Function for disabling a GPIOTE event.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_event_disable(uint32_t idx);
/**@brief Function for configuring a GPIOTE event.
/**
* @brief Function for configuring a GPIOTE event.
*
* @param[in] idx Task-Event index.
* @param[in] pin Pin associated with event.
* @param[in] polarity Transition that should generate an event.
* @param[in] idx Task-Event index.
* @param[in] pin Pin associated with event.
* @param[in] polarity Transition that should generate an event.
*/
__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx, uint32_t pin,
__STATIC_INLINE void nrf_gpiote_event_configure(uint32_t idx,
uint32_t pin,
nrf_gpiote_polarity_t polarity);
/**@brief Function for getting the pin associated with a GPIOTE event.
/**
* @brief Function for getting the pin associated with a GPIOTE event.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*
* @return Pin number.
*/
__STATIC_INLINE uint32_t nrf_gpiote_event_pin_get(uint32_t idx);
/**@brief Function for getting the polarity associated with a GPIOTE event.
/**
* @brief Function for getting the polarity associated with a GPIOTE event.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*
* @return Polarity.
*/
__STATIC_INLINE nrf_gpiote_polarity_t nrf_gpiote_event_polarity_get(uint32_t idx);
/**@brief Function for enabling a GPIOTE task.
/**
* @brief Function for enabling a GPIOTE task.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx);
/**@brief Function for disabling a GPIOTE task.
/**
* @brief Function for disabling a GPIOTE task.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_task_disable(uint32_t idx);
/**@brief Function for configuring a GPIOTE task.
/**
* @brief Function for configuring a GPIOTE task.
*
* @note Function is not configuring mode field so task is disabled after this function is called.
*
* @param[in] idx Task-Event index.
* @param[in] pin Pin associated with event.
* @param[in] polarity Transition that should generate an event.
* @param[in] init_val Initial value of the pin.
* @param[in] idx Task-Event index.
* @param[in] pin Pin associated with event.
* @param[in] polarity Transition that should generate an event.
* @param[in] init_val Initial value of the pin.
*/
__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx, uint32_t pin,
__STATIC_INLINE void nrf_gpiote_task_configure(uint32_t idx,
uint32_t pin,
nrf_gpiote_polarity_t polarity,
nrf_gpiote_outinit_t init_val);
/**@brief Function for forcing a specific state on the pin connected to GPIOTE.
/**
* @brief Function for forcing the specified state on the pin connected to GPIOTE.
*
* @param[in] idx Task-Event index.
* @param[in] init_val Pin state.
* @param[in] idx Task-Event index.
* @param[in] init_val Pin state.
*/
__STATIC_INLINE void nrf_gpiote_task_force(uint32_t idx, nrf_gpiote_outinit_t init_val);
/**@brief Function for resetting a GPIOTE task event configuration to the default state.
/**
* @brief Function for resetting a GPIOTE task event configuration to the default state.
*
* @param[in] idx Task-Event index.
* @param[in] idx Task-Event index.
*/
__STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx);
@ -334,12 +340,13 @@ __STATIC_INLINE void nrf_gpiote_te_default(uint32_t idx);
*
* @param[in] idx Task-Event index.
*
* @retval true If the Task-Event mode is set to Task or Event.
* @retval false If the Task-Event mode is set to Disabled.
* @retval true The Task-Event mode is set to Task or Event.
* @retval false The Task-Event mode is set to Disabled.
*/
__STATIC_INLINE bool nrf_gpiote_te_is_enabled(uint32_t idx);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_gpiote_task_set(nrf_gpiote_tasks_t task)
{
*(__IO uint32_t *)((uint32_t)NRF_GPIOTE + task) = 0x1UL;
@ -443,7 +450,7 @@ __STATIC_INLINE void nrf_gpiote_task_enable(uint32_t idx)
#ifdef NRF51
/* Workaround for the OUTINIT PAN. When nrf_gpiote_task_config() is called a glitch happens
on the GPIO if the GPIO in question is already assigned to GPIOTE and the pin is in the
correct state in GPIOTE but not in the OUT register. */
correct state in GPIOTE, but not in the OUT register. */
/* Configure channel to not existing, not connected to the pin, and configure as a tasks that will set it to proper level */
NRF_GPIOTE->CONFIG[idx] = final_config | (((31) << GPIOTE_CONFIG_PSEL_Pos) & GPIOTE_CONFIG_PORT_PIN_Msk);
__NOP();

98
ext/hal/nordic/nrfx/hal/nrf_i2s.h
View file

@ -47,38 +47,28 @@ extern "C" {
/**
* @brief This value can be provided as a parameter for the @ref nrf_i2s_pins_set
* function call to specify that a given I2S signal (SDOUT, SDIN, or MCK)
* function call to specify that the given I2S signal (SDOUT, SDIN, or MCK)
* shall not be connected to a physical pin.
*/
#define NRF_I2S_PIN_NOT_CONNECTED 0xFFFFFFFF
/**
* @brief I2S tasks.
*/
/** @brief I2S tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_I2S_TASK_START = offsetof(NRF_I2S_Type, TASKS_START), ///< Starts continuous I2S transfer. Also starts the MCK generator if this is enabled.
NRF_I2S_TASK_STOP = offsetof(NRF_I2S_Type, TASKS_STOP) ///< Stops I2S transfer. Also stops the MCK generator.
/*lint -restore*/
} nrf_i2s_task_t;
/**
* @brief I2S events.
*/
/** @brief I2S events. */
typedef enum
{
/*lint -save -e30*/
NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double-buffers.
NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double-buffers.
NRF_I2S_EVENT_RXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_RXPTRUPD), ///< The RXD.PTR register has been copied to internal double buffers.
NRF_I2S_EVENT_TXPTRUPD = offsetof(NRF_I2S_Type, EVENTS_TXPTRUPD), ///< The TXD.PTR register has been copied to internal double buffers.
NRF_I2S_EVENT_STOPPED = offsetof(NRF_I2S_Type, EVENTS_STOPPED) ///< I2S transfer stopped.
/*lint -restore*/
} nrf_i2s_event_t;
/**
* @brief I2S interrupts.
*/
/** @brief I2S interrupts. */
typedef enum
{
NRF_I2S_INT_RXPTRUPD_MASK = I2S_INTENSET_RXPTRUPD_Msk, ///< Interrupt on RXPTRUPD event.
@ -86,18 +76,14 @@ typedef enum
NRF_I2S_INT_STOPPED_MASK = I2S_INTENSET_STOPPED_Msk ///< Interrupt on STOPPED event.
} nrf_i2s_int_mask_t;
/**
* @brief I2S modes of operation.
*/
/** @brief I2S modes of operation. */
typedef enum
{
NRF_I2S_MODE_MASTER = I2S_CONFIG_MODE_MODE_Master, ///< Master mode.
NRF_I2S_MODE_SLAVE = I2S_CONFIG_MODE_MODE_Slave ///< Slave mode.
} nrf_i2s_mode_t;
/**
* @brief I2S master clock generator settings.
*/
/** @brief I2S master clock generator settings. */
typedef enum
{
NRF_I2S_MCK_DISABLED = 0, ///< MCK disabled.
@ -131,9 +117,7 @@ typedef enum
NRF_I2S_MCK_32MDIV125 = I2S_CONFIG_MCKFREQ_MCKFREQ_32MDIV125 ///< 32 MHz / 125 = 0.256 MHz.
} nrf_i2s_mck_t;
/**
* @brief I2S MCK/LRCK ratios.
*/
/** @brief I2S MCK/LRCK ratios. */
typedef enum
{
NRF_I2S_RATIO_32X = I2S_CONFIG_RATIO_RATIO_32X, ///< LRCK = MCK / 32.
@ -147,9 +131,7 @@ typedef enum
NRF_I2S_RATIO_512X = I2S_CONFIG_RATIO_RATIO_512X ///< LRCK = MCK / 512.
} nrf_i2s_ratio_t;
/**
* @brief I2S sample widths.
*/
/** @brief I2S sample widths. */
typedef enum
{
NRF_I2S_SWIDTH_8BIT = I2S_CONFIG_SWIDTH_SWIDTH_8Bit, ///< 8 bit.
@ -157,27 +139,21 @@ typedef enum
NRF_I2S_SWIDTH_24BIT = I2S_CONFIG_SWIDTH_SWIDTH_24Bit ///< 24 bit.
} nrf_i2s_swidth_t;
/**
* @brief I2S alignments of sample within a frame.
*/
/** @brief I2S alignments of sample within a frame. */
typedef enum
{
NRF_I2S_ALIGN_LEFT = I2S_CONFIG_ALIGN_ALIGN_Left, ///< Left-aligned.
NRF_I2S_ALIGN_RIGHT = I2S_CONFIG_ALIGN_ALIGN_Right ///< Right-aligned.
} nrf_i2s_align_t;
/**
* @brief I2S frame formats.
*/
/** @brief I2S frame formats. */
typedef enum
{
NRF_I2S_FORMAT_I2S = I2S_CONFIG_FORMAT_FORMAT_I2S, ///< Original I2S format.
NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left- or right-aligned) format.
NRF_I2S_FORMAT_ALIGNED = I2S_CONFIG_FORMAT_FORMAT_Aligned ///< Alternate (left-aligned or right-aligned) format.
} nrf_i2s_format_t;
/**
* @brief I2S enabled channels.
*/
/** @brief I2S enabled channels. */
typedef enum
{
NRF_I2S_CHANNELS_STEREO = I2S_CONFIG_CHANNELS_CHANNELS_Stereo, ///< Stereo.
@ -187,19 +163,19 @@ typedef enum
/**
* @brief Function for activating a specific I2S task.
* @brief Function for activating the specified I2S task.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to activate.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_i2s_task_trigger(NRF_I2S_Type * p_reg,
nrf_i2s_task_t task);
/**
* @brief Function for getting the address of a specific I2S task register.
* @brief Function for getting the address of the specified I2S task register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
* @param[in] task Specified task.
*
* @return Address of the specified task register.
*/
@ -207,31 +183,31 @@ __STATIC_INLINE uint32_t nrf_i2s_task_address_get(NRF_I2S_Type const * p_reg,
nrf_i2s_task_t task);
/**
* @brief Function for clearing a specific I2S event.
* @brief Function for clearing the specified I2S event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_reg,
__STATIC_INLINE void nrf_i2s_event_clear(NRF_I2S_Type * p_reg,
nrf_i2s_event_t event);
/**
* @brief Function for checking the state of a specific I2S event.
* @brief Function for retrieving the state of the I2S event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to check.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_i2s_event_check(NRF_I2S_Type const * p_reg,
nrf_i2s_event_t event);
/**
* @brief Function for getting the address of a specific I2S event register.
* @brief Function for getting the address of the specified I2S event register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
* @param[in] event Specified event.
*
* @return Address of the specified event register.
*/
@ -242,7 +218,7 @@ __STATIC_INLINE uint32_t nrf_i2s_event_address_get(NRF_I2S_Type const * p_reg,
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to enable.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_reg, uint32_t mask);
@ -250,18 +226,18 @@ __STATIC_INLINE void nrf_i2s_int_enable(NRF_I2S_Type * p_reg, uint32_t mask);
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to disable.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_i2s_int_disable(NRF_I2S_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] i2s_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] i2s_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_i2s_int_enable_check(NRF_I2S_Type const * p_reg,
nrf_i2s_int_mask_t i2s_int);
@ -359,8 +335,8 @@ __STATIC_INLINE void nrf_i2s_pins_set(NRF_I2S_Type * p_reg,
* @param[in] mck_setup Master clock generator setup.
* @param[in] ratio MCK/LRCK ratio.
*
* @retval true If the configuration has been set successfully.
* @retval false If the requested configuration is not allowed.
* @retval true The configuration has been set successfully.
* @retval false The specified configuration is not allowed.
*/
__STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_reg,
nrf_i2s_mode_t mode,
@ -374,8 +350,8 @@ __STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_reg,
/**
* @brief Function for setting up the I2S transfer.
*
* This function sets up the RX and TX buffers and enables reception and/or
* transmission accordingly. If the transfer in a given direction is not
* This function sets up the RX and TX buffers and enables reception or
* transmission (or both) accordingly. If the transfer in a given direction is not
* required, pass NULL instead of the pointer to the corresponding buffer.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
@ -550,7 +526,7 @@ __STATIC_INLINE bool nrf_i2s_configure(NRF_I2S_Type * p_reg,
{
if (mode == NRF_I2S_MODE_MASTER)
{
// The MCK/LRCK ratio shall be a multiple of 2 * sample width.
// The MCK/LRCK ratio must be a multiple of 2 * sample width.
if (((sample_width == NRF_I2S_SWIDTH_16BIT) &&
(ratio == NRF_I2S_RATIO_48X))
||

44
ext/hal/nordic/nrfx/hal/nrf_kmu.h
View file

@ -78,15 +78,15 @@ typedef enum
/**
* @brief Function for activating a specific KMU task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_kmu_task_trigger(NRF_KMU_Type * p_reg, nrf_kmu_task_t task);
/**
* @brief Function for getting the address of a specific KMU task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
*
* @return Address of the specified task register.
@ -96,26 +96,26 @@ __STATIC_INLINE uint32_t nrf_kmu_task_address_get(NRF_KMU_Type const * p_reg, nr
/**
* @brief Function for clearing a specific KMU event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_kmu_event_clear(NRF_KMU_Type * p_reg, nrf_kmu_event_t event);
/**
* @brief Function for checking the state of a specific KMU event.
* @brief Function for retrieving the state of the KMU event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_kmu_event_check(NRF_KMU_Type const * p_reg, nrf_kmu_event_t event);
/**
* @brief Function for getting the address of a specific KMU event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
*
* @return Address of the specified event register.
@ -126,27 +126,27 @@ __STATIC_INLINE uint32_t nrf_kmu_event_address_get(NRF_KMU_Type const * p_reg,
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_kmu_int_enable(NRF_KMU_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_kmu_int_disable(NRF_KMU_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] kmu_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] kmu_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg,
nrf_kmu_int_mask_t kmu_int);
@ -156,7 +156,7 @@ __STATIC_INLINE bool nrf_kmu_int_enable_check(NRF_KMU_Type const * p_reg,
*
* Function returns bitmask. Please use @ref nrf_kmu_int_mask_t to check interrupts status.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Bitmask with pending interrupts bits.
*/
@ -167,7 +167,7 @@ __STATIC_INLINE uint32_t nrf_kmu_intpend_get(NRF_KMU_Type const * p_reg);
*
* Function returns bitmask. Please use @ref nrf_kmu_status_t to check operations status.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Bitmask with operation status bits.
*/
@ -176,7 +176,7 @@ __STATIC_INLINE uint32_t nrf_kmu_status_get(NRF_KMU_Type const * p_reg);
/**
* @brief Function for selecting the key slot ID.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] keyslot_id Key slot ID to be read over AHB or pushed over
* secure APB when TASKS_PUSH_KEYSLOT is started.
*/
@ -185,7 +185,7 @@ __STATIC_INLINE void nrf_kmu_keyslot_set(NRF_KMU_Type * p_reg, uint8_t keyslot_i
/**
* @brief Function for getting the key slot ID.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Key slot ID.
*/

201
ext/hal/nordic/nrfx/hal/nrf_lpcomp.h
View file

@ -45,10 +45,7 @@ extern "C" {
* @brief Hardware access layer for managing the Low Power Comparator (LPCOMP) peripheral.
*/
/**
* @enum nrf_lpcomp_ref_t
* @brief LPCOMP reference selection.
*/
/** @brief LPCOMP reference selection. */
typedef enum
{
#if (LPCOMP_REFSEL_RESOLUTION == 8) || defined(__NRFX_DOXYGEN__)
@ -60,32 +57,29 @@ typedef enum
NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_SupplySixEighthsPrescaling, /**< Use supply with a 6/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_SupplySevenEighthsPrescaling, /**< Use supply with a 7/8 prescaler as reference. */
#elif (LPCOMP_REFSEL_RESOLUTION == 16) || defined(__NRFX_DOXYGEN__)
NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_1_8 = LPCOMP_REFSEL_REFSEL_Ref1_8Vdd, /**< Use supply with a 1/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_2_8 = LPCOMP_REFSEL_REFSEL_Ref2_8Vdd, /**< Use supply with a 2/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_3_8 = LPCOMP_REFSEL_REFSEL_Ref3_8Vdd, /**< Use supply with a 3/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_4_8 = LPCOMP_REFSEL_REFSEL_Ref4_8Vdd, /**< Use supply with a 4/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_5_8 = LPCOMP_REFSEL_REFSEL_Ref5_8Vdd, /**< Use supply with a 5/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_6_8 = LPCOMP_REFSEL_REFSEL_Ref6_8Vdd, /**< Use supply with a 6/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_7_8 = LPCOMP_REFSEL_REFSEL_Ref7_8Vdd, /**< Use supply with a 7/8 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_1_16 = LPCOMP_REFSEL_REFSEL_Ref1_16Vdd, /**< Use supply with a 1/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_3_16 = LPCOMP_REFSEL_REFSEL_Ref3_16Vdd, /**< Use supply with a 3/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_5_16 = LPCOMP_REFSEL_REFSEL_Ref5_16Vdd, /**< Use supply with a 5/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_7_16 = LPCOMP_REFSEL_REFSEL_Ref7_16Vdd, /**< Use supply with a 7/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_9_16 = LPCOMP_REFSEL_REFSEL_Ref9_16Vdd, /**< Use supply with a 9/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_11_16 = LPCOMP_REFSEL_REFSEL_Ref11_16Vdd, /**< Use supply with a 11/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_13_16 = LPCOMP_REFSEL_REFSEL_Ref13_16Vdd, /**< Use supply with a 13/16 prescaler as reference. */
NRF_LPCOMP_REF_SUPPLY_15_16 = LPCOMP_REFSEL_REFSEL_Ref15_16Vdd, /**< Use supply with a 15/16 prescaler as reference. */
#endif
NRF_LPCOMP_REF_EXT_REF0 = LPCOMP_REFSEL_REFSEL_ARef |
(LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */
(LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference0 << 16), /**< External reference 0. */
NRF_LPCOMP_CONFIG_REF_EXT_REF1 = LPCOMP_REFSEL_REFSEL_ARef |
(LPCOMP_EXTREFSEL_EXTREFSEL_AnalogReference1 << 16), /**< External reference 1. */
} nrf_lpcomp_ref_t;
/**
* @enum nrf_lpcomp_input_t
* @brief LPCOMP input selection.
*/
/** @brief LPCOMP input selection. */
typedef enum
{
NRF_LPCOMP_INPUT_0 = LPCOMP_PSEL_PSEL_AnalogInput0, /**< Input 0. */
@ -98,10 +92,7 @@ typedef enum
NRF_LPCOMP_INPUT_7 = LPCOMP_PSEL_PSEL_AnalogInput7 /**< Input 7. */
} nrf_lpcomp_input_t;
/**
* @enum nrf_lpcomp_detect_t
* @brief LPCOMP detection type selection.
*/
/** @brief LPCOMP detection type selection. */
typedef enum
{
NRF_LPCOMP_DETECT_CROSS = LPCOMP_ANADETECT_ANADETECT_Cross, /**< Generate ANADETEC on crossing, both upwards and downwards crossing. */
@ -109,52 +100,40 @@ typedef enum
NRF_LPCOMP_DETECT_DOWN = LPCOMP_ANADETECT_ANADETECT_Down /**< Generate ANADETEC on downwards crossing only. */
} nrf_lpcomp_detect_t;
/**
* @enum nrf_lpcomp_task_t
* @brief LPCOMP tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief LPCOMP tasks. */
typedef enum
{
NRF_LPCOMP_TASK_START = offsetof(NRF_LPCOMP_Type, TASKS_START), /**< LPCOMP start sampling task. */
NRF_LPCOMP_TASK_STOP = offsetof(NRF_LPCOMP_Type, TASKS_STOP), /**< LPCOMP stop sampling task. */
NRF_LPCOMP_TASK_SAMPLE = offsetof(NRF_LPCOMP_Type, TASKS_SAMPLE) /**< Sample comparator value. */
} nrf_lpcomp_task_t; /*lint -restore*/
} nrf_lpcomp_task_t;
/**
* @enum nrf_lpcomp_event_t
* @brief LPCOMP events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief LPCOMP events. */
typedef enum
{
NRF_LPCOMP_EVENT_READY = offsetof(NRF_LPCOMP_Type, EVENTS_READY), /**< LPCOMP is ready and output is valid. */
NRF_LPCOMP_EVENT_DOWN = offsetof(NRF_LPCOMP_Type, EVENTS_DOWN), /**< Input voltage crossed the threshold going down. */
NRF_LPCOMP_EVENT_UP = offsetof(NRF_LPCOMP_Type, EVENTS_UP), /**< Input voltage crossed the threshold going up. */
NRF_LPCOMP_EVENT_CROSS = offsetof(NRF_LPCOMP_Type, EVENTS_CROSS) /**< Input voltage crossed the threshold in any direction. */
} nrf_lpcomp_event_t; /*lint -restore*/
} nrf_lpcomp_event_t;
/**
* @enum nrf_lpcomp_short_mask_t
* @brief LPCOMP shorts masks.
*/
/** @brief LPCOMP shortcut masks. */
typedef enum
{
NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Short between CROSS event and STOP task. */
NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Short between UP event and STOP task. */
NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Short between DOWN event and STOP task. */
NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Short between READY event and STOP task. */
NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Short between READY event and SAMPLE task. */
NRF_LPCOMP_SHORT_CROSS_STOP_MASK = LPCOMP_SHORTS_CROSS_STOP_Msk, /*!< Shortcut between CROSS event and STOP task. */
NRF_LPCOMP_SHORT_UP_STOP_MASK = LPCOMP_SHORTS_UP_STOP_Msk, /*!< Shortcut between UP event and STOP task. */
NRF_LPCOMP_SHORT_DOWN_STOP_MASK = LPCOMP_SHORTS_DOWN_STOP_Msk, /*!< Shortcut between DOWN event and STOP task. */
NRF_LPCOMP_SHORT_READY_STOP_MASK = LPCOMP_SHORTS_READY_STOP_Msk, /*!< Shortcut between READY event and STOP task. */
NRF_LPCOMP_SHORT_READY_SAMPLE_MASK = LPCOMP_SHORTS_READY_SAMPLE_Msk /*!< Shortcut between READY event and SAMPLE task. */
} nrf_lpcomp_short_mask_t;
#ifdef LPCOMP_FEATURE_HYST_PRESENT
/**
* @enum nrf_lpcomp_hysteresis_t
* @brief LPCOMP hysteresis.
*/
/** @brief LPCOMP hysteresis. */
typedef enum
{
NRF_LPCOMP_HYST_NOHYST = LPCOMP_HYST_HYST_NoHyst, /**< Comparator hysteresis disabled. */
NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typ. 50 mV). */
NRF_LPCOMP_HYST_50mV = LPCOMP_HYST_HYST_Hyst50mV /**< Comparator hysteresis enabled (typically 50 mV). */
}nrf_lpcomp_hysteresis_t;
#endif // LPCOMP_FEATURE_HYST_PRESENT
@ -168,9 +147,11 @@ typedef struct
#endif // LPCOMP_FEATURE_HYST_PRESENT
} nrf_lpcomp_config_t;
/** Default LPCOMP configuration. */
#define NRF_LPCOMP_CONFIG_DEFAULT { NRF_LPCOMP_REF_SUPPLY_FOUR_EIGHT, NRF_LPCOMP_DETECT_DOWN }
/**
* @brief Function for configuring LPCOMP.
*
@ -194,7 +175,6 @@ __STATIC_INLINE void nrf_lpcomp_input_select(nrf_lpcomp_input_t input);
* @brief Function for enabling the Low Power Comparator.
*
* This function enables LPCOMP.
*
*/
__STATIC_INLINE void nrf_lpcomp_enable(void);
@ -202,7 +182,6 @@ __STATIC_INLINE void nrf_lpcomp_enable(void);
* @brief Function for disabling the Low Power Comparator.
*
* This function disables LPCOMP.
*
*/
__STATIC_INLINE void nrf_lpcomp_disable(void);
@ -216,92 +195,91 @@ __STATIC_INLINE uint32_t nrf_lpcomp_result_get(void);
/**
* @brief Function for enabling interrupts from LPCOMP.
*
* @param[in] lpcomp_int_mask Mask of interrupts to be enabled.
* @param[in] int_mask Mask of interrupts to be enabled.
*
* @sa nrf_lpcomp_int_disable()
* @sa nrf_lpcomp_int_enable_check()
* @sa nrf_lpcomp_int_disable
* @sa nrf_lpcomp_int_enable_check
*/
__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask);
__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t int_mask);
/**
* @brief Function for disabling interrupts from LPCOMP.
*
* @param[in] lpcomp_int_mask Mask of interrupts to be disabled.
* @param[in] int_mask Mask of interrupts to be disabled.
*
* @sa nrf_lpcomp_int_enable()
* @sa nrf_lpcomp_int_enable_check()
* @sa nrf_lpcomp_int_enable
* @sa nrf_lpcomp_int_enable_check
*/
__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask);
__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t int_mask);
/**
* @brief Function for getting the enabled interrupts of LPCOMP.
*
* @param[in] lpcomp_int_mask Mask of interrupts to be checked.
* @param[in] int_mask Mask of interrupts to be checked.
*
* @retval true If any of interrupts of the specified mask are enabled.
* @retval true Any of interrupts of the specified mask are enabled.
* @retval false None interrupt specified by the mask are enabled.
*
* @sa nrf_lpcomp_int_enable()
* @sa nrf_lpcomp_int_disable()
* @sa nrf_lpcomp_int_enable
* @sa nrf_lpcomp_int_disable
*/
__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask);
__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t int_mask);
/**
* @brief Function for getting the address of a specific LPCOMP task register.
* @brief Function for getting the address of the specified LPCOMP task register.
*
* @param[in] lpcomp_task LPCOMP task.
* @param[in] task LPCOMP task.
*
* @return The address of the specified LPCOMP task.
*/
__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task);
__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t task);
/**
* @brief Function for getting the address of a specific LPCOMP event register.
* @brief Function for getting the address of the specified LPCOMP event register.
*
* @param[in] lpcomp_event LPCOMP event.
* @param[in] event LPCOMP event.
*
* @return The address of the specified LPCOMP event.
*/
__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event);
__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t event);
/**
* @brief Function for setting LPCOMP shorts.
*
* @param[in] lpcomp_short_mask LPCOMP shorts by mask.
*
* @param[in] mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask);
__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing LPCOMP shorts by mask.
*
* @param[in] lpcomp_short_mask LPCOMP shorts to be cleared.
*
* @param[in] mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask);
__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t mask);
/**
* @brief Function for setting a specific LPCOMP task.
*
* @param[in] lpcomp_task LPCOMP task to be set.
* @brief Function for setting the specified LPCOMP task.
*
* @param[in] task LPCOMP task to be set.
*/
__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task);
__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t task);
/**
* @brief Function for clearing a specific LPCOMP event.
*
* @param[in] lpcomp_event LPCOMP event to be cleared.
* @brief Function for clearing the specified LPCOMP event.
*
* @param[in] event LPCOMP event to be cleared.
*/
__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event);
__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t event);
/**
* @brief Function for getting the state of a specific LPCOMP event.
* @brief Function for retrieving the state of the LPCOMP event.
*
* @retval true If the specified LPCOMP event is active.
* @param[in] event Event to be checked.
*
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event);
__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t event);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -316,7 +294,8 @@ __STATIC_INLINE void nrf_lpcomp_configure(const nrf_lpcomp_config_t * p_config)
if ((p_config->reference & LPCOMP_REFSEL_REFSEL_ARef)==LPCOMP_REFSEL_REFSEL_ARef)
{
uint32_t extref = p_config->reference >> 16;
NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) & LPCOMP_EXTREFSEL_EXTREFSEL_Msk;
NRF_LPCOMP->EXTREFSEL = (extref << LPCOMP_EXTREFSEL_EXTREFSEL_Pos) &
LPCOMP_EXTREFSEL_EXTREFSEL_Msk;
}
NRF_LPCOMP->ANADETECT =
@ -358,58 +337,58 @@ __STATIC_INLINE uint32_t nrf_lpcomp_result_get(void)
return (uint32_t)NRF_LPCOMP->RESULT;
}
__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t lpcomp_int_mask)
__STATIC_INLINE void nrf_lpcomp_int_enable(uint32_t int_mask)
{
NRF_LPCOMP->INTENSET = lpcomp_int_mask;
NRF_LPCOMP->INTENSET = int_mask;
}
__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t lpcomp_int_mask)
__STATIC_INLINE void nrf_lpcomp_int_disable(uint32_t int_mask)
{
NRF_LPCOMP->INTENCLR = lpcomp_int_mask;
NRF_LPCOMP->INTENCLR = int_mask;
}
__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t lpcomp_int_mask)
__STATIC_INLINE bool nrf_lpcomp_int_enable_check(uint32_t int_mask)
{
return (NRF_LPCOMP->INTENSET & lpcomp_int_mask); // when read this register will return the value of INTEN.
return (NRF_LPCOMP->INTENSET & int_mask); // when read this register will return the value of INTEN.
}
__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t lpcomp_task)
__STATIC_INLINE uint32_t * nrf_lpcomp_task_address_get(nrf_lpcomp_task_t task)
{
return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_task);
return (uint32_t *)((uint8_t *)NRF_LPCOMP + task);
}
__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t lpcomp_event)
__STATIC_INLINE uint32_t * nrf_lpcomp_event_address_get(nrf_lpcomp_event_t event)
{
return (uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event);
return (uint32_t *)((uint8_t *)NRF_LPCOMP + event);
}
__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t lpcomp_short_mask)
__STATIC_INLINE void nrf_lpcomp_shorts_enable(uint32_t short_mask)
{
NRF_LPCOMP->SHORTS |= lpcomp_short_mask;
NRF_LPCOMP->SHORTS |= short_mask;
}
__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t lpcomp_short_mask)
__STATIC_INLINE void nrf_lpcomp_shorts_disable(uint32_t short_mask)
{
NRF_LPCOMP->SHORTS &= ~lpcomp_short_mask;
NRF_LPCOMP->SHORTS &= ~short_mask;
}
__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t lpcomp_task)
__STATIC_INLINE void nrf_lpcomp_task_trigger(nrf_lpcomp_task_t task)
{
*( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_task) ) = 1;
*( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + (uint32_t)task) ) = 1;
}
__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t lpcomp_event)
__STATIC_INLINE void nrf_lpcomp_event_clear(nrf_lpcomp_event_t event)
{
*( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event) ) = 0;
*( (volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + (uint32_t)event) ) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + lpcomp_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_LPCOMP + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t lpcomp_event)
__STATIC_INLINE bool nrf_lpcomp_event_check(nrf_lpcomp_event_t event)
{
return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + lpcomp_event));
return (bool) (*(volatile uint32_t *)( (uint8_t *)NRF_LPCOMP + (uint32_t)event));
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION

86
ext/hal/nordic/nrfx/hal/nrf_mwu.h
View file

@ -82,57 +82,57 @@ typedef enum
/** @brief MWU region watch masks. */
typedef enum
{
NRF_MWU_WATCH_REGION0_WRITE = MWU_REGIONEN_RGN0WA_Msk, ///< Region 0 write access watch mask
NRF_MWU_WATCH_REGION0_READ = MWU_REGIONEN_RGN0RA_Msk, ///< Region 0 read access watch mask
NRF_MWU_WATCH_REGION1_WRITE = MWU_REGIONEN_RGN1WA_Msk, ///< Region 1 write access watch mask
NRF_MWU_WATCH_REGION1_READ = MWU_REGIONEN_RGN1RA_Msk, ///< Region 1 read access watch mask
NRF_MWU_WATCH_REGION2_WRITE = MWU_REGIONEN_RGN2WA_Msk, ///< Region 2 write access watch mask
NRF_MWU_WATCH_REGION2_READ = MWU_REGIONEN_RGN2RA_Msk, ///< Region 2 read access watch mask
NRF_MWU_WATCH_REGION3_WRITE = MWU_REGIONEN_RGN3WA_Msk, ///< Region 3 write access watch mask
NRF_MWU_WATCH_REGION3_READ = MWU_REGIONEN_RGN3RA_Msk, ///< Region 3 read access watch mask
NRF_MWU_WATCH_PREGION0_WRITE = MWU_REGIONEN_PRGN0WA_Msk, ///< Peripheral region 0 write access watch mask
NRF_MWU_WATCH_PREGION0_READ = MWU_REGIONEN_PRGN0RA_Msk, ///< Peripheral region 0 read access watch mask
NRF_MWU_WATCH_PREGION1_WRITE = MWU_REGIONEN_PRGN1WA_Msk, ///< Peripheral region 1 write access watch mask
NRF_MWU_WATCH_PREGION1_READ = MWU_REGIONEN_PRGN1RA_Msk, ///< Peripheral region 1 read access watch mask
NRF_MWU_WATCH_REGION0_WRITE = MWU_REGIONEN_RGN0WA_Msk, ///< Region 0 write access watch mask.
NRF_MWU_WATCH_REGION0_READ = MWU_REGIONEN_RGN0RA_Msk, ///< Region 0 read access watch mask.
NRF_MWU_WATCH_REGION1_WRITE = MWU_REGIONEN_RGN1WA_Msk, ///< Region 1 write access watch mask.
NRF_MWU_WATCH_REGION1_READ = MWU_REGIONEN_RGN1RA_Msk, ///< Region 1 read access watch mask.
NRF_MWU_WATCH_REGION2_WRITE = MWU_REGIONEN_RGN2WA_Msk, ///< Region 2 write access watch mask.
NRF_MWU_WATCH_REGION2_READ = MWU_REGIONEN_RGN2RA_Msk, ///< Region 2 read access watch mask.
NRF_MWU_WATCH_REGION3_WRITE = MWU_REGIONEN_RGN3WA_Msk, ///< Region 3 write access watch mask.
NRF_MWU_WATCH_REGION3_READ = MWU_REGIONEN_RGN3RA_Msk, ///< Region 3 read access watch mask.
NRF_MWU_WATCH_PREGION0_WRITE = MWU_REGIONEN_PRGN0WA_Msk, ///< Peripheral region 0 write access watch mask.
NRF_MWU_WATCH_PREGION0_READ = MWU_REGIONEN_PRGN0RA_Msk, ///< Peripheral region 0 read access watch mask.
NRF_MWU_WATCH_PREGION1_WRITE = MWU_REGIONEN_PRGN1WA_Msk, ///< Peripheral region 1 write access watch mask.
NRF_MWU_WATCH_PREGION1_READ = MWU_REGIONEN_PRGN1RA_Msk, ///< Peripheral region 1 read access watch mask.
} nrf_mwu_region_watch_t;
/**
* @brief Function for checking the state of a specific MWU event.
* @brief Function for retrieving the state of the MWU event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mwu_event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_mwu_event_check(NRF_MWU_Type const * p_reg,
nrf_mwu_event_t mwu_event);
nrf_mwu_event_t event);
/**
* @brief Function for clearing a specific MWU event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mwu_event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_mwu_event_clear(NRF_MWU_Type * p_reg,
nrf_mwu_event_t mwu_event);
nrf_mwu_event_t event);
/**
* @brief Function for getting the address of a specific MWU event register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mwu_event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_mwu_event_address_get(NRF_MWU_Type const * p_reg,
nrf_mwu_event_t mwu_event);
nrf_mwu_event_t event);
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] int_mask Interrupts to enable.
* @param[in] int_mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_mwu_int_enable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@ -140,10 +140,10 @@ __STATIC_INLINE void nrf_mwu_int_enable(NRF_MWU_Type * p_reg, uint32_t int_mask)
* @brief Function for retrieving the state of a specific interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mwu_int Interrupt to check.
* @param[in] mwu_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_mwu_int_enable_check(NRF_MWU_Type const * p_reg,
nrf_mwu_int_mask_t mwu_int);
@ -152,7 +152,7 @@ __STATIC_INLINE bool nrf_mwu_int_enable_check(NRF_MWU_Type const * p_reg,
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] int_mask Interrupts to disable.
* @param[in] int_mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_mwu_int_disable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@ -160,7 +160,7 @@ __STATIC_INLINE void nrf_mwu_int_disable(NRF_MWU_Type * p_reg, uint32_t int_mask
* @brief Function for enabling specified non-maskable interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] int_mask Interrupts to enable.
* @param[in] int_mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_mwu_nmi_enable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@ -168,10 +168,10 @@ __STATIC_INLINE void nrf_mwu_nmi_enable(NRF_MWU_Type * p_reg, uint32_t int_mask)
* @brief Function for retrieving the state of a specific non-maskable interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mwu_int Interrupt to check.
* @param[in] mwu_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_mwu_nmi_enable_check(NRF_MWU_Type const * p_reg,
nrf_mwu_int_mask_t mwu_int);
@ -180,7 +180,7 @@ __STATIC_INLINE bool nrf_mwu_nmi_enable_check(NRF_MWU_Type const * p_reg,
* @brief Function for disabling specified non-maskable interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] int_mask Interrupts to disable.
* @param[in] int_mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_mwu_nmi_disable(NRF_MWU_Type * p_reg, uint32_t int_mask);
@ -239,7 +239,7 @@ __STATIC_INLINE void nrf_mwu_subregions_configure(NRF_MWU_Type * p_reg,
* @brief Function for getting the mask of the write access flags of peripheral subregions
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] per_reg_idx Peripheral region containing subregions to check.
* @param[in] per_reg_idx Peripheral region containing subregions to be checked.
*
* @return Mask specifying subregions that were write accessed.
*/
@ -261,7 +261,7 @@ __STATIC_INLINE void nrf_mwu_subregions_write_accesses_clear(NRF_MWU_Type * p_re
* @brief Function for getting the mask of the read access flags of peripheral subregions
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] per_reg_idx Peripheral region containing subregions to check.
* @param[in] per_reg_idx Peripheral region containing subregions to be checked.
*
* @return Mask specifying subregions that were read accessed.
*/
@ -282,25 +282,25 @@ __STATIC_INLINE void nrf_mwu_subregions_read_accesses_clear(NRF_MWU_Type * p_reg
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrf_mwu_event_check(NRF_MWU_Type const * p_reg,
nrf_mwu_event_t mwu_event)
nrf_mwu_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)mwu_event);
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_mwu_event_clear(NRF_MWU_Type * p_reg,
nrf_mwu_event_t mwu_event)
nrf_mwu_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)mwu_event)) = 0;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)mwu_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE uint32_t nrf_mwu_event_address_get(NRF_MWU_Type const * p_reg,
nrf_mwu_event_t mwu_event)
nrf_mwu_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)mwu_event);
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_mwu_int_enable(NRF_MWU_Type * p_reg, uint32_t int_mask)

155
ext/hal/nordic/nrfx/hal/nrf_nfct.h
View file

@ -49,10 +49,8 @@ extern "C" {
#define NRF_NFCT_CRC_SIZE 2 /**< CRC size in bytes. */
#define NRF_NFCT_DISABLE_ALL_INT 0xFFFFFFFF /**< Value to disable all interrupts. */
/**
* @brief NFCT tasks
*/
typedef enum /*lint -save -e30 */
/** @brief NFCT tasks. */
typedef enum
{
NRF_NFCT_TASK_ACTIVATE = offsetof(NRF_NFCT_Type, TASKS_ACTIVATE), /**< Activate the NFCT peripheral for the incoming and outgoing frames, change state to activated. */
NRF_NFCT_TASK_DISABLE = offsetof(NRF_NFCT_Type, TASKS_DISABLE), /**< Disable the NFCT peripheral. */
@ -61,12 +59,10 @@ typedef enum /*lint -save -e30 */
NRF_NFCT_TASK_ENABLERXDATA = offsetof(NRF_NFCT_Type, TASKS_ENABLERXDATA), /**< Initialize EasyDMA for receive. */
NRF_NFCT_TASK_GOIDLE = offsetof(NRF_NFCT_Type, TASKS_GOIDLE), /**< Force state machine to the IDLE state. */
NRF_NFCT_TASK_GOSLEEP = offsetof(NRF_NFCT_Type, TASKS_GOSLEEP), /**< Force state machine to the SLEEP_A state. */
} nrf_nfct_task_t; /*lint -restore */
} nrf_nfct_task_t;
/**
* @brief NFCT events
*/
typedef enum /*lint -save -e30 */
/** @brief NFCT events. */
typedef enum
{
NRF_NFCT_EVENT_READY = offsetof(NRF_NFCT_Type, EVENTS_READY), /**< The NFCT peripheral is ready to receive and send frames. */
NRF_NFCT_EVENT_FIELDDETECTED = offsetof(NRF_NFCT_Type, EVENTS_FIELDDETECTED), /**< Remote NFC field is detected. */
@ -83,11 +79,9 @@ typedef enum /*lint -save -e30 */
NRF_NFCT_EVENT_COLLISION = offsetof(NRF_NFCT_Type, EVENTS_COLLISION), /**< NFC auto collision resolution error reported. */
NRF_NFCT_EVENT_SELECTED = offsetof(NRF_NFCT_Type, EVENTS_SELECTED), /**< NFC auto collision resolution successfully completed. */
NRF_NFCT_EVENT_STARTED = offsetof(NRF_NFCT_Type, EVENTS_STARTED), /**< EasyDMA is ready to receive or send frames. */
} nrf_nfct_event_t; /*lint -restore */
} nrf_nfct_event_t;
/**
* @brief NFCT shorts
*/
/** @brief NFCT shortcuts. */
typedef enum
{
NRF_NFCT_SHORT_FIELDDETECTED_ACTIVATE_MASK = NFCT_SHORTS_FIELDDETECTED_ACTIVATE_Msk, /**< Shortcut between the FIELDDETECTED event and the ACTIVATE task. */
@ -97,9 +91,7 @@ typedef enum
#endif // defined(NFCT_SHORTS_TXFRAMEEND_ENABLERXDATA_Msk) || defined(__NRFX_DOXYGEN__)
} nrf_nfct_short_mask_t;
/**
* @brief NFCT interrupts
*/
/** @brief NFCT interrupts. */
typedef enum
{
NRF_NFCT_INT_READY_MASK = NFCT_INTEN_READY_Msk, /**< Interrupt on READY event. */
@ -119,9 +111,7 @@ typedef enum
NRF_NFCT_INT_STARTED_MASK = NFCT_INTEN_STARTED_Msk, /**< Interrupt on STARTED event. */
} nrf_nfct_int_mask_t;
/**
* @brief NFC error status bit masks.
*/
/** @brief NFC error status bit masks. */
typedef enum
{
NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK = NFCT_ERRORSTATUS_FRAMEDELAYTIMEOUT_Msk, /**< Timeout of the Frame Delay Timer (no frame transmission started in the FDT window). */
@ -133,9 +123,7 @@ typedef enum
#endif // defined(NFCT_ERRORSTATUS_NFCFIELDTOOWEAK_Msk) || defined(__NRFX_DOXYGEN__)
} nrf_nfct_error_status_t;
/**
* @brief NFC received frame status bit masks.
*/
/** @brief NFC received frame status bit masks. */
typedef enum
{
NRF_NFCT_RX_FRAME_STATUS_CRC_MASK = NFCT_FRAMESTATUS_RX_CRCERROR_Msk, /**< CRC status mask. */
@ -144,9 +132,7 @@ typedef enum
} nrf_nfct_rx_frame_status_t;
#if defined(NFCT_NFCTAGSTATE_NFCTAGSTATE_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief NFC tag state.
*/
/** @brief NFC tag state. */
typedef enum
{
NRF_NFCT_TAG_STATE_DISABLED = NFCT_NFCTAGSTATE_NFCTAGSTATE_Disabled, /**< Disabled or sensing NFC field. */
@ -172,18 +158,14 @@ typedef enum
} nrf_nfct_sleep_state_t;
#endif // defined (NFCT_SLEEPSTATE_SLEEPSTATE_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief NFC field state bit masks.
*/
/** @brief NFC field state bit masks. */
typedef enum
{
NRF_NFCT_FIELD_STATE_PRESENT_MASK = NFCT_FIELDPRESENT_FIELDPRESENT_Msk, /**< Field presence mask. */
NRF_NFCT_FIELD_STATE_LOCK_MASK = NFCT_FIELDPRESENT_LOCKDETECT_Msk /**< Field lock mask. */
} nrf_nfct_field_state_t;
/**
* @brief NFC frame delay mode for data transmission.
*/
/** @brief NFC frame delay mode for data transmission. */
typedef enum
{
NRF_NFCT_FRAME_DELAY_MODE_FREERUN = NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_FreeRun, /**< Frame transmission starts when @ref NRF_NFCT_TASK_STARTTX is set (delay timer is not used). */
@ -192,9 +174,7 @@ typedef enum
NRF_NFCT_FRAME_DELAY_MODE_WINDOWGRID = NFCT_FRAMEDELAYMODE_FRAMEDELAYMODE_WindowGrid /**< Frame transmission starts in a bit grid between FRAMEDELAYMIN and FRAMEDELAYMAX. */
} nrf_nfct_frame_delay_mode_t;
/**
* @brief Bit masks for NFC transmission frame configuration.
*/
/** @brief Bit masks for NFC transmission frame configuration. */
typedef enum
{
NRF_NFCT_TX_FRAME_CONFIG_PARITY = NFCT_TXD_FRAMECONFIG_PARITY_Msk, /**< Indicates whether parity is added in the transmitted frames. */
@ -203,9 +183,7 @@ typedef enum
NRF_NFCT_TX_FRAME_CONFIG_CRC16 = NFCT_TXD_FRAMECONFIG_CRCMODETX_Msk /**< Indicates whether CRC is added in the transmitted frames. */
} nrf_nfct_tx_frame_config_t;
/**
* @brief Bit masks for NFC reception frame configuration.
*/
/** @brief Bit masks for NFC reception frame configuration. */
typedef enum
{
NRF_NFCT_RX_FRAME_CONFIG_PARITY = NFCT_RXD_FRAMECONFIG_PARITY_Msk, /**< Indicates whether parity is expected in the received frames. */
@ -214,7 +192,8 @@ typedef enum
} nrf_nfct_rx_frame_config_t;
/**
* @brief 'NFCI1 size' NFC field configuration for the SENS_RES frame according to the NFC Forum Digital Protocol Technical Specification.
* @brief 'NFCI1 size' NFC field configuration for the SENS_RES frame according to the NFC Forum
* Digital Protocol Technical Specification.
*/
typedef enum
{
@ -229,7 +208,8 @@ typedef enum
} nrf_nfct_sensres_nfcid1_size_t;
/**
* @brief 'Bit frame SDD' NFC field configuration for the SENS_RES frame according to the NFC Forum Digital Protocol Technical Specification.
* @brief 'Bit frame SDD' NFC field configuration for the SENS_RES frame according to the NFC
* Forum Digital Protocol Technical Specification.
*/
typedef enum
{
@ -248,7 +228,8 @@ typedef enum
} nrf_nfct_sensres_bit_frame_sdd_t;
/**
* @brief 'Platofrm Config' NFC field configuration for the SENS_RES frame according to the NFC Forum Digital Protocol Technical Specification.
* @brief 'Platofrm Config' NFC field configuration for the SENS_RES frame according to the NFC
* Forum Digital Protocol Technical Specification.
*/
typedef enum
{
@ -258,9 +239,7 @@ typedef enum
NRF_NFCT_SENSRES_PLATFORM_CONFIG_OTHER = 0 << NFCT_SENSRES_PLATFCONFIG_Pos
} nrf_nfct_sensres_platform_config_t;
/**
* @brief Bit masks for SEL_RES NFC frame configuration.
*/
/** @brief Bit masks for SEL_RES NFC frame configuration. */
typedef enum
{
NRF_NFCT_SELRES_CASCADE_MASK = NFCT_SELRES_CASCADE_Msk, /**< SEL_RES Cascade field bit mask. */
@ -268,7 +247,8 @@ typedef enum
} nrf_nfct_selres_t;
/**
* @brief Protocol NFC field (bits b7 and b6) configuration for the SEL_RES frame according to the NFC Forum Digital Protocol Technical Specification.
* @brief Protocol NFC field (bits b7 and b6) configuration for the SEL_RES frame according to
* the NFC Forum Digital Protocol Technical Specification.
*/
typedef enum
{
@ -281,7 +261,7 @@ typedef enum
/**
* @brief Function for activating a specific NFCT task.
*
* @param[in] task Task.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_nfct_task_trigger(nrf_nfct_task_t task);
@ -302,12 +282,12 @@ __STATIC_INLINE uint32_t nrf_nfct_task_address_get(nrf_nfct_task_t task);
__STATIC_INLINE void nrf_nfct_event_clear(nrf_nfct_event_t event);
/**
* @brief Function for returning the state of a specific event.
* @brief Function for retrieving the state of the NFCT event.
*
* @param[in] event Event.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_nfct_event_check(nrf_nfct_event_t event);
@ -323,14 +303,14 @@ __STATIC_INLINE uint32_t nrf_nfct_event_address_get(nrf_nfct_event_t event);
/**
* @brief Function for enabling selected shortcuts.
*
* @param[in] short_mask Shortcut mask.
* @param[in] short_mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_nfct_shorts_enable(uint32_t short_mask);
/**
* @brief Function for disabling selected shortcuts.
*
* @param[in] short_mask Shortcut mask.
* @param[in] short_mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_nfct_shorts_disable(uint32_t short_mask);
@ -360,8 +340,8 @@ __STATIC_INLINE void nrf_nfct_int_enable(uint32_t int_mask);
*
* @param[in] int_mask Interrupt mask.
*
* @retval true If any of the selected interrupts is enabled.
* @retval false If none of the selected interrupts is enabled.
* @retval true Any of the selected interrupts is enabled.
* @retval false None of the selected interrupts is enabled.
*/
__STATIC_INLINE bool nrf_nfct_int_enable_check(uint32_t int_mask);
@ -403,7 +383,8 @@ __STATIC_INLINE uint32_t nrf_nfct_rx_frame_status_get(void);
/**
* @brief Function for clearing the NFC frame reception status.
*
* @param[in] framestatus_flags Status flags to be cleared, defined in @ref nrf_nfct_rx_frame_status_t.
* @param[in] framestatus_flags Status flags to be cleared, defined in
* @ref nrf_nfct_rx_frame_status_t.
*/
__STATIC_INLINE void nrf_nfct_rx_frame_status_clear(uint32_t framestatus_flags);
@ -428,8 +409,10 @@ __STATIC_INLINE nrf_nfct_tag_state_t nrf_nfct_tag_state_get(void);
*
* @details The returned value is the last state before the autimatic collision resolution started.
*
* @retval NRF_NFCT_SLEEP_STATE_IDLE NFC tag was in IDLE state before the automatic collision resolution started.
* @retval NRF_NFCT_SLEEP_STATE_SLEEP_A NFC tag was in SLEEP_A state before the automatic collision resolution started.
* @retval NRF_NFCT_SLEEP_STATE_IDLE NFC tag was in IDLE state before the automatic
* collision resolution started.
* @retval NRF_NFCT_SLEEP_STATE_SLEEP_A NFC tag was in SLEEP_A state before the automatic
* collision resolution started.
*/
__STATIC_INLINE nrf_nfct_sleep_state_t nrf_nfct_sleep_state_get(void);
#endif // defined (NFCT_SLEEPSTATE_SLEEPSTATE_Msk) || defined(__NRFX_DOXYGEN__)
@ -437,7 +420,8 @@ __STATIC_INLINE nrf_nfct_sleep_state_t nrf_nfct_sleep_state_get(void);
/**
* @brief Function for getting the status of the external NFC field detection.
*
* @return The NFC field detection status. Status bits can be checked by using @ref nrf_nfct_field_state_t.
* @return The NFC field detection status. Status bits can be checked by using
* @ref nrf_nfct_field_state_t.
*/
__STATIC_INLINE uint8_t nrf_nfct_field_status_get(void);
@ -445,8 +429,8 @@ __STATIC_INLINE uint8_t nrf_nfct_field_status_get(void);
* @brief Function for getting the minimum Frame Delay Time value.
*
* @details This is the minimum value for Frame Delay Timer. It controls the shortest time between
* the last symbol of the last received frame and the start of the transmission of a new TX frame.
*
* the last symbol of the last received frame and the start of the transmission of a new
* TX frame.
*
* @return The minimum Frame Delay Time value in 13.56-MHz clock ticks.
*/
@ -456,7 +440,8 @@ __STATIC_INLINE uint16_t nrf_nfct_frame_delay_min_get(void);
* @brief Function for setting the minimum Frame Delay Time value.
*
* @details This is the minimum value for Frame Delay Timer. It controls the shortest time between
* the last symbol of the last received frame and the start of the transmission of a new TX frame.
* the last symbol of the last received frame and the start of the transmission of a new
* TX frame.
*
* @param[in] frame_delay_min Minimum Frame Delay Time value in 13.56-MHz clock ticks.
*/
@ -466,8 +451,8 @@ __STATIC_INLINE void nrf_nfct_frame_delay_min_set(uint16_t frame_delay_min);
* @brief Function for getting the maximum Frame Delay Time value.
*
* @details This is the maximum value for Frame Delay Timer. It controls the longest time between
* the last symbol of the last received frame and the start of the transmission of a new TX frame.
* If no transmission starts before the Frame Delay Timer timeout,
* the last symbol of the last received frame and the start of the transmission of a new
* TX frame. If no transmission starts before the Frame Delay Timer timeout,
* @ref NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK is set.
*
* @return The maximum Frame Delay Time value in 13.56-MHz clock ticks.
@ -478,8 +463,8 @@ __STATIC_INLINE uint32_t nrf_nfct_frame_delay_max_get(void);
* @brief Function for setting the maximum Frame Delay Time value.
*
* @details This is the maximum value for Frame Delay Timer. It controls the longest time between
* the last symbol of the last received frame and the start of the transmission of a new TX frame.
* If no transmission starts before the Frame Delay Timer timeout,
* the last symbol of the last received frame and the start of the transmission of a new
* TX frame. If no transmission starts before the Frame Delay Timer timeout,
* @ref NRF_NFCT_ERROR_FRAMEDELAYTIMEOUT_MASK is set.
*
* @param[in] frame_delay_max Maximum Frame Delay Time value in 13.56-MHz clock ticks.
@ -513,7 +498,8 @@ __STATIC_INLINE uint8_t * nrf_nfct_rxtx_buffer_get(void);
* @note Buffer for the NFC RX/TX data is used by EasyDMA and must be located in RAM.
*
* @param[in] p_rxtx_buf Pointer to the receive or transmit buffer.
* @param[in] max_txrx_len Maximum receive or transmit length in bytes (size of the RAM buffer for EasyDMA).
* @param[in] max_txrx_len Maximum receive or transmit length in bytes (size of the RAM
* buffer for EasyDMA).
*/
__STATIC_INLINE void nrf_nfct_rxtx_buffer_set(uint8_t * p_rxtx_buf,
uint16_t max_txrx_len);
@ -521,29 +507,32 @@ __STATIC_INLINE void nrf_nfct_rxtx_buffer_set(uint8_t * p_rxtx_buf,
/**
* @brief Function for getting the NFCT RX/TX maximum buffer length.
*
* @return The configured maximum receive or transmit length in bytes (size of the RX/TX buffer for EasyDMA).
* @return The configured maximum receive or transmit length in bytes (size of the RX/TX
* buffer for EasyDMA).
*/
__STATIC_INLINE uint16_t nrf_nfct_max_rxtx_length_get(void);
/**
* @brief Function for getting the flags for NFC frame transmission configuration.
*
* @return The flags of the NFCT frame transmission configuration, defined in @ref nrf_nfct_tx_frame_config_t.
* @return The flags of the NFCT frame transmission configuration, defined in
* @ref nrf_nfct_tx_frame_config_t.
*/
__STATIC_INLINE uint8_t nrf_nfct_tx_frame_config_get(void);
/**
* @brief Function for setting up the flags of the NFC frame transmission configuration.
*
* @param[in] flags Flags for NFCT TX configuration. Use @ref nrf_nfct_tx_frame_config_t for setting.
* @param[in] flags Flags for NFCT TX configuration. Use @ref nrf_nfct_tx_frame_config_t for
* setting.
*/
__STATIC_INLINE void nrf_nfct_tx_frame_config_set(uint8_t flags);
/**
* @brief Function for getting the length of the configured transmission frame.
*
* @note NFC frames do not have to consist of full bytes only, therefore data amount for transmission
* is configured in number of bits.
* @note NFC frames do not have to consist of full bytes only, therefore data amount
* for transmission is configured in number of bits.
*
* @return Number of bits to be sent excluding CRC, parity, SoF, and EoF.
*/
@ -555,8 +544,8 @@ __STATIC_INLINE uint16_t nrf_nfct_tx_bits_get(void);
* @details Set the number of TX bits excluding CRC, parity, SoF, and EoF.
*
* @note Source of data for transmission is set by using @ref nrf_nfct_rxtx_buffer_set.
* @note NFC frames do not have to consist of full bytes only, therefore data amount for transmission
* is configured in number of bits.
* @note NFC frames do not have to consist of full bytes only, therefore data amount
* for transmission is configured in number of bits.
*
* @param[in] tx_bits Overall number of bits to be sent.
*/
@ -565,7 +554,8 @@ __STATIC_INLINE void nrf_nfct_tx_bits_set(uint16_t tx_bits);
/**
* @brief Function for getting the flags of the NFC frame reception configuration.
*
* @return The flags for NFCT frame reception configuration, defined in @ref nrf_nfct_rx_frame_config_t.
* @return The flags for NFCT frame reception configuration, defined in
* @ref nrf_nfct_rx_frame_config_t.
*/
__STATIC_INLINE uint8_t nrf_nfct_rx_frame_config_get(void);
@ -584,19 +574,21 @@ __STATIC_INLINE void nrf_nfct_rx_frame_config_set(uint8_t flags);
*
* @param[in] crc_excluded Flag for excluding CRC size from calculation.
*
* @return Number of received bits including or excluding CRC, and excluding parity and SoF/EoF framing.
* @return Number of received bits including or excluding CRC, and excluding parity
* and SoF/EoF framing.
*/
__STATIC_INLINE uint16_t nrf_nfct_rx_bits_get(bool crc_excluded);
/**
* @brief Function for getting the NFCID1 (NFC tag identifier).
*
* @note This function always returns the full configuration of the NFCID1 setting (10 bytes), regardless
* of the NFCID1 size. The NFCID1 size can be configured using @ref nrf_nfct_sensres_nfcid1_size_set or
* @ref nrf_nfct_nfcid1_set.
* @note This function always returns the full configuration of the NFCID1 setting (10 bytes),
* regardless of the NFCID1 size. The NFCID1 size can be configured using
* @ref nrf_nfct_sensres_nfcid1_size_set or @ref nrf_nfct_nfcid1_set.
*
* @param[out] p_nfcid1_buf Pointer to a buffer for the NDFCID1 parameter. The NFCID1 values are in
* little endian order, that is: |NFCID1_3RD_LAST|NFCID1_2ND_LAST|NFCID1_LAST|.
* @param[out] p_nfcid1_buf Pointer to a buffer for the NDFCID1 parameter.
* The NFCID1 values are in little endian order,
* that is: |NFCID1_3RD_LAST|NFCID1_2ND_LAST|NFCID1_LAST|.
*
* @return Configured NFCID1 length
*/
@ -605,7 +597,8 @@ __STATIC_INLINE nrf_nfct_sensres_nfcid1_size_t nrf_nfct_nfcid1_get(uint8_t * p_n
/**
* @brief Function for setting the NFCID1 (NFC tag identifier).
*
* @note This function also configures the NFCIDSIZE field in the SENSRES register of the NRF_NFCT peripheral.
* @note This function also configures the NFCIDSIZE field in the SENSRES
* register of the NRF_NFCT peripheral.
*
* @param[in] p_nfcid1_buf Pointer to the buffer with NDFCID1 bytes.
* @param[in] nfcid1_size Size of the NFCID1 in bytes.
@ -1001,7 +994,7 @@ __STATIC_INLINE bool nrf_nfct_autocolres_is_enabled(void)
__STATIC_INLINE void nrf_nfct_autocolres_enable(void)
{
NRF_NFCT->AUTOCOLRESCONFIG =
NRF_NFCT->AUTOCOLRESCONFIG =
(NRF_NFCT->AUTOCOLRESCONFIG & ~NFCT_AUTOCOLRESCONFIG_MODE_Msk) |
(NFCT_AUTOCOLRESCONFIG_MODE_Enabled << NFCT_AUTOCOLRESCONFIG_MODE_Pos);
}

369
ext/hal/nordic/nrfx/hal/nrf_nvmc.h
View file

@ -38,49 +38,42 @@
extern "C" {
#endif
/**
* @defgroup nrf_nvmc_hal NVMC HAL
* @defgroup nrf_nvmc_hal_deprecated NVMC HAL (deprecated)
* @{
* @ingroup nrf_nvmc
* @brief Hardware access layer for managing the Non-Volatile Memory Controller (NVMC) peripheral.
* @brief Hardware access layer (HAL) for managing the Non-Volatile Memory Controller (NVMC) peripheral.
*
* This driver allows writing to the non-volatile memory (NVM) regions
* of the chip. In order to write to NVM the controller must be powered
* of the chip. To write to NVM, the controller must be powered
* on and the relevant page must be erased.
*
*/
/**
* @brief Erase a page in flash. This is required before writing to any
* address in the page.
* @brief Erase a page in flash. This is required before writing to any address in the page.
*
* @param address Start address of the page.
*/
void nrf_nvmc_page_erase(uint32_t address);
/**
* @brief Write a single byte to flash.
*
* The function reads the word containing the byte, and then
* rewrites the entire word.
* The function reads the word containing the byte, and then rewrites the entire word.
*
* @param address Address to write to.
* @param value Value to write.
*/
void nrf_nvmc_write_byte(uint32_t address , uint8_t value);
/**
* @brief Write a 32-bit word to flash.
*
* @param address Address to write to.
* @param value Value to write.
*/
void nrf_nvmc_write_word(uint32_t address, uint32_t value);
/**
* @brief Write consecutive bytes to flash.
*
@ -90,7 +83,6 @@ void nrf_nvmc_write_word(uint32_t address, uint32_t value);
*/
void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_bytes);
/**
* @brief Write consecutive words to flash.
*
@ -100,6 +92,355 @@ void nrf_nvmc_write_bytes(uint32_t address, const uint8_t * src, uint32_t num_b
*/
void nrf_nvmc_write_words(uint32_t address, const uint32_t * src, uint32_t num_words);
/** @} */
/**
* @defgroup nrf_nvmc_hal NVMC HAL
* @{
* @ingroup nrf_nvmc
* @brief Hardware access layer (HAL) for managing the Non-Volatile Memory Controller (NVMC) peripheral.
*/
#if defined(NVMC_ICACHECNF_CACHEEN_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Symbol indicating whether Instruction Cache (ICache) is present. */
#define NRF_NVMC_ICACHE_PRESENT
#endif
#if defined(NVMC_ERASEPAGEPARTIALCFG_DURATION_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Symbol indicating whether the option of page partial erase is present. */
#define NRF_NVMC_PARTIAL_ERASE_PRESENT
#endif
/** @brief NVMC modes. */
typedef enum
{
NRF_NVMC_MODE_READONLY = NVMC_CONFIG_WEN_Ren, ///< NVMC in read-only mode.
NRF_NVMC_MODE_WRITE = NVMC_CONFIG_WEN_Wen, ///< NVMC in read and write mode.
NRF_NVMC_MODE_ERASE = NVMC_CONFIG_WEN_Een, ///< NVMC in read and erase mode.
#if defined(NVMC_CONFIG_WEN_PEen)
NRF_NVMC_MODE_PARTIAL_ERASE = NVMC_CONFIG_WEN_PEen ///< NVMC in read and partial erase mode.
#endif
} nrf_nvmc_mode_t;
#if defined(NVMC_CONFIGNS_WEN_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Non-secure NVMC modes. */
typedef enum
{
NRF_NVMC_NS_MODE_READONLY = NVMC_CONFIGNS_WEN_Ren, ///< Non-secure NVMC in read-only mode.
NRF_NVMC_NS_MODE_WRITE = NVMC_CONFIGNS_WEN_Wen, ///< Non-secure NVMC in read and write mode.
NRF_NVMC_NS_MODE_ERASE = NVMC_CONFIGNS_WEN_Een, ///< Non-secure NVMC in read and erase mode.
} nrf_nvmc_ns_mode_t;
#endif
#if defined(NRF_NVMC_ICACHE_PRESENT)
/** @brief NVMC ICache configuration. */
typedef enum
{
NRF_NVMC_ICACHE_DISABLE = NVMC_ICACHECNF_CACHEEN_Disabled, ///< Instruction Cache disabled.
NRF_NVMC_ICACHE_ENABLE = NVMC_ICACHECNF_CACHEEN_Enabled, ///< Instruction Cache enabled.
NRF_NVMC_ICACHE_ENABLE_WITH_PROFILING = NVMC_ICACHECNF_CACHEEN_Enabled | ///< Instruction Cache with cache profiling enabled.
NVMC_ICACHECNF_CACHEPROFEN_Msk
} nrf_nvmc_icache_config_t;
#endif // defined(NRF_NVMC_ICACHE_PRESENT)
/**
* @brief Function for checking if NVMC is ready to perform write or erase operation.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true NVMC can perform write or erase.
* @retval false NVMC is busy and cannot perform next operation yet.
*/
__STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg);
#if defined(NVMC_READYNEXT_READYNEXT_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for checking if NVMC is ready to accept the next write operation.
*
* NVM writing time can be reduced by using this function.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true NVMC can accept the next write. It will be buffered and will be taken
* into account as soon as the ongoing write operation is completed.
* @retval false NVMC is busy and cannot accept the next write yet.
*/
__STATIC_INLINE bool nrf_nvmc_write_ready_check(NRF_NVMC_Type const * p_reg);
#endif // defined(NVMC_READYNEXT_READYNEXT_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for setting the NVMC mode.
*
* Only activate erase and write modes when they are actively used.
* If Instruction Cache (ICache) is present, enabling write or erase will
* invalidate the cache and keep it invalidated.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mode Desired operating mode for NVMC.
*/
__STATIC_INLINE void nrf_nvmc_mode_set(NRF_NVMC_Type * p_reg,
nrf_nvmc_mode_t mode);
#if defined(NVMC_CONFIGNS_WEN_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for setting the NVMC mode for non-secure Flash page operations.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mode Desired operating mode for NVMC.
*/
__STATIC_INLINE void nrf_nvmc_nonsecure_mode_set(NRF_NVMC_Type * p_reg,
nrf_nvmc_ns_mode_t mode);
#endif
/**
* @brief Function for starting a single page erase in the Flash memory.
*
* The NVMC mode must be correctly configured with @ref nrf_nvmc_mode_set
* before starting the erase operation.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] page_addr Address of the first word of the page to erase.
*/
__STATIC_INLINE void nrf_nvmc_page_erase_start(NRF_NVMC_Type * p_reg,
uint32_t page_addr);
#if defined(NVMC_ERASEUICR_ERASEUICR_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for starting the user information configuration registers (UICR) erase.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_nvmc_uicr_erase_start(NRF_NVMC_Type * p_reg);
#endif
/**
* @brief Function for starting the erase of the whole NVM, including UICR.
*
* This function purges all user code.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_nvmc_erase_all_start(NRF_NVMC_Type * p_reg);
#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
/**
* @brief Function for configuring the page partial erase duration in milliseconds.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] duration_ms Page partial erase duration in milliseconds.
*/
__STATIC_INLINE void nrf_nvmc_partial_erase_duration_set(NRF_NVMC_Type * p_reg,
uint32_t duration_ms);
/**
* @brief Function for getting the current setting for the page partial erase duration.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Interval duration setting in milliseconds.
*/
__STATIC_INLINE uint32_t nrf_nvmc_partial_erase_duration_get(NRF_NVMC_Type const * p_reg);
/**
* @brief Function for starting a partial erase operation.
*
* It must be called successively until the page erase time is reached.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] page_addr Address of the first word of the page to erase.
*/
__STATIC_INLINE void nrf_nvmc_page_partial_erase_start(NRF_NVMC_Type * p_reg,
uint32_t page_addr);
#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
#if defined(NRF_NVMC_ICACHE_PRESENT)
/**
* @brief Function for applying the Instruction Cache (ICache) configuration.
*
* Enabling the cache can increase CPU performance and reduce power
* consumption by reducing the number of wait cycles and the number
* of flash accesses.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] config ICache configuration.
*/
__STATIC_INLINE void nrf_nvmc_icache_config_set(NRF_NVMC_Type * p_reg,
nrf_nvmc_icache_config_t config);
/**
* @brief Function for checking if ICache is enabled.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true ICache enabled.
* @retval false ICache disabled.
*/
__STATIC_INLINE bool nrf_nvmc_icache_enable_check(NRF_NVMC_Type const * p_reg);
/**
* @brief Function for checking if the ICache profiling option is enabled.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true ICache profiling enabled.
* @retval false ICache profiling disabled.
*/
__STATIC_INLINE bool nrf_nvmc_icache_profiling_enable_check(NRF_NVMC_Type const * p_reg);
/**
* @brief Function for getting the number of ICache hits.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Number of the ICache hits.
*/
__STATIC_INLINE uint32_t nrf_nvmc_icache_hit_get(NRF_NVMC_Type const * p_reg);
/**
* @brief Function for getting the number of ICache misses.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Number of the ICache misses.
*/
__STATIC_INLINE uint32_t nrf_nvmc_icache_miss_get(NRF_NVMC_Type const * p_reg);
/**
* @brief Function for resetting the ICache hit and miss counters.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_nvmc_icache_hit_miss_reset(NRF_NVMC_Type * p_reg);
#endif // defined(NRF_NVMC_ICACHE_PRESENT)
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE bool nrf_nvmc_ready_check(NRF_NVMC_Type const * p_reg)
{
return (bool)(p_reg->READY & NVMC_READY_READY_Msk);
}
#if defined(NVMC_READYNEXT_READYNEXT_Msk)
__STATIC_INLINE bool nrf_nvmc_write_ready_check(NRF_NVMC_Type const * p_reg)
{
return (bool)(p_reg->READYNEXT & NVMC_READYNEXT_READYNEXT_Msk);
}
#endif
__STATIC_INLINE void nrf_nvmc_mode_set(NRF_NVMC_Type * p_reg,
nrf_nvmc_mode_t mode)
{
p_reg->CONFIG = (uint32_t)mode;
}
#if defined(NVMC_CONFIGNS_WEN_Msk)
__STATIC_INLINE void nrf_nvmc_nonsecure_mode_set(NRF_NVMC_Type * p_reg,
nrf_nvmc_ns_mode_t mode)
{
p_reg->CONFIGNS = (uint32_t)mode;
}
#endif
__STATIC_INLINE void nrf_nvmc_page_erase_start(NRF_NVMC_Type * p_reg,
uint32_t page_addr)
{
#if defined(NRF51)
/* On nRF51, the code area can be divided into two regions: CR0 and CR1.
* The length of CR0 is specified in the CLENR0 register of UICR.
* If CLENR0 contains the 0xFFFFFFFF value, CR0 is not set.
* Moreover, the page from CR0 can be written or erased only from code
* running in CR0.*/
uint32_t cr0_len = NRF_UICR->CLENR0 == 0xFFFFFFFF ? 0 : NRF_UICR->CLENR0;
if (page_addr < cr0_len)
{
p_reg->ERASEPCR0 = page_addr;
}
else
{
p_reg->ERASEPCR1 = page_addr;
}
#elif defined(NRF52_SERIES)
p_reg->ERASEPAGE = page_addr;
#elif defined(NRF9160_XXAA)
*(volatile uint32_t *)page_addr = 0xFFFFFFFF;
(void)p_reg;
#else
#error "Unknown device."
#endif
}
#if defined(NVMC_ERASEUICR_ERASEUICR_Msk)
__STATIC_INLINE void nrf_nvmc_uicr_erase_start(NRF_NVMC_Type * p_reg)
{
p_reg->ERASEUICR = 1;
}
#endif
__STATIC_INLINE void nrf_nvmc_erase_all_start(NRF_NVMC_Type * p_reg)
{
p_reg->ERASEALL = 1;
}
#if defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
__STATIC_INLINE void nrf_nvmc_partial_erase_duration_set(NRF_NVMC_Type * p_reg,
uint32_t duration_ms)
{
p_reg->ERASEPAGEPARTIALCFG = duration_ms;
}
__STATIC_INLINE uint32_t nrf_nvmc_partial_erase_duration_get(NRF_NVMC_Type const * p_reg)
{
return p_reg->ERASEPAGEPARTIALCFG;
}
__STATIC_INLINE void nrf_nvmc_page_partial_erase_start(NRF_NVMC_Type * p_reg,
uint32_t page_addr)
{
#if defined(NVMC_ERASEPAGEPARTIAL_ERASEPAGEPARTIAL_Msk)
p_reg->ERASEPAGEPARTIAL = page_addr;
#elif defined(NRF9160_XXAA)
nrf_nvmc_page_erase_start(p_reg, page_addr);
#else
#error "Unknown device."
#endif
}
#endif // defined(NRF_NVMC_PARTIAL_ERASE_PRESENT)
#if defined(NRF_NVMC_ICACHE_PRESENT)
__STATIC_INLINE void nrf_nvmc_icache_config_set(NRF_NVMC_Type * p_reg,
nrf_nvmc_icache_config_t config)
{
p_reg->ICACHECNF = (uint32_t)config;
}
__STATIC_INLINE bool nrf_nvmc_icache_enable_check(NRF_NVMC_Type const * p_reg)
{
return (bool)(p_reg->ICACHECNF & NVMC_ICACHECNF_CACHEEN_Msk);
}
__STATIC_INLINE bool nrf_nvmc_icache_profiling_enable_check(NRF_NVMC_Type const * p_reg)
{
return (bool)(p_reg->ICACHECNF & NVMC_ICACHECNF_CACHEPROFEN_Msk);
}
__STATIC_INLINE uint32_t nrf_nvmc_icache_hit_get(NRF_NVMC_Type const * p_reg)
{
return p_reg->IHIT;
}
__STATIC_INLINE uint32_t nrf_nvmc_icache_miss_get(NRF_NVMC_Type const * p_reg)
{
return p_reg->IMISS;
}
__STATIC_INLINE void nrf_nvmc_icache_hit_miss_reset(NRF_NVMC_Type * p_reg)
{
p_reg->IHIT = 0;
p_reg->IMISS = 0;
}
#endif // defined(NRF_NVMC_ICACHE_PRESENT)
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */

157
ext/hal/nordic/nrfx/hal/nrf_pdm.h
View file

@ -44,68 +44,56 @@ extern "C" {
* @brief Hardware access layer for managing the Pulse Density Modulation (PDM) peripheral.
*/
/** @brief Minimum value of PDM gain. */
#define NRF_PDM_GAIN_MINIMUM 0x00
/** @brief Default value of PDM gain. */
#define NRF_PDM_GAIN_DEFAULT 0x28
/** @brief Maximum value of PDM gain. */
#define NRF_PDM_GAIN_MAXIMUM 0x50
/** @brief PDM gain type. */
typedef uint8_t nrf_pdm_gain_t;
/**
* @brief PDM tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief PDM tasks. */
typedef enum
{
NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer.
NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer.
NRF_PDM_TASK_START = offsetof(NRF_PDM_Type, TASKS_START), ///< Starts continuous PDM transfer.
NRF_PDM_TASK_STOP = offsetof(NRF_PDM_Type, TASKS_STOP) ///< Stops PDM transfer.
} nrf_pdm_task_t;
/**
* @brief PDM events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief PDM events. */
typedef enum
{
NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer has started.
NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer has finished.
NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM.
NRF_PDM_EVENT_STARTED = offsetof(NRF_PDM_Type, EVENTS_STARTED), ///< PDM transfer is started.
NRF_PDM_EVENT_STOPPED = offsetof(NRF_PDM_Type, EVENTS_STOPPED), ///< PDM transfer is finished.
NRF_PDM_EVENT_END = offsetof(NRF_PDM_Type, EVENTS_END) ///< The PDM has written the last sample specified by SAMPLE.MAXCNT (or the last sample after a STOP task has been received) to Data RAM.
} nrf_pdm_event_t;
/**
* @brief PDM interrupt masks.
*/
/** @brief PDM interrupt masks. */
typedef enum
{
NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event.
NRF_PDM_INT_STARTED = PDM_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
NRF_PDM_INT_STOPPED = PDM_INTENSET_STOPPED_Msk, ///< Interrupt on EVENTS_STOPPED event.
NRF_PDM_INT_END = PDM_INTENSET_END_Msk ///< Interrupt on EVENTS_END event.
} nrf_pdm_int_mask_t;
/**
* @brief PDM clock frequency.
*/
/** @brief PDM clock frequency. */
typedef enum
{
NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz.
NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz.
NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz.
NRF_PDM_FREQ_1000K = PDM_PDMCLKCTRL_FREQ_1000K, ///< PDM_CLK = 1.000 MHz.
NRF_PDM_FREQ_1032K = PDM_PDMCLKCTRL_FREQ_Default, ///< PDM_CLK = 1.032 MHz.
NRF_PDM_FREQ_1067K = PDM_PDMCLKCTRL_FREQ_1067K ///< PDM_CLK = 1.067 MHz.
} nrf_pdm_freq_t;
/**
* @brief PDM operation mode.
*/
/** @brief PDM operation mode. */
typedef enum
{
NRF_PDM_MODE_STEREO = PDM_MODE_OPERATION_Stereo, ///< Sample and store one pair (Left + Right) of 16-bit samples per RAM word.
NRF_PDM_MODE_MONO = PDM_MODE_OPERATION_Mono ///< Sample and store two successive Left samples (16 bit each) per RAM word.
} nrf_pdm_mode_t;
/**
* @brief PDM sampling mode.
*/
/** @brief PDM sampling mode. */
typedef enum
{
NRF_PDM_EDGE_LEFTFALLING = PDM_MODE_EDGE_LeftFalling, ///< Left (or mono) is sampled on falling edge of PDM_CLK.
@ -116,67 +104,68 @@ typedef enum
/**
* @brief Function for triggering a PDM task.
*
* @param[in] pdm_task PDM task.
* @param[in] task PDM task.
*/
__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task);
__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t task);
/**
* @brief Function for getting the address of a PDM task register.
*
* @param[in] pdm_task PDM task.
* @param[in] task PDM task.
*
* @return Address of the specified PDM task.
*/
__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task);
__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t task);
/**
* @brief Function for getting the state of a PDM event.
* @brief Function for retrieving the state of the PDM event.
*
* @param[in] pdm_event PDM event.
* @param[in] event Event to be checked.
*
* @return State of the specified PDM event.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event);
__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t event);
/**
* @brief Function for clearing a PDM event.
*
* @param[in] pdm_event PDM event.
* @param[in] event PDM event.
*/
__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event);
__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t event);
/**
* @brief Function for getting the address of a PDM event register.
*
* @param[in] pdm_event PDM event.
* @param[in] event PDM event.
*
* @return Address of the specified PDM event.
*/
__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event);
__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t event);
/**
* @brief Function for enabling PDM interrupts.
*
* @param[in] pdm_int_mask Interrupts to enable.
* @param[in] int_mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask);
__STATIC_INLINE void nrf_pdm_int_enable(uint32_t int_mask);
/**
* @brief Function for retrieving the state of PDM interrupts.
*
* @param[in] pdm_int_mask Interrupts to check.
* @param[in] int_mask Mask of interrupts to be checked.
*
* @retval true If all specified interrupts are enabled.
* @retval false If at least one of the given interrupts is not enabled.
* @retval true All specified interrupts are enabled.
* @retval false At least one of the given interrupts is not enabled.
*/
__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask);
__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t int_mask);
/**
* @brief Function for disabling interrupts.
*
* @param pdm_int_mask Interrupts to disable.
* @param[in] int_mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask);
__STATIC_INLINE void nrf_pdm_int_disable(uint32_t int_mask);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -193,7 +182,7 @@ __STATIC_INLINE void nrf_pdm_subscribe_set(nrf_pdm_task_t task,
* @brief Function for clearing the subscribe configuration for a given
* PDM task.
*
* @param[in] task Task for which to clear the configuration.
* @param[in] task Task for which to clear the configuration.
*/
__STATIC_INLINE void nrf_pdm_subscribe_clear(nrf_pdm_task_t task);
@ -223,16 +212,14 @@ __STATIC_INLINE void nrf_pdm_publish_clear(nrf_pdm_event_t event);
*/
__STATIC_INLINE void nrf_pdm_enable(void);
/**
* @brief Function for disabling the PDM peripheral.
*/
/** @brief Function for disabling the PDM peripheral. */
__STATIC_INLINE void nrf_pdm_disable(void);
/**
* @brief Function for checking if the PDM peripheral is enabled.
*
* @retval true If the PDM peripheral is enabled.
* @retval false If the PDM peripheral is not enabled.
* @retval true The PDM peripheral is enabled.
* @retval false The PDM peripheral is not enabled.
*/
__STATIC_INLINE bool nrf_pdm_enable_check(void);
@ -261,6 +248,8 @@ __STATIC_INLINE void nrf_pdm_clock_set(nrf_pdm_freq_t pdm_freq);
/**
* @brief Function for getting the PDM clock frequency.
*
* @return PDM clock frequency.
*/
__STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void);
@ -272,9 +261,7 @@ __STATIC_INLINE nrf_pdm_freq_t nrf_pdm_clock_get(void);
*/
__STATIC_INLINE void nrf_pdm_psel_connect(uint32_t psel_clk, uint32_t psel_din);
/**
* @brief Function for disconnecting the PDM pins.
*/
/** @brief Function for disconnecting the PDM pins. */
__STATIC_INLINE void nrf_pdm_psel_disconnect(void);
/**
@ -296,12 +283,12 @@ __STATIC_INLINE void nrf_pdm_gain_get(nrf_pdm_gain_t * p_gain_l, nrf_pdm_gain_t
/**
* @brief Function for setting the PDM sample buffer.
*
* @param[in] p_buffer Pointer to the RAM address where samples should be written with EasyDMA.
* @param[in] num Number of samples to allocate memory for in EasyDMA mode.
*
* The amount of allocated RAM depends on the operation mode.
* - For stereo mode: N 32-bit words.
* - For mono mode: Ceil(N/2) 32-bit words.
*
* @param[in] p_buffer Pointer to the RAM address where samples are to be written with EasyDMA.
* @param[in] num Number of samples to allocate memory for in EasyDMA mode.
*/
__STATIC_INLINE void nrf_pdm_buffer_set(uint32_t * p_buffer, uint32_t num);
@ -313,48 +300,48 @@ __STATIC_INLINE void nrf_pdm_buffer_set(uint32_t * p_buffer, uint32_t num);
__STATIC_INLINE uint32_t * nrf_pdm_buffer_get(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t pdm_task)
__STATIC_INLINE void nrf_pdm_task_trigger(nrf_pdm_task_t task)
{
*((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_task)) = 0x1UL;
*((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t pdm_task)
__STATIC_INLINE uint32_t nrf_pdm_task_address_get(nrf_pdm_task_t task)
{
return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)pdm_task);
return (uint32_t)((uint8_t *)NRF_PDM + (uint32_t)task);
}
__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t pdm_event)
__STATIC_INLINE bool nrf_pdm_event_check(nrf_pdm_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event);
return (bool)*(volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event);
}
__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t pdm_event)
__STATIC_INLINE void nrf_pdm_event_clear(nrf_pdm_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t pdm_event)
__STATIC_INLINE volatile uint32_t * nrf_pdm_event_address_get(nrf_pdm_event_t event)
{
return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)pdm_event);
return (volatile uint32_t *)((uint8_t *)NRF_PDM + (uint32_t)event);
}
__STATIC_INLINE void nrf_pdm_int_enable(uint32_t pdm_int_mask)
__STATIC_INLINE void nrf_pdm_int_enable(uint32_t int_mask)
{
NRF_PDM->INTENSET = pdm_int_mask;
NRF_PDM->INTENSET = int_mask;
}
__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t pdm_int_mask)
__STATIC_INLINE bool nrf_pdm_int_enable_check(uint32_t int_mask)
{
return (bool)(NRF_PDM->INTENSET & pdm_int_mask);
return (bool)(NRF_PDM->INTENSET & int_mask);
}
__STATIC_INLINE void nrf_pdm_int_disable(uint32_t pdm_int_mask)
__STATIC_INLINE void nrf_pdm_int_disable(uint32_t int_mask)
{
NRF_PDM->INTENCLR = pdm_int_mask;
NRF_PDM->INTENCLR = int_mask;
}
#if defined(DPPI_PRESENT)

361
ext/hal/nordic/nrfx/hal/nrf_power.h
View file

@ -46,78 +46,78 @@ extern "C" {
*/
#if defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Auxiliary definition to mark the fact that sleep events are present */
/** @brief Symbol indicating whether sleep events are present. */
#define NRF_POWER_HAS_SLEEPEVT 1
#else
#define NRF_POWER_HAS_SLEEPEVT 0
#endif // defined(POWER_INTENSET_SLEEPENTER_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Auxiliary definition to mark the fact that power module manages USB regulator */
/** @brief Symbol indicating whether the POWER peripheral controls the USB regulator. */
#define NRF_POWER_HAS_USBREG 1
#else
#define NRF_POWER_HAS_USBREG 0
#endif // defined(POWER_USBREGSTATUS_VBUSDETECT_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Auxiliary definition to mark the fact that VDDH is present */
/** @brief Symbol indicating whether VDDH is present. */
#define NRF_POWER_HAS_VDDH 1
#else
#define NRF_POWER_HAS_VDDH 0
#endif // defined(POWER_POFCON_THRESHOLDVDDH_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_DCDCEN_DCDCEN_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Auxiliary definition to mark the fact that DCDCEN is present */
/** @brief Symbol indicating whether DCDCEN is present. */
#define NRF_POWER_HAS_DCDCEN 1
#else
#define NRF_POWER_HAS_DCDCEN 0
#endif
#if defined(POWER_POFCON_THRESHOLD_Msk) || defined(__NRFX_DOXYGEN__)
/** @brief Auxiliary definition to mark the fact that POFCON is present */
/** @brief Symbol indicating whether POFCON is present. */
#define NRF_POWER_HAS_POFCON 1
#else
#define NRF_POWER_HAS_POFCON 0
#endif
/** @brief POWER tasks. */
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
typedef enum
{
NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode */
NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low power mode (variable latency) */
} nrf_power_task_t; /*lint -restore */
NRF_POWER_TASK_CONSTLAT = offsetof(NRF_POWER_Type, TASKS_CONSTLAT), /**< Enable constant latency mode. */
NRF_POWER_TASK_LOWPWR = offsetof(NRF_POWER_Type, TASKS_LOWPWR ), /**< Enable low-power mode (variable latency). */
} nrf_power_task_t;
/** @brief POWER events. */
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
typedef enum
{
#if NRF_POWER_HAS_POFCON
NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning */
NRF_POWER_EVENT_POFWARN = offsetof(NRF_POWER_Type, EVENTS_POFWARN ), /**< Power failure warning. */
#endif
#if NRF_POWER_HAS_SLEEPEVT
NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep */
NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep */
NRF_POWER_EVENT_SLEEPENTER = offsetof(NRF_POWER_Type, EVENTS_SLEEPENTER ), /**< CPU entered WFI/WFE sleep. */
NRF_POWER_EVENT_SLEEPEXIT = offsetof(NRF_POWER_Type, EVENTS_SLEEPEXIT ), /**< CPU exited WFI/WFE sleep. */
#endif
#if NRF_POWER_HAS_USBREG
NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS */
NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS */
NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3&nbsp;V supply ready */
NRF_POWER_EVENT_USBDETECTED = offsetof(NRF_POWER_Type, EVENTS_USBDETECTED), /**< Voltage supply detected on VBUS. */
NRF_POWER_EVENT_USBREMOVED = offsetof(NRF_POWER_Type, EVENTS_USBREMOVED ), /**< Voltage supply removed from VBUS. */
NRF_POWER_EVENT_USBPWRRDY = offsetof(NRF_POWER_Type, EVENTS_USBPWRRDY ), /**< USB 3.3&nbsp;V supply ready. */
#endif
} nrf_power_event_t; /*lint -restore */
} nrf_power_event_t;
/** @brief POWER interrupts. */
typedef enum
{
#if NRF_POWER_HAS_POFCON
NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event */
NRF_POWER_INT_POFWARN_MASK = POWER_INTENSET_POFWARN_Msk , /**< Write '1' to Enable interrupt for POFWARN event. */
#endif
#if NRF_POWER_HAS_SLEEPEVT
NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event */
NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event */
NRF_POWER_INT_SLEEPENTER_MASK = POWER_INTENSET_SLEEPENTER_Msk , /**< Write '1' to Enable interrupt for SLEEPENTER event. */
NRF_POWER_INT_SLEEPEXIT_MASK = POWER_INTENSET_SLEEPEXIT_Msk , /**< Write '1' to Enable interrupt for SLEEPEXIT event. */
#endif
#if NRF_POWER_HAS_USBREG
NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event */
NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event */
NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event */
NRF_POWER_INT_USBDETECTED_MASK = POWER_INTENSET_USBDETECTED_Msk, /**< Write '1' to Enable interrupt for USBDETECTED event. */
NRF_POWER_INT_USBREMOVED_MASK = POWER_INTENSET_USBREMOVED_Msk , /**< Write '1' to Enable interrupt for USBREMOVED event. */
NRF_POWER_INT_USBPWRRDY_MASK = POWER_INTENSET_USBPWRRDY_Msk , /**< Write '1' to Enable interrupt for USBPWRRDY event. */
#endif
} nrf_power_int_mask_t;
@ -149,22 +149,21 @@ typedef enum
*/
typedef enum
{
NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed */
NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3&nbsp;V supply ready */
NRF_POWER_USBREGSTATUS_VBUSDETECT_MASK = POWER_USBREGSTATUS_VBUSDETECT_Msk, /**< USB detected or removed. */
NRF_POWER_USBREGSTATUS_OUTPUTRDY_MASK = POWER_USBREGSTATUS_OUTPUTRDY_Msk /**< USB 3.3&nbsp;V supply ready. */
} nrf_power_usbregstatus_mask_t;
#endif // NRF_POWER_HAS_USBREG
#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief RAM blocks numbers
* @brief Numbers of RAM blocks
*
* @sa nrf_power_ramblock_mask_t
* @note
* Ram blocks has to been used in nrf51.
* In new CPU ram is divided into segments and this functionality is depreciated.
* For the newer MCU see the PS for mapping between internal RAM and RAM blocks,
* because this mapping is not 1:1, and functions related to old style blocks
* should not be used.
* RAM blocks must be used in nRF51.
* In newer SoCs, RAM is divided into segments and this functionality is not supported.
* See the PS for mapping between the internal RAM and RAM blocks, because this
* mapping is not 1:1, and functions related to old style blocks must not be used.
*/
typedef enum
{
@ -175,7 +174,7 @@ typedef enum
} nrf_power_ramblock_t;
/**
* @brief RAM blocks masks
* @brief Masks of RAM blocks.
*
* @sa nrf_power_ramblock_t
*/
@ -195,15 +194,15 @@ typedef enum
*/
typedef enum
{
NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */
NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */
NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */
NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */
} nrf_power_onoffram_t;
NRF_POWER_ONRAM0, /**< Keep RAM block 0 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched OFF. */
NRF_POWER_ONRAM1, /**< Keep RAM block 1 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched OFF. */
NRF_POWER_ONRAM2, /**< Keep RAM block 2 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched OFF. */
NRF_POWER_ONRAM3, /**< Keep RAM block 3 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched OFF. */
}nrf_power_onoffram_t;
/**
* @brief RAM power state bit masks
@ -212,33 +211,33 @@ typedef enum
*/
typedef enum
{
NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 on or off in system ON Mode */
NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched off */
NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 on or off in system ON Mode */
NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched off */
NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 on or off in system ON Mode */
NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched off */
NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 on or off in system ON Mode */
NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched off */
} nrf_power_onoffram_mask_t;
NRF_POWER_ONRAM0_MASK = 1U << NRF_POWER_ONRAM0, /**< Keep RAM block 0 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM0_MASK = 1U << NRF_POWER_OFFRAM0, /**< Keep retention on RAM block 0 when RAM block is switched OFF. */
NRF_POWER_ONRAM1_MASK = 1U << NRF_POWER_ONRAM1, /**< Keep RAM block 1 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM1_MASK = 1U << NRF_POWER_OFFRAM1, /**< Keep retention on RAM block 1 when RAM block is switched OFF. */
NRF_POWER_ONRAM2_MASK = 1U << NRF_POWER_ONRAM2, /**< Keep RAM block 2 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM2_MASK = 1U << NRF_POWER_OFFRAM2, /**< Keep retention on RAM block 2 when RAM block is switched OFF. */
NRF_POWER_ONRAM3_MASK = 1U << NRF_POWER_ONRAM3, /**< Keep RAM block 3 ON or OFF in System ON mode. */
NRF_POWER_OFFRAM3_MASK = 1U << NRF_POWER_OFFRAM3, /**< Keep retention on RAM block 3 when RAM block is switched OFF. */
}nrf_power_onoffram_mask_t;
#if NRF_POWER_HAS_POFCON
/** @brief Power failure comparator thresholds. */
typedef enum
{
NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1&nbsp;V */
NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3&nbsp;V */
NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5&nbsp;V */
NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7&nbsp;V */
NRF_POWER_POFTHR_V21 = POWER_POFCON_THRESHOLD_V21, /**< Set threshold to 2.1&nbsp;V. */
NRF_POWER_POFTHR_V23 = POWER_POFCON_THRESHOLD_V23, /**< Set threshold to 2.3&nbsp;V. */
NRF_POWER_POFTHR_V25 = POWER_POFCON_THRESHOLD_V25, /**< Set threshold to 2.5&nbsp;V. */
NRF_POWER_POFTHR_V27 = POWER_POFCON_THRESHOLD_V27, /**< Set threshold to 2.7&nbsp;V. */
#if defined(POWER_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__)
NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7&nbsp;V */
NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8&nbsp;V */
NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9&nbsp;V */
NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0&nbsp;V */
NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2&nbsp;V */
NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4&nbsp;V */
NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6&nbsp;V */
NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8&nbsp;V */
NRF_POWER_POFTHR_V17 = POWER_POFCON_THRESHOLD_V17, /**< Set threshold to 1.7&nbsp;V. */
NRF_POWER_POFTHR_V18 = POWER_POFCON_THRESHOLD_V18, /**< Set threshold to 1.8&nbsp;V. */
NRF_POWER_POFTHR_V19 = POWER_POFCON_THRESHOLD_V19, /**< Set threshold to 1.9&nbsp;V. */
NRF_POWER_POFTHR_V20 = POWER_POFCON_THRESHOLD_V20, /**< Set threshold to 2.0&nbsp;V. */
NRF_POWER_POFTHR_V22 = POWER_POFCON_THRESHOLD_V22, /**< Set threshold to 2.2&nbsp;V. */
NRF_POWER_POFTHR_V24 = POWER_POFCON_THRESHOLD_V24, /**< Set threshold to 2.4&nbsp;V. */
NRF_POWER_POFTHR_V26 = POWER_POFCON_THRESHOLD_V26, /**< Set threshold to 2.6&nbsp;V. */
NRF_POWER_POFTHR_V28 = POWER_POFCON_THRESHOLD_V28, /**< Set threshold to 2.8&nbsp;V. */
#endif // defined(POWER_POFCON_THRESHOLD_V17) || defined(__NRFX_DOXYGEN__)
} nrf_power_pof_thr_t;
#endif // NRF_POWER_HAS_POFCON
@ -247,22 +246,22 @@ typedef enum
/** @brief Power failure comparator thresholds for VDDH. */
typedef enum
{
NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7&nbsp;V */
NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8&nbsp;V */
NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9&nbsp;V */
NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0&nbsp;V */
NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1&nbsp;V */
NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2&nbsp;V */
NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3&nbsp;V */
NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4&nbsp;V */
NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5&nbsp;V */
NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6&nbsp;V */
NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7&nbsp;V */
NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8&nbsp;V */
NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9&nbsp;V */
NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0&nbsp;V */
NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1&nbsp;V */
NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2&nbsp;V */
NRF_POWER_POFTHRVDDH_V27 = POWER_POFCON_THRESHOLDVDDH_V27, /**< Set threshold to 2.7&nbsp;V. */
NRF_POWER_POFTHRVDDH_V28 = POWER_POFCON_THRESHOLDVDDH_V28, /**< Set threshold to 2.8&nbsp;V. */
NRF_POWER_POFTHRVDDH_V29 = POWER_POFCON_THRESHOLDVDDH_V29, /**< Set threshold to 2.9&nbsp;V. */
NRF_POWER_POFTHRVDDH_V30 = POWER_POFCON_THRESHOLDVDDH_V30, /**< Set threshold to 3.0&nbsp;V. */
NRF_POWER_POFTHRVDDH_V31 = POWER_POFCON_THRESHOLDVDDH_V31, /**< Set threshold to 3.1&nbsp;V. */
NRF_POWER_POFTHRVDDH_V32 = POWER_POFCON_THRESHOLDVDDH_V32, /**< Set threshold to 3.2&nbsp;V. */
NRF_POWER_POFTHRVDDH_V33 = POWER_POFCON_THRESHOLDVDDH_V33, /**< Set threshold to 3.3&nbsp;V. */
NRF_POWER_POFTHRVDDH_V34 = POWER_POFCON_THRESHOLDVDDH_V34, /**< Set threshold to 3.4&nbsp;V. */
NRF_POWER_POFTHRVDDH_V35 = POWER_POFCON_THRESHOLDVDDH_V35, /**< Set threshold to 3.5&nbsp;V. */
NRF_POWER_POFTHRVDDH_V36 = POWER_POFCON_THRESHOLDVDDH_V36, /**< Set threshold to 3.6&nbsp;V. */
NRF_POWER_POFTHRVDDH_V37 = POWER_POFCON_THRESHOLDVDDH_V37, /**< Set threshold to 3.7&nbsp;V. */
NRF_POWER_POFTHRVDDH_V38 = POWER_POFCON_THRESHOLDVDDH_V38, /**< Set threshold to 3.8&nbsp;V. */
NRF_POWER_POFTHRVDDH_V39 = POWER_POFCON_THRESHOLDVDDH_V39, /**< Set threshold to 3.9&nbsp;V. */
NRF_POWER_POFTHRVDDH_V40 = POWER_POFCON_THRESHOLDVDDH_V40, /**< Set threshold to 4.0&nbsp;V. */
NRF_POWER_POFTHRVDDH_V41 = POWER_POFCON_THRESHOLDVDDH_V41, /**< Set threshold to 4.1&nbsp;V. */
NRF_POWER_POFTHRVDDH_V42 = POWER_POFCON_THRESHOLDVDDH_V42, /**< Set threshold to 4.2&nbsp;V. */
} nrf_power_pof_thrvddh_t;
/** @brief Main regulator status. */
@ -284,39 +283,39 @@ typedef enum
{
/** Keep RAM section S0 ON in System ON mode */
NRF_POWER_RAMPOWER_S0POWER = POWER_RAM_POWER_S0POWER_Pos,
NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode */
NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode */
NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode */
NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode */
NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode */
NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode */
NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode */
NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode */
NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode */
NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode */
NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode */
NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode */
NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode */
NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode */
NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode */
NRF_POWER_RAMPOWER_S1POWER, /**< Keep RAM section S1 ON in System ON mode. */
NRF_POWER_RAMPOWER_S2POWER, /**< Keep RAM section S2 ON in System ON mode. */
NRF_POWER_RAMPOWER_S3POWER, /**< Keep RAM section S3 ON in System ON mode. */
NRF_POWER_RAMPOWER_S4POWER, /**< Keep RAM section S4 ON in System ON mode. */
NRF_POWER_RAMPOWER_S5POWER, /**< Keep RAM section S5 ON in System ON mode. */
NRF_POWER_RAMPOWER_S6POWER, /**< Keep RAM section S6 ON in System ON mode. */
NRF_POWER_RAMPOWER_S7POWER, /**< Keep RAM section S7 ON in System ON mode. */
NRF_POWER_RAMPOWER_S8POWER, /**< Keep RAM section S8 ON in System ON mode. */
NRF_POWER_RAMPOWER_S9POWER, /**< Keep RAM section S9 ON in System ON mode. */
NRF_POWER_RAMPOWER_S10POWER, /**< Keep RAM section S10 ON in System ON mode. */
NRF_POWER_RAMPOWER_S11POWER, /**< Keep RAM section S11 ON in System ON mode. */
NRF_POWER_RAMPOWER_S12POWER, /**< Keep RAM section S12 ON in System ON mode. */
NRF_POWER_RAMPOWER_S13POWER, /**< Keep RAM section S13 ON in System ON mode. */
NRF_POWER_RAMPOWER_S14POWER, /**< Keep RAM section S14 ON in System ON mode. */
NRF_POWER_RAMPOWER_S15POWER, /**< Keep RAM section S15 ON in System ON mode. */
/** Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S0RETENTION = POWER_RAM_POWER_S0RETENTION_Pos,
NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF */
NRF_POWER_RAMPOWER_S1RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S2RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S3RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S4RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S5RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S6RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S7RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S8RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S9RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S10RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S11RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S12RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S13RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S14RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
NRF_POWER_RAMPOWER_S15RETENTION, /**< Keep section retention in OFF mode when section is OFF. */
} nrf_power_rampower_t;
/**
@ -384,12 +383,12 @@ __STATIC_INLINE uint32_t nrf_power_task_address_get(nrf_power_task_t task);
__STATIC_INLINE void nrf_power_event_clear(nrf_power_event_t event);
/**
* @brief Function for returning the state of a specific event.
* @brief Function for retrieving the state of the POWER event.
*
* @param[in] event Event.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_power_event_check(nrf_power_event_t event);
@ -400,8 +399,8 @@ __STATIC_INLINE bool nrf_power_event_check(nrf_power_event_t event);
*
* @param[in] event Event.
*
* @retval true If the event was set.
* @retval false If the event was not set.
* @retval true The event was set.
* @retval false The event was not set.
*/
__STATIC_INLINE bool nrf_power_event_get_and_clear(nrf_power_event_t event);
@ -426,8 +425,8 @@ __STATIC_INLINE void nrf_power_int_enable(uint32_t int_mask);
*
* @param[in] int_mask Interrupts mask.
*
* @retval true If any of selected interrupts is enabled.
* @retval false If none of selected interrupts is enabled.
* @retval true Any of selected interrupts is enabled.
* @retval false None of selected interrupts is enabled.
*/
__STATIC_INLINE bool nrf_power_int_enable_check(uint32_t int_mask);
@ -484,13 +483,13 @@ __STATIC_INLINE void nrf_power_publish_clear(nrf_power_event_t event);
#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
* @brief Get reset reason mask
* @brief Function for getting the reset reason bitmask.
*
* Function returns the reset reason.
* This function returns the reset reason bitmask.
* Unless cleared, the RESETREAS register is cumulative.
* A field is cleared by writing '1' to it (see @ref nrf_power_resetreas_clear).
* If none of the reset sources are flagged,
* this indicates that the chip was reset from the on-chip reset generator,
* If none of the reset sources is flagged,
* the chip was reset from the on-chip reset generator,
* which indicates a power-on-reset or a brown out reset.
*
* @return The mask of reset reasons constructed with @ref nrf_power_resetreas_mask_t.
@ -498,9 +497,9 @@ __STATIC_INLINE void nrf_power_publish_clear(nrf_power_event_t event);
__STATIC_INLINE uint32_t nrf_power_resetreas_get(void);
/**
* @brief Clear selected reset reason field
* @brief Function for clearing the selected reset reason field.
*
* Function clears selected reset reason fields.
* This function clears the selected reset reason field.
*
* @param[in] mask The mask constructed from @ref nrf_power_resetreas_mask_t enumerator values.
* @sa nrf_power_resetreas_get
@ -511,28 +510,26 @@ __STATIC_INLINE void nrf_power_resetreas_clear(uint32_t mask);
/**
* @brief Function for getting power status of the LTE Modem domain.
*
* @retval true If the LTE Modem domain is powered on.
* @retval false If the LTE Modem domain is powered off.
* @retval true The LTE Modem domain is powered on.
* @retval false The LTE Modem domain is powered off.
*/
__STATIC_INLINE bool nrf_power_powerstatus_get(void);
#endif
#if defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Get RAMSTATUS register
* @brief Function for getting the RAMSTATUS register.
*
* Returns the masks of RAM blocks that are powered ON.
*
* @return Value with bits sets according to masks in @ref nrf_power_ramblock_mask_t.
* @return Value with bits set according to the masks in @ref nrf_power_ramblock_mask_t.
*/
__STATIC_INLINE uint32_t nrf_power_ramstatus_get(void);
#endif // defined(POWER_RAMSTATUS_RAMBLOCK0_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(POWER_SYSTEMOFF_SYSTEMOFF_Enter)
/**
* @brief Go to system OFF
* @brief Function for going into System OFF mode.
*
* This function puts the CPU into system off mode.
* This function puts the CPU in System OFF mode.
* The only way to wake up the CPU is by reset.
*
* @note This function never returns.
@ -542,80 +539,78 @@ __STATIC_INLINE void nrf_power_system_off(void);
#if NRF_POWER_HAS_POFCON
/**
* @brief Set power failure comparator configuration
*
* Sets power failure comparator threshold and enable/disable flag.
*
* @param[in] enabled Set to true if power failure comparator should be enabled.
* @param[in] thr Set the voltage threshold value.
* @brief Function for setting the power failure comparator configuration.
*
* This function sets the power failure comparator threshold and enables or disables flag.
* @note
* If VDDH settings is present in the device, this function would
* clear it settings (set to the lowest voltage).
* If VDDH settings are present in the device, this function will
* clear its settings (set to the lowest voltage).
* Use @ref nrf_power_pofcon_vddh_set function to set new value.
*
* @param enabled Sets to true if power failure comparator is to be enabled.
* @param thr Sets the voltage threshold value.
*
*/
__STATIC_INLINE void nrf_power_pofcon_set(bool enabled, nrf_power_pof_thr_t thr);
/**
* @brief Get power failure comparator configuration
* @brief Function for getting the power failure comparator configuration.
*
* Get power failure comparator threshold and enable bit.
*
* @param[out] p_enabled Function would set this boolean variable to true
* @param[out] p_enabled Function sets this boolean variable to true
* if power failure comparator is enabled.
* The pointer can be NULL if we do not need this information.
*
* @return Threshold setting for power failure comparator
* @return Threshold setting for power failure comparator.
*/
__STATIC_INLINE nrf_power_pof_thr_t nrf_power_pofcon_get(bool * p_enabled);
#endif // NRF_POWER_HAS_POFCON
#if NRF_POWER_HAS_VDDH
/**
* @brief Set VDDH power failure comparator threshold
* @brief Function for setting the VDDH power failure comparator threshold.
*
* @param[in] thr Threshold to be set
* @param thr Threshold to be set.
*/
__STATIC_INLINE void nrf_power_pofcon_vddh_set(nrf_power_pof_thrvddh_t thr);
/**
* @brief Get VDDH power failure comparator threshold
* @brief Function for getting the VDDH power failure comparator threshold.
*
* @return VDDH threshold currently configured
* @return VDDH threshold currently configured.
*/
__STATIC_INLINE nrf_power_pof_thrvddh_t nrf_power_pofcon_vddh_get(void);
#endif // NRF_POWER_HAS_VDDH
/**
* @brief Set general purpose retention register
* @brief Function for setting the general purpose retention register.
*
* @param[in] val Value to be set in the register
* @param[in] val Value to be set in the register.
*/
__STATIC_INLINE void nrf_power_gpregret_set(uint8_t val);
/**
* @brief Get general purpose retention register
* @brief Function for getting general purpose retention register.
*
* @return The value from the register
* @return The value from the register.
*/
__STATIC_INLINE uint8_t nrf_power_gpregret_get(void);
#if defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Set general purpose retention register 2
* @brief Function for setting the general purpose retention register 2.
*
* @note This register is not available in nrf51 MCU family
* @note This register is not available in the nRF51 MCU family.
*
* @param[in] val Value to be set in the register
* @param[in] val Value to be set in the register.
*/
__STATIC_INLINE void nrf_power_gpregret2_set(uint8_t val);
/**
* @brief Get general purpose retention register 2
* @brief Function for getting the general purpose retention register 2.
*
* @note This register is not available in all MCUs.
*
* @return The value from the register
* @return The value from the register.
*/
__STATIC_INLINE uint8_t nrf_power_gpregret2_get(void);
#endif // defined(POWER_GPREGRET2_GPREGRET_Msk) || defined(__NRFX_DOXYGEN__)
@ -643,31 +638,31 @@ __STATIC_INLINE void nrf_power_gpregret_ext_set(uint8_t reg_num,
* @brief Enable or disable DCDC converter
*
* @note
* If the device consist of high voltage power input (VDDH) this setting
* would relate to the converter on low voltage side (1.3&nbsp;V output).
* If the device consist of high voltage power input (VDDH), this setting
* will relate to the converter on low voltage side (1.3&nbsp;V output).
*
* @param[in] enable Set true to enable or false to disable DCDC converter.
* @param[in] enable Set true to enable the DCDC converter or false to disable the DCDC converter.
*/
__STATIC_INLINE void nrf_power_dcdcen_set(bool enable);
/**
* @brief Get the state of DCDC converter
* @brief Function for getting the state of the DCDC converter.
*
* @note
* If the device consist of high voltage power input (VDDH) this setting
* would relate to the converter on low voltage side (1.3&nbsp;V output).
* If the device consist of high voltage power input (VDDH), this setting
* will relate to the converter on low voltage side (1.3&nbsp;V output).
*
* @retval true Converter is enabled
* @retval false Converter is disabled
* @retval true Converter is enabled.
* @retval false Converter is disabled.
*/
__STATIC_INLINE bool nrf_power_dcdcen_get(void);
#endif // NRF_POWER_HAS_DCDCEN
#if defined(POWER_RAM_POWER_S0POWER_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Turn ON sections in selected RAM block.
* @brief Turn ON sections in the selected RAM block.
*
* This function turns ON sections in block and also block retention.
* This function turns ON several sections in one block and also block retention.
*
* @sa nrf_power_rampower_mask_t
* @sa nrf_power_rampower_mask_off
@ -679,9 +674,9 @@ __STATIC_INLINE bool nrf_power_dcdcen_get(void);
__STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_mask);
/**
* @brief Turn ON sections in selected RAM block.
* @brief Turn ON sections in the selected RAM block.
*
* This function turns OFF sections in block and also block retention.
* This function turns OFF several sections in one block and also block retention.
*
* @sa nrf_power_rampower_mask_t
* @sa nrf_power_rampower_mask_off
@ -693,7 +688,7 @@ __STATIC_INLINE void nrf_power_rampower_mask_on(uint8_t block, uint32_t section_
__STATIC_INLINE void nrf_power_rampower_mask_off(uint8_t block, uint32_t section_mask);
/**
* @brief Get the mask of ON and retention sections in selected RAM block.
* @brief Function for getting the ON mask and retention sections in the selected RAM block.
*
* @param[in] block RAM block index.
*
@ -704,31 +699,31 @@ __STATIC_INLINE uint32_t nrf_power_rampower_mask_get(uint8_t block);
#if NRF_POWER_HAS_VDDH
/**
* @brief Enable of disable DCDC converter on VDDH
* @brief Function for enabling or disabling the DCDC converter on VDDH.
*
* @param[in] enable Set true to enable or false to disable DCDC converter.
* @param enable Set true to enable the DCDC converter or false to disable the DCDC converter.
*/
__STATIC_INLINE void nrf_power_dcdcen_vddh_set(bool enable);
/**
* @brief Get the state of DCDC converter on VDDH
* @brief Function for getting the state of DCDC converter on VDDH.
*
* @retval true Converter is enabled
* @retval false Converter is disabled
* @retval true Converter is enabled.
* @retval false Converter is disabled.
*/
__STATIC_INLINE bool nrf_power_dcdcen_vddh_get(void);
/**
* @brief Get main supply status
* @brief Function for getting the main supply status.
*
* @return Current main supply status
* @return The current main supply status.
*/
__STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void);
#endif // NRF_POWER_HAS_VDDH
#if NRF_POWER_HAS_USBREG
/**
* @brief Get the whole USBREGSTATUS register
* @brief Function for getting the whole USBREGSTATUS register.
*
* @return The USBREGSTATUS register value.
* Use @ref nrf_power_usbregstatus_mask_t values for bit masking.
@ -739,23 +734,23 @@ __STATIC_INLINE nrf_power_mainregstatus_t nrf_power_mainregstatus_get(void);
__STATIC_INLINE uint32_t nrf_power_usbregstatus_get(void);
/**
* @brief VBUS input detection status
* @brief Function for getting the VBUS input detection status.
*
* USBDETECTED and USBREMOVED events are derived from this information
*
* @retval false VBUS voltage below valid threshold
* @retval true VBUS voltage above valid threshold
* @retval false VBUS voltage below valid threshold.
* @retval true VBUS voltage above valid threshold.
*
* @sa nrf_power_usbregstatus_get
*/
__STATIC_INLINE bool nrf_power_usbregstatus_vbusdet_get(void);
/**
* @brief USB supply output settling time elapsed
* @brief Function for getting the state of the elapsed time for the USB supply output settling.
*
* @retval false USBREG output settling time not elapsed
* @retval false USBREG output settling time not elapsed.
* @retval true USBREG output settling time elapsed
* (same information as USBPWRRDY event)
* (same information as USBPWRRDY event).
*
* @sa nrf_power_usbregstatus_get
*/

128
ext/hal/nordic/nrfx/hal/nrf_ppi.h
View file

@ -42,16 +42,11 @@ extern "C" {
* @defgroup nrf_ppi_hal PPI HAL
* @{
* @ingroup nrf_ppi
* @brief Hardware access layer for managing the Programmable Peripheral Interconnect (PPI)
* @brief Hardware access layer (HAL) for managing the Programmable Peripheral Interconnect (PPI)
* channels.
*/
#define NRF_PPI_TASK_SET (1UL)
/**
* @enum nrf_ppi_channel_t
* @brief PPI channels.
*/
/** @brief PPI channels. */
typedef enum
{
NRF_PPI_CHANNEL0 = PPI_CHEN_CH0_Pos, /**< Channel 0. */
@ -90,10 +85,7 @@ typedef enum
NRF_PPI_CHANNEL31 = PPI_CHEN_CH31_Pos /**< Channel 31. */
} nrf_ppi_channel_t;
/**
* @enum nrf_ppi_channel_group_t
* @brief PPI channel groups.
*/
/** @brief PPI channel groups. */
typedef enum
{
NRF_PPI_CHANNEL_GROUP0 = 0, /**< Channel group 0. */
@ -106,58 +98,47 @@ typedef enum
#endif
} nrf_ppi_channel_group_t;
/**
* @enum nrf_ppi_channel_include_t
* @brief Definition of which PPI channels belong to a group.
*/
/** @brief Definition of whether a PPI channel belongs to a group. */
typedef enum
{
NRF_PPI_CHANNEL_EXCLUDE = PPI_CHG_CH0_Excluded, /**< Channel excluded from a group. */
NRF_PPI_CHANNEL_INCLUDE = PPI_CHG_CH0_Included /**< Channel included in a group. */
} nrf_ppi_channel_include_t;
/**
* @enum nrf_ppi_channel_enable_t
* @brief Definition if a PPI channel is enabled.
*/
/** @brief Definition of whether a PPI channel is enabled. */
typedef enum
{
NRF_PPI_CHANNEL_DISABLED = PPI_CHEN_CH0_Disabled, /**< Channel disabled. */
NRF_PPI_CHANNEL_ENABLED = PPI_CHEN_CH0_Enabled /**< Channel enabled. */
} nrf_ppi_channel_enable_t;
/**
* @enum nrf_ppi_task_t
* @brief PPI tasks.
*/
/** @brief PPI tasks. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0 */
NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0 */
NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1 */
NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1 */
NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2 */
NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2 */
NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3 */
NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3 */
NRF_PPI_TASK_CHG0_EN = offsetof(NRF_PPI_Type, TASKS_CHG[0].EN), /**< Task for enabling channel group 0. */
NRF_PPI_TASK_CHG0_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[0].DIS), /**< Task for disabling channel group 0. */
NRF_PPI_TASK_CHG1_EN = offsetof(NRF_PPI_Type, TASKS_CHG[1].EN), /**< Task for enabling channel group 1. */
NRF_PPI_TASK_CHG1_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[1].DIS), /**< Task for disabling channel group 1. */
NRF_PPI_TASK_CHG2_EN = offsetof(NRF_PPI_Type, TASKS_CHG[2].EN), /**< Task for enabling channel group 2. */
NRF_PPI_TASK_CHG2_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[2].DIS), /**< Task for disabling channel group 2. */
NRF_PPI_TASK_CHG3_EN = offsetof(NRF_PPI_Type, TASKS_CHG[3].EN), /**< Task for enabling channel group 3. */
NRF_PPI_TASK_CHG3_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[3].DIS), /**< Task for disabling channel group 3. */
#if (PPI_GROUP_NUM > 4) || defined(__NRFX_DOXYGEN__)
NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4 */
NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4 */
NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5 */
NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5 */
NRF_PPI_TASK_CHG4_EN = offsetof(NRF_PPI_Type, TASKS_CHG[4].EN), /**< Task for enabling channel group 4. */
NRF_PPI_TASK_CHG4_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[4].DIS), /**< Task for disabling channel group 4. */
NRF_PPI_TASK_CHG5_EN = offsetof(NRF_PPI_Type, TASKS_CHG[5].EN), /**< Task for enabling channel group 5. */
NRF_PPI_TASK_CHG5_DIS = offsetof(NRF_PPI_Type, TASKS_CHG[5].DIS) /**< Task for disabling channel group 5. */
#endif
/*lint -restore*/
} nrf_ppi_task_t;
/**
* @brief Function for enabling a given PPI channel.
*
* @details This function enables only one channel.
*
* @param[in] channel Channel to enable.
*
* */
* @param[in] channel Channel to be enabled.
*/
__STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel);
/**
@ -165,7 +146,7 @@ __STATIC_INLINE void nrf_ppi_channel_enable(nrf_ppi_channel_t channel);
*
* @details This function disables only one channel.
*
* @param[in] channel Channel to disable.
* @param[in] channel Channel to be disabled.
*/
__STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel);
@ -174,17 +155,15 @@ __STATIC_INLINE void nrf_ppi_channel_disable(nrf_ppi_channel_t channel);
*
* @details This function checks only one channel.
*
* @param[in] channel Channel to check.
* @param[in] channel Channel to be checked.
*
* @retval NRF_PPI_CHANNEL_ENABLED If the channel is enabled.
* @retval NRF_PPI_CHANNEL_DISABLED If the channel is not enabled.
* @retval NRF_PPI_CHANNEL_ENABLED The channel is enabled.
* @retval NRF_PPI_CHANNEL_DISABLED The channel is not enabled.
*
*/
__STATIC_INLINE nrf_ppi_channel_enable_t nrf_ppi_channel_enable_get(nrf_ppi_channel_t channel);
/**
* @brief Function for disabling all PPI channels.
*/
/** @brief Function for disabling all PPI channels. */
__STATIC_INLINE void nrf_ppi_channel_disable_all(void);
/**
@ -204,10 +183,8 @@ __STATIC_INLINE void nrf_ppi_channels_disable(uint32_t mask);
/**
* @brief Function for setting up event and task endpoints for a given PPI channel.
*
* @param[in] eep Event register address.
*
* @param[in] tep Task register address.
*
* @param[in] eep Event register address.
* @param[in] tep Task register address.
* @param[in] channel Channel to which the given endpoints are assigned.
*/
__STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
@ -217,7 +194,7 @@ __STATIC_INLINE void nrf_ppi_channel_endpoint_setup(nrf_ppi_channel_t channel,
/**
* @brief Function for setting up the event endpoint for a given PPI channel.
*
* @param[in] eep Event register address.
* @param[in] eep Event register address.
* @param[in] channel Channel to which the given endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_event_endpoint_setup(nrf_ppi_channel_t channel,
@ -226,7 +203,7 @@ __STATIC_INLINE void nrf_ppi_event_endpoint_setup(nrf_ppi_channel_t channel,
/**
* @brief Function for setting up the task endpoint for a given PPI channel.
*
* @param[in] tep Task register address.
* @param[in] tep Task register address.
* @param[in] channel Channel to which the given endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_task_endpoint_setup(nrf_ppi_channel_t channel,
@ -238,8 +215,7 @@ __STATIC_INLINE void nrf_ppi_task_endpoint_setup(nrf_ppi_channel_t channel,
* @brief Function for setting up task endpoint for a given PPI fork.
*
* @param[in] fork_tep Task register address.
*
* @param[in] channel Channel to which the given fork endpoint is assigned.
* @param[in] channel Channel to which the given fork endpoint is assigned.
*/
__STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
uint32_t fork_tep);
@ -247,13 +223,10 @@ __STATIC_INLINE void nrf_ppi_fork_endpoint_setup(nrf_ppi_channel_t channel,
/**
* @brief Function for setting up event and task endpoints for a given PPI channel and fork.
*
* @param[in] eep Event register address.
*
* @param[in] tep Task register address.
*
* @param[in] eep Event register address.
* @param[in] tep Task register address.
* @param[in] fork_tep Fork task register address (register value).
*
* @param[in] channel Channel to which the given endpoints are assigned.
* @param[in] channel Channel to which the given endpoints are assigned.
*/
__STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t channel,
uint32_t eep,
@ -267,9 +240,7 @@ __STATIC_INLINE void nrf_ppi_channel_and_fork_endpoint_setup(nrf_ppi_channel_t c
* @details This function adds only one channel to the group.
*
* @param[in] channel Channel to be included in the group.
*
* @param[in] channel_group Channel group.
*
*/
__STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t channel,
nrf_ppi_channel_group_t channel_group);
@ -280,9 +251,7 @@ __STATIC_INLINE void nrf_ppi_channel_include_in_group(nrf_ppi_channel_t ch
* @details This function adds all specified channels to the group.
*
* @param[in] channel_mask Channels to be included in the group.
*
* @param[in] channel_group Channel group.
*
*/
__STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t channel_mask,
nrf_ppi_channel_group_t channel_group);
@ -293,7 +262,6 @@ __STATIC_INLINE void nrf_ppi_channels_include_in_group(uint32_t c
* @details This function removes only one channel from the group.
*
* @param[in] channel Channel to be removed from the group.
*
* @param[in] channel_group Channel group.
*/
__STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t channel,
@ -305,7 +273,6 @@ __STATIC_INLINE void nrf_ppi_channel_remove_from_group(nrf_ppi_channel_t c
* @details This function removes all specified channels from the group.
*
* @param[in] channel_mask Channels to be removed from the group.
*
* @param[in] channel_group Channel group.
*/
__STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t channel_mask,
@ -315,7 +282,6 @@ __STATIC_INLINE void nrf_ppi_channels_remove_from_group(uint32_t
* @brief Function for removing all PPI channels from a channel group.
*
* @param[in] group Channel group.
*
*/
__STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group);
@ -323,7 +289,6 @@ __STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group);
* @brief Function for enabling a channel group.
*
* @param[in] group Channel group.
*
*/
__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group);
@ -331,35 +296,40 @@ __STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group);
* @brief Function for disabling a channel group.
*
* @param[in] group Channel group.
*
*/
__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group);
/**
* @brief Function for setting a PPI task.
*
* @param[in] ppi_task PPI task to set.
* @param[in] ppi_task PPI task to be set.
*/
__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task);
/**
* @brief Function for returning the address of a specific PPI task register.
* @brief Function for getting the address of the specified PPI task register.
*
* @param[in] ppi_task PPI task.
*
* @return Address of the requested PPI task register.
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task);
/**
* @brief Function for returning the PPI enable task address of a specific group.
* @brief Function for getting the PPI enable task address of the specified group.
*
* @param[in] group PPI group.
* @param[in] group PPI group.
*
* @return PPI enable task address of the specified group.
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_group_enable_address_get(nrf_ppi_channel_group_t group);
/**
* @brief Function for returning the PPI disable task address of a specific group.
* @brief Function for getting the PPI disable task address of the specified group.
*
* @param[in] group PPI group.
* @param[in] group PPI group.
*
* @return PPI disable task address of the specified group.
*/
__STATIC_INLINE uint32_t * nrf_ppi_task_group_disable_address_get(nrf_ppi_channel_group_t group);
@ -476,17 +446,17 @@ __STATIC_INLINE void nrf_ppi_channel_group_clear(nrf_ppi_channel_group_t group)
__STATIC_INLINE void nrf_ppi_group_enable(nrf_ppi_channel_group_t group)
{
NRF_PPI->TASKS_CHG[(uint32_t) group].EN = NRF_PPI_TASK_SET;
NRF_PPI->TASKS_CHG[(uint32_t) group].EN = 1UL;
}
__STATIC_INLINE void nrf_ppi_group_disable(nrf_ppi_channel_group_t group)
{
NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = NRF_PPI_TASK_SET;
NRF_PPI->TASKS_CHG[(uint32_t) group].DIS = 1UL;
}
__STATIC_INLINE void nrf_ppi_task_trigger(nrf_ppi_task_t ppi_task)
{
*((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = NRF_PPI_TASK_SET;
*((volatile uint32_t *) ((uint8_t *) NRF_PPI_BASE + (uint32_t) ppi_task)) = 1UL;
}
__STATIC_INLINE uint32_t * nrf_ppi_task_address_get(nrf_ppi_task_t ppi_task)

211
ext/hal/nordic/nrfx/hal/nrf_pwm.h
View file

@ -50,46 +50,40 @@ extern "C" {
* function call to specify that a given output channel shall not be
* connected to a physical pin.
*/
#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF
#define NRF_PWM_PIN_NOT_CONNECTED 0xFFFFFFFF
/** @brief Number of channels in each PWM instance. */
#define NRF_PWM_CHANNEL_COUNT 4
/**
* @brief Number of channels in each Pointer to the peripheral registers structure.
* @brief Helper macro for calculating the number of 16-bit values in the specified
* array of duty cycle values.
*/
#define NRF_PWM_CHANNEL_COUNT 4
#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t))
/**
* @brief PWM tasks.
*/
/** @brief PWM tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_PWM_TASK_STOP = offsetof(NRF_PWM_Type, TASKS_STOP), ///< Stops PWM pulse generation on all channels at the end of the current PWM period, and stops the sequence playback.
NRF_PWM_TASK_SEQSTART0 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[0]), ///< Starts playback of sequence 0.
NRF_PWM_TASK_SEQSTART1 = offsetof(NRF_PWM_Type, TASKS_SEQSTART[1]), ///< Starts playback of sequence 1.
NRF_PWM_TASK_NEXTSTEP = offsetof(NRF_PWM_Type, TASKS_NEXTSTEP) ///< Steps by one value in the current sequence if the decoder is set to @ref NRF_PWM_STEP_TRIGGERED mode.
/*lint -restore*/
} nrf_pwm_task_t;
/**
* @brief PWM events.
*/
/** @brief PWM events. */
typedef enum
{
/*lint -save -e30*/
NRF_PWM_EVENT_STOPPED = offsetof(NRF_PWM_Type, EVENTS_STOPPED), ///< Response to STOP task, emitted when PWM pulses are no longer generated.
NRF_PWM_EVENT_SEQSTARTED0 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[0]), ///< First PWM period started on sequence 0.
NRF_PWM_EVENT_SEQSTARTED1 = offsetof(NRF_PWM_Type, EVENTS_SEQSTARTED[1]), ///< First PWM period started on sequence 1.
NRF_PWM_EVENT_SEQEND0 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[0]), ///< Emitted at the end of every sequence 0 when its last value has been read from RAM.
NRF_PWM_EVENT_SEQEND1 = offsetof(NRF_PWM_Type, EVENTS_SEQEND[1]), ///< Emitted at the end of every sequence 1 when its last value has been read from RAM.
NRF_PWM_EVENT_PWMPERIODEND = offsetof(NRF_PWM_Type, EVENTS_PWMPERIODEND), ///< Emitted at the end of each PWM period.
NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the requested number of times.
/*lint -restore*/
NRF_PWM_EVENT_LOOPSDONE = offsetof(NRF_PWM_Type, EVENTS_LOOPSDONE) ///< Concatenated sequences have been played the specified number of times.
} nrf_pwm_event_t;
/**
* @brief PWM interrupts.
*/
/** @brief PWM interrupts. */
typedef enum
{
NRF_PWM_INT_STOPPED_MASK = PWM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@ -101,9 +95,7 @@ typedef enum
NRF_PWM_INT_LOOPSDONE_MASK = PWM_INTENSET_LOOPSDONE_Msk ///< Interrupt on LOOPSDONE event.
} nrf_pwm_int_mask_t;
/**
* @brief PWM shortcuts.
*/
/** @brief PWM shortcuts. */
typedef enum
{
NRF_PWM_SHORT_SEQEND0_STOP_MASK = PWM_SHORTS_SEQEND0_STOP_Msk, ///< Shortcut between SEQEND[0] event and STOP task.
@ -113,18 +105,14 @@ typedef enum
NRF_PWM_SHORT_LOOPSDONE_STOP_MASK = PWM_SHORTS_LOOPSDONE_STOP_Msk ///< Shortcut between LOOPSDONE event and STOP task.
} nrf_pwm_short_mask_t;
/**
* @brief PWM modes of operation.
*/
/** @brief PWM modes of operation. */
typedef enum
{
NRF_PWM_MODE_UP = PWM_MODE_UPDOWN_Up, ///< Up counter (edge-aligned PWM duty cycle).
NRF_PWM_MODE_UP_AND_DOWN = PWM_MODE_UPDOWN_UpAndDown, ///< Up and down counter (center-aligned PWM duty cycle).
} nrf_pwm_mode_t;
/**
* @brief PWM base clock frequencies.
*/
/** @brief PWM base clock frequencies. */
typedef enum
{
NRF_PWM_CLK_16MHz = PWM_PRESCALER_PRESCALER_DIV_1, ///< 16 MHz / 1 = 16 MHz.
@ -163,7 +151,6 @@ typedef enum
NRF_PWM_STEP_TRIGGERED = PWM_DECODER_MODE_NextStep ///< When the @ref NRF_PWM_TASK_NEXTSTEP task is triggered.
} nrf_pwm_dec_step_t;
/**
* @brief Type used for defining duty cycle values for a sequence
* loaded in @ref NRF_PWM_LOAD_COMMON mode.
@ -219,11 +206,11 @@ typedef union {
*
* When the sequence is set (by a call to @ref nrf_pwm_sequence_set), the
* provided duty cycle values are not copied. The @p values pointer is stored
* in the peripheral's internal register, and the values are loaded from RAM
* in the internal register of the peripheral, and the values are loaded from RAM
* during the sequence playback. Therefore, you must ensure that the values
* do not change before and during the sequence playback (for example,
* the values cannot be placed in a local variable that is allocated on stack).
* If the sequence is played in a loop and the values should be updated
* If the sequence is played in a loop and the values are to be updated
* before the next iteration, it is safe to modify them when the corresponding
* event signaling the end of sequence occurs (@ref NRF_PWM_EVENT_SEQEND0
* or @ref NRF_PWM_EVENT_SEQEND1, respectively).
@ -246,134 +233,128 @@ typedef struct
* others (14-0) compose the 15-bit value to be
* compared with the pulse generator counter. */
uint16_t length; ///< Number of 16-bit values in the array pointed by @p values.
uint32_t repeats; ///< Number of times that each duty cycle should be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
uint32_t repeats; ///< Number of times that each duty cycle is to be repeated (after being played once). Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
uint32_t end_delay; ///< Additional time (in PWM periods) that the last duty cycle is to be kept after the sequence is played. Ignored in @ref NRF_PWM_STEP_TRIGGERED mode.
} nrf_pwm_sequence_t;
/**
* @brief Helper macro for calculating the number of 16-bit values in specified
* array of duty cycle values.
*/
#define NRF_PWM_VALUES_LENGTH(array) (sizeof(array) / sizeof(uint16_t))
/**
* @brief Function for activating a specific PWM task.
* @brief Function for activating the specified PWM task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_pwm_task_trigger(NRF_PWM_Type * p_reg,
nrf_pwm_task_t task);
/**
* @brief Function for getting the address of a specific PWM task register.
* @brief Function for getting the address of the specified PWM task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task PWM task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_pwm_task_address_get(NRF_PWM_Type const * p_reg,
nrf_pwm_task_t task);
nrf_pwm_task_t task);
/**
* @brief Function for clearing a specific PWM event.
* @brief Function for clearing the specified PWM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg,
__STATIC_INLINE void nrf_pwm_event_clear(NRF_PWM_Type * p_reg,
nrf_pwm_event_t event);
/**
* @brief Function for checking the state of a specific PWM event.
* @brief Function for retrieving the state of the PWM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_pwm_event_check(NRF_PWM_Type const * p_reg,
nrf_pwm_event_t event);
nrf_pwm_event_t event);
/**
* @brief Function for getting the address of a specific PWM event register.
* @brief Function for getting the address of the specified PWM event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event PWM event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg,
nrf_pwm_event_t event);
nrf_pwm_event_t event);
/**
* @brief Function for enabling specified shortcuts.
* @brief Function for enabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_shorts_mask Shortcuts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg,
uint32_t pwm_shorts_mask);
uint32_t mask);
/**
* @brief Function for disabling specified shortcuts.
* @brief Function for disabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_shorts_mask Shortcuts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg,
uint32_t pwm_shorts_mask);
uint32_t mask);
/**
* @brief Function for setting the configuration of PWM shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_shorts_mask Shortcuts configuration to set.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts configuration to be set.
*/
__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg,
uint32_t pwm_shorts_mask);
uint32_t mask);
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg,
uint32_t pwm_int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg,
uint32_t pwm_int_mask);
uint32_t mask);
/**
* @brief Function for setting the configuration of PWM interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_int_mask Interrupts configuration to set.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be set.
*/
__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg,
uint32_t pwm_int_mask);
uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] pwm_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] pwm_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg,
nrf_pwm_int_mask_t pwm_int);
nrf_pwm_int_mask_t pwm_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -424,14 +405,14 @@ __STATIC_INLINE void nrf_pwm_publish_clear(NRF_PWM_Type * p_reg,
/**
* @brief Function for enabling the PWM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_pwm_enable(NRF_PWM_Type * p_reg);
/**
* @brief Function for disabling the PWM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg);
@ -442,16 +423,16 @@ __STATIC_INLINE void nrf_pwm_disable(NRF_PWM_Type * p_reg);
* needed, pass the @ref NRF_PWM_PIN_NOT_CONNECTED value instead of its pin
* number.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] out_pins Array with pin numbers for individual PWM output channels.
*/
__STATIC_INLINE void nrf_pwm_pins_set(NRF_PWM_Type * p_reg,
uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]);
uint32_t out_pins[NRF_PWM_CHANNEL_COUNT]);
/**
* @brief Function for configuring the PWM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] base_clock Base clock frequency.
* @param[in] mode Operating mode of the pulse generator counter.
* @param[in] top_value Value up to which the pulse generator counter counts.
@ -464,11 +445,11 @@ __STATIC_INLINE void nrf_pwm_configure(NRF_PWM_Type * p_reg,
/**
* @brief Function for defining a sequence of PWM duty cycles.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] p_seq Pointer to the sequence definition.
*/
__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
__STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
nrf_pwm_sequence_t const * p_seq);
@ -476,11 +457,11 @@ __STATIC_INLINE void nrf_pwm_sequence_set(NRF_PWM_Type * p_reg,
* @brief Function for modifying the pointer to the duty cycle values
* in the specified sequence.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] p_values Pointer to an array with duty cycle values.
*/
__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
__STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
uint16_t const * p_values);
@ -488,47 +469,47 @@ __STATIC_INLINE void nrf_pwm_seq_ptr_set(NRF_PWM_Type * p_reg,
* @brief Function for modifying the total number of duty cycle values
* in the specified sequence.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] length Number of duty cycle values.
*/
__STATIC_INLINE void nrf_pwm_seq_cnt_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
uint16_t length);
uint8_t seq_id,
uint16_t length);
/**
* @brief Function for modifying the additional number of PWM periods spent
* on each duty cycle value in the specified sequence.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] refresh Number of additional PWM periods for each duty cycle value.
*/
__STATIC_INLINE void nrf_pwm_seq_refresh_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
uint32_t refresh);
uint8_t seq_id,
uint32_t refresh);
/**
* @brief Function for modifying the additional time added after the sequence
* is played.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] seq_id Identifier of the sequence (0 or 1).
* @param[in] end_delay Number of PWM periods added at the end of the sequence.
*/
__STATIC_INLINE void nrf_pwm_seq_end_delay_set(NRF_PWM_Type * p_reg,
uint8_t seq_id,
uint32_t end_delay);
uint8_t seq_id,
uint32_t end_delay);
/**
* @brief Function for setting the mode of loading sequence data from RAM
* and advancing the sequence.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dec_load Mode of loading sequence data from RAM.
* @param[in] dec_step Mode of advancing the active sequence.
*/
__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
__STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
nrf_pwm_dec_load_t dec_load,
nrf_pwm_dec_step_t dec_step);
@ -539,11 +520,11 @@ __STATIC_INLINE void nrf_pwm_decoder_set(NRF_PWM_Type * p_reg,
* This function applies to two-sequence playback (concatenated sequence 0 and 1).
* A single sequence can be played back only once.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] loop_count Number of times to perform the sequence playback.
*/
__STATIC_INLINE void nrf_pwm_loop_set(NRF_PWM_Type * p_reg,
uint16_t loop_count);
uint16_t loop_count);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -583,39 +564,39 @@ __STATIC_INLINE uint32_t nrf_pwm_event_address_get(NRF_PWM_Type const * p_reg,
}
__STATIC_INLINE void nrf_pwm_shorts_enable(NRF_PWM_Type * p_reg,
uint32_t pwm_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS |= pwm_shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_pwm_shorts_disable(NRF_PWM_Type * p_reg,
uint32_t pwm_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS &= ~(pwm_shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_pwm_shorts_set(NRF_PWM_Type * p_reg,
uint32_t pwm_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS = pwm_shorts_mask;
p_reg->SHORTS = mask;
}
__STATIC_INLINE void nrf_pwm_int_enable(NRF_PWM_Type * p_reg,
uint32_t pwm_int_mask)
uint32_t mask)
{
p_reg->INTENSET = pwm_int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_pwm_int_disable(NRF_PWM_Type * p_reg,
uint32_t pwm_int_mask)
uint32_t mask)
{
p_reg->INTENCLR = pwm_int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE void nrf_pwm_int_set(NRF_PWM_Type * p_reg,
uint32_t pwm_int_mask)
uint32_t mask)
{
p_reg->INTEN = pwm_int_mask;
p_reg->INTEN = mask;
}
__STATIC_INLINE bool nrf_pwm_int_enable_check(NRF_PWM_Type const * p_reg,

247
ext/hal/nordic/nrfx/hal/nrf_qdec.h
View file

@ -51,42 +51,30 @@ extern "C" {
*/
#define NRF_QDEC_LED_NOT_CONNECTED 0xFFFFFFFF
/**
* @enum nrf_qdec_task_t
* @brief QDEC tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief QDEC tasks. */
typedef enum
{
NRF_QDEC_TASK_START = offsetof(NRF_QDEC_Type, TASKS_START), /**< Starting the quadrature decoder. */
NRF_QDEC_TASK_STOP = offsetof(NRF_QDEC_Type, TASKS_STOP), /**< Stopping the quadrature decoder. */
NRF_QDEC_TASK_READCLRACC = offsetof(NRF_QDEC_Type, TASKS_READCLRACC) /**< Reading and clearing ACC and ACCDBL registers. */
} nrf_qdec_task_t;
/**
* @enum nrf_qdec_event_t
* @brief QDEC events.
*/
/** @brief QDEC events. */
typedef enum
{
NRF_QDEC_EVENT_SAMPLERDY = offsetof(NRF_QDEC_Type, EVENTS_SAMPLERDY), /**< Event generated for every new sample. */
NRF_QDEC_EVENT_REPORTRDY = offsetof(NRF_QDEC_Type, EVENTS_REPORTRDY), /**< Event generated for every new report. */
NRF_QDEC_EVENT_ACCOF = offsetof(NRF_QDEC_Type, EVENTS_ACCOF) /**< Event generated for every accumulator overflow. */
} nrf_qdec_event_t; /*lint -restore */
} nrf_qdec_event_t;
/**
* @enum nrf_qdec_short_mask_t
* @brief QDEC shortcuts.
*/
/** @brief QDEC shortcuts. */
typedef enum
{
NRF_QDEC_SHORT_REPORTRDY_READCLRACC_MASK = QDEC_SHORTS_REPORTRDY_READCLRACC_Msk, /**< Shortcut between REPORTRDY event and READCLRACC task. */
NRF_QDEC_SHORT_SAMPLERDY_STOP_MASK = QDEC_SHORTS_SAMPLERDY_STOP_Msk /**< Shortcut between SAMPLERDY event and STOP task. */
} nrf_qdec_short_mask_t;
/**
* @enum nrf_qdec_int_mask_t
* @brief QDEC interrupts.
*/
/** @brief QDEC interrupts. */
typedef enum
{
NRF_QDEC_INT_SAMPLERDY_MASK = QDEC_INTENSET_SAMPLERDY_Msk, /**< Mask for enabling or disabling an interrupt on SAMPLERDY event. */
@ -94,42 +82,28 @@ typedef enum
NRF_QDEC_INT_ACCOF_MASK = QDEC_INTENSET_ACCOF_Msk /**< Mask for enabling or disabling an interrupt on ACCOF event. */
} nrf_qdec_int_mask_t;
/**
* @enum nrf_qdec_enable_t
* @brief States of the enable bit.
*/
/** @brief States of the enable bit. */
typedef enum
{
NRF_QDEC_DISABLE = QDEC_ENABLE_ENABLE_Disabled, /**< Mask for disabling the QDEC periperal. When disabled, the QDEC decoder pins are not active. */
NRF_QDEC_ENABLE = QDEC_ENABLE_ENABLE_Enabled /**< Mask for enabling the QDEC periperal. When enabled, the QDEC pins are active. */
} nrf_qdec_enable_t;
/**
* @enum nrf_qdec_dbfen_t
* @brief States of the debounce filter enable bit.
*/
/** @brief States of the debounce filter enable bit. */
typedef enum
{
NRF_QDEC_DBFEN_DISABLE = QDEC_DBFEN_DBFEN_Disabled, /**< Mask for disabling the debounce filter. */
NRF_QDEC_DBFEN_ENABLE = QDEC_DBFEN_DBFEN_Enabled /**< Mask for enabling the debounce filter. */
} nrf_qdec_dbfen_t;
/**
* @enum nrf_qdec_ledpol_t
* @brief Active LED polarity.
*/
/** @brief Active LED polarity. */
typedef enum
{
NRF_QDEC_LEPOL_ACTIVE_LOW = QDEC_LEDPOL_LEDPOL_ActiveLow, /**< QDEC LED active on output pin low. */
NRF_QDEC_LEPOL_ACTIVE_HIGH = QDEC_LEDPOL_LEDPOL_ActiveHigh /**< QDEC LED active on output pin high. */
} nrf_qdec_ledpol_t;
/**
* @enum nrf_qdec_sampleper_t
* @brief Available sampling periods.
*/
/** @brief Available sampling periods. */
typedef enum
{
NRF_QDEC_SAMPLEPER_128us = QDEC_SAMPLEPER_SAMPLEPER_128us, /**< QDEC sampling period 128 microseconds. */
@ -142,10 +116,7 @@ typedef enum
NRF_QDEC_SAMPLEPER_16384us = QDEC_SAMPLEPER_SAMPLEPER_16384us /**< QDEC sampling period 16384 microseconds. */
} nrf_qdec_sampleper_t;
/**
* @enum nrf_qdec_reportper_t
* @brief Available report periods.
*/
/** @brief Available report periods. */
typedef enum
{
NRF_QDEC_REPORTPER_10 = QDEC_REPORTPER_REPORTPER_10Smpl, /**< QDEC report period 10 samples. */
@ -159,59 +130,59 @@ typedef enum
NRF_QDEC_REPORTPER_DISABLED /**< QDEC reporting disabled. */
} nrf_qdec_reportper_t;
/**
* @brief Function for enabling QDEC.
*/
/** @brief Function for enabling QDEC. */
__STATIC_INLINE void nrf_qdec_enable(void);
/**
* @brief Function for disabling QDEC.
*/
/** @brief Function for disabling QDEC. */
__STATIC_INLINE void nrf_qdec_disable(void);
/**
* @brief Function for returning the enable state of QDEC.
*
* @return State of the register.
*/
__STATIC_INLINE uint32_t nrf_qdec_enable_get(void);
/**
* @brief Function for enabling QDEC interrupts by mask.
* @param[in] qdec_int_mask Sources of the interrupts to enable.
*
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask);
__STATIC_INLINE void nrf_qdec_int_enable(uint32_t mask);
/**
* @brief Function for disabling QDEC interrupts by mask.
* @param[in] qdec_int_mask Sources of the interrupts to disable.
*
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask);
__STATIC_INLINE void nrf_qdec_int_disable(uint32_t mask);
/**
* @brief Function for getting the enabled interrupts of the QDEC.
*
* @param[in] mask Mask of interrupts to be checked.
*
* @return Bitfield with enabled interrupts.
*/
__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask);
__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t mask);
/**
* @brief Function for enabling the debouncing filter of the QED.
*/
/** @brief Function for enabling the QDEC debouncing filter. */
__STATIC_INLINE void nrf_qdec_dbfen_enable(void);
/**
* @brief Function for disabling the debouncing filter of the QED.
*/
/** @brief Function for disabling the QDEC debouncing filter. */
__STATIC_INLINE void nrf_qdec_dbfen_disable(void);
/**
* @brief Function for getting the state of the QDEC's debouncing filter.
* @retval NRF_QDEC_DBFEN_DISABLE If the debouncing filter is disabled.
* @retval NRF_QDEC_DBFEN_ENABLE If the debouncing filter is enabled.
* @brief Function for getting the state of the QDEC debouncing filter.
*
* @retval NRF_QDEC_DBFEN_DISABLE The debouncing filter is disabled.
* @retval NRF_QDEC_DBFEN_ENABLE The debouncing filter is enabled.
*/
__STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void);
/**
* @brief Function for assigning QDEC pins.
*
* @param[in] psela Pin number.
* @param[in] pselb Pin number.
* @param[in] pselled Pin number.
@ -219,139 +190,174 @@ __STATIC_INLINE uint32_t nrf_qdec_dbfen_get(void);
__STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32_t pselled);
/**
* @brief Function for setting a specific QDEC task.
* @param[in] qdec_task QDEC task to be set.
* @brief Function for setting the specified QDEC task.
*
* @param[in] task QDEC task to be triggered.
*/
__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task);
__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t task);
/**
* @brief Function for retrieving the address of a QDEC task register.
* @param[in] qdec_task QDEC task.
*
* @param[in] task QDEC task to get its address.
*
* @return Address of the specified QDEC task.
*/
__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task);
__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t task);
/**
* @brief Function for clearing a specific QDEC event.
* @param[in] qdec_event QDEC event to clear.
* @brief Function for clearing the specified QDEC event.
*
* @param[in] event QDEC event to be cleared.
*/
__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event);
__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t event);
/**
* @brief Function for retrieving the state of a specific QDEC event.
* @return State of the QDEC event.
* @brief Function for getting the state of the specified QDEC event.
*
* @param[in] event QDEC event to be checked.
*
* @return State of the specified QDEC event.
*/
__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event);
__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t event);
/**
* @brief Function for retrieving the address of a specific QDEC event register.
* @param[in] qdec_event QDEC event.
* @brief Function for retrieving the address of the specified QDEC event register.
*
* @param[in] event QDEC event to get its address.
*
* @return Address of the specified QDEC event.
*/
__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event);
__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t event);
/**
* @brief Function for setting QDEC shortcuts.
* @param[in] qdec_short_mask QDEC shortcut by mask.
* @brief Function for setting QDEC shortcuts.
*
* @param[in] mask Mask of QDEC shortcuts to be set.
*/
__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask);
__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing shortcuts of the QDEC by mask.
* @param[in] qdec_short_mask QDEC shortcute to be cleared.
*
* @param[in] mask Mask of QDEC shortcuts to be cleared.
*/
__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask);
__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t mask);
/**
* @brief Function for retrieving the value of QDEC's SAMPLEPER register.
* @return Value of the SAMPLEPER register.
* @brief Function for retrieving value of the sampling period.
*
* @return Sample period @ref nrf_qdec_sampleper_t.
*/
__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void);
/**
* @brief Function for converting the value of QDEC's SAMPLE PERIOD to microseconds.
* @retval sampling period in microseconds.
* @brief Function for converting return value of the @p nrf_qdec_sampleper_reg_get() function
* to microseconds.
*
* @param[in] sampleper The sampling period.
*
* @return Period in microseconds.
*/
__STATIC_INLINE uint32_t nrf_qdec_sampleper_to_value(uint32_t sampleper);
/**
* @brief Function for setting the value of QDEC's SAMPLEPER register.
* @param[in] sample_per Sampling period.
* @brief Function for setting value of the QDEC sampling period.
*
* @param[in] sample_per The sampling period.
*/
__STATIC_INLINE void nrf_qdec_sampleper_set(nrf_qdec_sampleper_t sample_per);
/**
* @brief Function for retrieving the value of QDEC's SAMPLE register.
* @brief Function for retrieving value of the QDEC SAMPLE register.
*
* @return Value of the SAMPLE register.
*/
__STATIC_INLINE int32_t nrf_qdec_sample_get(void);
/**
* @brief Function for retrieving the value of QDEC's ACC register.
* @brief Function for retrieving value of the QDEC ACC register.
*
* @return Value of the ACC register.
*/
__STATIC_INLINE int32_t nrf_qdec_acc_get(void);
/**
* @brief Function for retrieving the value of QDEC's ACCREAD register.
* @brief Function for retrieving value of the QDEC ACCREAD register.
*
* @return Value of the ACCREAD register.
*/
__STATIC_INLINE int32_t nrf_qdec_accread_get(void);
/**
* @brief Function for retrieving the value of QDEC's ACCDBL register.
* @brief Function for retrieving value of the QDEC ACCDBL register.
*
* @return Value of the ACCDBL register.
*/
__STATIC_INLINE uint32_t nrf_qdec_accdbl_get(void);
/**
* @brief Function for retrieving the value of QDEC's ACCDBLREAD register.
* @brief Function for retrieving value of the QDEC ACCDBLREAD register.
*
* @return Value of the ACCDBLREAD register.
*/
__STATIC_INLINE uint32_t nrf_qdec_accdblread_get(void);
/**
* @brief Function for setting how long the LED is switched on before sampling.
* @param[in] time_us Time (in microseconds) how long the LED is switched on before sampling.
* @brief Function for setting delay time between setting LED active state and start sampling.
*
* @param[in] time_us Delay time (in microseconds) between setting LED active state
* and start sampling.
*/
__STATIC_INLINE void nrf_qdec_ledpre_set(uint32_t time_us);
/**
* @brief Function for retrieving how long the LED is switched on before sampling.
* @retval time_us Time (in microseconds) how long the LED is switched on before sampling.
*
* @return The gap in time in microseconds between switched LED to active state and start sampling.
*/
__STATIC_INLINE uint32_t nrf_qdec_ledpre_get(void);
/**
* @brief Function for setting the report period (in samples).
* @param[in] reportper Number of samples.
*
* @param[in] reportper The number of samples.
*/
__STATIC_INLINE void nrf_qdec_reportper_set(nrf_qdec_reportper_t reportper);
/**
* @brief Function for retrieving the report period.
* @retval reportper Number of samples as encoded in the register.
*
* @return The report period.
*/
__STATIC_INLINE uint32_t nrf_qdec_reportper_reg_get(void);
/**
* @brief Function for retrieving the value of QDEC's SAMPLEPER register.
* @param [in] reportper Reportper to be converted to amount of samples per report.
* @brief Function for retrieving the value of QDEC SAMPLEPER register.
*
* @param [in] reportper Reportper to be converted to amount of samples per report.
*
* @return Number of samples per report.
*/
__STATIC_INLINE uint32_t nrf_qdec_reportper_to_value(uint32_t reportper);
/**
* @brief Function for setting the active level for the LED.
* @param[in] pol Active level for the LED.
*
* @param[in] pol Level of the active signal of the LED.
*/
__STATIC_INLINE void nrf_qdec_ledpol_set(nrf_qdec_ledpol_t pol);
/**
* @brief Function for retrieving the active level for the LED.
* @return Active level for the LED.
*
* @return Level of the active signal of the LED.
*/
__STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_qdec_enable(void)
{
NRF_QDEC->ENABLE = NRF_QDEC_ENABLE;
@ -367,19 +373,19 @@ __STATIC_INLINE uint32_t nrf_qdec_enable_get(void)
return NRF_QDEC->ENABLE;
}
__STATIC_INLINE void nrf_qdec_int_enable(uint32_t qdec_int_mask)
__STATIC_INLINE void nrf_qdec_int_enable(uint32_t mask)
{
NRF_QDEC->INTENSET = qdec_int_mask; // writing 0 has no effect
NRF_QDEC->INTENSET = mask; // writing 0 has no effect
}
__STATIC_INLINE void nrf_qdec_int_disable(uint32_t qdec_int_mask)
__STATIC_INLINE void nrf_qdec_int_disable(uint32_t mask)
{
NRF_QDEC->INTENCLR = qdec_int_mask; // writing 0 has no effect
NRF_QDEC->INTENCLR = mask; // writing 0 has no effect
}
__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t qdec_int_mask)
__STATIC_INLINE uint32_t nrf_qdec_int_enable_check(nrf_qdec_int_mask_t mask)
{
return NRF_QDEC->INTENSET & qdec_int_mask; // when read this register will return the value of INTEN.
return NRF_QDEC->INTENSET & mask; // when read this register will return the value of INTEN.
}
__STATIC_INLINE void nrf_qdec_dbfen_enable(void)
@ -418,43 +424,43 @@ __STATIC_INLINE void nrf_qdec_pio_assign( uint32_t psela, uint32_t pselb, uint32
#endif
}
__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t qdec_task)
__STATIC_INLINE void nrf_qdec_task_trigger(nrf_qdec_task_t task)
{
*( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task) ) = 1;
*( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)task) ) = 1;
}
__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t qdec_task)
__STATIC_INLINE uint32_t * nrf_qdec_task_address_get(nrf_qdec_task_t task)
{
return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_task);
return (uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)task);
}
__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t qdec_event)
__STATIC_INLINE void nrf_qdec_event_clear(nrf_qdec_event_t event)
{
*( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event) ) = 0;
*( (volatile uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)event) ) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + qdec_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_QDEC + event));
(void)dummy;
#endif
}
__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t qdec_event)
__STATIC_INLINE uint32_t nrf_qdec_event_check(nrf_qdec_event_t event)
{
return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event);
return *(volatile uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)event);
}
__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t qdec_event)
__STATIC_INLINE uint32_t * nrf_qdec_event_address_get(nrf_qdec_event_t event)
{
return (uint32_t *)( (uint8_t *)NRF_QDEC + qdec_event);
return (uint32_t *)( (uint8_t *)NRF_QDEC + (uint32_t)event);
}
__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t qdec_short_mask)
__STATIC_INLINE void nrf_qdec_shorts_enable(uint32_t mask)
{
NRF_QDEC->SHORTS |= qdec_short_mask;
NRF_QDEC->SHORTS |= mask;
}
__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t qdec_short_mask)
__STATIC_INLINE void nrf_qdec_shorts_disable(uint32_t mask)
{
NRF_QDEC->SHORTS &= ~qdec_short_mask;
NRF_QDEC->SHORTS &= ~mask;
}
__STATIC_INLINE int32_t nrf_qdec_sampleper_reg_get(void)
@ -533,6 +539,7 @@ __STATIC_INLINE uint32_t nrf_qdec_ledpol_get(void)
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */
#ifdef __cplusplus

270
ext/hal/nordic/nrfx/hal/nrf_qspi.h
View file

@ -52,47 +52,33 @@ extern "C" {
*/
#define NRF_QSPI_PIN_NOT_CONNECTED 0xFF
/**
* @brief Macro for setting proper values to pin registers.
*/
/** @brief Macro for setting proper values to pin registers. */
#define NRF_QSPI_PIN_VAL(pin) (pin) == NRF_QSPI_PIN_NOT_CONNECTED ? 0xFFFFFFFF : (pin)
/**
* @brief QSPI tasks.
*/
/** @brief QSPI tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_QSPI_TASK_ACTIVATE = offsetof(NRF_QSPI_Type, TASKS_ACTIVATE), /**< Activate the QSPI interface. */
NRF_QSPI_TASK_READSTART = offsetof(NRF_QSPI_Type, TASKS_READSTART), /**< Start transfer from external flash memory to internal RAM. */
NRF_QSPI_TASK_WRITESTART = offsetof(NRF_QSPI_Type, TASKS_WRITESTART), /**< Start transfer from internal RAM to external flash memory. */
NRF_QSPI_TASK_ERASESTART = offsetof(NRF_QSPI_Type, TASKS_ERASESTART), /**< Start external flash memory erase operation. */
NRF_QSPI_TASK_DEACTIVATE = offsetof(NRF_QSPI_Type, TASKS_DEACTIVATE), /**< Deactivate the QSPI interface. */
/*lint -restore*/
} nrf_qspi_task_t;
/**
* @brief QSPI events.
*/
/** @brief QSPI events. */
typedef enum
{
/*lint -save -e30*/
NRF_QSPI_EVENT_READY = offsetof(NRF_QSPI_Type, EVENTS_READY) /**< QSPI peripheral is ready after it executes any task. */
/*lint -restore*/
} nrf_qspi_event_t;
/**
* @brief QSPI interrupts.
*/
/** @brief QSPI interrupts. */
typedef enum
{
NRF_QSPI_INT_READY_MASK = QSPI_INTENSET_READY_Msk /**< Interrupt on READY event. */
} nrf_qspi_int_mask_t;
/**
* @brief QSPI frequency divider values.
*/
/** @brief QSPI frequency divider values. */
typedef enum
{
NRF_QSPI_FREQ_32MDIV1, /**< 32.0 MHz. */
@ -113,9 +99,7 @@ typedef enum
NRF_QSPI_FREQ_32MDIV16, /**< 2.00 MHz. */
} nrf_qspi_frequency_t;
/**
* @brief Interface configuration for a read operation.
*/
/** @brief Interface configuration for a read operation. */
typedef enum
{
NRF_QSPI_READOC_FASTREAD = QSPI_IFCONFIG0_READOC_FASTREAD, /**< Single data line SPI. FAST_READ (opcode 0x0B). */
@ -125,9 +109,7 @@ typedef enum
NRF_QSPI_READOC_READ4IO = QSPI_IFCONFIG0_READOC_READ4IO /**< Quad data line SPI. READ4IO (opcode 0xEB). */
} nrf_qspi_readoc_t;
/**
* @brief Interface configuration for a write operation.
*/
/** @brief Interface configuration for a write operation. */
typedef enum
{
NRF_QSPI_WRITEOC_PP = QSPI_IFCONFIG0_WRITEOC_PP, /**< Single data line SPI. PP (opcode 0x02). */
@ -136,27 +118,21 @@ typedef enum
NRF_QSPI_WRITEOC_PP4IO = QSPI_IFCONFIG0_WRITEOC_PP4IO, /**< Quad data line SPI. READ4O (opcode 0x38). */
} nrf_qspi_writeoc_t;
/**
* @brief Interface configuration for addressing mode.
*/
/** @brief Interface configuration for addressing mode. */
typedef enum
{
NRF_QSPI_ADDRMODE_24BIT = QSPI_IFCONFIG0_ADDRMODE_24BIT, /**< 24-bit addressing. */
NRF_QSPI_ADDRMODE_32BIT = QSPI_IFCONFIG0_ADDRMODE_32BIT /**< 32-bit addressing. */
} nrf_qspi_addrmode_t;
/**
* @brief QSPI SPI mode. Polarization and phase configuration.
*/
/** @brief QSPI SPI mode. Polarization and phase configuration. */
typedef enum
{
NRF_QSPI_MODE_0 = QSPI_IFCONFIG1_SPIMODE_MODE0, /**< Mode 0 (CPOL=0, CPHA=0). */
NRF_QSPI_MODE_1 = QSPI_IFCONFIG1_SPIMODE_MODE3 /**< Mode 1 (CPOL=1, CPHA=1). */
} nrf_qspi_spi_mode_t;
/**
* @brief Addressing configuration mode.
*/
/** @brief Addressing configuration mode. */
typedef enum
{
NRF_QSPI_ADDRCONF_MODE_NOINSTR = QSPI_ADDRCONF_MODE_NoInstr, /**< Do not send any instruction. */
@ -165,9 +141,7 @@ typedef enum
NRF_QSPI_ADDRCONF_MODE_ALL = QSPI_ADDRCONF_MODE_All /**< Send opcode, byte0, byte1. */
} nrf_qspi_addrconfig_mode_t;
/**
* @brief Erasing data length.
*/
/** @brief Erasing data length. */
typedef enum
{
NRF_QSPI_ERASE_LEN_4KB = QSPI_ERASE_LEN_LEN_4KB, /**< Erase 4 kB block (flash command 0x20). */
@ -175,9 +149,7 @@ typedef enum
NRF_QSPI_ERASE_LEN_ALL = QSPI_ERASE_LEN_LEN_All /**< Erase all (flash command 0xC7). */
} nrf_qspi_erase_len_t;
/**
* @brief Custom instruction length.
*/
/** @brief Custom instruction length. */
typedef enum
{
NRF_QSPI_CINSTR_LEN_1B = QSPI_CINSTRCONF_LENGTH_1B, /**< Send opcode only. */
@ -191,9 +163,7 @@ typedef enum
NRF_QSPI_CINSTR_LEN_9B = QSPI_CINSTRCONF_LENGTH_9B /**< Send opcode, CINSTRDAT0.BYTE0 -> CINSTRDAT1.BYTE7. */
} nrf_qspi_cinstr_len_t;
/**
* @brief Pins configuration.
*/
/** @brief Pin configuration. */
typedef struct
{
uint8_t sck_pin; /**< SCK pin number. */
@ -208,9 +178,7 @@ typedef struct
*/
} nrf_qspi_pins_t;
/**
* @brief Custom instruction configuration.
*/
/** @brief Custom instruction configuration. */
typedef struct
{
uint8_t opcode; /**< Opcode used in custom instruction transmission. */
@ -221,22 +189,18 @@ typedef struct
bool wren; /**< Send write enable before instruction. */
} nrf_qspi_cinstr_conf_t;
/**
* @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set
*/
/** @brief Addressing mode register configuration. See @ref nrf_qspi_addrconfig_set */
typedef struct
{
uint8_t opcode; /**< Opcode used to enter proper addressing mode. */
uint8_t opcode; /**< Opcode used to enter the proper addressing mode. */
uint8_t byte0; /**< Byte following the opcode. */
uint8_t byte1; /**< Byte following byte0. */
nrf_qspi_addrconfig_mode_t mode; /**< Extended addresing mode. */
bool wipwait; /**< Enable/disable waiting for complete operation execution. */
bool wipwait; /**< Enable or disable waiting for complete operation execution. */
bool wren; /**< Send write enable before instruction. */
} nrf_qspi_addrconfig_conf_t;
/**
* @brief Structure with QSPI protocol interface configuration.
*/
/** @brief Structure with QSPI protocol interface configuration. */
typedef struct
{
nrf_qspi_readoc_t readoc; /**< Read operation code. */
@ -245,9 +209,7 @@ typedef struct
bool dpmconfig; /**< Enable the Deep Power-down Mode (DPM) feature. */
} nrf_qspi_prot_conf_t;
/**
* @brief QSPI physical interface configuration.
*/
/** @brief QSPI physical interface configuration. */
typedef struct
{
uint8_t sck_delay; /**< tSHSL, tWHSL, and tSHWL in number of 16 MHz periods (62.5ns). */
@ -256,19 +218,20 @@ typedef struct
nrf_qspi_frequency_t sck_freq; /**< SCK frequency given as enum @ref nrf_qspi_frequency_t. */
} nrf_qspi_phy_conf_t;
/**
* @brief Function for activating a specific QSPI task.
* @brief Function for activating the specified QSPI task.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task);
/**
* @brief Function for getting the address of a specific QSPI task register.
* @brief Function for getting the address of the specified QSPI task register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task QSPI task.
*
* @return Address of the specified task register.
*/
@ -276,59 +239,59 @@ __STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg,
nrf_qspi_task_t task);
/**
* @brief Function for clearing a specific QSPI event.
* @brief Function for clearing the specified QSPI event.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] qspi_event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event);
__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t event);
/**
* @brief Function for checking the state of a specific SPI event.
* @brief Function for retrieving the state of the QSPI event.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] qspi_event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event);
__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t event);
/**
* @brief Function for getting the address of a specific QSPI event register.
* @brief Function for getting the address of the specified QSPI event register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] qspi_event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg,
nrf_qspi_event_t qspi_event);
nrf_qspi_event_t event);
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] qspi_int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask);
__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] qspi_int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask);
__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] qspi_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] qspi_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
nrf_qspi_int_mask_t qspi_int);
@ -336,14 +299,14 @@ __STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
/**
* @brief Function for enabling the QSPI peripheral.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_qspi_enable(NRF_QSPI_Type * p_reg);
/**
* @brief Function for disabling the QSPI peripheral.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg);
@ -353,7 +316,7 @@ __STATIC_INLINE void nrf_qspi_disable(NRF_QSPI_Type * p_reg);
* If a given signal is not needed, pass the @ref NRF_QSPI_PIN_NOT_CONNECTED
* value instead of its pin number.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_pins Pointer to the pins configuration structure. See @ref nrf_qspi_pins_t.
*/
__STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg,
@ -362,7 +325,7 @@ __STATIC_INLINE void nrf_qspi_pins_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for setting the QSPI XIPOFFSET register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] xip_offset Address offset in the external memory for Execute in Place operation.
*/
__STATIC_INLINE void nrf_qspi_xip_offset_set(NRF_QSPI_Type * p_reg,
@ -371,8 +334,9 @@ __STATIC_INLINE void nrf_qspi_xip_offset_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for setting the QSPI IFCONFIG0 register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_config Pointer to the QSPI protocol interface configuration structure. See @ref nrf_qspi_prot_conf_t.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the QSPI protocol interface configuration structure.
* See @ref nrf_qspi_prot_conf_t.
*/
__STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg,
const nrf_qspi_prot_conf_t * p_config);
@ -380,8 +344,9 @@ __STATIC_INLINE void nrf_qspi_ifconfig0_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for setting the QSPI IFCONFIG1 register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_config Pointer to the QSPI physical interface configuration structure. See @ref nrf_qspi_phy_conf_t.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the QSPI physical interface configuration structure.
* See @ref nrf_qspi_phy_conf_t.
*/
__STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg,
const nrf_qspi_phy_conf_t * p_config);
@ -389,7 +354,7 @@ __STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for setting the QSPI ADDRCONF register.
*
* Function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure
* This function must be executed before sending task NRF_QSPI_TASK_ACTIVATE. Data stored in the structure
* is sent during the start of the peripheral. Remember that the reset instruction can set
* addressing mode to default in the memory device. If memory reset is necessary before configuring
* the addressing mode, use custom instruction feature instead of this function.
@ -397,8 +362,9 @@ __STATIC_INLINE void nrf_qspi_ifconfig1_set(NRF_QSPI_Type * p_reg,
* using a custom instruction feature (reset enable and then reset), set proper addressing mode
* using the custom instruction feature.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_config Pointer to the addressing mode configuration structure. See @ref nrf_qspi_addrconfig_conf_t.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the addressing mode configuration structure.
* See @ref nrf_qspi_addrconfig_conf_t.
*/
__STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type * p_reg,
const nrf_qspi_addrconfig_conf_t * p_config);
@ -406,7 +372,7 @@ __STATIC_INLINE void nrf_qspi_addrconfig_set(NRF_QSPI_Type *
/**
* @brief Function for setting write data into the peripheral register (without starting the process).
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the writing buffer.
* @param[in] length Lenght of the writing data.
* @param[in] dest_addr Address in memory to write to.
@ -419,7 +385,7 @@ __STATIC_INLINE void nrf_qspi_write_buffer_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for setting read data into the peripheral register (without starting the process).
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[out] p_buffer Pointer to the reading buffer.
* @param[in] length Length of the read data.
* @param[in] src_addr Address in memory to read from.
@ -432,7 +398,7 @@ __STATIC_INLINE void nrf_qspi_read_buffer_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for setting erase data into the peripheral register (without starting the process).
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] erase_addr Start address to erase. Address must have padding set to 4 bytes.
* @param[in] len Size of erasing area.
*/
@ -443,7 +409,7 @@ __STATIC_INLINE void nrf_qspi_erase_ptr_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for getting the peripheral status register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Peripheral status register.
*/
@ -452,7 +418,7 @@ __STATIC_INLINE uint32_t nrf_qspi_status_reg_get(NRF_QSPI_Type const * p_reg);
/**
* @brief Function for getting the device status register stored in the peripheral status register.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Device status register (lower byte).
*/
@ -461,10 +427,10 @@ __STATIC_INLINE uint8_t nrf_qspi_sreg_get(NRF_QSPI_Type const * p_reg);
/**
* @brief Function for checking if the peripheral is busy or not.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true If QSPI is busy.
* @retval false If QSPI is ready.
* @retval true The QSPI is busy.
* @retval false The QSPI is ready.
*/
__STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg);
@ -474,7 +440,7 @@ __STATIC_INLINE bool nrf_qspi_busy_check(NRF_QSPI_Type const * p_reg);
* This function can be ommited when using NRF_QSPI_CINSTR_LEN_1B as the length argument
* (sending only opcode without data).
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] length Length of the custom instruction data.
* @param[in] p_tx_data Pointer to the data to send with the custom instruction.
*/
@ -484,7 +450,8 @@ __STATIC_INLINE void nrf_qspi_cinstrdata_set(NRF_QSPI_Type * p_reg,
/**
* @brief Function for getting data from register after custom instruction transmission.
* @param[in] p_reg Pointer to the peripheral register structure.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] length Length of the custom instruction data.
* @param[in] p_rx_data Pointer to the reading buffer.
*/
@ -495,13 +462,46 @@ __STATIC_INLINE void nrf_qspi_cinstrdata_get(NRF_QSPI_Type const * p_reg,
/**
* @brief Function for sending custom instruction to external memory.
*
* @param[in] p_reg Pointer to the peripheral register structure.
* @param[in] p_config Pointer to the custom instruction configuration structure. See @ref nrf_qspi_cinstr_conf_t.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the custom instruction configuration structure.
* See @ref nrf_qspi_cinstr_conf_t.
*/
__STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type * p_reg,
const nrf_qspi_cinstr_conf_t * p_config);
/**
* @brief Function for starting a custom instruction long transfer.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_config Pointer to the custom instruction configuration structure.
* See @ref nrf_qspi_cinstr_conf_t.
*/
__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_start(NRF_QSPI_Type * p_reg,
const nrf_qspi_cinstr_conf_t * p_config);
/**
* @brief Function for checking whether a custom instruction long transfer is ongoing.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true Custom instruction long transfer is ongoing.
* @retval false Custom instruction long transfer is not ongoing.
*/
__STATIC_INLINE bool nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI_Type const * p_reg);
/**
* @brief Function for continuing a custom instruction long transfer.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] length Length of the custom instruction data.
* @param[in] finalize True if the custom instruction long transfer is to be finalized.
* False if the custom instruction long transfer is to be continued.
*/
__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI_Type * p_reg,
nrf_qspi_cinstr_len_t length,
bool finalize);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_qspi_task_trigger(NRF_QSPI_Type * p_reg, nrf_qspi_task_t task)
@ -515,30 +515,30 @@ __STATIC_INLINE uint32_t nrf_qspi_task_address_get(NRF_QSPI_Type const * p_reg,
return ((uint32_t)p_reg + (uint32_t)task);
}
__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t qspi_event)
__STATIC_INLINE void nrf_qspi_event_clear(NRF_QSPI_Type * p_reg, nrf_qspi_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
}
__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t qspi_event)
__STATIC_INLINE bool nrf_qspi_event_check(NRF_QSPI_Type const * p_reg, nrf_qspi_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event);
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t * nrf_qspi_event_address_get(NRF_QSPI_Type const * p_reg,
nrf_qspi_event_t qspi_event)
nrf_qspi_event_t event)
{
return (uint32_t *)((uint8_t *)p_reg + (uint32_t)qspi_event);
return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask)
__STATIC_INLINE void nrf_qspi_int_enable(NRF_QSPI_Type * p_reg, uint32_t mask)
{
p_reg->INTENSET = qspi_int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t qspi_int_mask)
__STATIC_INLINE void nrf_qspi_int_disable(NRF_QSPI_Type * p_reg, uint32_t mask)
{
p_reg->INTENCLR = qspi_int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_qspi_int_enable_check(NRF_QSPI_Type const * p_reg,
@ -755,6 +755,34 @@ __STATIC_INLINE void nrf_qspi_cinstr_transfer_start(NRF_QSPI_Type *
((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos));
}
__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_start(NRF_QSPI_Type * p_reg,
const nrf_qspi_cinstr_conf_t * p_config)
{
p_reg->CINSTRCONF = (((uint32_t)p_config->opcode << QSPI_CINSTRCONF_OPCODE_Pos) |
((uint32_t)p_config->length << QSPI_CINSTRCONF_LENGTH_Pos) |
((uint32_t)p_config->io2_level << QSPI_CINSTRCONF_LIO2_Pos) |
((uint32_t)p_config->io3_level << QSPI_CINSTRCONF_LIO3_Pos) |
((uint32_t)p_config->wipwait << QSPI_CINSTRCONF_WIPWAIT_Pos) |
((uint32_t)p_config->wren << QSPI_CINSTRCONF_WREN_Pos) |
(QSPI_CINSTRCONF_LFEN_Msk));
}
__STATIC_INLINE bool nrf_qspi_cinstr_long_transfer_is_ongoing(NRF_QSPI_Type const * p_reg)
{
return (bool)((p_reg->CINSTRCONF & (QSPI_CINSTRCONF_LFEN_Msk | QSPI_CINSTRCONF_LFSTOP_Msk))
== QSPI_CINSTRCONF_LFEN_Msk);
}
__STATIC_INLINE void nrf_qspi_cinstr_long_transfer_continue(NRF_QSPI_Type * p_reg,
nrf_qspi_cinstr_len_t length,
bool finalize)
{
uint32_t mask = (((uint32_t)length << QSPI_CINSTRCONF_LENGTH_Pos) | (QSPI_CINSTRCONF_LFEN_Msk));
mask |= (finalize ? QSPI_CINSTRCONF_LFSTOP_Msk : 0);
p_reg->CINSTRCONF = mask;
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION
/** @} */

161
ext/hal/nordic/nrfx/hal/nrf_radio.h
View file

@ -45,12 +45,9 @@ extern "C" {
* @brief Hardware access layer for managing the RADIO peripheral.
*/
/**
* @brief RADIO tasks.
*/
/** @brief RADIO tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_RADIO_TASK_TXEN = offsetof(NRF_RADIO_Type, TASKS_TXEN), /**< Enable RADIO in TX mode. */
NRF_RADIO_TASK_RXEN = offsetof(NRF_RADIO_Type, TASKS_RXEN), /**< Enable RADIO in RX mode. */
NRF_RADIO_TASK_START = offsetof(NRF_RADIO_Type, TASKS_START), /**< Start RADIO. */
@ -72,15 +69,11 @@ typedef enum
#if defined(RADIO_TASKS_CCASTOP_TASKS_CCASTOP_Msk) || defined(__NRFX_DOXYGEN__)
NRF_RADIO_TASK_CCASTOP = offsetof(NRF_RADIO_Type, TASKS_CCASTOP), /**< Stop the Clear Channel Assessment. */
#endif
/*lint -restore*/
} nrf_radio_task_t;
/**
* @brief RADIO events.
*/
/** @brief RADIO events. */
typedef enum
{
/*lint -save -e30*/
NRF_RADIO_EVENT_READY = offsetof(NRF_RADIO_Type, EVENTS_READY), /**< Radio has ramped up and is ready to be started. */
NRF_RADIO_EVENT_ADDRESS = offsetof(NRF_RADIO_Type, EVENTS_ADDRESS), /**< Address sent or received. */
NRF_RADIO_EVENT_PAYLOAD = offsetof(NRF_RADIO_Type, EVENTS_PAYLOAD), /**< Packet payload sent or received. */
@ -131,12 +124,9 @@ typedef enum
and BleIeee802154_250Kbit modes when last
bit is sent on the air. */
#endif
/*lint -restore*/
} nrf_radio_event_t;
/**
* @brief RADIO interrupts.
*/
/** @brief RADIO interrupts. */
typedef enum
{
NRF_RADIO_INT_READY_MASK = RADIO_INTENSET_READY_Msk, /**< Interrupt on READY event. */
@ -189,9 +179,7 @@ typedef enum
#endif
} nrf_radio_int_mask_t;
/**
* @brief RADIO shortcuts.
*/
/** @brief RADIO shortcuts. */
typedef enum
{
NRF_RADIO_SHORT_READY_START_MASK = RADIO_SHORTS_READY_START_Msk, /**< Shortcut between READY event and START task. */
@ -238,9 +226,7 @@ typedef enum
} nrf_radio_short_mask_t;
#if defined(RADIO_CCACTRL_CCAMODE_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief RADIO Clear Channel Assessment modes.
*/
/** @brief RADIO Clear Channel Assessment modes. */
typedef enum
{
NRF_RADIO_CCA_MODE_ED = RADIO_CCACTRL_CCAMODE_EdMode, /**< Energy Above Threshold. Will report busy whenever energy is detected above set threshold. */
@ -251,9 +237,7 @@ typedef enum
} nrf_radio_cca_mode_t;
#endif // defined(RADIO_CCACTRL_CCAMODE_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Types of RADIO States.
*/
/** @brief Types of RADIO states. */
typedef enum
{
NRF_RADIO_STATE_DISABLED = RADIO_STATE_STATE_Disabled, /**< No operations are going on inside the radio and the power consumption is at a minimum. */
@ -267,9 +251,7 @@ typedef enum
NRF_RADIO_STATE_TXDISABLE = RADIO_STATE_STATE_TxDisable, /**< The radio is disabling the transmitter. */
} nrf_radio_state_t;
/**
* @brief Types of RADIO TX power.
*/
/** @brief Types of RADIO TX power. */
typedef enum
{
#if defined(RADIO_TXPOWER_TXPOWER_Pos8dBm) || defined(__NRFX_DOXYGEN__)
@ -303,9 +285,7 @@ typedef enum
#endif
} nrf_radio_txpower_t;
/**
* @brief Types of RADIO modes (data rate and modulation).
*/
/** @brief Types of RADIO modes (data rate and modulation). */
typedef enum
{
NRF_RADIO_MODE_NRF_1MBIT = RADIO_MODE_MODE_Nrf_1Mbit, /**< 1Mbit/s Nordic proprietary radio mode. */
@ -329,9 +309,7 @@ typedef enum
} nrf_radio_mode_t;
#if defined(RADIO_PCNF0_PLEN_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Types of preamble length.
*/
/** @brief Types of preamble length. */
typedef enum
{
NRF_RADIO_PREAMBLE_LENGTH_8BIT = RADIO_PCNF0_PLEN_8bit, /**< 8-bit preamble. */
@ -345,9 +323,7 @@ typedef enum
} nrf_radio_preamble_length_t;
#endif // defined(RADIO_PCNF0_PLEN_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Types of CRC calculatons regarding address.
*/
/** @brief Types of CRC calculatons regarding address. */
typedef enum
{
NRF_RADIO_CRC_ADDR_INCLUDE = RADIO_CRCCNF_SKIPADDR_Include, /**< CRC calculation includes address field. */
@ -357,9 +333,7 @@ typedef enum
#endif
} nrf_radio_crc_addr_t;
/**
* @brief Packet configuration.
*/
/** @brief Packet configuration. */
typedef struct
{
uint8_t lflen; /**< Length on air of LENGTH field in number of bits. */
@ -390,70 +364,69 @@ typedef struct
/**
* @brief Function for activating a specific RADIO task.
*
* @param[in] radio_task Task to activate.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t radio_task);
__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t task);
/**
* @brief Function for getting the address of a specific RADIO task register.
*
* This function can be used by the PPI module.
*
* @param[in] radio_task Requested task.
* @param[in] task Requested task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t radio_task);
__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t task);
/**
* @brief Function for clearing a specific RADIO event.
*
* @param[in] radio_event Event to clean.
* @param[in] event Event to clean.
*/
__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t radio_event);
__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t event);
/**
* @brief Function for checking the state of a specific RADIO event.
* @brief Function for retrieving the state of the RADIO event.
*
* @param[in] radio_event Event to check.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t radio_event);
__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t event);
/**
* @brief Function for getting the address of a specific RADIO event register.
*
* This function can be used by the PPI module.
*
* @param[in] radio_event Requested Event.
* @param[in] event Requested Event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t radio_event);
__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t event);
/**
* @brief Function for enabling specified RADIO shortcuts.
*
* @param[in] radio_shorts_mask Mask of shortcuts.
*
* @param[in] shorts_mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t radio_shorts_mask);
__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t shorts_mask);
/**
* @brief Function for disabling specified RADIO shortcuts.
*
* @param[in] radio_shorts_mask Mask of shortcuts.
* @param[in] shorts_mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t radio_shorts_mask);
__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t shorts_mask);
/**
* @brief Function for setting the configuration of RADIO shortcuts.
*
* @param[in] radio_shorts_mask Shortcuts configuration to set.
* @param[in] shorts_mask Shortcuts configuration to set.
*/
__STATIC_INLINE void nrf_radio_shorts_set(uint32_t radio_shorts_mask);
__STATIC_INLINE void nrf_radio_shorts_set(uint32_t shorts_mask);
/**
* @brief Function for getting the configuration of RADIO shortcuts.
@ -465,32 +438,32 @@ __STATIC_INLINE uint32_t nrf_radio_shorts_get(void);
/**
* @brief Function for enabling specified RADIO interrupts.
*
* @param[in] radio_int_mask Mask of interrupts.
* @param[in] int_mask Mask of interrupts.
*/
__STATIC_INLINE void nrf_radio_int_enable(uint32_t radio_int_mask);
__STATIC_INLINE void nrf_radio_int_enable(uint32_t int_mask);
/**
* @brief Function for disabling specified RADIO interrupts.
*
* @param[in] radio_int_mask Mask of interrupts.
* @param[in] int_mask Mask of interrupts.
*/
__STATIC_INLINE void nrf_radio_int_disable(uint32_t radio_int_mask);
__STATIC_INLINE void nrf_radio_int_disable(uint32_t int_mask);
/**
* @brief Function for getting the state of a specific interrupt.
*
* @param[in] radio_int_mask Interrupt to check.
* @param[in] int_mask Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t radio_int_mask);
__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t int_mask);
/**
* @brief Function for getting CRC status of last received packet.
*
* @retval true If the packet was received without CRC error .
* @retval false If the packet was received with CRC error.
* @retval true The packet was received without CRC error.
* @retval false The packet was received with CRC error.
*/
__STATIC_INLINE bool nrf_radio_crc_status_check(void);
@ -519,16 +492,16 @@ __STATIC_INLINE uint8_t nrf_radio_dai_get(void);
/**
* @brief Function for getting status on payload length.
*
* @retval 0 If the payload is lesser than PCNF1.MAXLEN.
* @retval 1 If the payload is greater than PCNF1.MAXLEN.
* @retval 0 The payload is lesser than PCNF1.MAXLEN.
* @retval 1 The payload is greater than PCNF1.MAXLEN.
*/
__STATIC_INLINE uint8_t nrf_radio_pdustat_get(void);
/**
* @brief Function for getting status on what rate packet is received with in Long Range.
*
* @retval 0 If the frame is received at 125kbps.
* @retval 1 If the frame is received at 500kbps.
* @retval 0 The frame is received at 125kbps.
* @retval 1 The frame is received at 500kbps.
*/
__STATIC_INLINE uint8_t nrf_radio_cistat_get(void);
#endif // defined(RADIO_PDUSTAT_PDUSTAT_Msk) || defined(__NRFX_DOXYGEN__)
@ -940,48 +913,48 @@ __STATIC_INLINE void nrf_radio_power_set(bool radio_power);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t radio_task)
__STATIC_INLINE void nrf_radio_task_trigger(nrf_radio_task_t task)
{
*((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_task)) = 0x1UL;
*((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t radio_task)
__STATIC_INLINE uint32_t nrf_radio_task_address_get(nrf_radio_task_t task)
{
return ((uint32_t)NRF_RADIO + (uint32_t)radio_task);
return ((uint32_t)NRF_RADIO + (uint32_t)task);
}
__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t radio_event)
__STATIC_INLINE void nrf_radio_event_clear(nrf_radio_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t radio_event)
__STATIC_INLINE bool nrf_radio_event_check(nrf_radio_event_t event)
{
return (bool) *((volatile uint32_t *)((uint8_t *)NRF_RADIO + radio_event));
return (bool) *((volatile uint32_t *)((uint8_t *)NRF_RADIO + (uint32_t)event));
}
__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t radio_event)
__STATIC_INLINE uint32_t nrf_radio_event_address_get(nrf_radio_event_t event)
{
return ((uint32_t)NRF_RADIO + (uint32_t)radio_event);
return ((uint32_t)NRF_RADIO + (uint32_t)event);
}
__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t radio_shorts_mask)
__STATIC_INLINE void nrf_radio_shorts_enable(uint32_t shorts_mask)
{
NRF_RADIO->SHORTS |= radio_shorts_mask;
NRF_RADIO->SHORTS |= shorts_mask;
}
__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t radio_shorts_mask)
__STATIC_INLINE void nrf_radio_shorts_disable(uint32_t shorts_mask)
{
NRF_RADIO->SHORTS &= ~radio_shorts_mask;
NRF_RADIO->SHORTS &= ~shorts_mask;
}
__STATIC_INLINE void nrf_radio_shorts_set(uint32_t radio_shorts_mask)
__STATIC_INLINE void nrf_radio_shorts_set(uint32_t shorts_mask)
{
NRF_RADIO->SHORTS = radio_shorts_mask;
NRF_RADIO->SHORTS = shorts_mask;
}
__STATIC_INLINE uint32_t nrf_radio_shorts_get(void)
@ -989,19 +962,19 @@ __STATIC_INLINE uint32_t nrf_radio_shorts_get(void)
return NRF_RADIO->SHORTS;
}
__STATIC_INLINE void nrf_radio_int_enable(uint32_t radio_int_mask)
__STATIC_INLINE void nrf_radio_int_enable(uint32_t int_mask)
{
NRF_RADIO->INTENSET = radio_int_mask;
NRF_RADIO->INTENSET = int_mask;
}
__STATIC_INLINE void nrf_radio_int_disable(uint32_t radio_int_mask)
__STATIC_INLINE void nrf_radio_int_disable(uint32_t int_mask)
{
NRF_RADIO->INTENCLR = radio_int_mask;
NRF_RADIO->INTENCLR = int_mask;
}
__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t radio_int_mask)
__STATIC_INLINE bool nrf_radio_int_enable_check(nrf_radio_int_mask_t int_mask)
{
return (bool)(NRF_RADIO->INTENSET & radio_int_mask);
return (bool)(NRF_RADIO->INTENSET & int_mask);
}
__STATIC_INLINE bool nrf_radio_crc_status_check(void)

4
ext/hal/nordic/nrfx/hal/nrf_regulators.h
View file

@ -48,7 +48,7 @@ extern "C" {
/**
* @brief Function for enabling or disabling DCDC converter.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] enable Set true to enable or false to disable DCDC converter.
*/
__STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool enable);
@ -61,7 +61,7 @@ __STATIC_INLINE void nrf_regulators_dcdcen_set(NRF_REGULATORS_Type * p_reg, bool
*
* @note This function never returns.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_regulators_system_off(NRF_REGULATORS_Type * p_reg);

136
ext/hal/nordic/nrfx/hal/nrf_rng.h
View file

@ -42,201 +42,187 @@ extern "C" {
* @defgroup nrf_rng_hal RNG HAL
* @{
* @ingroup nrf_rng
* @brief Hardware access layer for managing the Random Number Generator (RNG) peripheral.
* @brief Hardware access layer (HAL) for managing the Random Number Generator (RNG) peripheral.
*/
#define NRF_RNG_TASK_SET (1UL)
#define NRF_RNG_EVENT_CLEAR (0UL)
/**
* @enum nrf_rng_task_t
* @brief RNG tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief RNG tasks. */
typedef enum
{
NRF_RNG_TASK_START = offsetof(NRF_RNG_Type, TASKS_START), /**< Start the random number generator. */
NRF_RNG_TASK_STOP = offsetof(NRF_RNG_Type, TASKS_STOP) /**< Stop the random number generator. */
} nrf_rng_task_t; /*lint -restore */
} nrf_rng_task_t;
/**
* @enum nrf_rng_event_t
* @brief RNG events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief RNG events. */
typedef enum
{
NRF_RNG_EVENT_VALRDY = offsetof(NRF_RNG_Type, EVENTS_VALRDY) /**< New random number generated event. */
} nrf_rng_event_t; /*lint -restore */
} nrf_rng_event_t;
/**
* @enum nrf_rng_int_mask_t
* @brief RNG interrupts.
*/
/** @brief RNG interrupts. */
typedef enum
{
NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */
NRF_RNG_INT_VALRDY_MASK = RNG_INTENSET_VALRDY_Msk /**< Mask for enabling or disabling an interrupt on VALRDY event. */
} nrf_rng_int_mask_t;
/**
* @enum nrf_rng_short_mask_t
* @brief Types of RNG shortcuts.
*/
/** @brief Types of RNG shortcuts. */
typedef enum
{
NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */
NRF_RNG_SHORT_VALRDY_STOP_MASK = RNG_SHORTS_VALRDY_STOP_Msk /**< Mask for setting shortcut between EVENT_VALRDY and TASK_STOP. */
} nrf_rng_short_mask_t;
/**
* @brief Function for enabling interrupts.
*
* @param[in] rng_int_mask Mask of interrupts.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask);
__STATIC_INLINE void nrf_rng_int_enable(uint32_t mask);
/**
* @brief Function for disabling interrupts.
*
* @param[in] rng_int_mask Mask of interrupts.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask);
__STATIC_INLINE void nrf_rng_int_disable(uint32_t mask);
/**
* @brief Function for getting the state of a specific interrupt.
* @brief Function for getting the state of the specified interrupt.
*
* @param[in] rng_int_mask Interrupt.
* @param[in] mask Interrupts to be checked.
*
* @retval true If the interrupt is not enabled.
* @retval false If the interrupt is enabled.
* @retval true The interrupt is not enabled.
* @retval false The interrupt is enabled.
*/
__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask);
__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t mask);
/**
* @brief Function for getting the address of a specific task.
* @brief Function for getting the address of the specified task.
*
* This function can be used by the PPI module.
*
* @param[in] rng_task Task.
* @param[in] rng_task The specified task.
*
* @return Address of the specified task.
*/
__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task);
/**
* @brief Function for setting a specific task.
* @brief Function for triggering the specified task.
*
* @param[in] rng_task Task.
* @param[in] rng_task The specified Task.
*/
__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task);
/**
* @brief Function for getting address of a specific event.
* @brief Function for getting address of the specified event.
*
* This function can be used by the PPI module.
*
* @param[in] rng_event Event.
* @param[in] rng_event The specified event.
*
* @return Address of the specified event.
*/
__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event);
/**
* @brief Function for clearing a specific event.
* @brief Function for clearing the specified event.
*
* @param[in] rng_event Event.
* @param[in] rng_event The specified event.
*/
__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event);
/**
* @brief Function for getting the state of a specific event.
* @brief Function for getting the state of the specified event.
*
* @param[in] rng_event Event.
* @param[in] rng_event The specified event.
*
* @retval true If the event is not set.
* @retval false If the event is set.
* @retval true The event is not set.
* @retval false The event is set.
*/
__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event);
/**
* @brief Function for setting shortcuts.
*
* @param[in] rng_short_mask Mask of shortcuts.
*
* @param[in] mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask);
__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t mask);
/**
* @brief Function for clearing shortcuts.
*
* @param[in] rng_short_mask Mask of shortcuts.
*
* @param[in] mask Mask of shortcuts.
*/
__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask);
__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t mask);
/**
* @brief Function for getting the previously generated random value.
*
* @return Previously generated random value.
* @return Previously generated random value.
*/
__STATIC_INLINE uint8_t nrf_rng_random_value_get(void);
/**
* @brief Function for enabling digital error correction.
*/
/** @brief Function for enabling digital error correction. */
__STATIC_INLINE void nrf_rng_error_correction_enable(void);
/**
* @brief Function for disabling digital error correction.
*/
/** @brief Function for disabling digital error correction. */
__STATIC_INLINE void nrf_rng_error_correction_disable(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_rng_int_enable(uint32_t rng_int_mask)
__STATIC_INLINE void nrf_rng_int_enable(uint32_t mask)
{
NRF_RNG->INTENSET = rng_int_mask;
NRF_RNG->INTENSET = mask;
}
__STATIC_INLINE void nrf_rng_int_disable(uint32_t rng_int_mask)
__STATIC_INLINE void nrf_rng_int_disable(uint32_t mask)
{
NRF_RNG->INTENCLR = rng_int_mask;
NRF_RNG->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t rng_int_mask)
__STATIC_INLINE bool nrf_rng_int_get(nrf_rng_int_mask_t mask)
{
return (bool)(NRF_RNG->INTENCLR & rng_int_mask);
return (bool)(NRF_RNG->INTENCLR & mask);
}
__STATIC_INLINE uint32_t * nrf_rng_task_address_get(nrf_rng_task_t rng_task)
{
return (uint32_t *)((uint8_t *)NRF_RNG + rng_task);
return (uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_task);
}
__STATIC_INLINE void nrf_rng_task_trigger(nrf_rng_task_t rng_task)
{
*((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_task)) = NRF_RNG_TASK_SET;
*((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_task)) = 0x1UL;
}
__STATIC_INLINE uint32_t * nrf_rng_event_address_get(nrf_rng_event_t rng_event)
{
return (uint32_t *)((uint8_t *)NRF_RNG + rng_event);
return (uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event);
}
__STATIC_INLINE void nrf_rng_event_clear(nrf_rng_event_t rng_event)
{
*((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event)) = NRF_RNG_EVENT_CLEAR;
*((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_rng_event_get(nrf_rng_event_t rng_event)
{
return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + rng_event));
return (bool) * ((volatile uint32_t *)((uint8_t *)NRF_RNG + (uint32_t)rng_event));
}
__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t rng_short_mask)
__STATIC_INLINE void nrf_rng_shorts_enable(uint32_t mask)
{
NRF_RNG->SHORTS |= rng_short_mask;
NRF_RNG->SHORTS |= mask;
}
__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t rng_short_mask)
__STATIC_INLINE void nrf_rng_shorts_disable(uint32_t mask)
{
NRF_RNG->SHORTS &= ~rng_short_mask;
NRF_RNG->SHORTS &= ~mask;
}
__STATIC_INLINE uint8_t nrf_rng_random_value_get(void)

29
ext/hal/nordic/nrfx/hal/nrf_rtc.h
View file

@ -46,44 +46,42 @@ extern "C" {
*/
/** @brief Macro for getting the number of compare channels available in a given RTC instance. */
#define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM)
#define NRF_RTC_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(RTC, id, _CC_NUM)
#define RTC_INPUT_FREQ 32768 /**< Input frequency of the RTC instance. */
/** @brief Input frequency of the RTC instance. */
#define RTC_INPUT_FREQ 32768
/** @brief Macro for converting expected frequency to prescaler setting. */
#define RTC_FREQ_TO_PRESCALER(FREQ) (uint16_t)(((RTC_INPUT_FREQ) / (FREQ)) - 1)
/**< Macro for wrapping values to RTC capacity. */
/** @brief Macro for trimming values to the RTC bit width. */
#define RTC_WRAP(val) ((val) & RTC_COUNTER_COUNTER_Msk)
#define RTC_CHANNEL_INT_MASK(ch) \
((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch))
/** @brief Macro for creating the interrupt bitmask for the specified compare channel. */
#define RTC_CHANNEL_INT_MASK(ch) ((uint32_t)(NRF_RTC_INT_COMPARE0_MASK) << (ch))
/** @brief Macro for obtaining the compare event for the specified channel. */
#define RTC_CHANNEL_EVENT_ADDR(ch) (nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t))
#define RTC_CHANNEL_EVENT_ADDR(ch) \
(nrf_rtc_event_t)((NRF_RTC_EVENT_COMPARE_0) + (ch) * sizeof(uint32_t))
/** @brief RTC tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_RTC_TASK_START = offsetof(NRF_RTC_Type,TASKS_START), /**< Start. */
NRF_RTC_TASK_STOP = offsetof(NRF_RTC_Type,TASKS_STOP), /**< Stop. */
NRF_RTC_TASK_CLEAR = offsetof(NRF_RTC_Type,TASKS_CLEAR), /**< Clear. */
NRF_RTC_TASK_TRIGGER_OVERFLOW = offsetof(NRF_RTC_Type,TASKS_TRIGOVRFLW),/**< Trigger overflow. */
/*lint -restore*/
} nrf_rtc_task_t;
/** @brief RTC events. */
typedef enum
{
/*lint -save -e30*/
NRF_RTC_EVENT_TICK = offsetof(NRF_RTC_Type,EVENTS_TICK), /**< Tick event. */
NRF_RTC_EVENT_OVERFLOW = offsetof(NRF_RTC_Type,EVENTS_OVRFLW), /**< Overflow event. */
NRF_RTC_EVENT_COMPARE_0 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[0]), /**< Compare 0 event. */
NRF_RTC_EVENT_COMPARE_1 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[1]), /**< Compare 1 event. */
NRF_RTC_EVENT_COMPARE_2 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[2]), /**< Compare 2 event. */
NRF_RTC_EVENT_COMPARE_3 = offsetof(NRF_RTC_Type,EVENTS_COMPARE[3]) /**< Compare 3 event. */
/*lint -restore*/
} nrf_rtc_event_t;
/** @brief RTC interrupts. */
@ -97,12 +95,13 @@ typedef enum
NRF_RTC_INT_COMPARE3_MASK = RTC_INTENSET_COMPARE3_Msk /**< RTC interrupt from compare event on channel 3. */
} nrf_rtc_int_t;
/**
* @brief Function for setting a compare value for a channel.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ch Channel.
* @param[in] cc_val Compare value to set.
* @param[in] cc_val Compare value to be set.
*/
__STATIC_INLINE void nrf_rtc_cc_set(NRF_RTC_Type * p_reg, uint32_t ch, uint32_t cc_val);
@ -136,7 +135,7 @@ __STATIC_INLINE void nrf_rtc_int_disable(NRF_RTC_Type * p_reg, uint32_t mask);
* @brief Function for checking if interrupts are enabled.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupt flags to check.
* @param[in] mask Mask of interrupt flags to be checked.
*
* @return Mask with enabled interrupts.
*/
@ -211,7 +210,7 @@ __STATIC_INLINE uint32_t nrf_rtc_event_pending(NRF_RTC_Type * p_reg, nrf_rtc_eve
* @brief Function for clearing an event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
* @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_rtc_event_clear(NRF_RTC_Type * p_reg, nrf_rtc_event_t event);
@ -264,7 +263,7 @@ __STATIC_INLINE void nrf_rtc_task_trigger(NRF_RTC_Type * p_reg, nrf_rtc_task_t t
* @brief Function for enabling events.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of event flags to enable.
* @param[in] mask Mask of event flags to be enabled.
*/
__STATIC_INLINE void nrf_rtc_event_enable(NRF_RTC_Type * p_reg, uint32_t mask);

230
ext/hal/nordic/nrfx/hal/nrf_saadc.h
View file

@ -45,11 +45,11 @@ extern "C" {
* @brief Hardware access layer for managing the SAADC peripheral.
*/
/** @brief Number of available SAADC channels. */
#define NRF_SAADC_CHANNEL_COUNT 8
/**
* @brief Resolution of the analog-to-digital converter.
*/
/** @brief Resolution of the analog-to-digital converter. */
typedef enum
{
NRF_SAADC_RESOLUTION_8BIT = SAADC_RESOLUTION_VAL_8bit, ///< 8 bit resolution.
@ -58,10 +58,7 @@ typedef enum
NRF_SAADC_RESOLUTION_14BIT = SAADC_RESOLUTION_VAL_14bit ///< 14 bit resolution.
} nrf_saadc_resolution_t;
/**
* @brief Input selection for the analog-to-digital converter.
*/
/** @brief Input selection for the analog-to-digital converter. */
typedef enum
{
NRF_SAADC_INPUT_DISABLED = SAADC_CH_PSELP_PSELP_NC, ///< Not connected.
@ -76,10 +73,7 @@ typedef enum
NRF_SAADC_INPUT_VDD = SAADC_CH_PSELP_PSELP_VDD ///< VDD as input.
} nrf_saadc_input_t;
/**
* @brief Analog-to-digital converter oversampling mode.
*/
/** @brief Analog-to-digital converter oversampling mode. */
typedef enum
{
NRF_SAADC_OVERSAMPLE_DISABLED = SAADC_OVERSAMPLE_OVERSAMPLE_Bypass, ///< No oversampling.
@ -93,10 +87,7 @@ typedef enum
NRF_SAADC_OVERSAMPLE_256X = SAADC_OVERSAMPLE_OVERSAMPLE_Over256x ///< Oversample 256x.
} nrf_saadc_oversample_t;
/**
* @brief Analog-to-digital converter channel resistor control.
*/
/** @brief Analog-to-digital converter channel resistor control. */
typedef enum
{
NRF_SAADC_RESISTOR_DISABLED = SAADC_CH_CONFIG_RESP_Bypass, ///< Bypass resistor ladder.
@ -105,10 +96,7 @@ typedef enum
NRF_SAADC_RESISTOR_VDD1_2 = SAADC_CH_CONFIG_RESP_VDD1_2 ///< Set input at VDD/2.
} nrf_saadc_resistor_t;
/**
* @brief Gain factor of the analog-to-digital converter input.
*/
/** @brief Gain factor of the analog-to-digital converter input. */
typedef enum
{
NRF_SAADC_GAIN1_6 = SAADC_CH_CONFIG_GAIN_Gain1_6, ///< Gain factor 1/6.
@ -121,20 +109,14 @@ typedef enum
NRF_SAADC_GAIN4 = SAADC_CH_CONFIG_GAIN_Gain4, ///< Gain factor 4.
} nrf_saadc_gain_t;
/**
* @brief Reference selection for the analog-to-digital converter.
*/
/** @brief Reference selection for the analog-to-digital converter. */
typedef enum
{
NRF_SAADC_REFERENCE_INTERNAL = SAADC_CH_CONFIG_REFSEL_Internal, ///< Internal reference (0.6 V).
NRF_SAADC_REFERENCE_VDD4 = SAADC_CH_CONFIG_REFSEL_VDD1_4 ///< VDD/4 as reference.
} nrf_saadc_reference_t;
/**
* @brief Analog-to-digital converter acquisition time.
*/
/** @brief Analog-to-digital converter acquisition time. */
typedef enum
{
NRF_SAADC_ACQTIME_3US = SAADC_CH_CONFIG_TACQ_3us, ///< 3 us.
@ -145,43 +127,31 @@ typedef enum
NRF_SAADC_ACQTIME_40US = SAADC_CH_CONFIG_TACQ_40us ///< 40 us.
} nrf_saadc_acqtime_t;
/**
* @brief Analog-to-digital converter channel mode.
*/
/** @brief Analog-to-digital converter channel mode. */
typedef enum
{
NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single ended, PSELN will be ignored, negative input to ADC shorted to GND.
NRF_SAADC_MODE_SINGLE_ENDED = SAADC_CH_CONFIG_MODE_SE, ///< Single-ended mode. PSELN will be ignored, negative input to ADC shorted to GND.
NRF_SAADC_MODE_DIFFERENTIAL = SAADC_CH_CONFIG_MODE_Diff ///< Differential mode.
} nrf_saadc_mode_t;
/**
* @brief Analog-to-digital converter channel burst mode.
*/
/** @brief Analog-to-digital converter channel burst mode. */
typedef enum
{
NRF_SAADC_BURST_DISABLED = SAADC_CH_CONFIG_BURST_Disabled, ///< Burst mode is disabled (normal operation).
NRF_SAADC_BURST_ENABLED = SAADC_CH_CONFIG_BURST_Enabled ///< Burst mode is enabled. SAADC takes 2^OVERSAMPLE number of samples as fast as it can, and sends the average to Data RAM.
} nrf_saadc_burst_t;
/**
* @brief Analog-to-digital converter tasks.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief Analog-to-digital converter tasks. */
typedef enum
{
NRF_SAADC_TASK_START = offsetof(NRF_SAADC_Type, TASKS_START), ///< Start the ADC and prepare the result buffer in RAM.
NRF_SAADC_TASK_SAMPLE = offsetof(NRF_SAADC_Type, TASKS_SAMPLE), ///< Take one ADC sample. If scan is enabled, all channels are sampled.
NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any on-going conversion.
NRF_SAADC_TASK_STOP = offsetof(NRF_SAADC_Type, TASKS_STOP), ///< Stop the ADC and terminate any ongoing conversion.
NRF_SAADC_TASK_CALIBRATEOFFSET = offsetof(NRF_SAADC_Type, TASKS_CALIBRATEOFFSET), ///< Starts offset auto-calibration.
} nrf_saadc_task_t;
/**
* @brief Analog-to-digital converter events.
*/
typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
/** @brief Analog-to-digital converter events. */
typedef enum
{
NRF_SAADC_EVENT_STARTED = offsetof(NRF_SAADC_Type, EVENTS_STARTED), ///< The ADC has started.
NRF_SAADC_EVENT_END = offsetof(NRF_SAADC_Type, EVENTS_END), ///< The ADC has filled up the result buffer.
@ -207,10 +177,7 @@ typedef enum /*lint -save -e30 -esym(628,__INTADDR__) */
NRF_SAADC_EVENT_CH7_LIMITL = offsetof(NRF_SAADC_Type, EVENTS_CH[7].LIMITL) ///< Last result is equal or below CH[7].LIMIT.LOW.
} nrf_saadc_event_t;
/**
* @brief Analog-to-digital converter interrupt masks.
*/
/** @brief Analog-to-digital converter interrupt masks. */
typedef enum
{
NRF_SAADC_INT_STARTED = SAADC_INTENSET_STARTED_Msk, ///< Interrupt on EVENTS_STARTED event.
@ -238,88 +205,81 @@ typedef enum
NRF_SAADC_INT_ALL = 0x7FFFFFFFUL ///< Mask of all interrupts.
} nrf_saadc_int_mask_t;
/**
* @brief Analog-to-digital converter value limit type.
*/
/** @brief Analog-to-digital converter value limit type. */
typedef enum
{
NRF_SAADC_LIMIT_LOW = 0,
NRF_SAADC_LIMIT_HIGH = 1
NRF_SAADC_LIMIT_LOW = 0, ///< Low limit type.
NRF_SAADC_LIMIT_HIGH = 1 ///< High limit type.
} nrf_saadc_limit_t;
/** @brief Type of a single ADC conversion result. */
typedef int16_t nrf_saadc_value_t;
typedef int16_t nrf_saadc_value_t; ///< Type of a single ADC conversion result.
/**
* @brief Analog-to-digital converter configuration structure.
*/
/** @brief Analog-to-digital converter configuration structure. */
typedef struct
{
nrf_saadc_resolution_t resolution;
nrf_saadc_oversample_t oversample;
nrf_saadc_value_t * buffer;
uint32_t buffer_size;
nrf_saadc_resolution_t resolution; ///< Resolution of samples.
nrf_saadc_oversample_t oversample; ///< Oversampling configuration.
nrf_saadc_value_t * buffer; ///< Pointer to sample buffer.
uint32_t buffer_size; ///< Size of the sample buffer.
} nrf_saadc_config_t;
/**
* @brief Analog-to-digital converter channel configuration structure.
*/
/** @brief Analog-to-digital converter channel configuration structure. */
typedef struct
{
nrf_saadc_resistor_t resistor_p;
nrf_saadc_resistor_t resistor_n;
nrf_saadc_gain_t gain;
nrf_saadc_reference_t reference;
nrf_saadc_acqtime_t acq_time;
nrf_saadc_mode_t mode;
nrf_saadc_burst_t burst;
nrf_saadc_input_t pin_p;
nrf_saadc_input_t pin_n;
nrf_saadc_resistor_t resistor_p; ///< Resistor value on positive input.
nrf_saadc_resistor_t resistor_n; ///< Resistor value on negative input.
nrf_saadc_gain_t gain; ///< Gain control value.
nrf_saadc_reference_t reference; ///< Reference control value.
nrf_saadc_acqtime_t acq_time; ///< Acquisition time.
nrf_saadc_mode_t mode; ///< SAADC mode. Single-ended or differential.
nrf_saadc_burst_t burst; ///< Burst mode configuration.
nrf_saadc_input_t pin_p; ///< Input positive pin selection.
nrf_saadc_input_t pin_n; ///< Input negative pin selection.
} nrf_saadc_channel_config_t;
/**
* @brief Function for triggering a specific SAADC task.
*
* @param[in] saadc_task SAADC task.
*/
__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task);
/**
* @brief Function for getting the address of a specific SAADC task register.
* @brief Function for triggering the specified SAADC task.
*
* @param[in] saadc_task SAADC task.
* @param[in] task SAADC task.
*/
__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t task);
/**
* @brief Function for getting the address of the specified SAADC task register.
*
* @param[in] task SAADC task.
*
* @return Address of the specified SAADC task.
*/
__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task);
__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t task);
/**
* @brief Function for getting the state of a specific SAADC event.
* @brief Function for retrieving the state of the UARTE event.
*
* @param[in] saadc_event SAADC event.
* @param[in] event Event to be checked.
*
* @return State of the specified SAADC event.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event);
__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t event);
/**
* @brief Function for clearing the specific SAADC event.
*
* @param[in] saadc_event SAADC event.
* @param[in] event SAADC event.
*/
__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event);
__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t event);
/**
* @brief Function for getting the address of a specific SAADC event register.
* @brief Function for getting the address of the specified SAADC event register.
*
* @param[in] saadc_event SAADC event.
* @param[in] event SAADC event.
*
* @return Address of the specified SAADC event.
*/
__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event);
__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t event);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -360,25 +320,30 @@ __STATIC_INLINE void nrf_saadc_publish_clear(nrf_saadc_event_t event);
#endif // defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for getting the address of a specific SAADC limit event register.
* @brief Function for getting the address of the SAADC limit event register,
* as specified by the channel and the limit type.
*
* @param[in] channel Channel number.
* @param[in] channel Channel number.
* @param[in] limit_type Low limit or high limit.
*
* @return Address of the specified SAADC limit event.
*/
__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type);
__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel,
nrf_saadc_limit_t limit_type);
/**
* @brief Function for getting the SAADC channel monitoring limit events.
*
* @param[in] channel Channel number.
* @param[in] limit_type Low limit or high limit.
*
* @return The SAADC channel monitoring limit event.
*/
__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type);
__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel,
nrf_saadc_limit_t limit_type);
/**
* @brief Function for configuring the input pins for a specific SAADC channel.
* @brief Function for configuring the input pins for the specified SAADC channel.
*
* @param[in] channel Channel number.
* @param[in] pselp Positive input.
@ -389,7 +354,7 @@ __STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel,
nrf_saadc_input_t pseln);
/**
* @brief Function for configuring the positive input pin for a specific SAADC channel.
* @brief Function for configuring the positive input pin for the specified SAADC channel.
*
* @param[in] channel Channel number.
* @param[in] pselp Positive input.
@ -409,24 +374,24 @@ __STATIC_INLINE void nrf_saadc_channel_limits_set(uint8_t channel, int16_t low,
/**
* @brief Function for enabling specified SAADC interrupts.
*
* @param[in] saadc_int_mask Interrupt(s) to enable.
* @param[in] saadc_int_mask Interrupt(s) to be enabled.
*/
__STATIC_INLINE void nrf_saadc_int_enable(uint32_t saadc_int_mask);
/**
* @brief Function for retrieving the state of specified SAADC interrupts.
*
* @param[in] saadc_int_mask Interrupt(s) to check.
* @param[in] saadc_int_mask Interrupt(s) to be checked.
*
* @retval true If all specified interrupts are enabled.
* @retval false If at least one of the given interrupts is not enabled.
* @retval true All specified interrupts are enabled.
* @retval false At least one of the given interrupts is not enabled.
*/
__STATIC_INLINE bool nrf_saadc_int_enable_check(uint32_t saadc_int_mask);
/**
* @brief Function for disabling specified interrupts.
*
* @param saadc_int_mask Interrupt(s) to disable.
* @param saadc_int_mask Interrupt(s) to be disabled.
*/
__STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask);
@ -436,7 +401,7 @@ __STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask);
* @param[in] channel SAADC channel number.
* @param[in] limit_type Limit type.
*
* @returns Interrupt mask.
* @return Interrupt mask.
*/
__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type);
@ -445,8 +410,8 @@ __STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limi
*
* This function checks whether the analog-to-digital converter is busy with a conversion.
*
* @retval true If the SAADC is busy.
* @retval false If the SAADC is not busy.
* @retval true The SAADC is busy.
* @retval false The SAADC is not busy.
*/
__STATIC_INLINE bool nrf_saadc_busy_check(void);
@ -465,8 +430,8 @@ __STATIC_INLINE void nrf_saadc_disable(void);
/**
* @brief Function for checking if the SAADC is enabled.
*
* @retval true If the SAADC is enabled.
* @retval false If the SAADC is not enabled.
* @retval true The SAADC is enabled.
* @retval false The SAADC is not enabled.
*/
__STATIC_INLINE bool nrf_saadc_enable_check(void);
@ -563,33 +528,33 @@ __STATIC_INLINE void nrf_saadc_burst_set(uint8_t channel,
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t saadc_task)
__STATIC_INLINE void nrf_saadc_task_trigger(nrf_saadc_task_t task)
{
*((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task)) = 0x1UL;
*((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t saadc_task)
__STATIC_INLINE uint32_t nrf_saadc_task_address_get(nrf_saadc_task_t task)
{
return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)saadc_task);
return (uint32_t)((uint8_t *)NRF_SAADC + (uint32_t)task);
}
__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t saadc_event)
__STATIC_INLINE bool nrf_saadc_event_check(nrf_saadc_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event);
return (bool)*(volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)event);
}
__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t saadc_event)
__STATIC_INLINE void nrf_saadc_event_clear(nrf_saadc_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)saadc_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_SAADC + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t saadc_event)
__STATIC_INLINE uint32_t nrf_saadc_event_address_get(nrf_saadc_event_t event)
{
return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)saadc_event);
return (uint32_t )((uint8_t *)NRF_SAADC + (uint32_t)event);
}
#if defined(DPPI_PRESENT)
@ -618,7 +583,8 @@ __STATIC_INLINE void nrf_saadc_publish_clear(nrf_saadc_event_t event)
}
#endif // defined(DPPI_PRESENT)
__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel, nrf_saadc_limit_t limit_type)
__STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t channel,
nrf_saadc_limit_t limit_type)
{
NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
if (limit_type == NRF_SAADC_LIMIT_HIGH)
@ -631,7 +597,8 @@ __STATIC_INLINE volatile uint32_t * nrf_saadc_event_limit_address_get(uint8_t ch
}
}
__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf_saadc_limit_t limit_type)
__STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel,
nrf_saadc_limit_t limit_type)
{
if (limit_type == NRF_SAADC_LIMIT_HIGH)
{
@ -647,7 +614,7 @@ __STATIC_INLINE nrf_saadc_event_t nrf_saadc_event_limit_get(uint8_t channel, nrf
}
}
__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel,
__STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel,
nrf_saadc_input_t pselp,
nrf_saadc_input_t pseln)
{
@ -655,7 +622,7 @@ __STATIC_INLINE void nrf_saadc_channel_input_set(uint8_t channel,
NRF_SAADC->CH[channel].PSELP = pselp;
}
__STATIC_INLINE void nrf_saadc_channel_pos_input_set(uint8_t channel,
__STATIC_INLINE void nrf_saadc_channel_pos_input_set(uint8_t channel,
nrf_saadc_input_t pselp)
{
NRF_SAADC->CH[channel].PSELP = pselp;
@ -686,7 +653,8 @@ __STATIC_INLINE void nrf_saadc_int_disable(uint32_t saadc_int_mask)
__STATIC_INLINE uint32_t nrf_saadc_limit_int_get(uint8_t channel, nrf_saadc_limit_t limit_type)
{
NRFX_ASSERT(channel < NRF_SAADC_CHANNEL_COUNT);
uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ? NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
uint32_t mask = (limit_type == NRF_SAADC_LIMIT_LOW) ?
NRF_SAADC_INT_CH0LIMITL : NRF_SAADC_INT_CH0LIMITH;
return mask << (channel * 2);
}
@ -776,7 +744,7 @@ __STATIC_INLINE void nrf_saadc_channel_init(uint8_t
nrf_saadc_channel_input_set(channel, config->pin_p, config->pin_n);
}
__STATIC_INLINE void nrf_saadc_burst_set(uint8_t channel,
__STATIC_INLINE void nrf_saadc_burst_set(uint8_t channel,
nrf_saadc_burst_t burst)
{
NRF_SAADC->CH[channel].CONFIG =

156
ext/hal/nordic/nrfx/hal/nrf_spi.h
View file

@ -53,28 +53,20 @@ extern "C" {
#define NRF_SPI_PIN_NOT_CONNECTED 0xFFFFFFFF
/**
* @brief SPI events.
*/
/** @brief SPI events. */
typedef enum
{
/*lint -save -e30*/
NRF_SPI_EVENT_READY = offsetof(NRF_SPI_Type, EVENTS_READY) ///< TXD byte sent and RXD byte received.
/*lint -restore*/
} nrf_spi_event_t;
/**
* @brief SPI interrupts.
*/
/** @brief SPI interrupts. */
typedef enum
{
NRF_SPI_INT_READY_MASK = SPI_INTENSET_READY_Msk, ///< Interrupt on READY event.
NRF_SPI_ALL_INTS_MASK = SPI_INTENSET_READY_Msk ///< All SPI interrupts.
} nrf_spi_int_mask_t;
/**
* @brief SPI data rates.
*/
/** @brief SPI data rates. */
typedef enum
{
NRF_SPI_FREQ_125K = SPI_FREQUENCY_FREQUENCY_K125, ///< 125 kbps.
@ -88,9 +80,7 @@ typedef enum
NRF_SPI_FREQ_8M = (int)SPI_FREQUENCY_FREQUENCY_M8 ///< 8 Mbps.
} nrf_spi_frequency_t;
/**
* @brief SPI modes.
*/
/** @brief SPI modes. */
typedef enum
{
NRF_SPI_MODE_0, ///< SCK active high, sample on leading edge of clock.
@ -99,9 +89,7 @@ typedef enum
NRF_SPI_MODE_3 ///< SCK active low, sample on trailing edge of clock.
} nrf_spi_mode_t;
/**
* @brief SPI bit orders.
*/
/** @brief SPI bit orders. */
typedef enum
{
NRF_SPI_BIT_ORDER_MSB_FIRST = SPI_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
@ -110,78 +98,78 @@ typedef enum
/**
* @brief Function for clearing a specific SPI event.
* @brief Function for clearing the specified SPI event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spi_event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
nrf_spi_event_t spi_event);
__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
nrf_spi_event_t event);
/**
* @brief Function for checking the state of a specific SPI event.
* @brief Function for retrieving the state of the SPI event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spi_event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
nrf_spi_event_t spi_event);
__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
nrf_spi_event_t event);
/**
* @brief Function for getting the address of a specific SPI event register.
* @brief Function for getting the address of the specified SPI event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spi_event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
nrf_spi_event_t spi_event);
__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
nrf_spi_event_t event);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spi_int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
uint32_t spi_int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spi_int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
uint32_t spi_int_mask);
uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spi_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
nrf_spi_int_mask_t spi_int);
/**
* @brief Function for enabling the SPI peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spi_enable(NRF_SPI_Type * p_reg);
/**
* @brief Function for disabling the SPI peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg);
@ -191,20 +179,20 @@ __STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg);
* If a given signal is not needed, pass the @ref NRF_SPI_PIN_NOT_CONNECTED
* value instead of its pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] sck_pin SCK pin number.
* @param[in] mosi_pin MOSI pin number.
* @param[in] miso_pin MISO pin number.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] sck_pin SCK pin number.
* @param[in] mosi_pin MOSI pin number.
* @param[in] miso_pin MISO pin number.
*/
__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin);
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin);
/**
* @brief Function for writing data to the SPI transmitter register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] data TX data to send.
*/
__STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data);
@ -212,7 +200,7 @@ __STATIC_INLINE void nrf_spi_txd_set(NRF_SPI_Type * p_reg, uint8_t data);
/**
* @brief Function for reading data from the SPI receiver register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return RX data received.
*/
@ -221,61 +209,61 @@ __STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg);
/**
* @brief Function for setting the SPI master data rate.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency SPI frequency.
*/
__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
nrf_spi_frequency_t frequency);
/**
* @brief Function for setting the SPI configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_mode SPI mode.
* @param[in] spi_bit_order SPI bit order.
*/
__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
nrf_spi_mode_t spi_mode,
__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
nrf_spi_mode_t spi_mode,
nrf_spi_bit_order_t spi_bit_order);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
nrf_spi_event_t spi_event)
__STATIC_INLINE void nrf_spi_event_clear(NRF_SPI_Type * p_reg,
nrf_spi_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
nrf_spi_event_t spi_event)
__STATIC_INLINE bool nrf_spi_event_check(NRF_SPI_Type * p_reg,
nrf_spi_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event);
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
nrf_spi_event_t spi_event)
__STATIC_INLINE uint32_t * nrf_spi_event_address_get(NRF_SPI_Type * p_reg,
nrf_spi_event_t event)
{
return (uint32_t *)((uint8_t *)p_reg + (uint32_t)spi_event);
return (uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_spi_int_enable(NRF_SPI_Type * p_reg,
uint32_t spi_int_mask)
uint32_t mask)
{
p_reg->INTENSET = spi_int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_spi_int_disable(NRF_SPI_Type * p_reg,
uint32_t spi_int_mask)
uint32_t mask)
{
p_reg->INTENCLR = spi_int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
__STATIC_INLINE bool nrf_spi_int_enable_check(NRF_SPI_Type * p_reg,
nrf_spi_int_mask_t spi_int)
{
return (bool)(p_reg->INTENSET & spi_int);
@ -292,9 +280,9 @@ __STATIC_INLINE void nrf_spi_disable(NRF_SPI_Type * p_reg)
}
__STATIC_INLINE void nrf_spi_pins_set(NRF_SPI_Type * p_reg,
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin)
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin)
{
#if defined(SPI_PSEL_SCK_CONNECT_Pos)
p_reg->PSEL.SCK = sck_pin;
@ -325,14 +313,14 @@ __STATIC_INLINE uint8_t nrf_spi_rxd_get(NRF_SPI_Type * p_reg)
return p_reg->RXD;
}
__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
__STATIC_INLINE void nrf_spi_frequency_set(NRF_SPI_Type * p_reg,
nrf_spi_frequency_t frequency)
{
p_reg->FREQUENCY = frequency;
}
__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
nrf_spi_mode_t spi_mode,
__STATIC_INLINE void nrf_spi_configure(NRF_SPI_Type * p_reg,
nrf_spi_mode_t spi_mode,
nrf_spi_bit_order_t spi_bit_order)
{
uint32_t config = (spi_bit_order == NRF_SPI_BIT_ORDER_MSB_FIRST ?

291
ext/hal/nordic/nrfx/hal/nrf_spim.h
View file

@ -63,37 +63,31 @@ extern "C" {
#define NRF_SPIM_DCX_CNT_ALL_CMD 0xF
#endif
/** @brief Macro for checking if the hardware chip select function is available. */
#define NRF_SPIM_HW_CSN_PRESENT \
(NRFX_CHECK(SPIM0_FEATURE_HARDWARE_CSN_PRESENT) || \
NRFX_CHECK(SPIM1_FEATURE_HARDWARE_CSN_PRESENT) || \
NRFX_CHECK(SPIM2_FEATURE_HARDWARE_CSN_PRESENT) || \
NRFX_CHECK(SPIM3_FEATURE_HARDWARE_CSN_PRESENT))
/**
* @brief SPIM tasks.
*/
/** @brief SPIM tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_SPIM_TASK_START = offsetof(NRF_SPIM_Type, TASKS_START), ///< Start SPI transaction.
NRF_SPIM_TASK_STOP = offsetof(NRF_SPIM_Type, TASKS_STOP), ///< Stop SPI transaction.
NRF_SPIM_TASK_SUSPEND = offsetof(NRF_SPIM_Type, TASKS_SUSPEND), ///< Suspend SPI transaction.
NRF_SPIM_TASK_RESUME = offsetof(NRF_SPIM_Type, TASKS_RESUME) ///< Resume SPI transaction.
/*lint -restore*/
} nrf_spim_task_t;
/**
* @brief SPIM events.
*/
/** @brief SPIM events. */
typedef enum
{
/*lint -save -e30*/
NRF_SPIM_EVENT_STOPPED = offsetof(NRF_SPIM_Type, EVENTS_STOPPED), ///< SPI transaction has stopped.
NRF_SPIM_EVENT_ENDRX = offsetof(NRF_SPIM_Type, EVENTS_ENDRX), ///< End of RXD buffer reached.
NRF_SPIM_EVENT_END = offsetof(NRF_SPIM_Type, EVENTS_END), ///< End of RXD buffer and TXD buffer reached.
NRF_SPIM_EVENT_ENDTX = offsetof(NRF_SPIM_Type, EVENTS_ENDTX), ///< End of TXD buffer reached.
NRF_SPIM_EVENT_STARTED = offsetof(NRF_SPIM_Type, EVENTS_STARTED) ///< Transaction started.
/*lint -restore*/
} nrf_spim_event_t;
/**
@ -105,9 +99,7 @@ typedef enum
NRF_SPIM_ALL_SHORTS_MASK = SPIM_SHORTS_END_START_Msk ///< All SPIM shortcuts.
} nrf_spim_short_mask_t;
/**
* @brief SPIM interrupts.
*/
/** @brief SPIM interrupts. */
typedef enum
{
NRF_SPIM_INT_STOPPED_MASK = SPIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@ -122,9 +114,7 @@ typedef enum
SPIM_INTENSET_STARTED_Msk ///< All SPIM interrupts.
} nrf_spim_int_mask_t;
/**
* @brief SPI master data rates.
*/
/** @brief SPI master data rates. */
typedef enum
{
NRF_SPIM_FREQ_125K = SPIM_FREQUENCY_FREQUENCY_K125, ///< 125 kbps.
@ -144,9 +134,7 @@ typedef enum
#endif
} nrf_spim_frequency_t;
/**
* @brief SPI modes.
*/
/** @brief SPI modes. */
typedef enum
{
NRF_SPIM_MODE_0, ///< SCK active high, sample on leading edge of clock.
@ -155,9 +143,7 @@ typedef enum
NRF_SPIM_MODE_3 ///< SCK active low, sample on trailing edge of clock.
} nrf_spim_mode_t;
/**
* @brief SPI bit orders.
*/
/** @brief SPI bit orders. */
typedef enum
{
NRF_SPIM_BIT_ORDER_MSB_FIRST = SPIM_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
@ -165,9 +151,7 @@ typedef enum
} nrf_spim_bit_order_t;
#if (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
* @brief SPI CSN pin polarity.
*/
/** @brief SPI CSN pin polarity. */
typedef enum
{
NRF_SPIM_CSN_POL_LOW = SPIM_CSNPOL_CSNPOL_LOW, ///< Active low (idle state high).
@ -175,110 +159,113 @@ typedef enum
} nrf_spim_csn_pol_t;
#endif // (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for activating a specific SPIM task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_task Task to activate.
*/
__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
nrf_spim_task_t spim_task);
/**
* @brief Function for getting the address of a specific SPIM task register.
* @brief Function for activating the specified SPIM task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
nrf_spim_task_t task);
/**
* @brief Function for getting the address of the specified SPIM task register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg,
nrf_spim_task_t spim_task);
nrf_spim_task_t task);
/**
* @brief Function for clearing a specific SPIM event.
* @brief Function for clearing the specified SPIM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
nrf_spim_event_t spim_event);
__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event);
/**
* @brief Function for checking the state of a specific SPIM event.
* @brief Function for retrieving the state of the SPIM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
nrf_spim_event_t spim_event);
__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event);
/**
* @brief Function for getting the address of a specific SPIM event register.
* @brief Function for getting the address of the specified SPIM event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
nrf_spim_event_t spim_event);
nrf_spim_event_t event);
/**
* @brief Function for enabling specified shortcuts.
* @brief Function for enabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_shorts_mask Shortcuts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg,
uint32_t spim_shorts_mask);
uint32_t mask);
/**
* @brief Function for disabling specified shortcuts.
* @brief Function for disabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_shorts_mask Shortcuts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg,
uint32_t spim_shorts_mask);
uint32_t mask);
/**
* @brief Function for getting shorts setting.
* @brief Function for getting the shortcut setting.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Current shortcut configuration.
*/
__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg,
uint32_t spim_int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg,
uint32_t spim_int_mask);
uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spim_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spim_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
nrf_spim_int_mask_t spim_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
@ -314,7 +301,7 @@ __STATIC_INLINE void nrf_spim_subscribe_clear(NRF_SPIM_Type * p_reg,
*/
__STATIC_INLINE void nrf_spim_publish_set(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event,
uint8_t channel);
uint8_t channel);
/**
* @brief Function for clearing the publish configuration for a given
@ -330,14 +317,14 @@ __STATIC_INLINE void nrf_spim_publish_clear(NRF_SPIM_Type * p_reg,
/**
* @brief Function for enabling the SPIM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_enable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for disabling the SPIM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg);
@ -347,15 +334,15 @@ __STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg);
* If a given signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
* value instead of its pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] sck_pin SCK pin number.
* @param[in] mosi_pin MOSI pin number.
* @param[in] miso_pin MISO pin number.
*/
__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin);
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin);
#if (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -364,17 +351,17 @@ __STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
* If this signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
* value instead of its pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] pin CSN pin number.
* @param[in] polarity CSN pin polarity.
* @param[in] duration Minimum duration between the edge of CSN and the edge of SCK
* and minimum duration of CSN must stay unselected between transactions.
* The value is specified in number of 64 MHz clock cycles (15.625 ns).
*/
__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
uint32_t pin,
__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
uint32_t pin,
nrf_spim_csn_pol_t polarity,
uint32_t duration);
uint32_t duration);
#endif // (NRF_SPIM_HW_CSN_PRESENT) || defined(__NRFX_DOXYGEN__)
#if defined(SPIM_PSELDCX_CONNECT_Msk) || defined(__NRFX_DOXYGEN__)
@ -384,11 +371,11 @@ __STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
* If this signal is not needed, pass the @ref NRF_SPIM_PIN_NOT_CONNECTED
* value instead of its pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dcx_pin DCX pin number.
*/
__STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg,
uint32_t dcx_pin);
uint32_t dcx_pin);
/**
* @brief Function for configuring the number of command bytes.
@ -398,36 +385,37 @@ __STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg,
* The @ref NRF_SPIM_DCX_CNT_ALL_CMD value passed as the @c count parameter
* causes all transmitted bytes to be marked as command bytes.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] count Number of command bytes preceding the data bytes.
*/
__STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg,
uint32_t count);
uint32_t count);
#endif // defined(SPIM_PSELDCX_CONNECT_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for configuring the extended SPIM interface.
* @param p_reg Pointer to the peripheral registers structure.
*
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param rxdelay Sample delay for input serial data on MISO,
* specified in 64 MHz clock cycles (15.625 ns) from the sampling edge of SCK.
*/
__STATIC_INLINE void nrf_spim_iftiming_set(NRF_SPIM_Type * p_reg,
uint32_t rxdelay);
uint32_t rxdelay);
#endif // defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk) || defined(__NRFX_DOXYGEN__)
#if defined(SPIM_STALLSTAT_RX_Msk) || defined(__NRFX_DOXYGEN__)
/**
* @brief Function for clearing stall status for RX EasyDMA RAM accesses.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_stallstat_rx_clear(NRF_SPIM_Type * p_reg);
/**
* @brief Function for getting stall status for RX EasyDMA RAM accesses.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Stall status of RX EasyDMA RAM accesses.
*/
@ -438,14 +426,14 @@ __STATIC_INLINE bool nrf_spim_stallstat_rx_get(NRF_SPIM_Type * p_reg);
/**
* @brief Function for clearing stall status for TX EasyDMA RAM accesses.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_stallstat_tx_clear(NRF_SPIM_Type * p_reg);
/**
* @brief Function for getting stall status for TX EasyDMA RAM accesses.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Stall status of TX EasyDMA RAM accesses.
*/
@ -455,16 +443,16 @@ __STATIC_INLINE bool nrf_spim_stallstat_tx_get(NRF_SPIM_Type * p_reg);
/**
* @brief Function for setting the SPI master data rate.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency SPI frequency.
*/
__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
nrf_spim_frequency_t frequency);
/**
* @brief Function for setting the transmit buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
@ -475,109 +463,110 @@ __STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg,
/**
* @brief Function for setting the receive buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg,
uint8_t * p_buffer,
size_t length);
uint8_t * p_buffer,
size_t length);
/**
* @brief Function for setting the SPI configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_mode SPI mode.
* @param[in] spi_bit_order SPI bit order.
*/
__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
nrf_spim_mode_t spi_mode,
__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
nrf_spim_mode_t spi_mode,
nrf_spim_bit_order_t spi_bit_order);
/**
* @brief Function for setting the over-read character.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] orc Over-read character that is clocked out in case of
* an over-read of the TXD buffer.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] orc Over-read character that is clocked out in case of
* an over-read of the TXD buffer.
*/
__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg,
uint8_t orc);
uint8_t orc);
/**
* @brief Function for enabling the TX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_tx_list_enable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for disabling the TX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_tx_list_disable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for enabling the RX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_rx_list_enable(NRF_SPIM_Type * p_reg);
/**
* @brief Function for disabling the RX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spim_rx_list_disable(NRF_SPIM_Type * p_reg);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_spim_task_trigger(NRF_SPIM_Type * p_reg,
nrf_spim_task_t spim_task)
nrf_spim_task_t task)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_task)) = 0x1UL;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_spim_task_address_get(NRF_SPIM_Type * p_reg,
nrf_spim_task_t spim_task)
nrf_spim_task_t task)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_task);
return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
}
__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
nrf_spim_event_t spim_event)
__STATIC_INLINE void nrf_spim_event_clear(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
nrf_spim_event_t spim_event)
__STATIC_INLINE bool nrf_spim_event_check(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spim_event);
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
nrf_spim_event_t spim_event)
__STATIC_INLINE uint32_t nrf_spim_event_address_get(NRF_SPIM_Type * p_reg,
nrf_spim_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)spim_event);
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_spim_shorts_enable(NRF_SPIM_Type * p_reg,
uint32_t spim_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS |= spim_shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_spim_shorts_disable(NRF_SPIM_Type * p_reg,
uint32_t spim_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS &= ~(spim_shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg)
@ -586,18 +575,18 @@ __STATIC_INLINE uint32_t nrf_spim_shorts_get(NRF_SPIM_Type * p_reg)
}
__STATIC_INLINE void nrf_spim_int_enable(NRF_SPIM_Type * p_reg,
uint32_t spim_int_mask)
uint32_t mask)
{
p_reg->INTENSET = spim_int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_spim_int_disable(NRF_SPIM_Type * p_reg,
uint32_t spim_int_mask)
uint32_t mask)
{
p_reg->INTENCLR = spim_int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
__STATIC_INLINE bool nrf_spim_int_enable_check(NRF_SPIM_Type * p_reg,
nrf_spim_int_mask_t spim_int)
{
return (bool)(p_reg->INTENSET & spim_int);
@ -644,9 +633,9 @@ __STATIC_INLINE void nrf_spim_disable(NRF_SPIM_Type * p_reg)
}
__STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin)
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin)
{
p_reg->PSEL.SCK = sck_pin;
p_reg->PSEL.MOSI = mosi_pin;
@ -654,10 +643,10 @@ __STATIC_INLINE void nrf_spim_pins_set(NRF_SPIM_Type * p_reg,
}
#if (NRF_SPIM_HW_CSN_PRESENT)
__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
uint32_t pin,
__STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
uint32_t pin,
nrf_spim_csn_pol_t polarity,
uint32_t duration)
uint32_t duration)
{
p_reg->PSEL.CSN = pin;
p_reg->CSNPOL = polarity;
@ -667,13 +656,13 @@ __STATIC_INLINE void nrf_spim_csn_configure(NRF_SPIM_Type * p_reg,
#if defined(SPIM_PSELDCX_CONNECT_Msk)
__STATIC_INLINE void nrf_spim_dcx_pin_set(NRF_SPIM_Type * p_reg,
uint32_t dcx_pin)
uint32_t dcx_pin)
{
p_reg->PSELDCX = dcx_pin;
}
__STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg,
uint32_t dcx_cnt)
uint32_t dcx_cnt)
{
p_reg->DCXCNT = dcx_cnt;
}
@ -681,7 +670,7 @@ __STATIC_INLINE void nrf_spim_dcx_cnt_set(NRF_SPIM_Type * p_reg,
#if defined(SPIM_IFTIMING_RXDELAY_RXDELAY_Msk)
__STATIC_INLINE void nrf_spim_iftiming_set(NRF_SPIM_Type * p_reg,
uint32_t rxdelay)
uint32_t rxdelay)
{
p_reg->IFTIMING.RXDELAY = rxdelay;
}
@ -711,10 +700,10 @@ __STATIC_INLINE bool nrf_spim_stallstat_tx_get(NRF_SPIM_Type * p_reg)
}
#endif // defined(SPIM_STALLSTAT_TX_Msk)
__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
__STATIC_INLINE void nrf_spim_frequency_set(NRF_SPIM_Type * p_reg,
nrf_spim_frequency_t frequency)
{
p_reg->FREQUENCY = frequency;
p_reg->FREQUENCY = (uint32_t)frequency;
}
__STATIC_INLINE void nrf_spim_tx_buffer_set(NRF_SPIM_Type * p_reg,
@ -733,8 +722,8 @@ __STATIC_INLINE void nrf_spim_rx_buffer_set(NRF_SPIM_Type * p_reg,
p_reg->RXD.MAXCNT = length;
}
__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
nrf_spim_mode_t spi_mode,
__STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
nrf_spim_mode_t spi_mode,
nrf_spim_bit_order_t spi_bit_order)
{
uint32_t config = (spi_bit_order == NRF_SPIM_BIT_ORDER_MSB_FIRST ?
@ -766,7 +755,7 @@ __STATIC_INLINE void nrf_spim_configure(NRF_SPIM_Type * p_reg,
}
__STATIC_INLINE void nrf_spim_orc_set(NRF_SPIM_Type * p_reg,
uint8_t orc)
uint8_t orc)
{
p_reg->ORC = orc;
}

261
ext/hal/nordic/nrfx/hal/nrf_spis.h
View file

@ -53,48 +53,34 @@ extern "C" {
#define NRF_SPIS_PIN_NOT_CONNECTED 0xFFFFFFFF
/**
* @brief SPIS tasks.
*/
/** @brief SPIS tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_SPIS_TASK_ACQUIRE = offsetof(NRF_SPIS_Type, TASKS_ACQUIRE), ///< Acquire SPI semaphore.
NRF_SPIS_TASK_RELEASE = offsetof(NRF_SPIS_Type, TASKS_RELEASE), ///< Release SPI semaphore, enabling the SPI slave to acquire it.
/*lint -restore*/
} nrf_spis_task_t;
/**
* @brief SPIS events.
*/
/** @brief SPIS events. */
typedef enum
{
/*lint -save -e30*/
NRF_SPIS_EVENT_END = offsetof(NRF_SPIS_Type, EVENTS_END), ///< Granted transaction completed.
NRF_SPIS_EVENT_ACQUIRED = offsetof(NRF_SPIS_Type, EVENTS_ACQUIRED) ///< Semaphore acquired.
/*lint -restore*/
} nrf_spis_event_t;
/**
* @brief SPIS shortcuts.
*/
/** @brief SPIS shortcuts. */
typedef enum
{
NRF_SPIS_SHORT_END_ACQUIRE = SPIS_SHORTS_END_ACQUIRE_Msk ///< Shortcut between END event and ACQUIRE task.
} nrf_spis_short_mask_t;
/**
* @brief SPIS interrupts.
*/
/** @brief SPIS interrupts. */
typedef enum
{
NRF_SPIS_INT_END_MASK = SPIS_INTENSET_END_Msk, ///< Interrupt on END event.
NRF_SPIS_INT_ACQUIRED_MASK = SPIS_INTENSET_ACQUIRED_Msk ///< Interrupt on ACQUIRED event.
} nrf_spis_int_mask_t;
/**
* @brief SPI modes.
*/
/** @brief SPI modes. */
typedef enum
{
NRF_SPIS_MODE_0, ///< SCK active high, sample on leading edge of clock.
@ -103,18 +89,14 @@ typedef enum
NRF_SPIS_MODE_3 ///< SCK active low, sample on trailing edge of clock.
} nrf_spis_mode_t;
/**
* @brief SPI bit orders.
*/
/** @brief SPI bit orders. */
typedef enum
{
NRF_SPIS_BIT_ORDER_MSB_FIRST = SPIS_CONFIG_ORDER_MsbFirst, ///< Most significant bit shifted out first.
NRF_SPIS_BIT_ORDER_LSB_FIRST = SPIS_CONFIG_ORDER_LsbFirst ///< Least significant bit shifted out first.
} nrf_spis_bit_order_t;
/**
* @brief SPI semaphore status.
*/
/** @brief SPI semaphore status. */
typedef enum
{
NRF_SPIS_SEMSTAT_FREE = 0, ///< Semaphore is free.
@ -123,114 +105,113 @@ typedef enum
NRF_SPIS_SEMSTAT_CPUPENDING = 3 ///< Semaphore is assigned to the SPI, but a handover to the CPU is pending.
} nrf_spis_semstat_t;
/**
* @brief SPIS status.
*/
/** @brief SPIS status. */
typedef enum
{
NRF_SPIS_STATUS_OVERREAD = SPIS_STATUS_OVERREAD_Msk, ///< TX buffer over-read detected and prevented.
NRF_SPIS_STATUS_OVERFLOW = SPIS_STATUS_OVERFLOW_Msk ///< RX buffer overflow detected and prevented.
} nrf_spis_status_mask_t;
/**
* @brief Function for activating a specific SPIS task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_task Task to activate.
*/
__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
nrf_spis_task_t spis_task);
/**
* @brief Function for getting the address of a specific SPIS task register.
* @brief Function for activating the specified SPIS task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
nrf_spis_task_t task);
/**
* @brief Function for getting the address of the specified SPIS task register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg,
nrf_spis_task_t spis_task);
nrf_spis_task_t task);
/**
* @brief Function for clearing a specific SPIS event.
* @brief Function for clearing the specified SPIS event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be cleared.
*/
__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
nrf_spis_event_t spis_event);
__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
nrf_spis_event_t event);
/**
* @brief Function for checking the state of a specific SPIS event.
* @brief Function for retrieving the state of the SPIS event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg,
nrf_spis_event_t spis_event);
nrf_spis_event_t event);
/**
* @brief Function for getting the address of a specific SPIS event register.
* @brief Function for getting the address of the specified SPIS event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg,
nrf_spis_event_t spis_event);
nrf_spis_event_t event);
/**
* @brief Function for enabling specified shortcuts.
* @brief Function for enabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_shorts_mask Shortcuts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg,
uint32_t spis_shorts_mask);
uint32_t mask);
/**
* @brief Function for disabling specified shortcuts.
* @brief Function for disabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_shorts_mask Shortcuts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg,
uint32_t spis_shorts_mask);
uint32_t mask);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg,
uint32_t spis_int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg,
uint32_t spis_int_mask);
uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spis_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spis_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
nrf_spis_int_mask_t spis_int);
nrf_spis_int_mask_t spis_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -281,21 +262,21 @@ __STATIC_INLINE void nrf_spis_publish_clear(NRF_SPIS_Type * p_reg,
/**
* @brief Function for enabling the SPIS peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spis_enable(NRF_SPIS_Type * p_reg);
/**
* @brief Function for disabling the SPIS peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_spis_disable(NRF_SPIS_Type * p_reg);
/**
* @brief Function for retrieving the SPIS semaphore status.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Current semaphore status.
*/
@ -304,7 +285,7 @@ __STATIC_INLINE nrf_spis_semstat_t nrf_spis_semaphore_status_get(NRF_SPIS_Type *
/**
* @brief Function for retrieving the SPIS status.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Current SPIS status.
*/
@ -316,24 +297,24 @@ __STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg
* If a given signal is not needed, pass the @ref NRF_SPIS_PIN_NOT_CONNECTED
* value instead of its pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] sck_pin SCK pin number.
* @param[in] mosi_pin MOSI pin number.
* @param[in] miso_pin MISO pin number.
* @param[in] csn_pin CSN pin number.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] sck_pin SCK pin number.
* @param[in] mosi_pin MOSI pin number.
* @param[in] miso_pin MISO pin number.
* @param[in] csn_pin CSN pin number.
*/
__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg,
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin,
uint32_t csn_pin);
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin,
uint32_t csn_pin);
/**
* @brief Function for setting the transmit buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_buffer Pointer to the buffer that contains the data to send.
* @param[in] length Maximum number of data bytes to transmit.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer that contains the data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg,
uint8_t const * p_buffer,
@ -342,19 +323,19 @@ __STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg,
/**
* @brief Function for setting the receive buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg,
uint8_t * p_buffer,
size_t length);
uint8_t * p_buffer,
size_t length);
/**
* @brief Function for getting the number of bytes transmitted
* in the last granted transaction.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Number of bytes transmitted.
*/
@ -364,7 +345,7 @@ __STATIC_INLINE size_t nrf_spis_tx_amount_get(NRF_SPIS_Type const * p_reg);
* @brief Function for getting the number of bytes received
* in the last granted transaction.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @returns Number of bytes received.
*/
@ -373,97 +354,97 @@ __STATIC_INLINE size_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg);
/**
* @brief Function for setting the SPI configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spi_mode SPI mode.
* @param[in] spi_bit_order SPI bit order.
*/
__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
nrf_spis_mode_t spi_mode,
__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
nrf_spis_mode_t spi_mode,
nrf_spis_bit_order_t spi_bit_order);
/**
* @brief Function for setting the default character.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] def Default character that is clocked out in case of
* an overflow of the RXD buffer.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] def Default character that is clocked out in case of
* an overflow of the RXD buffer.
*/
__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg,
uint8_t def);
uint8_t def);
/**
* @brief Function for setting the over-read character.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] orc Over-read character that is clocked out in case of
* an over-read of the TXD buffer.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] orc Over-read character that is clocked out in case of
* an over-read of the TXD buffer.
*/
__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg,
uint8_t orc);
uint8_t orc);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_spis_task_trigger(NRF_SPIS_Type * p_reg,
nrf_spis_task_t spis_task)
nrf_spis_task_t task)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_task)) = 0x1UL;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task)) = 0x1UL;
}
__STATIC_INLINE uint32_t nrf_spis_task_address_get(NRF_SPIS_Type const * p_reg,
nrf_spis_task_t spis_task)
nrf_spis_task_t task)
{
return (uint32_t)p_reg + (uint32_t)spis_task;
return (uint32_t)p_reg + (uint32_t)task;
}
__STATIC_INLINE void nrf_spis_event_clear(NRF_SPIS_Type * p_reg,
nrf_spis_event_t spis_event)
nrf_spis_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event)) = 0x0UL;
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event));
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_spis_event_check(NRF_SPIS_Type const * p_reg,
nrf_spis_event_t spis_event)
nrf_spis_event_t event)
{
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)spis_event);
return (bool)*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE uint32_t nrf_spis_event_address_get(NRF_SPIS_Type const * p_reg,
nrf_spis_event_t spis_event)
nrf_spis_event_t event)
{
return (uint32_t)p_reg + (uint32_t)spis_event;
return (uint32_t)p_reg + (uint32_t)event;
}
__STATIC_INLINE void nrf_spis_shorts_enable(NRF_SPIS_Type * p_reg,
uint32_t spis_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS |= spis_shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_spis_shorts_disable(NRF_SPIS_Type * p_reg,
uint32_t spis_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS &= ~(spis_shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_spis_int_enable(NRF_SPIS_Type * p_reg,
uint32_t spis_int_mask)
uint32_t mask)
{
p_reg->INTENSET = spis_int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_spis_int_disable(NRF_SPIS_Type * p_reg,
uint32_t spis_int_mask)
uint32_t mask)
{
p_reg->INTENCLR = spis_int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
nrf_spis_int_mask_t spis_int)
nrf_spis_int_mask_t spis_int)
{
return (bool)(p_reg->INTENSET & spis_int);
}
@ -471,7 +452,7 @@ __STATIC_INLINE bool nrf_spis_int_enable_check(NRF_SPIS_Type const * p_reg,
#if defined(DPPI_PRESENT)
__STATIC_INLINE void nrf_spis_subscribe_set(NRF_SPIS_Type * p_reg,
nrf_spis_task_t task,
uint8_t channel)
uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
((uint32_t)channel | SPIS_SUBSCRIBE_ACQUIRE_EN_Msk);
@ -485,7 +466,7 @@ __STATIC_INLINE void nrf_spis_subscribe_clear(NRF_SPIS_Type * p_reg,
__STATIC_INLINE void nrf_spis_publish_set(NRF_SPIS_Type * p_reg,
nrf_spis_event_t event,
uint8_t channel)
uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
((uint32_t)channel | SPIS_PUBLISH_END_EN_Msk);
@ -520,10 +501,10 @@ __STATIC_INLINE nrf_spis_status_mask_t nrf_spis_status_get(NRF_SPIS_Type * p_reg
}
__STATIC_INLINE void nrf_spis_pins_set(NRF_SPIS_Type * p_reg,
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin,
uint32_t csn_pin)
uint32_t sck_pin,
uint32_t mosi_pin,
uint32_t miso_pin,
uint32_t csn_pin)
{
#if defined (NRF51)
p_reg->PSELSCK = sck_pin;
@ -552,8 +533,8 @@ __STATIC_INLINE void nrf_spis_tx_buffer_set(NRF_SPIS_Type * p_reg,
}
__STATIC_INLINE void nrf_spis_rx_buffer_set(NRF_SPIS_Type * p_reg,
uint8_t * p_buffer,
size_t length)
uint8_t * p_buffer,
size_t length)
{
#if defined (NRF51)
p_reg->RXDPTR = (uint32_t)p_buffer;
@ -582,8 +563,8 @@ __STATIC_INLINE size_t nrf_spis_rx_amount_get(NRF_SPIS_Type const * p_reg)
#endif
}
__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
nrf_spis_mode_t spi_mode,
__STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
nrf_spis_mode_t spi_mode,
nrf_spis_bit_order_t spi_bit_order)
{
uint32_t config = (spi_bit_order == NRF_SPIS_BIT_ORDER_MSB_FIRST ?
@ -616,13 +597,13 @@ __STATIC_INLINE void nrf_spis_configure(NRF_SPIS_Type * p_reg,
}
__STATIC_INLINE void nrf_spis_orc_set(NRF_SPIS_Type * p_reg,
uint8_t orc)
uint8_t orc)
{
p_reg->ORC = orc;
}
__STATIC_INLINE void nrf_spis_def_set(NRF_SPIS_Type * p_reg,
uint8_t def)
uint8_t def)
{
p_reg->DEF = def;
}

52
ext/hal/nordic/nrfx/hal/nrf_spu.h
View file

@ -86,20 +86,20 @@ typedef enum
/**
* @brief Function for clearing a specific SPU event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_spu_event_clear(NRF_SPU_Type * p_reg,
nrf_spu_event_t event);
/**
* @brief Function for checking the state of a specific SPU event.
* @brief Function for retrieving the state of the SPU event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_spu_event_check(NRF_SPU_Type const * p_reg,
nrf_spu_event_t event);
@ -107,8 +107,8 @@ __STATIC_INLINE bool nrf_spu_event_check(NRF_SPU_Type const * p_reg,
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to be enabled.
*/
__STATIC_INLINE void nrf_spu_int_enable(NRF_SPU_Type * p_reg,
uint32_t mask);
@ -116,8 +116,8 @@ __STATIC_INLINE void nrf_spu_int_enable(NRF_SPU_Type * p_reg,
/**
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Interrupts to be disabled.
*/
__STATIC_INLINE void nrf_spu_int_disable(NRF_SPU_Type * p_reg,
uint32_t mask);
@ -125,11 +125,11 @@ __STATIC_INLINE void nrf_spu_int_disable(NRF_SPU_Type * p_reg,
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] spu_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] spu_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_spu_int_enable_check(NRF_SPU_Type const * p_reg,
uint32_t spu_int);
@ -137,7 +137,7 @@ __STATIC_INLINE bool nrf_spu_int_enable_check(NRF_SPU_Type const * p_reg,
/**
* @brief Function for setting up publication configuration of a given SPU event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to configure.
* @param[in] channel Channel to connect with published event.
*/
@ -148,7 +148,7 @@ __STATIC_INLINE void nrf_spu_publish_set(NRF_SPU_Type * p_reg,
/**
* @brief Function for clearing publication configuration of a given SPU event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_spu_publish_clear(NRF_SPU_Type * p_reg,
@ -157,10 +157,10 @@ __STATIC_INLINE void nrf_spu_publish_clear(NRF_SPU_Type * p_reg,
/**
* @brief Function for retrieving the capabilities of the current device.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval true If ARM TrustZone support is available.
* @retval false If ARM TrustZone support is not available.
* @retval true ARM TrustZone support is available.
* @retval false ARM TrustZone support is not available.
*/
__STATIC_INLINE bool nrf_spu_tz_is_available(NRF_SPU_Type const * p_reg);
@ -170,7 +170,7 @@ __STATIC_INLINE bool nrf_spu_tz_is_available(NRF_SPU_Type const * p_reg);
* Channels are configured as bitmask. Set one in bitmask to make channels available only in secure
* domain. Set zero to make it available in secure and non-secure domains.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] dppi_id DPPI peripheral id.
* @param[in] channels_mask Bitmask with channels configuration.
* @param[in] lock_conf Lock configuration until next SoC reset.
@ -186,7 +186,7 @@ __STATIC_INLINE void nrf_spu_dppi_config_set(NRF_SPU_Type * p_reg,
* GPIO pins are configured as bitmask. Set one in bitmask to make particular pin available only
* in secure domain. Set zero to make it available in secure and non-secure domains.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] gpio_port Port number.
* @param[in] gpio_mask Bitmask with gpio configuration.
* @param[in] lock_conf Lock configuration until next SoC reset.
@ -199,7 +199,7 @@ __STATIC_INLINE void nrf_spu_gpio_config_set(NRF_SPU_Type * p_reg,
/**
* @brief Function for configuring non-secure callable flash region.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] flash_nsc_id Non-secure callable flash region ID.
* @param[in] flash_nsc_size Non-secure callable flash region size.
* @param[in] region_number Flash region number.
@ -214,7 +214,7 @@ __STATIC_INLINE void nrf_spu_flashnsc_set(NRF_SPU_Type * p_reg,
/**
* @brief Function for configuring non-secure callable RAM region.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_nsc_id Non-secure callable RAM region ID.
* @param[in] ram_nsc_size Non-secure callable RAM region size.
* @param[in] region_number RAM region number.
@ -231,7 +231,7 @@ __STATIC_INLINE void nrf_spu_ramnsc_set(NRF_SPU_Type * p_reg,
*
* Permissions parameter must be set by using the logical OR on the @ref nrf_spu_mem_perm_t values.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id Flash region index.
* @param[in] secure_attr Set region attribute to secure.
* @param[in] permissions Flash region permissions.
@ -248,7 +248,7 @@ __STATIC_INLINE void nrf_spu_flashregion_set(NRF_SPU_Type * p_reg,
*
* Permissions parameter must be set by using the logical OR on the @ref nrf_spu_mem_perm_t values.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] region_id RAM region index.
* @param[in] secure_attr Set region attribute to secure.
* @param[in] permissions RAM region permissions.
@ -263,7 +263,7 @@ __STATIC_INLINE void nrf_spu_ramregion_set(NRF_SPU_Type * p_reg,
/**
* @brief Function for configuring access permissions of the peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] peripheral_id ID number of a particular peripheral.
* @param[in] secure_attr Peripheral registers accessible only from secure domain.
* @param[in] secure_dma DMA transfers possible only from RAM memory in secure domain.

33
ext/hal/nordic/nrfx/hal/nrf_systick.h
View file

@ -42,18 +42,18 @@ extern "C" {
* @defgroup nrf_systick_hal SYSTICK HAL
* @{
* @ingroup nrf_systick
* @brief Hardware access layer for managing the SYSTICK peripheral.
* @brief Hardware access layer (HAL) for managing the SYSTICK peripheral.
*
* SYSTICK is ARM peripheral, not Nordic design.
* It means that it has no Nordic-typical interface with Tasks and Events.
* SYSTICK is a peripheral designed by ARM.
* This means that it does not feature the typical Nordic interface with Tasks and Events.
*
* Its usage is limited here to implement simple delays.
* Also keep in mind that this timer would be stopped when CPU is sleeping
* Its usage is limited here to the implementation of simple delays.
* Moreover, keep in mind that this timer will be stopped when CPU is sleeping
* (WFE/WFI instruction is successfully executed).
*/
/**
* @brief Mask of usable bits in the SysTick value
* @brief Mask of usable bits in the SysTick value.
*/
#define NRF_SYSTICK_VAL_MASK SysTick_VAL_CURRENT_Msk
@ -80,36 +80,36 @@ typedef enum {
} nrf_systick_csr_flags_t;
/**
* @brief Get Configuration and Status Register
* @brief Function for getting Configuration and Status Register.
*
* @return Values composed by @ref nrf_systick_csr_flags_t.
* @note The @ref NRF_SYSTICK_CSR_COUNTFLAG_MASK value is cleared when CSR register is read.
* @return Values composed by @ref nrf_systick_csr_flags_t.
*/
__STATIC_INLINE uint32_t nrf_systick_csr_get(void);
/**
* @brief Set Configuration and Status Register
* @brief Function for setting Configuration and Status Register.
*
* @param[in] val The value composed from @ref nrf_systick_csr_flags_t.
*/
__STATIC_INLINE void nrf_systick_csr_set(uint32_t val);
/**
* @brief Get the current reload value.
* @brief Function for getting the current reload value.
*
* @return The reload register value.
*/
__STATIC_INLINE uint32_t nrf_systick_load_get(void);
/**
* @brief Configure the reload value.
* @brief Function for configuring the reload value.
*
* @param[in] val The value to set in the reload register.
* @param[in] val The value to be set in the reload register.
*/
__STATIC_INLINE void nrf_systick_load_set(uint32_t val);
/**
* @brief Read the SysTick current value
* @brief Function for reading the SysTick current value.
*
* @return The current SysTick value
* @sa NRF_SYSTICK_VAL_MASK
@ -117,7 +117,7 @@ __STATIC_INLINE void nrf_systick_load_set(uint32_t val);
__STATIC_INLINE uint32_t nrf_systick_val_get(void);
/**
* @brief Clear the SysTick current value
* @brief Function for clearing the SysTick current value.
*
* @note The SysTick does not allow setting current value.
* Any write to VAL register would clear the timer.
@ -125,14 +125,13 @@ __STATIC_INLINE uint32_t nrf_systick_val_get(void);
__STATIC_INLINE void nrf_systick_val_clear(void);
/**
* @brief Read the calibration register
* @brief Function for reading the calibration register.
*
* @return The calibration register value
* @return The calibration register value.
*/
__STATIC_INLINE uint32_t nrf_systick_calib_get(void);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE uint32_t nrf_systick_csr_get(void)

198
ext/hal/nordic/nrfx/hal/nrf_temp.h
View file

@ -39,17 +39,20 @@ extern "C" {
#endif
/**
* @defgroup nrf_temp_hal TEMP HAL
* @defgroup nrf_temp_hal_deprecated TEMP HAL (deprecated)
* @{
* @ingroup nrf_temp temperature_example
* @ingroup nrf_temp
* @brief Temperature module init and read functions.
*/
/** @brief Workaround specific define - sign mask.*/
#define MASK_SIGN (0x00000200UL)
/** @brief Workaround specific define - sign extension mask.*/
#define MASK_SIGN_EXTENSION (0xFFFFFC00UL)
/**
* @brief Function for preparing the temp module for temperature measurement.
* @brief Function for preparing the TEMP module for temperature measurement.
*
* This function initializes the TEMP module and writes to the hidden configuration register.
*/
@ -62,18 +65,201 @@ static __INLINE void nrf_temp_init(void)
/**
* @brief Function for reading temperature measurement.
*
* The function reads the 10 bit 2's complement value and transforms it to a 32 bit 2's complement value.
* The function reads the 10-bit 2's complement value and transforms it to a 32-bit 2's complement value.
*/
static __INLINE int32_t nrf_temp_read(void)
{
/**@note Workaround for PAN_028 rev2.0A anomaly 28 - TEMP: Negative measured values are not represented correctly */
return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ? (int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP);
return ((NRF_TEMP->TEMP & MASK_SIGN) != 0) ?
(int32_t)(NRF_TEMP->TEMP | MASK_SIGN_EXTENSION) : (NRF_TEMP->TEMP);
}
/** @} */
/**
* @defgroup nrf_temp_hal TEMP HAL
* @{
* @ingroup nrf_temp
* @brief Hardware access layer for managing the Temperature sensor (TEMP).
*/
/** @brief TEMP tasks. */
typedef enum
{
NRF_TEMP_TASK_START = offsetof(NRF_TEMP_Type, TASKS_START), /**< Start temperature measurement. */
NRF_TEMP_TASK_STOP = offsetof(NRF_TEMP_Type, TASKS_STOP) /**< Stop temperature measurement. */
} nrf_temp_task_t;
/** @brief TEMP events. */
typedef enum
{
NRF_TEMP_EVENT_DATARDY = offsetof(NRF_TEMP_Type, EVENTS_DATARDY) /**< Temperature measurement complete, data ready. */
} nrf_temp_event_t;
/** @brief TEMP interrupts. */
typedef enum
{
NRF_TEMP_INT_DATARDY_MASK = TEMP_INTENSET_DATARDY_Msk /**< Interrupt on DATARDY event. */
} nrf_temp_int_mask_t;
/**
* @brief Function for enabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] temp_int Interrupt to be checked.
*
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_temp_int_enable_check(NRF_TEMP_Type const * p_reg,
nrf_temp_int_mask_t temp_int);
/**
* @brief Function for getting the address of the specified TEMP task register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Requested task.
*
* @return Address of the requested task register.
*/
__STATIC_INLINE uint32_t nrf_temp_task_address_get(NRF_TEMP_Type const * p_reg,
nrf_temp_task_t task);
/**
* @brief Function for activating the specified TEMP task.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task);
/**
* @brief Function for getting the address of the specified TEMP event register.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Requested event.
*
* @return Address of the requested event register.
*/
__STATIC_INLINE uint32_t nrf_temp_event_address_get(NRF_TEMP_Type const * p_reg,
nrf_temp_event_t event);
/**
* @brief Function for clearing the specified TEMP event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event);
/**
* @brief Function for getting the state of a specific event.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event);
/**
* @brief Function for getting the result of temperature measurement.
*
* @note Returned value is in 2's complement format, 0.25 °C steps
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Temperature value register contents.
*/
__STATIC_INLINE int32_t nrf_temp_result_get(NRF_TEMP_Type const * p_reg);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_temp_int_enable(NRF_TEMP_Type * p_reg, uint32_t mask)
{
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_temp_int_disable(NRF_TEMP_Type * p_reg, uint32_t mask)
{
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_temp_int_enable_check(NRF_TEMP_Type const * p_reg,
nrf_temp_int_mask_t temp_int)
{
return (bool)(p_reg->INTENSET & temp_int);
}
__STATIC_INLINE uint32_t nrf_temp_task_address_get(NRF_TEMP_Type const * p_reg,
nrf_temp_task_t task)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)task);
}
__STATIC_INLINE void nrf_temp_task_trigger(NRF_TEMP_Type * p_reg, nrf_temp_task_t task)
{
*(volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)task) = 1;
}
__STATIC_INLINE uint32_t nrf_temp_event_address_get(NRF_TEMP_Type const * p_reg,
nrf_temp_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_temp_event_clear(NRF_TEMP_Type * p_reg, nrf_temp_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_temp_event_check(NRF_TEMP_Type const * p_reg, nrf_temp_event_t event)
{
return (bool)*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
}
__STATIC_INLINE int32_t nrf_temp_result_get(NRF_TEMP_Type const * p_reg)
{
int32_t raw_measurement = p_reg->TEMP;
#if defined(NRF51)
/* Apply workaround for the nRF51 series anomaly 28 - TEMP: Negative measured values are not represented correctly. */
if ((raw_measurement & 0x00000200) != 0)
{
raw_measurement |= 0xFFFFFC00UL;
}
#endif
return raw_measurement;
}
#endif
/** @} */
#ifdef __cplusplus
}
#endif
#endif
#endif // NRF_TEMP_H__

208
ext/hal/nordic/nrfx/hal/nrf_timer.h
View file

@ -46,11 +46,23 @@ extern "C" {
*/
/**
* @brief Macro for validating the correctness of the BIT_WIDTH setting.
* @brief Macro for getting the maximum bit resolution of the specified timer instance.
*
* @param[in] id Index of the specified timer instance.
*
* @retval Maximum bit resolution of the specified timer instance.
*/
#define TIMER_MAX_SIZE(id) NRFX_CONCAT_3(TIMER, id, _MAX_SIZE)
/**
* @brief Macro for validating the correctness of the bit width resolution setting.
*
* @param[in] id Index of the specified timer instance.
* @param[in] bit_width Bit width resolution value to be checked.
*
* @retval true Timer instance supports the specified bit width resolution value.
* @retval false Timer instance does not support the specified bit width resolution value.
*/
#define TIMER_BIT_WIDTH_MAX(id, bit_width) \
(TIMER_MAX_SIZE(id) == 8 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) : \
(TIMER_MAX_SIZE(id) == 16 ? (bit_width == NRF_TIMER_BIT_WIDTH_8) || \
@ -64,7 +76,16 @@ extern "C" {
(bit_width == NRF_TIMER_BIT_WIDTH_32) : \
false))))
#if TIMER_COUNT > 3
#if (TIMER_COUNT > 3) || defined(__NRFX_DOXYGEN__)
/**
* @brief Macro for checking correctness of bit width configuration for the specified timer.
*
* @param[in] p_reg Timer instance register.
* @param[in] bit_width Bit width resolution value to be checked.
*
* @retval true Timer instance supports the specified bit width resolution value.
* @retval false Timer instance does not support the specified bit width resolution value.
*/
#define NRF_TIMER_IS_BIT_WIDTH_VALID(p_reg, bit_width) ( \
((p_reg == NRF_TIMER0) && (TIMER_BIT_WIDTH_MAX(0, bit_width))) \
|| ((p_reg == NRF_TIMER1) && (TIMER_BIT_WIDTH_MAX(1, bit_width))) \
@ -83,15 +104,15 @@ extern "C" {
/**
* @brief Macro for getting the number of capture/compare channels available
* in a given timer instance.
*
* @param[in] id Index of the specified timer instance.
*/
#define NRF_TIMER_CC_CHANNEL_COUNT(id) NRFX_CONCAT_3(TIMER, id, _CC_NUM)
/**
* @brief Timer tasks.
*/
/** @brief Timer tasks. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_TIMER_TASK_START = offsetof(NRF_TIMER_Type, TASKS_START), ///< Task for starting the timer.
NRF_TIMER_TASK_STOP = offsetof(NRF_TIMER_Type, TASKS_STOP), ///< Task for stopping the timer.
NRF_TIMER_TASK_COUNT = offsetof(NRF_TIMER_Type, TASKS_COUNT), ///< Task for incrementing the timer (in counter mode).
@ -107,15 +128,11 @@ typedef enum
#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
NRF_TIMER_TASK_CAPTURE5 = offsetof(NRF_TIMER_Type, TASKS_CAPTURE[5]), ///< Task for capturing the timer value on channel 5.
#endif
/*lint -restore*/
} nrf_timer_task_t;
/**
* @brief Timer events.
*/
/** @brief Timer events. */
typedef enum
{
/*lint -save -e30*/
NRF_TIMER_EVENT_COMPARE0 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[0]), ///< Event from compare channel 0.
NRF_TIMER_EVENT_COMPARE1 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[1]), ///< Event from compare channel 1.
NRF_TIMER_EVENT_COMPARE2 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[2]), ///< Event from compare channel 2.
@ -126,12 +143,9 @@ typedef enum
#if defined(TIMER_INTENSET_COMPARE5_Msk) || defined(__NRFX_DOXYGEN__)
NRF_TIMER_EVENT_COMPARE5 = offsetof(NRF_TIMER_Type, EVENTS_COMPARE[5]), ///< Event from compare channel 5.
#endif
/*lint -restore*/
} nrf_timer_event_t;
/**
* @brief Types of timer shortcuts.
*/
/** @brief Types of timer shortcuts. */
typedef enum
{
NRF_TIMER_SHORT_COMPARE0_STOP_MASK = TIMER_SHORTS_COMPARE0_STOP_Msk, ///< Shortcut for stopping the timer based on compare 0.
@ -156,9 +170,7 @@ typedef enum
#endif
} nrf_timer_short_mask_t;
/**
* @brief Timer modes.
*/
/** @brief Timer modes. */
typedef enum
{
NRF_TIMER_MODE_TIMER = TIMER_MODE_MODE_Timer, ///< Timer mode: timer.
@ -168,9 +180,7 @@ typedef enum
#endif
} nrf_timer_mode_t;
/**
* @brief Timer bit width.
*/
/** @brief Timer bit width. */
typedef enum
{
NRF_TIMER_BIT_WIDTH_8 = TIMER_BITMODE_BITMODE_08Bit, ///< Timer bit width 8 bit.
@ -179,9 +189,7 @@ typedef enum
NRF_TIMER_BIT_WIDTH_32 = TIMER_BITMODE_BITMODE_32Bit ///< Timer bit width 32 bit.
} nrf_timer_bit_width_t;
/**
* @brief Timer prescalers.
*/
/** @brief Timer prescalers. */
typedef enum
{
NRF_TIMER_FREQ_16MHz = 0, ///< Timer frequency 16 MHz.
@ -196,9 +204,7 @@ typedef enum
NRF_TIMER_FREQ_31250Hz ///< Timer frequency 31250 Hz.
} nrf_timer_frequency_t;
/**
* @brief Timer capture/compare channels.
*/
/** @brief Timer capture/compare channels. */
typedef enum
{
NRF_TIMER_CC_CHANNEL0 = 0, ///< Timer capture/compare channel 0.
@ -213,9 +219,7 @@ typedef enum
#endif
} nrf_timer_cc_channel_t;
/**
* @brief Timer interrupts.
*/
/** @brief Timer interrupts. */
typedef enum
{
NRF_TIMER_INT_COMPARE0_MASK = TIMER_INTENSET_COMPARE0_Msk, ///< Timer interrupt from compare event on channel 0.
@ -232,19 +236,19 @@ typedef enum
/**
* @brief Function for activating a specific timer task.
* @brief Function for activating the specified timer task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_timer_task_trigger(NRF_TIMER_Type * p_reg,
nrf_timer_task_t task);
/**
* @brief Function for getting the address of a specific timer task register.
* @brief Function for getting the address of the specified timer task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
@ -252,84 +256,84 @@ __STATIC_INLINE uint32_t * nrf_timer_task_address_get(NRF_TIMER_Type * p_reg,
nrf_timer_task_t task);
/**
* @brief Function for clearing a specific timer event.
* @brief Function for clearing the specified timer event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
__STATIC_INLINE void nrf_timer_event_clear(NRF_TIMER_Type * p_reg,
nrf_timer_event_t event);
/**
* @brief Function for checking the state of a specific timer event.
* @brief Function for retrieving the state of the TIMER event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg,
__STATIC_INLINE bool nrf_timer_event_check(NRF_TIMER_Type * p_reg,
nrf_timer_event_t event);
/**
* @brief Function for getting the address of a specific timer event register.
* @brief Function for getting the address of the specified timer event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
__STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
nrf_timer_event_t event);
/**
* @brief Function for enabling specified shortcuts.
* @brief Function for enabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] timer_shorts_mask Shortcuts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
uint32_t timer_shorts_mask);
uint32_t mask);
/**
* @brief Function for disabling specified shortcuts.
* @brief Function for disabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] timer_shorts_mask Shortcuts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
uint32_t timer_shorts_mask);
uint32_t mask);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] timer_int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
uint32_t timer_int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] timer_int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
uint32_t timer_int_mask);
uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] timer_int Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] timer_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg,
uint32_t timer_int);
uint32_t timer_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -380,8 +384,8 @@ __STATIC_INLINE void nrf_timer_publish_clear(NRF_TIMER_Type * p_reg,
/**
* @brief Function for setting the timer mode.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] mode Timer mode.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mode Timer mode.
*/
__STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
nrf_timer_mode_t mode);
@ -389,7 +393,7 @@ __STATIC_INLINE void nrf_timer_mode_set(NRF_TIMER_Type * p_reg,
/**
* @brief Function for retrieving the timer mode.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Timer mode.
*/
@ -398,16 +402,16 @@ __STATIC_INLINE nrf_timer_mode_t nrf_timer_mode_get(NRF_TIMER_Type * p_reg);
/**
* @brief Function for setting the timer bit width.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] bit_width Timer bit width.
*/
__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
__STATIC_INLINE void nrf_timer_bit_width_set(NRF_TIMER_Type * p_reg,
nrf_timer_bit_width_t bit_width);
/**
* @brief Function for retrieving the timer bit width.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Timer bit width.
*/
@ -416,45 +420,45 @@ __STATIC_INLINE nrf_timer_bit_width_t nrf_timer_bit_width_get(NRF_TIMER_Type * p
/**
* @brief Function for setting the timer frequency.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency Timer frequency.
*/
__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
__STATIC_INLINE void nrf_timer_frequency_set(NRF_TIMER_Type * p_reg,
nrf_timer_frequency_t frequency);
/**
* @brief Function for retrieving the timer frequency.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Timer frequency.
*/
__STATIC_INLINE nrf_timer_frequency_t nrf_timer_frequency_get(NRF_TIMER_Type * p_reg);
/**
* @brief Function for writing the capture/compare register for a specified channel.
* @brief Function for writing the capture/compare register for the specified channel.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] cc_channel Requested capture/compare channel.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] cc_channel The specified capture/compare channel.
* @param[in] cc_value Value to write to the capture/compare register.
*/
__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg,
__STATIC_INLINE void nrf_timer_cc_write(NRF_TIMER_Type * p_reg,
nrf_timer_cc_channel_t cc_channel,
uint32_t cc_value);
/**
* @brief Function for retrieving the capture/compare value for a specified channel.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] cc_channel Requested capture/compare channel.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] cc_channel The specified capture/compare channel.
*
* @return Value from the requested capture/compare register.
* @return Value from the specified capture/compare register.
*/
__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
__STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
nrf_timer_cc_channel_t cc_channel);
/**
* @brief Function for getting a specific timer capture task.
* @brief Function for getting the specified timer capture task.
*
* @param[in] channel Capture channel.
*
@ -463,7 +467,7 @@ __STATIC_INLINE uint32_t nrf_timer_cc_read(NRF_TIMER_Type * p_reg,
__STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel);
/**
* @brief Function for getting a specific timer compare event.
* @brief Function for getting the specified timer compare event.
*
* @param[in] channel Compare channel.
*
@ -472,7 +476,7 @@ __STATIC_INLINE nrf_timer_task_t nrf_timer_capture_task_get(uint32_t channel);
__STATIC_INLINE nrf_timer_event_t nrf_timer_compare_event_get(uint32_t channel);
/**
* @brief Function for getting a specific timer compare interrupt.
* @brief Function for getting the specified timer compare interrupt.
*
* @param[in] channel Compare channel.
*
@ -489,7 +493,7 @@ __STATIC_INLINE nrf_timer_int_mask_t nrf_timer_compare_int_get(uint32_t channel)
*
* @return Number of timer ticks.
*/
__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
__STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
nrf_timer_frequency_t frequency);
/**
@ -501,7 +505,7 @@ __STATIC_INLINE uint32_t nrf_timer_us_to_ticks(uint32_t time_us,
*
* @return Number of timer ticks.
*/
__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
__STATIC_INLINE uint32_t nrf_timer_ms_to_ticks(uint32_t time_ms,
nrf_timer_frequency_t frequency);
@ -542,27 +546,27 @@ __STATIC_INLINE uint32_t * nrf_timer_event_address_get(NRF_TIMER_Type * p_reg,
}
__STATIC_INLINE void nrf_timer_shorts_enable(NRF_TIMER_Type * p_reg,
uint32_t timer_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS |= timer_shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_timer_shorts_disable(NRF_TIMER_Type * p_reg,
uint32_t timer_shorts_mask)
uint32_t mask)
{
p_reg->SHORTS &= ~(timer_shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_timer_int_enable(NRF_TIMER_Type * p_reg,
uint32_t timer_int_mask)
uint32_t mask)
{
p_reg->INTENSET = timer_int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_timer_int_disable(NRF_TIMER_Type * p_reg,
uint32_t timer_int_mask)
uint32_t mask)
{
p_reg->INTENCLR = timer_int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_timer_int_enable_check(NRF_TIMER_Type * p_reg,

160
ext/hal/nordic/nrfx/hal/nrf_twi.h
View file

@ -45,38 +45,28 @@ extern "C" {
* @brief Hardware access layer for managing the TWI peripheral.
*/
/**
* @brief TWI tasks.
*/
/** @brief TWI tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_TWI_TASK_STARTRX = offsetof(NRF_TWI_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
NRF_TWI_TASK_STARTTX = offsetof(NRF_TWI_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
NRF_TWI_TASK_STOP = offsetof(NRF_TWI_Type, TASKS_STOP), ///< Stop TWI transaction.
NRF_TWI_TASK_SUSPEND = offsetof(NRF_TWI_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
NRF_TWI_TASK_RESUME = offsetof(NRF_TWI_Type, TASKS_RESUME) ///< Resume TWI transaction.
/*lint -restore*/
} nrf_twi_task_t;
/**
* @brief TWI events.
*/
/** @brief TWI events. */
typedef enum
{
/*lint -save -e30*/
NRF_TWI_EVENT_STOPPED = offsetof(NRF_TWI_Type, EVENTS_STOPPED), ///< TWI stopped.
NRF_TWI_EVENT_RXDREADY = offsetof(NRF_TWI_Type, EVENTS_RXDREADY), ///< TWI RXD byte received.
NRF_TWI_EVENT_TXDSENT = offsetof(NRF_TWI_Type, EVENTS_TXDSENT), ///< TWI TXD byte sent.
NRF_TWI_EVENT_ERROR = offsetof(NRF_TWI_Type, EVENTS_ERROR), ///< TWI error.
NRF_TWI_EVENT_BB = offsetof(NRF_TWI_Type, EVENTS_BB), ///< TWI byte boundary, generated before each byte that is sent or received.
NRF_TWI_EVENT_SUSPENDED = offsetof(NRF_TWI_Type, EVENTS_SUSPENDED) ///< TWI entered the suspended state.
/*lint -restore*/
} nrf_twi_event_t;
/**
* @brief TWI shortcuts.
*/
/** @brief TWI shortcuts. */
typedef enum
{
NRF_TWI_SHORT_BB_SUSPEND_MASK = TWI_SHORTS_BB_SUSPEND_Msk, ///< Shortcut between BB event and SUSPEND task.
@ -85,9 +75,7 @@ typedef enum
TWI_SHORTS_BB_STOP_Msk ///< All TWI shortcuts.
} nrf_twi_short_mask_t;
/**
* @brief TWI interrupts.
*/
/** @brief TWI interrupts. */
typedef enum
{
NRF_TWI_INT_STOPPED_MASK = TWI_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@ -104,9 +92,7 @@ typedef enum
TWI_INTENSET_SUSPENDED_Msk ///< All TWI interrupts.
} nrf_twi_int_mask_t;
/**
* @brief TWI error source.
*/
/** @brief TWI error source. */
typedef enum
{
NRF_TWI_ERROR_ADDRESS_NACK = TWI_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
@ -116,9 +102,7 @@ typedef enum
* from the RXD register (previous data is lost). */
} nrf_twi_error_t;
/**
* @brief TWI master clock frequency.
*/
/** @brief TWI master clock frequency. */
typedef enum
{
NRF_TWI_FREQ_100K = TWI_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
@ -128,19 +112,19 @@ typedef enum
/**
* @brief Function for activating a specific TWI task.
* @brief Function for activating the specified TWI task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_twi_task_trigger(NRF_TWI_Type * p_reg,
nrf_twi_task_t task);
/**
* @brief Function for getting the address of a specific TWI task register.
* @brief Function for getting the address of the specified TWI task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
@ -148,31 +132,31 @@ __STATIC_INLINE uint32_t * nrf_twi_task_address_get(NRF_TWI_Type * p_reg,
nrf_twi_task_t task);
/**
* @brief Function for clearing a specific TWI event.
* @brief Function for clearing the specified TWI event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
__STATIC_INLINE void nrf_twi_event_clear(NRF_TWI_Type * p_reg,
nrf_twi_event_t event);
/**
* @brief Function for checking the state of a specific event.
* @brief Function for retrieving the state of the TWI event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_twi_event_check(NRF_TWI_Type * p_reg,
nrf_twi_event_t event);
/**
* @brief Function for getting the address of a specific TWI event register.
* @brief Function for getting the address of the specified TWI event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
@ -180,71 +164,71 @@ __STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg,
nrf_twi_event_t event);
/**
* @brief Function for enabling specified shortcuts.
* @brief Function for enabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] shorts_mask Shortcuts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
uint32_t shorts_mask);
uint32_t mask);
/**
* @brief Function for disabling specified shortcuts.
* @brief Function for disabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] shorts_mask Shortcuts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
uint32_t shorts_mask);
uint32_t mask);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
uint32_t int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
uint32_t int_mask);
uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] int_mask Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] twi_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
nrf_twi_int_mask_t int_mask);
nrf_twi_int_mask_t twi_int);
/**
* @brief Function for enabling the TWI peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg);
/**
* @brief Function for disabling the TWI peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twi_disable(NRF_TWI_Type * p_reg);
/**
* @brief Function for configuring TWI pins.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] scl_pin SCL pin number.
* @param[in] sda_pin SDA pin number.
*/
@ -255,25 +239,25 @@ __STATIC_INLINE void nrf_twi_pins_set(NRF_TWI_Type * p_reg,
/**
* @brief Function for retrieving the SCL pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval pin SCL pin number.
* @return SCL pin number.
*/
__STATIC_INLINE uint32_t nrf_twi_scl_pin_get(NRF_TWI_Type * p_reg);
/**
* @brief Function for retrieving the SDA pin number.
*
* @param[in] p_reg Pointer to the peripheral registers structure
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval pin SDA pin number.
* @return SDA pin number.
*/
__STATIC_INLINE uint32_t nrf_twi_sda_pin_get(NRF_TWI_Type * p_reg);
/**
* @brief Function for setting the TWI master clock frequency.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency TWI frequency.
*/
__STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
@ -284,7 +268,7 @@ __STATIC_INLINE void nrf_twi_frequency_set(NRF_TWI_Type * p_reg,
*
* The error flags are cleared after reading.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask with error source flags.
*/
@ -293,7 +277,7 @@ __STATIC_INLINE uint32_t nrf_twi_errorsrc_get_and_clear(NRF_TWI_Type * p_reg);
/**
* @brief Function for setting the address to be used in TWI transfers.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] address Address to be used in transfers.
*/
__STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address);
@ -301,7 +285,7 @@ __STATIC_INLINE void nrf_twi_address_set(NRF_TWI_Type * p_reg, uint8_t address);
/**
* @brief Function for reading data received by TWI.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Received data.
*/
@ -310,13 +294,19 @@ __STATIC_INLINE uint8_t nrf_twi_rxd_get(NRF_TWI_Type * p_reg);
/**
* @brief Function for writing data to be transmitted by TWI.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] data Data to be transmitted.
*/
__STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data);
/**
* @brief Function for setting the specified shortcuts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be set.
*/
__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
uint32_t shorts_mask);
uint32_t mask);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
@ -355,33 +345,33 @@ __STATIC_INLINE uint32_t * nrf_twi_event_address_get(NRF_TWI_Type * p_reg,
}
__STATIC_INLINE void nrf_twi_shorts_enable(NRF_TWI_Type * p_reg,
uint32_t shorts_mask)
uint32_t mask)
{
p_reg->SHORTS |= shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_twi_shorts_disable(NRF_TWI_Type * p_reg,
uint32_t shorts_mask)
uint32_t mask)
{
p_reg->SHORTS &= ~(shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_twi_int_enable(NRF_TWI_Type * p_reg,
uint32_t int_mask)
uint32_t mask)
{
p_reg->INTENSET = int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_twi_int_disable(NRF_TWI_Type * p_reg,
uint32_t int_mask)
uint32_t mask)
{
p_reg->INTENCLR = int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_twi_int_enable_check(NRF_TWI_Type * p_reg,
nrf_twi_int_mask_t int_mask)
nrf_twi_int_mask_t twi_int)
{
return (bool)(p_reg->INTENSET & int_mask);
return (bool)(p_reg->INTENSET & twi_int);
}
__STATIC_INLINE void nrf_twi_enable(NRF_TWI_Type * p_reg)
@ -461,9 +451,9 @@ __STATIC_INLINE void nrf_twi_txd_set(NRF_TWI_Type * p_reg, uint8_t data)
}
__STATIC_INLINE void nrf_twi_shorts_set(NRF_TWI_Type * p_reg,
uint32_t shorts_mask)
uint32_t mask)
{
p_reg->SHORTS = shorts_mask;
p_reg->SHORTS = mask;
}
#endif // SUPPRESS_INLINE_IMPLEMENTATION

202
ext/hal/nordic/nrfx/hal/nrf_twim.h
View file

@ -45,26 +45,19 @@ extern "C" {
* @brief Hardware access layer for managing the TWIM peripheral.
*/
/**
* @brief TWIM tasks.
*/
/** @brief TWIM tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_TWIM_TASK_STARTRX = offsetof(NRF_TWIM_Type, TASKS_STARTRX), ///< Start TWI receive sequence.
NRF_TWIM_TASK_STARTTX = offsetof(NRF_TWIM_Type, TASKS_STARTTX), ///< Start TWI transmit sequence.
NRF_TWIM_TASK_STOP = offsetof(NRF_TWIM_Type, TASKS_STOP), ///< Stop TWI transaction.
NRF_TWIM_TASK_SUSPEND = offsetof(NRF_TWIM_Type, TASKS_SUSPEND), ///< Suspend TWI transaction.
NRF_TWIM_TASK_RESUME = offsetof(NRF_TWIM_Type, TASKS_RESUME) ///< Resume TWI transaction.
/*lint -restore*/
} nrf_twim_task_t;
/**
* @brief TWIM events.
*/
/** @brief TWIM events. */
typedef enum
{
/*lint -save -e30*/
NRF_TWIM_EVENT_STOPPED = offsetof(NRF_TWIM_Type, EVENTS_STOPPED), ///< TWI stopped.
NRF_TWIM_EVENT_ERROR = offsetof(NRF_TWIM_Type, EVENTS_ERROR), ///< TWI error.
NRF_TWIM_EVENT_SUSPENDED = 0x148, ///< TWI suspended.
@ -72,12 +65,9 @@ typedef enum
NRF_TWIM_EVENT_TXSTARTED = offsetof(NRF_TWIM_Type, EVENTS_TXSTARTED), ///< Transmit sequence started.
NRF_TWIM_EVENT_LASTRX = offsetof(NRF_TWIM_Type, EVENTS_LASTRX), ///< Byte boundary, starting to receive the last byte.
NRF_TWIM_EVENT_LASTTX = offsetof(NRF_TWIM_Type, EVENTS_LASTTX) ///< Byte boundary, starting to transmit the last byte.
/*lint -restore*/
} nrf_twim_event_t;
/**
* @brief TWIM shortcuts.
*/
/** @brief TWIM shortcuts. */
typedef enum
{
NRF_TWIM_SHORT_LASTTX_STARTRX_MASK = TWIM_SHORTS_LASTTX_STARTRX_Msk, ///< Shortcut between LASTTX event and STARTRX task.
@ -92,9 +82,7 @@ typedef enum
TWIM_SHORTS_LASTRX_STOP_Msk ///< All TWIM shortcuts.
} nrf_twim_short_mask_t;
/**
* @brief TWIM interrupts.
*/
/** @brief TWIM interrupts. */
typedef enum
{
NRF_TWIM_INT_STOPPED_MASK = TWIM_INTENSET_STOPPED_Msk, ///< Interrupt on STOPPED event.
@ -103,19 +91,17 @@ typedef enum
NRF_TWIM_INT_RXSTARTED_MASK = TWIM_INTENSET_RXSTARTED_Msk, ///< Interrupt on RXSTARTED event.
NRF_TWIM_INT_TXSTARTED_MASK = TWIM_INTENSET_TXSTARTED_Msk, ///< Interrupt on TXSTARTED event.
NRF_TWIM_INT_LASTRX_MASK = TWIM_INTENSET_LASTRX_Msk, ///< Interrupt on LASTRX event.
NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
NRF_TWIM_INT_LASTTX_MASK = TWIM_INTENSET_LASTTX_Msk, ///< Interrupt on LASTTX event.
NRF_TWIM_ALL_INTS_MASK = TWIM_INTENSET_STOPPED_Msk |
TWIM_INTENSET_ERROR_Msk |
TWIM_INTENSET_SUSPENDED_Msk |
TWIM_INTENSET_RXSTARTED_Msk |
TWIM_INTENSET_TXSTARTED_Msk |
TWIM_INTENSET_LASTRX_Msk |
TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event.
TWIM_INTENSET_LASTTX_Msk ///< Interrupt on LASTTX event.
} nrf_twim_int_mask_t;
/**
* @brief TWIM master clock frequency.
*/
/** @brief TWIM master clock frequency. */
typedef enum
{
NRF_TWIM_FREQ_100K = TWIM_FREQUENCY_FREQUENCY_K100, ///< 100 kbps.
@ -123,9 +109,7 @@ typedef enum
NRF_TWIM_FREQ_400K = TWIM_FREQUENCY_FREQUENCY_K400 ///< 400 kbps.
} nrf_twim_frequency_t;
/**
* @brief TWIM error source.
*/
/** @brief TWIM error source. */
typedef enum
{
NRF_TWIM_ERROR_ADDRESS_NACK = TWIM_ERRORSRC_ANACK_Msk, ///< NACK received after sending the address.
@ -134,19 +118,19 @@ typedef enum
/**
* @brief Function for activating a specific TWIM task.
* @brief Function for activating the specified TWIM task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Task to activate.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
nrf_twim_task_t task);
/**
* @brief Function for getting the address of a specific TWIM task register.
* @brief Function for getting the address of the specified TWIM task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] task Requested task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task The specified task.
*
* @return Address of the specified task register.
*/
@ -154,31 +138,31 @@ __STATIC_INLINE uint32_t * nrf_twim_task_address_get(NRF_TWIM_Type * p_reg,
nrf_twim_task_t task);
/**
* @brief Function for clearing a specific TWIM event.
* @brief Function for clearing the specified TWIM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
__STATIC_INLINE void nrf_twim_event_clear(NRF_TWIM_Type * p_reg,
nrf_twim_event_t event);
/**
* @brief Function for checking the state of a specific TWIM event.
* @brief Function for retrieving the state of the TWIM event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
__STATIC_INLINE bool nrf_twim_event_check(NRF_TWIM_Type * p_reg,
nrf_twim_event_t event);
/**
* @brief Function for getting the address of a specific TWIM event register.
* @brief Function for getting the address of the specified TWIM event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Requested event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @return Address of the specified event register.
*/
@ -186,52 +170,52 @@ __STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,
nrf_twim_event_t event);
/**
* @brief Function for enabling specified shortcuts.
* @brief Function for enabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] shorts_mask Shortcuts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
uint32_t shorts_mask);
uint32_t mask);
/**
* @brief Function for disabling specified shortcuts.
* @brief Function for disabling the specified shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] shorts_mask Shortcuts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
uint32_t shorts_mask);
uint32_t mask);
/**
* @brief Function for enabling specified interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] int_mask Interrupts to enable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
uint32_t int_mask);
uint32_t mask);
/**
* @brief Function for disabling specified interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] int_mask Interrupts to disable.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
uint32_t int_mask);
uint32_t mask);
/**
* @brief Function for checking the state of a given interrupt.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] int_mask Interrupt to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] twim_int Interrupt to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
nrf_twim_int_mask_t int_mask);
__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
nrf_twim_int_mask_t twim_int);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -282,36 +266,35 @@ __STATIC_INLINE void nrf_twim_publish_clear(NRF_TWIM_Type * p_reg,
/**
* @brief Function for enabling the TWIM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_enable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for disabling the TWIM peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_disable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for configuring TWI pins.
*
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] scl_pin SCL pin number.
* @param[in] sda_pin SDA pin number.
*/
__STATIC_INLINE void nrf_twim_pins_set(NRF_TWIM_Type * p_reg,
uint32_t scl_pin,
uint32_t sda_pin);
uint32_t scl_pin,
uint32_t sda_pin);
/**
* @brief Function for setting the TWI master clock frequency.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] frequency TWI frequency.
*/
__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
__STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
nrf_twim_frequency_t frequency);
/**
@ -319,7 +302,7 @@ __STATIC_INLINE void nrf_twim_frequency_set(NRF_TWIM_Type * p_reg,
*
* The error flags are cleared after reading.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask with error source flags.
*/
@ -328,18 +311,18 @@ __STATIC_INLINE uint32_t nrf_twim_errorsrc_get_and_clear(NRF_TWIM_Type * p_reg);
/**
* @brief Function for setting the address to be used in TWI transfers.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] address Address to be used in transfers.
*/
__STATIC_INLINE void nrf_twim_address_set(NRF_TWIM_Type * p_reg,
uint8_t address);
uint8_t address);
/**
* @brief Function for setting the transmit buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
uint8_t const * p_buffer,
@ -348,49 +331,70 @@ __STATIC_INLINE void nrf_twim_tx_buffer_set(NRF_TWIM_Type * p_reg,
/**
* @brief Function for setting the receive buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
uint8_t * p_buffer,
size_t length);
uint8_t * p_buffer,
size_t length);
/**
* @brief Function for setting the specified shortcuts.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Shortcuts to be set.
*/
__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
uint32_t shorts_mask);
uint32_t mask);
/**
* @brief Function for getting the amount of transmitted bytes.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Amount of transmitted bytes.
*/
__STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg);
/**
* @brief Function for getting the amount of received bytes.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Amount of received bytes.
*/
__STATIC_INLINE size_t nrf_twim_rxd_amount_get(NRF_TWIM_Type * p_reg);
/**
* @brief Function for enabling the TX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_tx_list_enable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for disabling the TX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_tx_list_disable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for enabling the RX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_rx_list_enable(NRF_TWIM_Type * p_reg);
/**
* @brief Function for disabling the RX list feature.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twim_rx_list_disable(NRF_TWIM_Type * p_reg);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_twim_task_trigger(NRF_TWIM_Type * p_reg,
@ -428,33 +432,33 @@ __STATIC_INLINE uint32_t * nrf_twim_event_address_get(NRF_TWIM_Type * p_reg,
}
__STATIC_INLINE void nrf_twim_shorts_enable(NRF_TWIM_Type * p_reg,
uint32_t shorts_mask)
uint32_t mask)
{
p_reg->SHORTS |= shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_twim_shorts_disable(NRF_TWIM_Type * p_reg,
uint32_t shorts_mask)
uint32_t mask)
{
p_reg->SHORTS &= ~(shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_twim_int_enable(NRF_TWIM_Type * p_reg,
uint32_t int_mask)
uint32_t mask)
{
p_reg->INTENSET = int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE void nrf_twim_int_disable(NRF_TWIM_Type * p_reg,
uint32_t int_mask)
uint32_t mask)
{
p_reg->INTENCLR = int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE bool nrf_twim_int_enable_check(NRF_TWIM_Type * p_reg,
nrf_twim_int_mask_t int_mask)
nrf_twim_int_mask_t twim_int)
{
return (bool)(p_reg->INTENSET & int_mask);
return (bool)(p_reg->INTENSET & twim_int);
}
#if defined(DPPI_PRESENT)
@ -544,9 +548,9 @@ __STATIC_INLINE void nrf_twim_rx_buffer_set(NRF_TWIM_Type * p_reg,
}
__STATIC_INLINE void nrf_twim_shorts_set(NRF_TWIM_Type * p_reg,
uint32_t shorts_mask)
uint32_t mask)
{
p_reg->SHORTS = shorts_mask;
p_reg->SHORTS = mask;
}
__STATIC_INLINE size_t nrf_twim_txd_amount_get(NRF_TWIM_Type * p_reg)

517
ext/hal/nordic/nrfx/hal/nrf_twis.h
View file

@ -46,221 +46,200 @@ extern "C" {
* (TWIS) peripheral.
*/
/**
* @brief TWIS tasks
*/
/** @brief TWIS tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction */
NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction */
NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction */
NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command */
NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command */
/*lint -restore*/
NRF_TWIS_TASK_STOP = offsetof(NRF_TWIS_Type, TASKS_STOP), /**< Stop TWIS transaction. */
NRF_TWIS_TASK_SUSPEND = offsetof(NRF_TWIS_Type, TASKS_SUSPEND), /**< Suspend TWIS transaction. */
NRF_TWIS_TASK_RESUME = offsetof(NRF_TWIS_Type, TASKS_RESUME), /**< Resume TWIS transaction. */
NRF_TWIS_TASK_PREPARERX = offsetof(NRF_TWIS_Type, TASKS_PREPARERX), /**< Prepare the TWIS slave to respond to a write command. */
NRF_TWIS_TASK_PREPARETX = offsetof(NRF_TWIS_Type, TASKS_PREPARETX) /**< Prepare the TWIS slave to respond to a read command. */
} nrf_twis_task_t;
/**
* @brief TWIS events
*/
/** @brief TWIS events. */
typedef enum
{
/*lint -save -e30*/
NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped */
NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error */
NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started */
NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started */
NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received */
NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received */
/*lint -restore*/
NRF_TWIS_EVENT_STOPPED = offsetof(NRF_TWIS_Type, EVENTS_STOPPED), /**< TWIS stopped. */
NRF_TWIS_EVENT_ERROR = offsetof(NRF_TWIS_Type, EVENTS_ERROR), /**< TWIS error. */
NRF_TWIS_EVENT_RXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_RXSTARTED), /**< Receive sequence started. */
NRF_TWIS_EVENT_TXSTARTED = offsetof(NRF_TWIS_Type, EVENTS_TXSTARTED), /**< Transmit sequence started. */
NRF_TWIS_EVENT_WRITE = offsetof(NRF_TWIS_Type, EVENTS_WRITE), /**< Write command received. */
NRF_TWIS_EVENT_READ = offsetof(NRF_TWIS_Type, EVENTS_READ) /**< Read command received. */
} nrf_twis_event_t;
/**
* @brief TWIS shortcuts
*/
/** @brief TWIS shortcuts. */
typedef enum
{
NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task */
NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task */
NRF_TWIS_SHORT_WRITE_SUSPEND_MASK = TWIS_SHORTS_WRITE_SUSPEND_Msk, /**< Shortcut between WRITE event and SUSPEND task. */
NRF_TWIS_SHORT_READ_SUSPEND_MASK = TWIS_SHORTS_READ_SUSPEND_Msk, /**< Shortcut between READ event and SUSPEND task. */
} nrf_twis_short_mask_t;
/**
* @brief TWIS interrupts
*/
/** @brief TWIS interrupts. */
typedef enum
{
NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event */
NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event */
NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event */
NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event */
NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event */
NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event */
NRF_TWIS_INT_STOPPED_MASK = TWIS_INTEN_STOPPED_Msk, /**< Interrupt on STOPPED event. */
NRF_TWIS_INT_ERROR_MASK = TWIS_INTEN_ERROR_Msk, /**< Interrupt on ERROR event. */
NRF_TWIS_INT_RXSTARTED_MASK = TWIS_INTEN_RXSTARTED_Msk, /**< Interrupt on RXSTARTED event. */
NRF_TWIS_INT_TXSTARTED_MASK = TWIS_INTEN_TXSTARTED_Msk, /**< Interrupt on TXSTARTED event. */
NRF_TWIS_INT_WRITE_MASK = TWIS_INTEN_WRITE_Msk, /**< Interrupt on WRITE event. */
NRF_TWIS_INT_READ_MASK = TWIS_INTEN_READ_Msk, /**< Interrupt on READ event. */
} nrf_twis_int_mask_t;
/**
* @brief TWIS error source
*/
/** @brief TWIS error source. */
typedef enum
{
NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented */
NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte */
NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented */
NRF_TWIS_ERROR_OVERFLOW = TWIS_ERRORSRC_OVERFLOW_Msk, /**< RX buffer overflow detected, and prevented. */
NRF_TWIS_ERROR_DATA_NACK = TWIS_ERRORSRC_DNACK_Msk, /**< NACK sent after receiving a data byte. */
NRF_TWIS_ERROR_OVERREAD = TWIS_ERRORSRC_OVERREAD_Msk /**< TX buffer over-read detected, and prevented. */
} nrf_twis_error_t;
/**
* @brief TWIS address matching configuration
*/
/** @brief TWIS address matching configuration. */
typedef enum
{
NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0] */
NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1] */
NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching */
NRF_TWIS_CONFIG_ADDRESS0_MASK = TWIS_CONFIG_ADDRESS0_Msk, /**< Enable or disable address matching on ADDRESS[0]. */
NRF_TWIS_CONFIG_ADDRESS1_MASK = TWIS_CONFIG_ADDRESS1_Msk, /**< Enable or disable address matching on ADDRESS[1]. */
NRF_TWIS_CONFIG_ADDRESS01_MASK = TWIS_CONFIG_ADDRESS0_Msk | TWIS_CONFIG_ADDRESS1_Msk /**< Enable both address matching. */
} nrf_twis_config_addr_mask_t;
/**
* @brief Variable type to hold amount of data for EasyDMA
* @brief Variable type to hold the amount of data for EasyDMA.
*
* Variable of the minimum size that can hold the amount of data to transfer.
*
* @note
* Defined to make it simple to change if EasyDMA would be updated to support more data in
* the future devices to.
* @note Defined to make it simple to change if EasyDMA is updated to support more data in
* the future devices.
*/
typedef uint8_t nrf_twis_amount_t;
/**
* @brief Smallest variable type to hold TWI address
* @brief Smallest variable type to hold the TWI address.
*
* Variable of the minimum size that can hold single TWI address.
* Variable of the minimum size that can hold a single TWI address.
*
* @note
* Defined to make it simple to change if new TWI would support for example
* 10 bit addressing mode.
* @note Defined to make it simple to change if the new TWI supports for example
* 10 bit addressing mode.
*/
typedef uint8_t nrf_twis_address_t;
/**
* @brief Function for activating a specific TWIS task.
* @brief Function for activating the specified TWIS task.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param task Task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task Task to be activated.
*/
__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task);
__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * p_reg, nrf_twis_task_t task);
/**
* @brief Function for returning the address of a specific TWIS task register.
* @brief Function for returning the address of the specified TWIS task register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param task Task.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] task The specified task.
*
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_twis_task_address_get(
NRF_TWIS_Type const * const p_reg,
nrf_twis_task_t task);
__STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,
nrf_twis_task_t task);
/**
* @brief Function for clearing a specific event.
* @brief Function for clearing the specified event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param event Event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*/
__STATIC_INLINE void nrf_twis_event_clear(
NRF_TWIS_Type * const p_reg,
nrf_twis_event_t event);
__STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg,
nrf_twis_event_t event);
/**
* @brief Function for returning the state of a specific event.
* @brief Function for retrieving the state of the TWIS event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param event Event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_twis_event_check(
NRF_TWIS_Type const * const p_reg,
nrf_twis_event_t event);
__STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg,
nrf_twis_event_t event);
/**
* @brief Function for getting and clearing the state of specific event
* @brief Function for getting and clearing the state of the specified event.
*
* This function checks the state of the event and clears it.
* @param[in,out] p_reg Pointer to the peripheral registers structure.
* @param event Event.
*
* @retval true If the event was set.
* @retval false If the event was not set.
* @param[in,out] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event.
*
* @retval true The event was set.
* @retval false The event was not set.
*/
__STATIC_INLINE bool nrf_twis_event_get_and_clear(
NRF_TWIS_Type * const p_reg,
nrf_twis_event_t event);
__STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg,
nrf_twis_event_t event);
/**
* @brief Function for returning the address of a specific TWIS event register.
* @brief Function for returning the address of the specified TWIS event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param event Event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event.
*
* @return Address.
*/
__STATIC_INLINE uint32_t nrf_twis_event_address_get(
NRF_TWIS_Type const * const p_reg,
nrf_twis_event_t event);
__STATIC_INLINE uint32_t nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,
nrf_twis_event_t event);
/**
* @brief Function for setting a shortcut.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param short_mask Shortcuts mask.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask);
/**
* @brief Function for clearing shortcuts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param short_mask Shortcuts mask.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask);
__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask);
/**
* @brief Get the shorts mask
* @brief Function for getting the shorts mask.
*
* Function returns shorts register.
* @param[in] p_reg Pointer to the peripheral registers structure.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Flags of currently enabled shortcuts
*/
__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg);
__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg);
/**
* @brief Function for enabling selected interrupts.
* @brief Function for enabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts mask.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of selected interrupts.
* @brief Function for retrieving the state of the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts mask.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be checked.
*
* @retval true If any of selected interrupts is enabled.
* @retval false If none of selected interrupts is enabled.
* @retval true Any of the specified interrupts is enabled.
* @retval false None of the specified interrupts is enabled.
*/
__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask);
__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask);
/**
* @brief Function for disabling selected interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts mask.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask);
__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * p_reg, uint32_t mask);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -312,177 +291,182 @@ __STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg,
* @brief Function for retrieving and clearing the TWIS error source.
*
* @attention Error sources are cleared after read.
* @param[in] p_reg Pointer to the peripheral registers structure.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Error source mask with values from @ref nrf_twis_error_t.
*/
__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg);
/**
* @brief Get information which of addresses matched
* @brief Function for getting information about which of the addresses matched.
*
* Function returns index in the address table
* that points to the address that already matched.
* @param[in] p_reg Pointer to the peripheral registers structure.
* @return Index of matched address
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Index of matched address.
*/
__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg);
/**
* @brief Function for enabling TWIS.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * const p_reg);
__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * p_reg);
/**
* @brief Function for disabling TWIS.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * const p_reg);
__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * p_reg);
/**
* @brief Function for configuring TWIS pins.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param scl SCL pin number.
* @param sda SDA pin number.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] scl SCL pin number.
* @param[in] sda SDA pin number.
*/
__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda);
__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * p_reg, uint32_t scl, uint32_t sda);
/**
* @brief Function for setting the receive buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param p_buf Pointer to the buffer for received data.
* @param length Maximum number of data bytes to receive.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buf Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_twis_rx_buffer_set(
NRF_TWIS_Type * const p_reg,
uint8_t * p_buf,
nrf_twis_amount_t length);
__STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg,
uint8_t * p_buf,
size_t length);
/**
* @brief Function that prepares TWIS for receiving
*
* This function sets receive buffer and then sets NRF_TWIS_TASK_PREPARERX task.
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param p_buf Pointer to the buffer for received data.
* @param length Maximum number of data bytes to receive.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buf Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_twis_rx_prepare(
NRF_TWIS_Type * const p_reg,
uint8_t * p_buf,
nrf_twis_amount_t length);
__STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg,
uint8_t * p_buf,
size_t length);
/**
* @brief Function for getting number of bytes received in the last transaction.
*
* @param[in] p_reg TWIS instance.
*
* @return Amount of bytes received.
* */
__STATIC_INLINE nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg);
__STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg);
/**
* @brief Function for setting the transmit buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param p_buf Pointer to the buffer with data to send.
* @param length Maximum number of data bytes to transmit.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buf Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_twis_tx_buffer_set(
NRF_TWIS_Type * const p_reg,
uint8_t const * p_buf,
nrf_twis_amount_t length);
__STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,
uint8_t const * p_buf,
size_t length);
/**
* @brief Function that prepares TWIS for transmitting
* @brief Function for preparing TWIS for transmitting.
*
* This function sets transmit buffer and then sets NRF_TWIS_TASK_PREPARETX task.
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param p_buf Pointer to the buffer with data to send.
* @param length Maximum number of data bytes to transmit.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buf Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_twis_tx_prepare(
NRF_TWIS_Type * const p_reg,
uint8_t const * p_buf,
nrf_twis_amount_t length);
__STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,
uint8_t const * p_buf,
size_t length);
/**
* @brief Function for getting number of bytes transmitted in the last transaction.
* @brief Function for getting the number of bytes transmitted in the last transaction.
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @return Amount of bytes transmitted.
*/
__STATIC_INLINE nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg);
__STATIC_INLINE size_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg);
/**
* @brief Function for setting slave address
* @brief Function for setting the slave address.
*
* Function sets the selected address for this TWI interface.
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param n Index of address to set
* @param addr Addres to set
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] n Index of address to be set.
* @param[in] addr Addres to be set.
*
* @sa nrf_twis_config_address_set
* @sa nrf_twis_config_address_get
*/
__STATIC_INLINE void nrf_twis_address_set(
NRF_TWIS_Type * const p_reg,
uint_fast8_t n,
nrf_twis_address_t addr);
__STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type * p_reg,
uint_fast8_t n,
nrf_twis_address_t addr);
/**
* @brief Function for retrieving configured slave address
* @brief Function for retrieving configured slave address.
*
* Function gets the selected address for this TWI interface.
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param n Index of address to get
*
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] n Index of address to get.
*
* @return Configured slave address.
*/
__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(
NRF_TWIS_Type const * const p_reg,
uint_fast8_t n);
__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg,
uint_fast8_t n);
/**
* @brief Function for setting the device address configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param addr_mask Mask of address indexes of what device should answer to.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] addr_mask Mask of address indexes of what device should answer to.
*
* @sa nrf_twis_address_set
*/
__STATIC_INLINE void nrf_twis_config_address_set(
NRF_TWIS_Type * const p_reg,
nrf_twis_config_addr_mask_t addr_mask);
__STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type * p_reg,
nrf_twis_config_addr_mask_t addr_mask);
/**
* @brief Function for retrieving the device address configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask of address indexes of what device should answer to.
*/
__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get(
NRF_TWIS_Type const * const p_reg);
NRF_TWIS_Type const * p_reg);
/**
* @brief Function for setting the over-read character.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] orc Over-read character. Character clocked out in case of
* over-read of the TXD buffer.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] orc Over-read character. Character clocked out in case of
* over-read of the TXD buffer.
*/
__STATIC_INLINE void nrf_twis_orc_set(
NRF_TWIS_Type * const p_reg,
uint8_t orc);
__STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg,
uint8_t orc);
/**
* @brief Function for setting the over-read character.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @return Over-read character configured for selected instance.
*/
__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg);
__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg);
/** @} */ /* End of nrf_twis_hal */
@ -495,30 +479,31 @@ __STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg);
/**
* @internal
* @brief Internal function for getting task/event register address
* @brief Internal function for getting task or event register address.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @oaram offset Offset of the register from the instance beginning
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] offset Offset of the register from the beginning of the instance.
*
* @attention offset has to be modulo 4 value. In other case we can get hardware fault.
* @return Pointer to the register
* @attention Offset must be modulo 4 value. In other case, hardware fault can occur.
* @return Pointer to the register.
*/
__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type * const p_reg, uint32_t offset)
__STATIC_INLINE volatile uint32_t* nrf_twis_getRegPtr(NRF_TWIS_Type const * p_reg, uint32_t offset)
{
return (volatile uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
}
/**
* @internal
* @brief Internal function for getting task/event register address - constant version
* @brief Internal function for getting task/event register address - constant version.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @oaram offset Offset of the register from the instance beginning
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] offset Offset of the register from the beginning of the instance.
*
* @attention offset has to be modulo 4 value. In other case we can get hardware fault.
* @return Pointer to the register
* @attention Offset must be modulo 4 value. In other case, hardware fault can occur.
* @return Pointer to the register.
*/
__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * const p_reg, uint32_t offset)
__STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type const * p_reg,
uint32_t offset)
{
return (volatile const uint32_t*)((uint8_t *)p_reg + (uint32_t)offset);
}
@ -529,21 +514,18 @@ __STATIC_INLINE volatile const uint32_t* nrf_twis_getRegPtr_c(NRF_TWIS_Type cons
*/
void nrf_twis_task_trigger(NRF_TWIS_Type * const p_reg, nrf_twis_task_t task)
__STATIC_INLINE void nrf_twis_task_trigger(NRF_TWIS_Type * p_reg, nrf_twis_task_t task)
{
*(nrf_twis_getRegPtr(p_reg, (uint32_t)task)) = 1UL;
}
uint32_t nrf_twis_task_address_get(
NRF_TWIS_Type const * const p_reg,
nrf_twis_task_t task)
__STATIC_INLINE uint32_t nrf_twis_task_address_get(NRF_TWIS_Type const * p_reg,
nrf_twis_task_t task)
{
return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)task);
}
void nrf_twis_event_clear(
NRF_TWIS_Type * const p_reg,
nrf_twis_event_t event)
__STATIC_INLINE void nrf_twis_event_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event)
{
*(nrf_twis_getRegPtr(p_reg, (uint32_t)event)) = 0UL;
#if __CORTEX_M == 0x04
@ -552,16 +534,12 @@ void nrf_twis_event_clear(
#endif
}
bool nrf_twis_event_check(
NRF_TWIS_Type const * const p_reg,
nrf_twis_event_t event)
__STATIC_INLINE bool nrf_twis_event_check(NRF_TWIS_Type const * p_reg, nrf_twis_event_t event)
{
return (bool)*nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
}
bool nrf_twis_event_get_and_clear(
NRF_TWIS_Type * const p_reg,
nrf_twis_event_t event)
__STATIC_INLINE bool nrf_twis_event_get_and_clear(NRF_TWIS_Type * p_reg, nrf_twis_event_t event)
{
bool ret = nrf_twis_event_check(p_reg, event);
if (ret)
@ -571,55 +549,54 @@ bool nrf_twis_event_get_and_clear(
return ret;
}
uint32_t nrf_twis_event_address_get(
NRF_TWIS_Type const * const p_reg,
nrf_twis_event_t event)
__STATIC_INLINE uint32_t nrf_twis_event_address_get(NRF_TWIS_Type const * p_reg,
nrf_twis_event_t event)
{
return (uint32_t)nrf_twis_getRegPtr_c(p_reg, (uint32_t)event);
}
void nrf_twis_shorts_enable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
__STATIC_INLINE void nrf_twis_shorts_enable(NRF_TWIS_Type * p_reg, uint32_t mask)
{
p_reg->SHORTS |= short_mask;
p_reg->SHORTS |= mask;
}
void nrf_twis_shorts_disable(NRF_TWIS_Type * const p_reg, uint32_t short_mask)
__STATIC_INLINE void nrf_twis_shorts_disable(NRF_TWIS_Type * p_reg, uint32_t mask)
{
if (~0U == short_mask)
if (~0U == mask)
{
/* Optimized version for "disable all" */
p_reg->SHORTS = 0;
}
else
{
p_reg->SHORTS &= ~short_mask;
p_reg->SHORTS &= ~mask;
}
}
uint32_t nrf_twis_shorts_get(NRF_TWIS_Type * const p_reg)
__STATIC_INLINE uint32_t nrf_twis_shorts_get(NRF_TWIS_Type const * p_reg)
{
return p_reg->SHORTS;
}
void nrf_twis_int_enable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
__STATIC_INLINE void nrf_twis_int_enable(NRF_TWIS_Type * p_reg, uint32_t mask)
{
p_reg->INTENSET = int_mask;
p_reg->INTENSET = mask;
}
bool nrf_twis_int_enable_check(NRF_TWIS_Type const * const p_reg, uint32_t int_mask)
__STATIC_INLINE bool nrf_twis_int_enable_check(NRF_TWIS_Type const * p_reg, uint32_t mask)
{
return (bool)(p_reg->INTENSET & int_mask);
return (bool)(p_reg->INTENSET & mask);
}
void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t int_mask)
__STATIC_INLINE void nrf_twis_int_disable(NRF_TWIS_Type * const p_reg, uint32_t mask)
{
p_reg->INTENCLR = int_mask;
p_reg->INTENCLR = mask;
}
#if defined(DPPI_PRESENT)
__STATIC_INLINE void nrf_twis_subscribe_set(NRF_TWIS_Type * p_reg,
nrf_twis_task_t task,
uint8_t channel)
uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) task + 0x80uL)) =
((uint32_t)channel | TWIS_SUBSCRIBE_STOP_EN_Msk);
@ -633,7 +610,7 @@ __STATIC_INLINE void nrf_twis_subscribe_clear(NRF_TWIS_Type * p_reg,
__STATIC_INLINE void nrf_twis_publish_set(NRF_TWIS_Type * p_reg,
nrf_twis_event_t event,
uint8_t channel)
uint8_t channel)
{
*((volatile uint32_t *) ((uint8_t *) p_reg + (uint32_t) event + 0x80uL)) =
((uint32_t)channel | TWIS_PUBLISH_STOPPED_EN_Msk);
@ -646,115 +623,105 @@ __STATIC_INLINE void nrf_twis_publish_clear(NRF_TWIS_Type * p_reg,
}
#endif // defined(DPPI_PRESENT)
uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * const p_reg)
__STATIC_INLINE uint32_t nrf_twis_error_source_get_and_clear(NRF_TWIS_Type * p_reg)
{
uint32_t ret = p_reg->ERRORSRC;
p_reg->ERRORSRC = ret;
return ret;
}
uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
__STATIC_INLINE uint_fast8_t nrf_twis_match_get(NRF_TWIS_Type const * p_reg)
{
return (uint_fast8_t)p_reg->MATCH;
}
void nrf_twis_enable(NRF_TWIS_Type * const p_reg)
__STATIC_INLINE void nrf_twis_enable(NRF_TWIS_Type * p_reg)
{
p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Enabled << TWIS_ENABLE_ENABLE_Pos);
}
void nrf_twis_disable(NRF_TWIS_Type * const p_reg)
__STATIC_INLINE void nrf_twis_disable(NRF_TWIS_Type * p_reg)
{
p_reg->ENABLE = (TWIS_ENABLE_ENABLE_Disabled << TWIS_ENABLE_ENABLE_Pos);
}
void nrf_twis_pins_set(NRF_TWIS_Type * const p_reg, uint32_t scl, uint32_t sda)
__STATIC_INLINE void nrf_twis_pins_set(NRF_TWIS_Type * p_reg, uint32_t scl, uint32_t sda)
{
p_reg->PSEL.SCL = scl;
p_reg->PSEL.SDA = sda;
}
void nrf_twis_rx_buffer_set(
NRF_TWIS_Type * const p_reg,
uint8_t * p_buf,
nrf_twis_amount_t length)
__STATIC_INLINE void nrf_twis_rx_buffer_set(NRF_TWIS_Type * p_reg,
uint8_t * p_buf,
size_t length)
{
p_reg->RXD.PTR = (uint32_t)p_buf;
p_reg->RXD.MAXCNT = length;
}
__STATIC_INLINE void nrf_twis_rx_prepare(
NRF_TWIS_Type * const p_reg,
uint8_t * p_buf,
nrf_twis_amount_t length)
__STATIC_INLINE void nrf_twis_rx_prepare(NRF_TWIS_Type * p_reg,
uint8_t * p_buf,
size_t length)
{
nrf_twis_rx_buffer_set(p_reg, p_buf, length);
nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARERX);
}
nrf_twis_amount_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * const p_reg)
__STATIC_INLINE size_t nrf_twis_rx_amount_get(NRF_TWIS_Type const * p_reg)
{
return (nrf_twis_amount_t)p_reg->RXD.AMOUNT;
return p_reg->RXD.AMOUNT;
}
void nrf_twis_tx_buffer_set(
NRF_TWIS_Type * const p_reg,
uint8_t const * p_buf,
nrf_twis_amount_t length)
__STATIC_INLINE void nrf_twis_tx_buffer_set(NRF_TWIS_Type * p_reg,
uint8_t const * p_buf,
size_t length)
{
p_reg->TXD.PTR = (uint32_t)p_buf;
p_reg->TXD.MAXCNT = length;
}
__STATIC_INLINE void nrf_twis_tx_prepare(
NRF_TWIS_Type * const p_reg,
uint8_t const * p_buf,
nrf_twis_amount_t length)
__STATIC_INLINE void nrf_twis_tx_prepare(NRF_TWIS_Type * p_reg,
uint8_t const * p_buf,
size_t length)
{
nrf_twis_tx_buffer_set(p_reg, p_buf, length);
nrf_twis_task_trigger(p_reg, NRF_TWIS_TASK_PREPARETX);
}
nrf_twis_amount_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * const p_reg)
__STATIC_INLINE size_t nrf_twis_tx_amount_get(NRF_TWIS_Type const * p_reg)
{
return (nrf_twis_amount_t)p_reg->TXD.AMOUNT;
return p_reg->TXD.AMOUNT;
}
void nrf_twis_address_set(
NRF_TWIS_Type * const p_reg,
uint_fast8_t n,
nrf_twis_address_t addr)
__STATIC_INLINE void nrf_twis_address_set(NRF_TWIS_Type * p_reg,
uint_fast8_t n,
nrf_twis_address_t addr)
{
p_reg->ADDRESS[n] = addr;
}
nrf_twis_address_t nrf_twis_address_get(
NRF_TWIS_Type const * const p_reg,
uint_fast8_t n)
__STATIC_INLINE nrf_twis_address_t nrf_twis_address_get(NRF_TWIS_Type const * p_reg, uint_fast8_t n)
{
return (nrf_twis_address_t)p_reg->ADDRESS[n];
}
void nrf_twis_config_address_set(
NRF_TWIS_Type * const p_reg,
nrf_twis_config_addr_mask_t addr_mask)
__STATIC_INLINE void nrf_twis_config_address_set(NRF_TWIS_Type * p_reg,
nrf_twis_config_addr_mask_t addr_mask)
{
/* This is the only configuration in TWIS - just write it without masking */
p_reg->CONFIG = addr_mask;
}
nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * const p_reg)
__STATIC_INLINE nrf_twis_config_addr_mask_t nrf_twis_config_address_get(NRF_TWIS_Type const * p_reg)
{
return (nrf_twis_config_addr_mask_t)(p_reg->CONFIG & TWIS_ADDRESS_ADDRESS_Msk);
}
void nrf_twis_orc_set(
NRF_TWIS_Type * const p_reg,
uint8_t orc)
__STATIC_INLINE void nrf_twis_orc_set(NRF_TWIS_Type * p_reg, uint8_t orc)
{
p_reg->ORC = orc;
}
uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * const p_reg)
__STATIC_INLINE uint8_t nrf_twis_orc_get(NRF_TWIS_Type const * p_reg)
{
return (uint8_t)p_reg->ORC;
}

191
ext/hal/nordic/nrfx/hal/nrf_uart.h
View file

@ -45,59 +45,42 @@ extern "C" {
* @brief Hardware access layer for managing the UART peripheral.
*/
/** @brief Pin disconnected value. */
#define NRF_UART_PSEL_DISCONNECTED 0xFFFFFFFF
/**
* @enum nrf_uart_task_t
* @brief UART tasks.
*/
/** @brief UART tasks. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_UART_TASK_STARTRX = offsetof(NRF_UART_Type, TASKS_STARTRX), /**< Task for starting reception. */
NRF_UART_TASK_STOPRX = offsetof(NRF_UART_Type, TASKS_STOPRX), /**< Task for stopping reception. */
NRF_UART_TASK_STARTTX = offsetof(NRF_UART_Type, TASKS_STARTTX), /**< Task for starting transmission. */
NRF_UART_TASK_STOPTX = offsetof(NRF_UART_Type, TASKS_STOPTX), /**< Task for stopping transmission. */
NRF_UART_TASK_SUSPEND = offsetof(NRF_UART_Type, TASKS_SUSPEND), /**< Task for suspending UART. */
/*lint -restore*/
} nrf_uart_task_t;
/**
* @enum nrf_uart_event_t
* @brief UART events.
*/
/** @brief UART events. */
typedef enum
{
/*lint -save -e30*/
NRF_UART_EVENT_CTS = offsetof(NRF_UART_Type, EVENTS_CTS), /**< Event from CTS line activation. */
NRF_UART_EVENT_NCTS = offsetof(NRF_UART_Type, EVENTS_NCTS), /**< Event from CTS line deactivation. */
NRF_UART_EVENT_RXDRDY = offsetof(NRF_UART_Type, EVENTS_RXDRDY),/**< Event from data ready in RXD. */
NRF_UART_EVENT_TXDRDY = offsetof(NRF_UART_Type, EVENTS_TXDRDY),/**< Event from data sent from TXD. */
NRF_UART_EVENT_ERROR = offsetof(NRF_UART_Type, EVENTS_ERROR), /**< Event from error detection. */
NRF_UART_EVENT_RXTO = offsetof(NRF_UART_Type, EVENTS_RXTO) /**< Event from receiver timeout. */
/*lint -restore*/
} nrf_uart_event_t;
/**
* @enum nrf_uart_int_mask_t
* @brief UART interrupts.
*/
/** @brief UART interrupts. */
typedef enum
{
/*lint -save -e30*/
NRF_UART_INT_MASK_CTS = UART_INTENCLR_CTS_Msk, /**< CTS line activation interrupt. */
NRF_UART_INT_MASK_NCTS = UART_INTENCLR_NCTS_Msk, /**< CTS line deactivation interrupt. */
NRF_UART_INT_MASK_RXDRDY = UART_INTENCLR_RXDRDY_Msk, /**< Data ready in RXD interrupt. */
NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */
NRF_UART_INT_MASK_TXDRDY = UART_INTENCLR_TXDRDY_Msk, /**< Data sent from TXD interrupt. */
NRF_UART_INT_MASK_ERROR = UART_INTENCLR_ERROR_Msk, /**< Error detection interrupt. */
NRF_UART_INT_MASK_RXTO = UART_INTENCLR_RXTO_Msk /**< Receiver timeout interrupt. */
/*lint -restore*/
} nrf_uart_int_mask_t;
/**
* @enum nrf_uart_baudrate_t
* @brief Baudrates supported by UART.
*/
/** @brief Baudrates supported by UART. */
typedef enum
{
NRF_UART_BAUDRATE_1200 = UART_BAUDRATE_BAUDRATE_Baud1200, /**< 1200 baud. */
@ -120,10 +103,7 @@ typedef enum
NRF_UART_BAUDRATE_1000000 = UART_BAUDRATE_BAUDRATE_Baud1M, /**< 1000000 baud. */
} nrf_uart_baudrate_t;
/**
* @enum nrf_uart_error_mask_t
* @brief Types of UART error masks.
*/
/** @brief Types of UART error masks. */
typedef enum
{
NRF_UART_ERROR_OVERRUN_MASK = UART_ERRORSRC_OVERRUN_Msk, /**< Overrun error. */
@ -132,155 +112,158 @@ typedef enum
NRF_UART_ERROR_BREAK_MASK = UART_ERRORSRC_BREAK_Msk, /**< Break error. */
} nrf_uart_error_mask_t;
/**
* @enum nrf_uart_parity_t
* @brief Types of UART parity modes.
*/
/** @brief Types of UART parity modes. */
typedef enum
{
NRF_UART_PARITY_EXCLUDED = UART_CONFIG_PARITY_Excluded << UART_CONFIG_PARITY_Pos, /**< Parity excluded. */
NRF_UART_PARITY_INCLUDED = UART_CONFIG_PARITY_Included << UART_CONFIG_PARITY_Pos, /**< Parity included. */
} nrf_uart_parity_t;
/**
* @enum nrf_uart_hwfc_t
* @brief Types of UART flow control modes.
*/
/** @brief Types of UART flow control modes. */
typedef enum
{
NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< HW flow control disabled. */
NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< HW flow control enabled. */
NRF_UART_HWFC_DISABLED = UART_CONFIG_HWFC_Disabled, /**< Hardware flow control disabled. */
NRF_UART_HWFC_ENABLED = UART_CONFIG_HWFC_Enabled, /**< Hardware flow control enabled. */
} nrf_uart_hwfc_t;
/**
* @brief Function for clearing a specific UART event.
* @brief Function for clearing the specified UART event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event);
/**
* @brief Function for checking the state of a specific UART event.
* @brief Function for retrieving the state of the UART event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval True if event is set, False otherwise.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event);
/**
* @brief Function for returning the address of a specific UART event register.
* @brief Function for returning the address of the specified UART event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Desired event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Desired event.
*
* @retval Address of specified event register.
* @return Address of the specified event register.
*/
__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg,
nrf_uart_event_t event);
nrf_uart_event_t event);
/**
* @brief Function for enabling a specific interrupt.
* @brief Function for enabling the specified interrupt.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts to enable.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask);
__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Mask of interrupt to check.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Mask of interrupts to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask);
__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling specific interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts to disable.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask);
__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t mask);
/**
* @brief Function for getting error source mask. Function is clearing error source flags after reading.
*
* @param p_reg Pointer to the peripheral registers structure.
* @return Mask with error source flags.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask with error source flags.
*/
__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg);
/**
* @brief Function for enabling UART.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_enable(NRF_UART_Type * p_reg);
/**
* @brief Function for disabling UART.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_disable(NRF_UART_Type * p_reg);
/**
* @brief Function for configuring TX/RX pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param pseltxd TXD pin number.
* @param pselrxd RXD pin number.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param pseltxd TXD pin number.
* @param pselrxd RXD pin number.
*/
__STATIC_INLINE void nrf_uart_txrx_pins_set(NRF_UART_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
/**
* @brief Function for disconnecting TX/RX pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_txrx_pins_disconnect(NRF_UART_Type * p_reg);
/**
* @brief Function for getting TX pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return TX pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_tx_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for getting RX pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return RX pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_rx_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for getting RTS pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return RTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_rts_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for getting CTS pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return CTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uart_cts_pin_get(NRF_UART_Type * p_reg);
/**
* @brief Function for configuring flow control pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param pselrts RTS pin number.
* @param pselcts CTS pin number.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param pselrts RTS pin number.
* @param pselcts CTS pin number.
*/
__STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg,
uint32_t pselrts,
@ -289,64 +272,67 @@ __STATIC_INLINE void nrf_uart_hwfc_pins_set(NRF_UART_Type * p_reg,
/**
* @brief Function for disconnecting flow control pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uart_hwfc_pins_disconnect(NRF_UART_Type * p_reg);
/**
* @brief Function for reading RX data.
*
* @param p_reg Pointer to the peripheral registers structure.
* @return Received byte.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Received byte.
*/
__STATIC_INLINE uint8_t nrf_uart_rxd_get(NRF_UART_Type * p_reg);
/**
* @brief Function for setting Tx data.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param txd Byte.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param txd Byte.
*/
__STATIC_INLINE void nrf_uart_txd_set(NRF_UART_Type * p_reg, uint8_t txd);
/**
* @brief Function for starting an UART task.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param task Task.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task.
*/
__STATIC_INLINE void nrf_uart_task_trigger(NRF_UART_Type * p_reg, nrf_uart_task_t task);
/**
* @brief Function for returning the address of a specific task register.
* @brief Function for returning the address of the specified task register.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_uart_task_address_get(NRF_UART_Type * p_reg, nrf_uart_task_t task);
/**
* @brief Function for configuring UART.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param hwfc Hardware flow control. Enabled if true.
* @param parity Parity. Included if true.
*/
__STATIC_INLINE void nrf_uart_configure(NRF_UART_Type * p_reg,
nrf_uart_parity_t parity,
nrf_uart_hwfc_t hwfc);
nrf_uart_parity_t parity,
nrf_uart_hwfc_t hwfc);
/**
* @brief Function for setting UART baudrate.
* @brief Function for setting UART baud rate.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param baudrate Baudrate.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param baudrate Baud rate.
*/
__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate);
__STATIC_INLINE void nrf_uart_baudrate_set(NRF_UART_Type * p_reg, nrf_uart_baudrate_t baudrate);
#ifndef SUPPRESS_INLINE_IMPLEMENTATION
__STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_t event)
{
*((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event)) = 0x0UL;
@ -354,7 +340,6 @@ __STATIC_INLINE void nrf_uart_event_clear(NRF_UART_Type * p_reg, nrf_uart_event_
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_t event)
@ -363,24 +348,24 @@ __STATIC_INLINE bool nrf_uart_event_check(NRF_UART_Type * p_reg, nrf_uart_event_
}
__STATIC_INLINE uint32_t nrf_uart_event_address_get(NRF_UART_Type * p_reg,
nrf_uart_event_t event)
nrf_uart_event_t event)
{
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t int_mask)
__STATIC_INLINE void nrf_uart_int_enable(NRF_UART_Type * p_reg, uint32_t mask)
{
p_reg->INTENSET = int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t int_mask)
__STATIC_INLINE bool nrf_uart_int_enable_check(NRF_UART_Type * p_reg, uint32_t mask)
{
return (bool)(p_reg->INTENSET & int_mask);
return (bool)(p_reg->INTENSET & mask);
}
__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t int_mask)
__STATIC_INLINE void nrf_uart_int_disable(NRF_UART_Type * p_reg, uint32_t mask)
{
p_reg->INTENCLR = int_mask;
p_reg->INTENCLR = mask;
}
__STATIC_INLINE uint32_t nrf_uart_errorsrc_get_and_clear(NRF_UART_Type * p_reg)

234
ext/hal/nordic/nrfx/hal/nrf_uarte.h
View file

@ -47,28 +47,19 @@ extern "C" {
* @brief Hardware access layer for managing the UARTE peripheral.
*/
/**
* @enum nrf_uarte_task_t
* @brief UARTE tasks.
*/
/** @brief UARTE tasks. */
typedef enum
{
/*lint -save -e30*/
NRF_UARTE_TASK_STARTRX = offsetof(NRF_UARTE_Type, TASKS_STARTRX), ///< Start UART receiver.
NRF_UARTE_TASK_STOPRX = offsetof(NRF_UARTE_Type, TASKS_STOPRX), ///< Stop UART receiver.
NRF_UARTE_TASK_STARTTX = offsetof(NRF_UARTE_Type, TASKS_STARTTX), ///< Start UART transmitter.
NRF_UARTE_TASK_STOPTX = offsetof(NRF_UARTE_Type, TASKS_STOPTX), ///< Stop UART transmitter.
NRF_UARTE_TASK_FLUSHRX = offsetof(NRF_UARTE_Type, TASKS_FLUSHRX) ///< Flush RX FIFO in RX buffer.
/*lint -restore*/
} nrf_uarte_task_t;
/**
* @enum nrf_uarte_event_t
* @brief UARTE events.
*/
/** @brief UARTE events. */
typedef enum
{
/*lint -save -e30*/
NRF_UARTE_EVENT_CTS = offsetof(NRF_UARTE_Type, EVENTS_CTS), ///< CTS is activated.
NRF_UARTE_EVENT_NCTS = offsetof(NRF_UARTE_Type, EVENTS_NCTS), ///< CTS is deactivated.
NRF_UARTE_EVENT_RXDRDY = offsetof(NRF_UARTE_Type, EVENTS_RXDRDY), ///< Data received in RXD (but potentially not yet transferred to Data RAM).
@ -80,12 +71,9 @@ typedef enum
NRF_UARTE_EVENT_RXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_RXSTARTED), ///< Receiver has started.
NRF_UARTE_EVENT_TXSTARTED = offsetof(NRF_UARTE_Type, EVENTS_TXSTARTED), ///< Transmitter has started.
NRF_UARTE_EVENT_TXSTOPPED = offsetof(NRF_UARTE_Type, EVENTS_TXSTOPPED) ///< Transmitted stopped.
/*lint -restore*/
} nrf_uarte_event_t;
/**
* @brief Types of UARTE shortcuts.
*/
/** @brief Types of UARTE shortcuts. */
typedef enum
{
NRF_UARTE_SHORT_ENDRX_STARTRX = UARTE_SHORTS_ENDRX_STARTRX_Msk, ///< Shortcut between ENDRX event and STARTRX task.
@ -93,10 +81,7 @@ typedef enum
} nrf_uarte_short_t;
/**
* @enum nrf_uarte_int_mask_t
* @brief UARTE interrupts.
*/
/** @brief UARTE interrupts. */
typedef enum
{
NRF_UARTE_INT_CTS_MASK = UARTE_INTENSET_CTS_Msk, ///< Interrupt on CTS event.
@ -112,10 +97,7 @@ typedef enum
NRF_UARTE_INT_TXSTOPPED_MASK = UARTE_INTENSET_TXSTOPPED_Msk ///< Interrupt on TXSTOPPED event.
} nrf_uarte_int_mask_t;
/**
* @enum nrf_uarte_baudrate_t
* @brief Baudrates supported by UARTE.
*/
/** @brief Baudrates supported by UARTE. */
typedef enum
{
NRF_UARTE_BAUDRATE_1200 = UARTE_BAUDRATE_BAUDRATE_Baud1200, ///< 1200 baud.
@ -138,10 +120,7 @@ typedef enum
NRF_UARTE_BAUDRATE_1000000 = UARTE_BAUDRATE_BAUDRATE_Baud1M ///< 1000000 baud.
} nrf_uarte_baudrate_t;
/**
* @enum nrf_uarte_error_mask_t
* @brief Types of UARTE error masks.
*/
/** @brief Types of UARTE error masks. */
typedef enum
{
NRF_UARTE_ERROR_OVERRUN_MASK = UARTE_ERRORSRC_OVERRUN_Msk, ///< Overrun error.
@ -150,98 +129,93 @@ typedef enum
NRF_UARTE_ERROR_BREAK_MASK = UARTE_ERRORSRC_BREAK_Msk ///< Break error.
} nrf_uarte_error_mask_t;
/**
* @enum nrf_uarte_parity_t
* @brief Types of UARTE parity modes.
*/
/** @brief Types of UARTE parity modes. */
typedef enum
{
NRF_UARTE_PARITY_EXCLUDED = UARTE_CONFIG_PARITY_Excluded << UARTE_CONFIG_PARITY_Pos, ///< Parity excluded.
NRF_UARTE_PARITY_INCLUDED = UARTE_CONFIG_PARITY_Included << UARTE_CONFIG_PARITY_Pos ///< Parity included.
} nrf_uarte_parity_t;
/**
* @enum nrf_uarte_hwfc_t
* @brief Types of UARTE flow control modes.
*/
/** @brief Types of UARTE flow control modes. */
typedef enum
{
NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< HW flow control disabled.
NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos ///< HW flow control enabled.
NRF_UARTE_HWFC_DISABLED = UARTE_CONFIG_HWFC_Disabled << UARTE_CONFIG_HWFC_Pos, ///< Hardware flow control disabled.
NRF_UARTE_HWFC_ENABLED = UARTE_CONFIG_HWFC_Enabled << UARTE_CONFIG_HWFC_Pos ///< Hardware flow control enabled.
} nrf_uarte_hwfc_t;
/**
* @brief Function for clearing a specific UARTE event.
* @brief Function for clearing the specified UARTE event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to clear.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to clear.
*/
__STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
/**
* @brief Function for checking the state of a specific UARTE event.
* @brief Function for retrieving the state of the UARTE event.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Event to check.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event Event to be checked.
*
* @retval True if event is set, False otherwise.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event);
/**
* @brief Function for returning the address of a specific UARTE event register.
* @brief Function for returning the address of the specified UARTE event register.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] event Desired event.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] event The specified event.
*
* @retval Address of specified event register.
* @return Address of specified event register.
*/
__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
nrf_uarte_event_t event);
__STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
nrf_uarte_event_t event);
/**
* @brief Function for enabling UARTE shortcuts.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param shorts_mask Shortcuts to enable.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Shortcuts to be enabled.
*/
__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask);
/**
* @brief Function for disabling UARTE shortcuts.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param shorts_mask Shortcuts to disable.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Shortcuts to be disabled.
*/
__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask);
__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t mask);
/**
* @brief Function for enabling UARTE interrupts.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Interrupts to enable.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Mask of interrupts to be enabled.
*/
__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t mask);
/**
* @brief Function for retrieving the state of a given interrupt.
* @brief Function for retrieving the state of the specified interrupt.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param int_mask Mask of interrupt to check.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Mask of interrupts to be checked.
*
* @retval true If the interrupt is enabled.
* @retval false If the interrupt is not enabled.
* @retval true The interrupt is enabled.
* @retval false The interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask);
__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t mask);
/**
* @brief Function for disabling specific interrupts.
* @brief Function for disabling the specified interrupts.
*
* @param p_reg Instance.
* @param int_mask Interrupts to disable.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param mask Mask of interrupts to be disabled.
*/
__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask);
__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t mask);
#if defined(DPPI_PRESENT) || defined(__NRFX_DOXYGEN__)
/**
@ -292,132 +266,141 @@ __STATIC_INLINE void nrf_uarte_publish_clear(NRF_UARTE_Type * p_reg,
/**
* @brief Function for getting error source mask. Function is clearing error source flags after reading.
*
* @param p_reg Pointer to the peripheral registers structure.
* @return Mask with error source flags.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return Mask with error source flags.
*/
__STATIC_INLINE uint32_t nrf_uarte_errorsrc_get_and_clear(NRF_UARTE_Type * p_reg);
/**
* @brief Function for enabling UARTE.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_enable(NRF_UARTE_Type * p_reg);
/**
* @brief Function for disabling UARTE.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_disable(NRF_UARTE_Type * p_reg);
/**
* @brief Function for configuring TX/RX pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param pseltxd TXD pin number.
* @param pselrxd RXD pin number.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param pseltxd TXD pin number.
* @param pselrxd RXD pin number.
*/
__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg, uint32_t pseltxd, uint32_t pselrxd);
__STATIC_INLINE void nrf_uarte_txrx_pins_set(NRF_UARTE_Type * p_reg,
uint32_t pseltxd,
uint32_t pselrxd);
/**
* @brief Function for disconnecting TX/RX pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_txrx_pins_disconnect(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting TX pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return TX pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_tx_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting RX pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return RX pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_rx_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting RTS pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return RTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_rts_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for getting CTS pin.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*
* @return CTS pin number.
*/
__STATIC_INLINE uint32_t nrf_uarte_cts_pin_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for configuring flow control pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param pselrts RTS pin number.
* @param pselcts CTS pin number.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param pselrts RTS pin number.
* @param pselcts CTS pin number.
*/
__STATIC_INLINE void nrf_uarte_hwfc_pins_set(NRF_UARTE_Type * p_reg,
uint32_t pselrts,
uint32_t pselcts);
uint32_t pselrts,
uint32_t pselcts);
/**
* @brief Function for disconnecting flow control pins.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
*/
__STATIC_INLINE void nrf_uarte_hwfc_pins_disconnect(NRF_UARTE_Type * p_reg);
/**
* @brief Function for starting an UARTE task.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param task Task.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task.
*/
__STATIC_INLINE void nrf_uarte_task_trigger(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
/**
* @brief Function for returning the address of a specific task register.
* @brief Function for returning the address of the specified task register.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param task Task.
*
* @return Task address.
* @return Task address.
*/
__STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_uarte_task_t task);
/**
* @brief Function for configuring UARTE.
*
* @param p_reg Pointer to the peripheral registers structure.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param hwfc Hardware flow control. Enabled if true.
* @param parity Parity. Included if true.
*/
__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
nrf_uarte_parity_t parity,
nrf_uarte_hwfc_t hwfc);
nrf_uarte_parity_t parity,
nrf_uarte_hwfc_t hwfc);
/**
* @brief Function for setting UARTE baudrate.
* @brief Function for setting UARTE baud rate.
*
* @param p_reg Instance.
* @param baudrate Baudrate.
* @param p_reg Pointer to the structure of registers of the peripheral.
* @param baudrate Baud rate.
*/
__STATIC_INLINE void nrf_uarte_baudrate_set(NRF_UARTE_Type * p_reg, nrf_uarte_baudrate_t baudrate);
/**
* @brief Function for setting the transmit buffer.
*
* @param[in] p_reg Instance.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer with data to send.
* @param[in] length Maximum number of data bytes to transmit.
*/
__STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t const * p_buffer,
@ -426,7 +409,7 @@ __STATIC_INLINE void nrf_uarte_tx_buffer_set(NRF_UARTE_Type * p_reg,
/**
* @brief Function for getting number of bytes transmitted in the last transaction.
*
* @param[in] p_reg Instance.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Amount of bytes transmitted.
*/
@ -435,18 +418,18 @@ __STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg);
/**
* @brief Function for setting the receive buffer.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] p_buffer Pointer to the buffer for received data.
* @param[in] length Maximum number of data bytes to receive.
*/
__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t * p_buffer,
size_t length);
uint8_t * p_buffer,
size_t length);
/**
* @brief Function for getting number of bytes received in the last transaction.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
*
* @retval Amount of bytes received.
*/
@ -460,7 +443,6 @@ __STATIC_INLINE void nrf_uarte_event_clear(NRF_UARTE_Type * p_reg, nrf_uarte_eve
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)p_reg + (uint32_t)event));
(void)dummy;
#endif
}
__STATIC_INLINE bool nrf_uarte_event_check(NRF_UARTE_Type * p_reg, nrf_uarte_event_t event)
@ -474,29 +456,29 @@ __STATIC_INLINE uint32_t nrf_uarte_event_address_get(NRF_UARTE_Type * p_reg,
return (uint32_t)((uint8_t *)p_reg + (uint32_t)event);
}
__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
__STATIC_INLINE void nrf_uarte_shorts_enable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
p_reg->SHORTS |= shorts_mask;
p_reg->SHORTS |= mask;
}
__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t shorts_mask)
__STATIC_INLINE void nrf_uarte_shorts_disable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
p_reg->SHORTS &= ~(shorts_mask);
p_reg->SHORTS &= ~(mask);
}
__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
__STATIC_INLINE void nrf_uarte_int_enable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
p_reg->INTENSET = int_mask;
p_reg->INTENSET = mask;
}
__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t int_mask)
__STATIC_INLINE bool nrf_uarte_int_enable_check(NRF_UARTE_Type * p_reg, nrf_uarte_int_mask_t mask)
{
return (bool)(p_reg->INTENSET & int_mask);
return (bool)(p_reg->INTENSET & mask);
}
__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t int_mask)
__STATIC_INLINE void nrf_uarte_int_disable(NRF_UARTE_Type * p_reg, uint32_t mask)
{
p_reg->INTENCLR = int_mask;
p_reg->INTENCLR = mask;
}
#if defined(DPPI_PRESENT)
@ -599,8 +581,8 @@ __STATIC_INLINE uint32_t nrf_uarte_task_address_get(NRF_UARTE_Type * p_reg, nrf_
}
__STATIC_INLINE void nrf_uarte_configure(NRF_UARTE_Type * p_reg,
nrf_uarte_parity_t parity,
nrf_uarte_hwfc_t hwfc)
nrf_uarte_parity_t parity,
nrf_uarte_hwfc_t hwfc)
{
p_reg->CONFIG = (uint32_t)parity | (uint32_t)hwfc;
}
@ -624,8 +606,8 @@ __STATIC_INLINE uint32_t nrf_uarte_tx_amount_get(NRF_UARTE_Type * p_reg)
}
__STATIC_INLINE void nrf_uarte_rx_buffer_set(NRF_UARTE_Type * p_reg,
uint8_t * p_buffer,
size_t length)
uint8_t * p_buffer,
size_t length)
{
p_reg->RXD.PTR = (uint32_t)p_buffer;
p_reg->RXD.MAXCNT = length;

632
ext/hal/nordic/nrfx/hal/nrf_usbd.h
View file

File diff suppressed because it is too large Load diff

16
ext/hal/nordic/nrfx/hal/nrf_vmc.h
View file

@ -68,7 +68,7 @@ typedef enum
*
* @note Overrides current configuration.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] power_mask Bitmask with sections configuration of particular RAM block.
* @ref nrf_vmc_power_t should be use to prepare this bitmask.
@ -83,7 +83,7 @@ __STATIC_INLINE void nrf_vmc_ram_block_config(NRF_VMC_Type * p_reg,
/**
* @brief Function for clearing power configuration for the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
*/
__STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_block_num);
@ -91,7 +91,7 @@ __STATIC_INLINE void nrf_vmc_ram_block_clear(NRF_VMC_Type * p_reg, uint8_t ram_b
/**
* @brief Function for setting power configuration for the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_power Paricular section of the RAM block.
*/
@ -102,7 +102,7 @@ __STATIC_INLINE void nrf_vmc_ram_block_power_set(NRF_VMC_Type * p_reg,
/**
* @brief Function for clearing power configuration for the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_power Paricular section of the RAM block.
*/
@ -113,7 +113,7 @@ __STATIC_INLINE void nrf_vmc_ram_block_power_clear(NRF_VMC_Type * p_reg,
/**
* @brief Function for getting power configuration of the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
*
* @return Bitmask with power configuration of sections of particular RAM block.
@ -124,7 +124,7 @@ __STATIC_INLINE uint32_t nrf_vmc_ram_block_power_mask_get(NRF_VMC_Type const * p
/**
* @brief Function for setting retention configuration for the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_retention Paricular section of the RAM block.
*/
@ -135,7 +135,7 @@ __STATIC_INLINE void nrf_vmc_ram_block_retention_set(NRF_VMC_Type * p_reg,
/**
* @brief Function for clearing retention configuration for the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
* @param[in] sect_retention Paricular section of the RAM block.
*/
@ -146,7 +146,7 @@ __STATIC_INLINE void nrf_vmc_ram_block_retention_clear(NRF_VMC_Type * p_reg
/**
* @brief Function for getting retention configuration of the particular RAM block.
*
* @param[in] p_reg Pointer to the peripheral registers structure.
* @param[in] p_reg Pointer to the structure of registers of the peripheral.
* @param[in] ram_block_num RAM block number.
*
* @return Bitmask with retention configuration of sections of particular RAM block

101
ext/hal/nordic/nrfx/hal/nrf_wdt.h
View file

@ -45,38 +45,26 @@ extern "C" {
* @brief Hardware access layer for managing the Watchdog Timer (WDT) peripheral.
*/
/** @brief Number of WDT channels. */
#define NRF_WDT_CHANNEL_NUMBER 0x8UL
#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value, shouldn't be modified.*/
#define NRF_WDT_TASK_SET 1UL
#define NRF_WDT_EVENT_CLEAR 0UL
/** @brief WDT register reload value. */
#define NRF_WDT_RR_VALUE 0x6E524635UL /* Fixed value; should not be modified. */
/**
* @enum nrf_wdt_task_t
* @brief WDT tasks.
*/
/** @brief WDT tasks. */
typedef enum
{
/*lint -save -e30 -esym(628,__INTADDR__)*/
NRF_WDT_TASK_START = offsetof(NRF_WDT_Type, TASKS_START), /**< Task for starting WDT. */
/*lint -restore*/
} nrf_wdt_task_t;
/**
* @enum nrf_wdt_event_t
* @brief WDT events.
*/
/** @brief WDT events. */
typedef enum
{
/*lint -save -e30*/
NRF_WDT_EVENT_TIMEOUT = offsetof(NRF_WDT_Type, EVENTS_TIMEOUT), /**< Event from WDT time-out. */
/*lint -restore*/
} nrf_wdt_event_t;
/**
* @enum nrf_wdt_behaviour_t
* @brief WDT behavior in CPU SLEEP or HALT mode.
*/
/** @brief WDT behavior in the SLEEP or HALT CPU modes. */
typedef enum
{
NRF_WDT_BEHAVIOUR_RUN_SLEEP = WDT_CONFIG_SLEEP_Msk, /**< WDT will run when CPU is in SLEEP mode. */
@ -85,10 +73,7 @@ typedef enum
NRF_WDT_BEHAVIOUR_PAUSE_SLEEP_HALT = 0, /**< WDT will be paused when CPU is in SLEEP or HALT mode. */
} nrf_wdt_behaviour_t;
/**
* @enum nrf_wdt_rr_register_t
* @brief WDT reload request registers.
*/
/** @brief WDT reload request registers. */
typedef enum
{
NRF_WDT_RR0 = 0, /**< Reload request register 0. */
@ -101,15 +86,13 @@ typedef enum
NRF_WDT_RR7 /**< Reload request register 7. */
} nrf_wdt_rr_register_t;
/**
* @enum nrf_wdt_int_mask_t
* @brief WDT interrupts.
*/
/** @brief WDT interrupts. */
typedef enum
{
NRF_WDT_INT_TIMEOUT_MASK = WDT_INTENSET_TIMEOUT_Msk, /**< WDT interrupt from time-out event. */
} nrf_wdt_int_mask_t;
/**
* @brief Function for configuring the watchdog behavior when the CPU is sleeping or halted.
*
@ -120,48 +103,48 @@ __STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour);
/**
* @brief Function for starting the WDT task.
*
* @param[in] task Task.
* @param[in] task Task.
*/
__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task);
/**
* @brief Function for clearing the WDT event.
* @brief Function for clearing the WDT event register.
*
* @param[in] event Event.
* @param[in] event Event.
*/
__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event);
/**
* @brief Function for retrieving the state of the WDT event.
*
* @param[in] event Event.
* @param[in] event Event to be checked.
*
* @retval true If the event is set.
* @retval false If the event is not set.
* @retval true The event has been generated.
* @retval false The event has not been generated.
*/
__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event);
/**
* @brief Function for enabling a specific interrupt.
* @brief Function for enabling the specified interrupt.
*
* @param[in] int_mask Interrupt.
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask);
/**
* @brief Function for retrieving the state of given interrupt.
*
* @param[in] int_mask Interrupt.
* @param[in] int_mask Interrupt.
*
* @retval true Interrupt is enabled.
* @retval false Interrupt is not enabled.
* @retval true Interrupt is enabled.
* @retval false Interrupt is not enabled.
*/
__STATIC_INLINE bool nrf_wdt_int_enable_check(uint32_t int_mask);
/**
* @brief Function for disabling a specific interrupt.
*
* @param[in] int_mask Interrupt.
* @param[in] int_mask Interrupt.
*/
__STATIC_INLINE void nrf_wdt_int_disable(uint32_t int_mask);
@ -206,72 +189,72 @@ __STATIC_INLINE void nrf_wdt_publish_clear(nrf_wdt_event_t event);
/**
* @brief Function for returning the address of a specific WDT task register.
*
* @param[in] task Task.
* @param[in] task Task.
*/
__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task);
/**
* @brief Function for returning the address of a specific WDT event register.
*
* @param[in] event Event.
* @param[in] event Event.
*
* @retval address of requested event register
* @return Address of requested event register
*/
__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event);
/**
* @brief Function for retrieving the watchdog status.
*
* @retval true If the watchdog is started.
* @retval false If the watchdog is not started.
* @retval true The watchdog is started.
* @retval false The watchdog is not started.
*/
__STATIC_INLINE bool nrf_wdt_started(void);
/**
* @brief Function for retrieving the watchdog reload request status.
*
* @param[in] rr_register Reload request register to check.
* @param[in] rr_register Reload request register to be checked.
*
* @retval true If a reload request is running.
* @retval false If no reload request is running.
* @retval true Reload request is running.
* @retval false No reload requests are running.
*/
__STATIC_INLINE bool nrf_wdt_request_status(nrf_wdt_rr_register_t rr_register);
/**
* @brief Function for setting the watchdog reload value.
*
* @param[in] reload_value Watchdog counter initial value.
* @param[in] reload_value Watchdog counter initial value.
*/
__STATIC_INLINE void nrf_wdt_reload_value_set(uint32_t reload_value);
/**
* @brief Function for retrieving the watchdog reload value.
*
* @retval Reload value.
* @return Reload value.
*/
__STATIC_INLINE uint32_t nrf_wdt_reload_value_get(void);
/**
* @brief Function for enabling a specific reload request register.
*
* @param[in] rr_register Reload request register to enable.
* @param[in] rr_register Reload request register to be enabled.
*/
__STATIC_INLINE void nrf_wdt_reload_request_enable(nrf_wdt_rr_register_t rr_register);
/**
* @brief Function for disabling a specific reload request register.
*
* @param[in] rr_register Reload request register to disable.
* @param[in] rr_register Reload request register to be disabled.
*/
__STATIC_INLINE void nrf_wdt_reload_request_disable(nrf_wdt_rr_register_t rr_register);
/**
* @brief Function for retrieving the status of a specific reload request register.
*
* @param[in] rr_register Reload request register to check.
* @param[in] rr_register Reload request register to be checked.
*
* @retval true If the reload request register is enabled.
* @retval false If the reload request register is not enabled.
* @retval true The reload request register is enabled.
* @retval false The reload request register is not enabled.
*/
__STATIC_INLINE bool nrf_wdt_reload_request_is_enabled(nrf_wdt_rr_register_t rr_register);
@ -291,12 +274,12 @@ __STATIC_INLINE void nrf_wdt_behaviour_set(nrf_wdt_behaviour_t behaviour)
__STATIC_INLINE void nrf_wdt_task_trigger(nrf_wdt_task_t task)
{
*((volatile uint32_t *)((uint8_t *)NRF_WDT + task)) = NRF_WDT_TASK_SET;
*((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)task)) = 0x01UL;
}
__STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event)
{
*((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = NRF_WDT_EVENT_CLEAR;
*((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event)) = 0x0UL;
#if __CORTEX_M == 0x04
volatile uint32_t dummy = *((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event));
(void)dummy;
@ -305,7 +288,7 @@ __STATIC_INLINE void nrf_wdt_event_clear(nrf_wdt_event_t event)
__STATIC_INLINE bool nrf_wdt_event_check(nrf_wdt_event_t event)
{
return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + event));
return (bool)*((volatile uint32_t *)((uint8_t *)NRF_WDT + (uint32_t)event));
}
__STATIC_INLINE void nrf_wdt_int_enable(uint32_t int_mask)
@ -351,12 +334,12 @@ __STATIC_INLINE void nrf_wdt_publish_clear(nrf_wdt_event_t event)
__STATIC_INLINE uint32_t nrf_wdt_task_address_get(nrf_wdt_task_t task)
{
return ((uint32_t)NRF_WDT + task);
return ((uint32_t)NRF_WDT + (uint32_t)task);
}
__STATIC_INLINE uint32_t nrf_wdt_event_address_get(nrf_wdt_event_t event)
{
return ((uint32_t)NRF_WDT + event);
return ((uint32_t)NRF_WDT + (uint32_t)event);
}
__STATIC_INLINE bool nrf_wdt_started(void)

2
ext/hal/nordic/nrfx/soc/nrfx_coredep.h
View file

@ -125,8 +125,8 @@ __STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
DWT->CTRL = dwt_ctrl;
CoreDebug->DEMCR = core_debug;
}
#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)
#else // NRFX_CHECK(NRFX_DELAY_DWT_BASED)
__STATIC_INLINE void nrfx_coredep_delay_us(uint32_t time_us)
{

32
ext/hal/nordic/nrfx_config_nrf51.h
View file

@ -389,6 +389,14 @@
// </e>
// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
//==========================================================
#ifndef NRFX_NVMC_ENABLED
#define NRFX_NVMC_ENABLED 0
#endif
// </e>
// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver
//==========================================================
#ifndef NRFX_POWER_ENABLED
@ -1172,12 +1180,30 @@
// </e>
// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
//==========================================================
#ifndef NRFX_TEMP_ENABLED
#define NRFX_TEMP_ENABLED 0
#endif
// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 3
#endif
// </e>
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifdef CONFIG_NRFX_TIMER
#define NRFX_TIMER_ENABLED 1
#endif
// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance
@ -1403,11 +1429,11 @@
// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
//==========================================================
#ifdef CONFIG_NRFX_UART
#define NRFX_UART_ENABLED 0
#define NRFX_UART_ENABLED 1
#endif
// <o> NRFX_UART0_ENABLED - Enable UART0 instance
#ifdef CONFIG_NRFX_UART
#define NRFX_UART0_ENABLED 0
#define NRFX_UART0_ENABLED 1
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control

39
ext/hal/nordic/nrfx_config_nrf52810.h
View file

@ -46,6 +46,8 @@
// <0=> RC
// <1=> XTAL
// <2=> Synth
// <131073=> External Low Swing
// <196609=> External Full Swing
#ifndef NRFX_CLOCK_CONFIG_LF_SRC
#define NRFX_CLOCK_CONFIG_LF_SRC 1
@ -342,6 +344,14 @@
// </e>
// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
//==========================================================
#ifndef NRFX_NVMC_ENABLED
#define NRFX_NVMC_ENABLED 0
#endif
// </e>
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@ -1427,6 +1437,7 @@
#define NRFX_SPI0_ENABLED 1
#endif
// <o> NRFX_SPI_MISO_PULL_CFG - MISO pin pull configuration.
// <0=> NRF_GPIO_PIN_NOPULL
@ -1627,6 +1638,29 @@
#define NRFX_SYSTICK_ENABLED 0
#endif
// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
//==========================================================
#ifndef NRFX_TEMP_ENABLED
#define NRFX_TEMP_ENABLED 0
#endif
// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// </e>
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifdef CONFIG_NRFX_TIMER
@ -1995,6 +2029,7 @@
#define NRFX_TWI0_ENABLED 1
#endif
// <o> NRFX_TWI_DEFAULT_CONFIG_FREQUENCY - Frequency
// <26738688=> 100k
@ -2204,11 +2239,11 @@
// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
//==========================================================
#ifdef CONFIG_NRFX_UART
#define NRFX_UART_ENABLED 0
#define NRFX_UART_ENABLED 1
#endif
// <o> NRFX_UART0_ENABLED - Enable UART0 instance
#ifdef CONFIG_NRFX_UART
#define NRFX_UART0_ENABLED 0
#define NRFX_UART0_ENABLED 1
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control

40
ext/hal/nordic/nrfx_config_nrf52832.h
View file

@ -468,7 +468,7 @@
// <8=> 512x
#ifndef NRFX_I2S_CONFIG_RATIO
#define NRFX_I2S_CONFIG_RATIO 2000
#define NRFX_I2S_CONFIG_RATIO 5
#endif
// <o> NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
@ -741,6 +741,14 @@
// </e>
// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
//==========================================================
#ifndef NRFX_NVMC_ENABLED
#define NRFX_NVMC_ENABLED 0
#endif
// </e>
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@ -2158,13 +2166,34 @@
#define NRFX_SYSTICK_ENABLED 0
#endif
// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
//==========================================================
#ifndef NRFX_TEMP_ENABLED
#define NRFX_TEMP_ENABLED 0
#endif
// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// </e>
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifdef CONFIG_NRFX_TIMER
#define NRFX_TIMER_ENABLED 1
#endif
// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance
@ -2571,6 +2600,7 @@
// <q> NRFX_TWI1_ENABLED - Enable TWI1 instance
#ifdef CONFIG_I2C_1_NRF_TWI
#define NRFX_TWI1_ENABLED 1
#endif
@ -2784,11 +2814,11 @@
// <e> NRFX_UART_ENABLED - nrfx_uart - UART peripheral driver
//==========================================================
#ifdef CONFIG_NRFX_UART
#define NRFX_UART_ENABLED 0
#define NRFX_UART_ENABLED 1
#endif
// <o> NRFX_UART0_ENABLED - Enable UART0 instance
#ifdef CONFIG_NRFX_UART
#define NRFX_UART0_ENABLED 0
#define NRFX_UART0_ENABLED 1
#endif
// <o> NRFX_UART_DEFAULT_CONFIG_HWFC - Hardware Flow Control

37
ext/hal/nordic/nrfx_config_nrf52840.h
View file

@ -468,7 +468,7 @@
// <8=> 512x
#ifndef NRFX_I2S_CONFIG_RATIO
#define NRFX_I2S_CONFIG_RATIO 2000
#define NRFX_I2S_CONFIG_RATIO 5
#endif
// <o> NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
@ -741,6 +741,14 @@
// </e>
// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
//==========================================================
#ifndef NRFX_NVMC_ENABLED
#define NRFX_NVMC_ENABLED 0
#endif
// </e>
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
//==========================================================
#ifndef NRFX_PDM_ENABLED
@ -2255,17 +2263,40 @@
// </e>
// <q> NRFX_SYSTICK_ENABLED - nrfx_systick - ARM(R) SysTick driver
//==========================================================
#ifdef CONFIG_NRFX_SYSTICK
#define NRFX_SYSTICK_ENABLED 1
#endif
// <e> NRFX_TEMP_ENABLED - nrfx_temp - TEMP peripheral driver
//==========================================================
#ifndef NRFX_TEMP_ENABLED
#define NRFX_TEMP_ENABLED 0
#endif
// <o> NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <0=> 0 (highest)
// <1=> 1
// <2=> 2
// <3=> 3
// <4=> 4
// <5=> 5
// <6=> 6
// <7=> 7
#ifndef NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY
#define NRFX_TEMP_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// </e>
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
//==========================================================
#ifdef CONFIG_NRFX_TIMER
#define NRFX_TIMER_ENABLED 1
#endif
// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance

263
ext/hal/nordic/nrfx_config_nrf9160.h
View file

@ -202,12 +202,12 @@
// <h> nRF_Drivers
// <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver
// <e> NRFX_CLOCK_ENABLED - nrfx_clock - CLOCK peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_CLOCK
#define NRFX_CLOCK_ENABLED 1
#endif
// <o> NRFX_CLOCK_CONFIG_LF_SRC - LF Clock Source
// <o> NRFX_CLOCK_CONFIG_LF_SRC - LF clock source.
// <0=> RC
// <1=> XTAL
@ -219,7 +219,7 @@
#define NRFX_CLOCK_CONFIG_LF_SRC 1
#endif
// <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_CLOCK_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -239,7 +239,7 @@
#ifndef NRFX_CLOCK_CONFIG_LOG_ENABLED
#define NRFX_CLOCK_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_CLOCK_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -345,17 +345,17 @@
// </e>
// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver
// <e> NRFX_GPIOTE_ENABLED - nrfx_gpiote - GPIOTE peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_GPIOTE
#define NRFX_GPIOTE_ENABLED 1
#endif
// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins
// <o> NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS - Number of lower power input pins.
#ifndef NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS
#define NRFX_GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 1
#endif
// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_GPIOTE_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -375,7 +375,7 @@
#ifndef NRFX_GPIOTE_CONFIG_LOG_ENABLED
#define NRFX_GPIOTE_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_GPIOTE_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -423,7 +423,7 @@
// </e>
// <e> NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver
// <e> NRFX_I2S_ENABLED - nrfx_i2s - I2S peripheral driver.
//==========================================================
#ifndef NRFX_I2S_ENABLED
#define NRFX_I2S_ENABLED 0
@ -442,7 +442,7 @@
#define NRFX_I2S_CONFIG_LRCK_PIN 30
#endif
// <o> NRFX_I2S_CONFIG_MCK_PIN - MCK pin
// <o> NRFX_I2S_CONFIG_MCK_PIN - MCK pin.
#ifndef NRFX_I2S_CONFIG_MCK_PIN
#define NRFX_I2S_CONFIG_MCK_PIN 255
#endif
@ -461,7 +461,7 @@
#define NRFX_I2S_CONFIG_SDIN_PIN 28
#endif
// <o> NRFX_I2S_CONFIG_MASTER - Mode
// <o> NRFX_I2S_CONFIG_MASTER - Mode.
// <0=> Master
// <1=> Slave
@ -470,7 +470,7 @@
#define NRFX_I2S_CONFIG_MASTER 0
#endif
// <o> NRFX_I2S_CONFIG_FORMAT - Format
// <o> NRFX_I2S_CONFIG_FORMAT - Format.
// <0=> I2S
// <1=> Aligned
@ -479,7 +479,7 @@
#define NRFX_I2S_CONFIG_FORMAT 0
#endif
// <o> NRFX_I2S_CONFIG_ALIGN - Alignment
// <o> NRFX_I2S_CONFIG_ALIGN - Alignment.
// <0=> Left
// <1=> Right
@ -488,7 +488,7 @@
#define NRFX_I2S_CONFIG_ALIGN 0
#endif
// <o> NRFX_I2S_CONFIG_SWIDTH - Sample width (bits)
// <o> NRFX_I2S_CONFIG_SWIDTH - Sample width (bits).
// <0=> 8
// <1=> 16
@ -498,7 +498,7 @@
#define NRFX_I2S_CONFIG_SWIDTH 1
#endif
// <o> NRFX_I2S_CONFIG_CHANNELS - Channels
// <o> NRFX_I2S_CONFIG_CHANNELS - Channels.
// <0=> Stereo
// <1=> Left
@ -508,7 +508,7 @@
#define NRFX_I2S_CONFIG_CHANNELS 1
#endif
// <o> NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior
// <o> NRFX_I2S_CONFIG_MCK_SETUP - MCK behavior.
// <0=> Disabled
// <536870912=> 32MHz/8
@ -529,7 +529,7 @@
#define NRFX_I2S_CONFIG_MCK_SETUP 536870912
#endif
// <o> NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio
// <o> NRFX_I2S_CONFIG_RATIO - MCK/LRCK ratio.
// <0=> 32x
// <1=> 48x
@ -545,7 +545,7 @@
#define NRFX_I2S_CONFIG_RATIO 5
#endif
// <o> NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_I2S_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -565,7 +565,7 @@
#ifndef NRFX_I2S_CONFIG_LOG_ENABLED
#define NRFX_I2S_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_I2S_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_I2S_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -613,12 +613,20 @@
// </e>
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver
// <e> NRFX_NVMC_ENABLED - nrfx_nvmc - NVMC peripheral driver
//==========================================================
#ifndef NRFX_NVMC_ENABLED
#define NRFX_NVMC_ENABLED 0
#endif
// </e>
// <e> NRFX_PDM_ENABLED - nrfx_pdm - PDM peripheral driver.
//==========================================================
#ifndef NRFX_PDM_ENABLED
#define NRFX_PDM_ENABLED 0
#endif
// <o> NRFX_PDM_CONFIG_MODE - Mode
// <o> NRFX_PDM_CONFIG_MODE - Mode.
// <0=> Stereo
// <1=> Mono
@ -627,7 +635,7 @@
#define NRFX_PDM_CONFIG_MODE 1
#endif
// <o> NRFX_PDM_CONFIG_EDGE - Edge
// <o> NRFX_PDM_CONFIG_EDGE - Edge.
// <0=> Left falling
// <1=> Left rising
@ -636,7 +644,7 @@
#define NRFX_PDM_CONFIG_EDGE 0
#endif
// <o> NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency
// <o> NRFX_PDM_CONFIG_CLOCK_FREQ - Clock frequency.
// <134217728=> 1000k
// <138412032=> 1032k (default)
@ -646,7 +654,7 @@
#define NRFX_PDM_CONFIG_CLOCK_FREQ 138412032
#endif
// <o> NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_PDM_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -666,7 +674,7 @@
#ifndef NRFX_PDM_CONFIG_LOG_ENABLED
#define NRFX_PDM_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_PDM_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_PDM_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -714,12 +722,12 @@
// </e>
// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver
// <e> NRFX_POWER_ENABLED - nrfx_power - POWER peripheral driver.
//==========================================================
#ifndef NRFX_POWER_ENABLED
#define NRFX_POWER_ENABLED 0
#endif
// <o> NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_POWER_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -734,7 +742,7 @@
#define NRFX_POWER_CONFIG_IRQ_PRIORITY 7
#endif
// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of main DCDC regulator
// <q> NRFX_POWER_CONFIG_DEFAULT_DCDCEN - The default configuration of the main DCDC regulator.
// <i> This settings means only that components for DCDC regulator are installed and it can be enabled.
@ -745,7 +753,7 @@
// </e>
// <e> NRFX_PRS_ENABLED - nrfx_prs - Peripheral Resource Sharing module
// <e> NRFX_PRS_ENABLED - nrfx_prs - Peripheral Resource Sharing (PRS) module.
//==========================================================
#ifndef NRFX_PRS_ENABLED
#define NRFX_PRS_ENABLED 0
@ -783,7 +791,7 @@
#ifndef NRFX_PRS_CONFIG_LOG_ENABLED
#define NRFX_PRS_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_PRS_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_PRS_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -831,68 +839,68 @@
// </e>
// <e> NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver
// <e> NRFX_PWM_ENABLED - nrfx_pwm - PWM peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_PWM
#define NRFX_PWM_ENABLED 1
#endif
// <q> NRFX_PWM0_ENABLED - Enable PWM0 instance
// <q> NRFX_PWM0_ENABLED - Enables PWM0 instance.
#ifdef CONFIG_PWM_0
#define NRFX_PWM0_ENABLED 1
#endif
// <q> NRFX_PWM1_ENABLED - Enable PWM1 instance
// <q> NRFX_PWM1_ENABLED - Enables PWM1 instance.
#ifdef CONFIG_PWM_1
#define NRFX_PWM1_ENABLED 1
#endif
// <q> NRFX_PWM2_ENABLED - Enable PWM2 instance
// <q> NRFX_PWM2_ENABLED - Enables PWM2 instance.
#ifdef CONFIG_PWM_2
#define NRFX_PWM2_ENABLED 1
#endif
// <q> NRFX_PWM3_ENABLED - Enable PWM3 instance
// <q> NRFX_PWM3_ENABLED - Enables PWM3 instance.
#ifdef CONFIG_PWM_3
#define NRFX_PWM3_ENABLED 1
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN - Out0 pin <0-31>
#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN
#define NRFX_PWM_DEFAULT_CONFIG_OUT0_PIN 31
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN - Out1 pin <0-31>
#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN
#define NRFX_PWM_DEFAULT_CONFIG_OUT1_PIN 31
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN - Out2 pin <0-31>
#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN
#define NRFX_PWM_DEFAULT_CONFIG_OUT2_PIN 31
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
// <o> NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN - Out3 pin <0-31>
#ifndef NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN
#define NRFX_PWM_DEFAULT_CONFIG_OUT3_PIN 31
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock
// <o> NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK - Base clock.
// <0=> 16 MHz
// <1=> 8 MHz
@ -907,7 +915,7 @@
#define NRFX_PWM_DEFAULT_CONFIG_BASE_CLOCK 4
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode
// <o> NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE - Count mode.
// <0=> Up
// <1=> Up and Down
@ -916,12 +924,12 @@
#define NRFX_PWM_DEFAULT_CONFIG_COUNT_MODE 0
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value
// <o> NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE - Top value.
#ifndef NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE
#define NRFX_PWM_DEFAULT_CONFIG_TOP_VALUE 1000
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode
// <o> NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE - Load mode.
// <0=> Common
// <1=> Grouped
@ -932,7 +940,7 @@
#define NRFX_PWM_DEFAULT_CONFIG_LOAD_MODE 0
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode
// <o> NRFX_PWM_DEFAULT_CONFIG_STEP_MODE - Step mode.
// <0=> Auto
// <1=> Triggered
@ -941,7 +949,7 @@
#define NRFX_PWM_DEFAULT_CONFIG_STEP_MODE 0
#endif
// <o> NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_PWM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -961,7 +969,7 @@
#ifndef NRFX_PWM_CONFIG_LOG_ENABLED
#define NRFX_PWM_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_PWM_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_PWM_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1009,45 +1017,45 @@
// </e>
// <e> NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver
// <e> NRFX_RTC_ENABLED - nrfx_rtc - RTC peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_RTC
#define NRFX_RTC_ENABLED 1
#endif
// <q> NRFX_RTC0_ENABLED - Enable RTC0 instance
// <q> NRFX_RTC0_ENABLED - Enables RTC0 instance.
#ifdef CONFIG_NRFX_RTC0
#define NRFX_RTC0_ENABLED 1
#endif
// <q> NRFX_RTC1_ENABLED - Enable RTC1 instance
// <q> NRFX_RTC1_ENABLED - Enables RTC1 instance.
#ifdef CONFIG_NRFX_RTC1
#define NRFX_RTC1_ENABLED 1
#endif
// <o> NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time[us] in highest priority interrupt
// <o> NRFX_RTC_MAXIMUM_LATENCY_US - Maximum possible time in highest priority interrupt, in microseconds.
#ifndef NRFX_RTC_MAXIMUM_LATENCY_US
#define NRFX_RTC_MAXIMUM_LATENCY_US 2000
#endif
// <o> NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
// <o> NRFX_RTC_DEFAULT_CONFIG_FREQUENCY - Frequency <16-32768>
#ifndef NRFX_RTC_DEFAULT_CONFIG_FREQUENCY
#define NRFX_RTC_DEFAULT_CONFIG_FREQUENCY 32768
#endif
// <q> NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering
// <q> NRFX_RTC_DEFAULT_CONFIG_RELIABLE - Ensures safe compare event triggering.
#ifndef NRFX_RTC_DEFAULT_CONFIG_RELIABLE
#define NRFX_RTC_DEFAULT_CONFIG_RELIABLE 0
#endif
// <o> NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_RTC_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1067,7 +1075,7 @@
#ifndef NRFX_RTC_CONFIG_LOG_ENABLED
#define NRFX_RTC_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_RTC_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_RTC_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1115,12 +1123,12 @@
// </e>
// <e> NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver
// <e> NRFX_SAADC_ENABLED - nrfx_saadc - SAADC peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_SAADC
#define NRFX_SAADC_ENABLED 1
#endif
// <o> NRFX_SAADC_CONFIG_RESOLUTION - Resolution
// <o> NRFX_SAADC_CONFIG_RESOLUTION - Resolution.
// <0=> 8 bit
// <1=> 10 bit
@ -1131,7 +1139,7 @@
#define NRFX_SAADC_CONFIG_RESOLUTION 1
#endif
// <o> NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period
// <o> NRFX_SAADC_CONFIG_OVERSAMPLE - Sample period.
// <0=> Disabled
// <1=> 2x
@ -1147,14 +1155,14 @@
#define NRFX_SAADC_CONFIG_OVERSAMPLE 0
#endif
// <q> NRFX_SAADC_CONFIG_LP_MODE - Enabling low power mode
// <q> NRFX_SAADC_CONFIG_LP_MODE - Enables low power mode.
#ifndef NRFX_SAADC_CONFIG_LP_MODE
#define NRFX_SAADC_CONFIG_LP_MODE 0
#endif
// <o> NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_SAADC_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1174,7 +1182,7 @@
#ifndef NRFX_SAADC_CONFIG_LOG_ENABLED
#define NRFX_SAADC_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_SAADC_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_SAADC_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1222,40 +1230,39 @@
// </e>
// <e> NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver
// <e> NRFX_SPIM_ENABLED - nrfx_spim - SPIM peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_SPIM
#define NRFX_SPIM_ENABLED 1
#endif
// <q> NRFX_SPIM0_ENABLED - Enable SPIM0 instance
// <q> NRFX_SPIM0_ENABLED - Enables SPIM0 instance.
#ifdef CONFIG_SPI_0_NRF_SPIM
#define NRFX_SPIM0_ENABLED 1
#endif
// <q> NRFX_SPIM1_ENABLED - Enable SPIM1 instance
// <q> NRFX_SPIM1_ENABLED - Enables SPIM1 instance.
#ifdef CONFIG_SPI_1_NRF_SPIM
#define NRFX_SPIM1_ENABLED 1
#endif
// <q> NRFX_SPIM2_ENABLED - Enable SPIM2 instance
// <q> NRFX_SPIM2_ENABLED - Enables SPIM2 instance.
#ifdef CONFIG_SPI_2_NRF_SPIM
#define NRFX_SPIM2_ENABLED 1
#endif
// <q> NRFX_SPIM3_ENABLED - Enable SPIM3 instance
// <q> NRFX_SPIM3_ENABLED - Enables SPIM3 instance.
#ifdef CONFIG_SPI_3_NRF_SPIM
#define NRFX_SPIM3_ENABLED 1
#endif
// <o> NRFX_SPIM_MISO_PULL_CFG - MISO pin pull configuration.
// <0=> NRF_GPIO_PIN_NOPULL
@ -1266,7 +1273,7 @@
#define NRFX_SPIM_MISO_PULL_CFG 1
#endif
// <o> NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_SPIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1286,7 +1293,7 @@
#ifndef NRFX_SPIM_CONFIG_LOG_ENABLED
#define NRFX_SPIM_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_SPIM_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_SPIM_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1334,26 +1341,26 @@
// </e>
// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver
// <e> NRFX_SPIS_ENABLED - nrfx_spis - SPIS peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_SPIS
#define NRFX_SPIS_ENABLED 1
#endif
// <q> NRFX_SPIS0_ENABLED - Enable SPIS0 instance
// <q> NRFX_SPIS0_ENABLED - Enables SPIS0 instance.
#ifdef CONFIG_SPI_0_NRF_SPIS
#define NRFX_SPIS0_ENABLED 1
#endif
// <q> NRFX_SPIS1_ENABLED - Enable SPIS1 instance
// <q> NRFX_SPIS1_ENABLED - Enables SPIS1 instance.
#ifdef CONFIG_SPI_1_NRF_SPIS
#define NRFX_SPIS1_ENABLED 1
#endif
// <q> NRFX_SPIS2_ENABLED - Enable SPIS2 instance
// <q> NRFX_SPIS2_ENABLED - Enables SPIS2 instance.
#ifdef CONFIG_SPI_2_NRF_SPIS
@ -1367,7 +1374,7 @@
#define NRFX_SPIS3_ENABLED 1
#endif
// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1382,14 +1389,14 @@
#define NRFX_SPIS_DEFAULT_CONFIG_IRQ_PRIORITY 7
#endif
// <o> NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
// <o> NRFX_SPIS_DEFAULT_DEF - SPIS default DEF character <0-255>
#ifndef NRFX_SPIS_DEFAULT_DEF
#define NRFX_SPIS_DEFAULT_DEF 255
#endif
// <o> NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
// <o> NRFX_SPIS_DEFAULT_ORC - SPIS default ORC character <0-255>
#ifndef NRFX_SPIS_DEFAULT_ORC
@ -1401,7 +1408,7 @@
#ifndef NRFX_SPIS_CONFIG_LOG_ENABLED
#define NRFX_SPIS_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_SPIS_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_SPIS_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1449,54 +1456,54 @@
// </e>
// <e> NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator
// <e> NRFX_SWI_ENABLED - nrfx_swi - SWI/EGU peripheral allocator.
//==========================================================
#ifndef NRFX_SWI_ENABLED
#define NRFX_SWI_ENABLED 0
#endif
// <q> NRFX_EGU_ENABLED - Enable EGU support
// <q> NRFX_EGU_ENABLED - Enables EGU support.
#ifndef NRFX_EGU_ENABLED
#define NRFX_EGU_ENABLED 0
#endif
// <q> NRFX_SWI0_DISABLED - Exclude SWI0 from being utilized by the driver
// <q> NRFX_SWI0_DISABLED - Excludes SWI0 from being utilized by the driver.
#ifndef NRFX_SWI0_DISABLED
#define NRFX_SWI0_DISABLED 0
#endif
// <q> NRFX_SWI1_DISABLED - Exclude SWI1 from being utilized by the driver
// <q> NRFX_SWI1_DISABLED - Excludes SWI1 from being utilized by the driver.
#ifndef NRFX_SWI1_DISABLED
#define NRFX_SWI1_DISABLED 0
#endif
// <q> NRFX_SWI2_DISABLED - Exclude SWI2 from being utilized by the driver
// <q> NRFX_SWI2_DISABLED - Excludes SWI2 from being utilized by the driver.
#ifndef NRFX_SWI2_DISABLED
#define NRFX_SWI2_DISABLED 0
#endif
// <q> NRFX_SWI3_DISABLED - Exclude SWI3 from being utilized by the driver
// <q> NRFX_SWI3_DISABLED - Excludes SWI3 from being utilized by the driver.
#ifndef NRFX_SWI3_DISABLED
#define NRFX_SWI3_DISABLED 0
#endif
// <q> NRFX_SWI4_DISABLED - Exclude SWI4 from being utilized by the driver
// <q> NRFX_SWI4_DISABLED - Excludes SWI4 from being utilized by the driver.
#ifndef NRFX_SWI4_DISABLED
#define NRFX_SWI4_DISABLED 0
#endif
// <q> NRFX_SWI5_DISABLED - Exclude SWI5 from being utilized by the driver
// <q> NRFX_SWI5_DISABLED - Excludes SWI5 from being utilized by the driver.
#ifndef NRFX_SWI5_DISABLED
@ -1508,7 +1515,7 @@
#ifndef NRFX_SWI_CONFIG_LOG_ENABLED
#define NRFX_SWI_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_SWI_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_SWI_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1556,40 +1563,40 @@
// </e>
// <q> NRFX_SYSTICK_ENABLED - nrfx_systick - ARM(R) SysTick driver
// <q> NRFX_SYSTICK_ENABLED - nrfx_systick - ARM(R) SysTick driver.
#ifndef NRFX_SYSTICK_ENABLED
#define NRFX_SYSTICK_ENABLED 0
#endif
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver
// <e> NRFX_TIMER_ENABLED - nrfx_timer - TIMER periperal driver.
//==========================================================
#ifdef CONFIG_NRFX_TIMER
#define NRFX_TIMER_ENABLED 1
#endif
// <q> NRFX_TIMER0_ENABLED - Enable TIMER0 instance
// <q> NRFX_TIMER0_ENABLED - Enables TIMER0 instance.
#ifdef CONFIG_NRFX_TIMER0
#define NRFX_TIMER0_ENABLED 1
#endif
// <q> NRFX_TIMER1_ENABLED - Enable TIMER1 instance
// <q> NRFX_TIMER1_ENABLED - Enables TIMER1 instance.
#ifdef CONFIG_NRFX_TIMER1
#define NRFX_TIMER1_ENABLED 1
#endif
// <q> NRFX_TIMER2_ENABLED - Enable TIMER2 instance
// <q> NRFX_TIMER2_ENABLED - Enables TIMER2 instance.
#ifdef CONFIG_NRFX_TIMER2
#define NRFX_TIMER2_ENABLED 1
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode
// <o> NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY - Timer frequency if in Timer mode.
// <0=> 16 MHz
// <1=> 8 MHz
@ -1606,7 +1613,7 @@
#define NRFX_TIMER_DEFAULT_CONFIG_FREQUENCY 0
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation
// <o> NRFX_TIMER_DEFAULT_CONFIG_MODE - Timer mode or operation.
// <0=> Timer
// <1=> Counter
@ -1615,7 +1622,7 @@
#define NRFX_TIMER_DEFAULT_CONFIG_MODE 0
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width
// <o> NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH - Timer counter bit width.
// <0=> 16 bit
// <1=> 8 bit
@ -1626,7 +1633,7 @@
#define NRFX_TIMER_DEFAULT_CONFIG_BIT_WIDTH 0
#endif
// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_TIMER_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1646,7 +1653,7 @@
#ifndef NRFX_TIMER_CONFIG_LOG_ENABLED
#define NRFX_TIMER_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_TIMER_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_TIMER_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1694,40 +1701,40 @@
// </e>
// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver
// <e> NRFX_TWIM_ENABLED - nrfx_twim - TWIM peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_TWIM
#define NRFX_TWIM_ENABLED 1
#endif
// <q> NRFX_TWIM0_ENABLED - Enable TWIM0 instance
// <q> NRFX_TWIM0_ENABLED - Enables TWIM0 instance.
#ifdef CONFIG_I2C_0_NRF_TWIM
#define NRFX_TWIM0_ENABLED 1
#endif
// <q> NRFX_TWIM1_ENABLED - Enable TWIM1 instance
// <q> NRFX_TWIM1_ENABLED - Enables TWIM1 instance.
#ifdef CONFIG_I2C_1_NRF_TWIM
#define NRFX_TWIM1_ENABLED 1
#endif
// <q> NRFX_TWIM2_ENABLED - Enable TWIM2 instance
// <q> NRFX_TWIM2_ENABLED - Enables TWIM2 instance.
#ifdef CONFIG_I2C_2_NRF_TWIM
#define NRFX_TWIM2_ENABLED 1
#endif
// <q> NRFX_TWIM3_ENABLED - Enable TWIM3 instance
// <q> NRFX_TWIM3_ENABLED - Enables TWIM3 instance.
#ifdef CONFIG_I2C_3_NRF_TWIM
#define NRFX_TWIM3_ENABLED 1
#endif
// <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency
// <o> NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY - Frequency.
// <26738688=> 100k
// <67108864=> 250k
@ -1737,14 +1744,14 @@
#define NRFX_TWIM_DEFAULT_CONFIG_FREQUENCY 26738688
#endif
// <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit
// <q> NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT - Enables bus holding after uninit.
#ifndef NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT
#define NRFX_TWIM_DEFAULT_CONFIG_HOLD_BUS_UNINIT 0
#endif
// <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_TWIM_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1764,7 +1771,7 @@
#ifndef NRFX_TWIM_CONFIG_LOG_ENABLED
#define NRFX_TWIM_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_TWIM_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_TWIM_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1812,19 +1819,19 @@
// </e>
// <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver
// <e> NRFX_TWIS_ENABLED - nrfx_twis - TWIS peripheral driver.
//==========================================================
#ifndef NRFX_TWIS_ENABLED
#define NRFX_TWIS_ENABLED 0
#endif
// <q> NRFX_TWIS0_ENABLED - Enable TWIS0 instance
// <q> NRFX_TWIS0_ENABLED - Enables TWIS0 instance.
#ifndef NRFX_TWIS0_ENABLED
#define NRFX_TWIS0_ENABLED 0
#endif
// <q> NRFX_TWIS1_ENABLED - Enable TWIS1 instance
// <q> NRFX_TWIS1_ENABLED - Enables TWIS1 instance.
#ifndef NRFX_TWIS1_ENABLED
@ -1845,7 +1852,7 @@
#define NRFX_TWIS3_ENABLED 0
#endif
// <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assume that any instance would be initialized only once
// <q> NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY - Assumes that any instance would be initialized only once.
// <i> Optimization flag. Registers used by TWIS are shared by other peripherals. Normally, during initialization driver tries to clear all registers to known state before doing the initialization itself. This gives initialization safe procedure, no matter when it would be called. If you activate TWIS only once and do never uninitialize it - set this flag to 1 what gives more optimal code.
@ -1854,7 +1861,7 @@
#define NRFX_TWIS_ASSUME_INIT_AFTER_RESET_ONLY 0
#endif
// <q> NRFX_TWIS_NO_SYNC_MODE - Remove support for synchronous mode
// <q> NRFX_TWIS_NO_SYNC_MODE - Removes support for synchronous mode.
// <i> Synchronous mode would be used in specific situations. And it uses some additional code and data memory to safely process state machine by polling it in status functions. If this functionality is not required it may be disabled to free some resources.
@ -1863,17 +1870,17 @@
#define NRFX_TWIS_NO_SYNC_MODE 0
#endif
// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0
// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR0 - Address0.
#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR0
#define NRFX_TWIS_DEFAULT_CONFIG_ADDR0 0
#endif
// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1
// <o> NRFX_TWIS_DEFAULT_CONFIG_ADDR1 - Address1.
#ifndef NRFX_TWIS_DEFAULT_CONFIG_ADDR1
#define NRFX_TWIS_DEFAULT_CONFIG_ADDR1 0
#endif
// <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration
// <o> NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL - SCL pin pull configuration.
// <0=> Disabled
// <1=> Pull down
@ -1883,7 +1890,7 @@
#define NRFX_TWIS_DEFAULT_CONFIG_SCL_PULL 0
#endif
// <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration
// <o> NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL - SDA pin pull configuration.
// <0=> Disabled
// <1=> Pull down
@ -1893,7 +1900,7 @@
#define NRFX_TWIS_DEFAULT_CONFIG_SDA_PULL 0
#endif
// <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_TWIS_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -1913,7 +1920,7 @@
#ifndef NRFX_TWIS_CONFIG_LOG_ENABLED
#define NRFX_TWIS_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_TWIS_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_TWIS_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -1961,17 +1968,17 @@
// </e>
// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver
// <e> NRFX_UARTE_ENABLED - nrfx_uarte - UARTE peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_UARTE
#define NRFX_UARTE_ENABLED 1
#endif
// <o> NRFX_UARTE0_ENABLED - Enable UARTE0 instance
// <o> NRFX_UARTE0_ENABLED - Enables UARTE0 instance.
#ifdef CONFIG_NRFX_UARTE0
#define NRFX_UARTE0_ENABLED 1
#endif
// <o> NRFX_UARTE1_ENABLED - Enable UARTE1 instance
// <o> NRFX_UARTE1_ENABLED - Enables UARTE1 instance.
#ifdef CONFIG_NRFX_UARTE1
#define NRFX_UARTE1_ENABLED 1
#endif
@ -1986,7 +1993,7 @@
#define NRFX_UARTE3_ENABLED 1
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control
// <o> NRFX_UARTE_DEFAULT_CONFIG_HWFC - Hardware Flow Control.
// <0=> Disabled
// <1=> Enabled
@ -1995,7 +2002,7 @@
#define NRFX_UARTE_DEFAULT_CONFIG_HWFC 0
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity
// <o> NRFX_UARTE_DEFAULT_CONFIG_PARITY - Parity.
// <0=> Excluded
// <14=> Included
@ -2004,7 +2011,7 @@
#define NRFX_UARTE_DEFAULT_CONFIG_PARITY 0
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default Baudrate
// <o> NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE - Default baud rate.
// <323584=> 1200 baud
// <643072=> 2400 baud
@ -2029,7 +2036,7 @@
#define NRFX_UARTE_DEFAULT_CONFIG_BAUDRATE 30801920
#endif
// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_UARTE_DEFAULT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -2049,7 +2056,7 @@
#ifndef NRFX_UARTE_CONFIG_LOG_ENABLED
#define NRFX_UARTE_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_UARTE_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error
@ -2097,12 +2104,12 @@
// </e>
// <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver
// <e> NRFX_WDT_ENABLED - nrfx_wdt - WDT peripheral driver.
//==========================================================
#ifdef CONFIG_NRFX_WDT
#define NRFX_WDT_ENABLED 1
#endif
// <o> NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode
// <o> NRFX_WDT_CONFIG_BEHAVIOUR - WDT behavior in CPU SLEEP or HALT mode.
// <1=> Run in SLEEP, Pause in HALT
// <8=> Pause in SLEEP, Run in HALT
@ -2113,7 +2120,7 @@
#define NRFX_WDT_CONFIG_BEHAVIOUR 1
#endif
// <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
// <o> NRFX_WDT_CONFIG_RELOAD_VALUE - Reload value <15-4294967295>
#ifndef NRFX_WDT_CONFIG_RELOAD_VALUE
@ -2129,7 +2136,7 @@
#define NRFX_WDT_CONFIG_NO_IRQ 0
#endif
// <o> NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority
// <o> NRFX_WDT_CONFIG_IRQ_PRIORITY - Interrupt priority.
// <0=> 0 (highest)
// <1=> 1
@ -2149,7 +2156,7 @@
#ifndef NRFX_WDT_CONFIG_LOG_ENABLED
#define NRFX_WDT_CONFIG_LOG_ENABLED 0
#endif
// <o> NRFX_WDT_CONFIG_LOG_LEVEL - Default Severity level
// <o> NRFX_WDT_CONFIG_LOG_LEVEL - Default severity level.
// <0=> Off
// <1=> Error

88
ext/hal/nordic/nrfx_glue.h
View file

@ -1,5 +1,5 @@
/**
* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -52,14 +52,14 @@ extern "C" {
/**
* @brief Macro for placing a runtime assertion.
*
* @param expression Expression to evaluate.
* @param expression Expression to be evaluated.
*/
#define NRFX_ASSERT(expression) assert(expression)
/**
* @brief Macro for placing a compile time assertion.
*
* @param expression Expression to evaluate.
* @param expression Expression to be evaluated.
*/
#define NRFX_STATIC_ASSERT(expression) \
BUILD_ASSERT_MSG(expression, "assertion failed")
@ -71,8 +71,8 @@ extern "C" {
/**
* @brief Macro for setting the priority of a specific IRQ.
*
* @param irq_number IRQ number.
* @param priority Priority to set.
* @param irq_number IRQ number.
* @param priority Priority to be set.
*/
#define NRFX_IRQ_PRIORITY_SET(irq_number, priority) // Intentionally empty.
// Priorities of IRQs are
@ -81,14 +81,14 @@ extern "C" {
/**
* @brief Macro for enabling a specific IRQ.
*
* @param irq_number IRQ number.
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_ENABLE(irq_number) irq_enable(irq_number)
/**
* @brief Macro for checking if a specific IRQ is enabled.
*
* @param irq_number IRQ number.
* @param irq_number IRQ number.
*
* @retval true If the IRQ is enabled.
* @retval false Otherwise.
@ -98,21 +98,21 @@ extern "C" {
/**
* @brief Macro for disabling a specific IRQ.
*
* @param irq_number IRQ number.
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_DISABLE(irq_number) irq_disable(irq_number)
/**
* @brief Macro for setting a specific IRQ as pending.
*
* @param irq_number IRQ number.
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_PENDING_SET(irq_number) NVIC_SetPendingIRQ(irq_number)
/**
* @brief Macro for clearing the pending status of a specific IRQ.
*
* @param irq_number IRQ number.
* @param irq_number IRQ number.
*/
#define NRFX_IRQ_PENDING_CLEAR(irq_number) NVIC_ClearPendingIRQ(irq_number)
@ -124,20 +124,24 @@ extern "C" {
*/
#define NRFX_IRQ_IS_PENDING(irq_number) (NVIC_GetPendingIRQ(irq_number) == 1)
/**
* @brief Macro for entering into a critical section.
*/
/** @brief Macro for entering into a critical section. */
#define NRFX_CRITICAL_SECTION_ENTER() { unsigned int irq_lock_key = irq_lock();
/**
* @brief Macro for exiting from a critical section.
*/
/** @brief Macro for exiting from a critical section. */
#define NRFX_CRITICAL_SECTION_EXIT() irq_unlock(irq_lock_key); }
//------------------------------------------------------------------------------
#include <kernel.h>
/**
* @brief When set to a non-zero value, this macro specifies that
* @ref nrfx_coredep_delay_us uses a precise DWT-based solution.
* A compilation error is generated if the DWT unit is not present
* in the SoC used.
*/
#define NRFX_DELAY_DWT_BASED 0
/**
* @brief Macro for delaying the code execution for at least the specified time.
*
@ -149,16 +153,14 @@ extern "C" {
#include <atomic.h>
/**
* @brief Atomic 32-bit unsigned type.
*/
/** @brief Atomic 32-bit unsigned type. */
#define nrfx_atomic_t atomic_t
/**
* @brief Macro for storing a value to an atomic object and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value to store.
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value to store.
*
* @return Previous value of the atomic object.
*/
@ -167,8 +169,8 @@ extern "C" {
/**
* @brief Macro for running a bitwise OR operation on an atomic object and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the OR operation.
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the OR operation.
*
* @return Previous value of the atomic object.
*/
@ -178,8 +180,8 @@ extern "C" {
* @brief Macro for running a bitwise AND operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the AND operation.
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the AND operation.
*
* @return Previous value of the atomic object.
*/
@ -189,8 +191,8 @@ extern "C" {
* @brief Macro for running a bitwise XOR operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the XOR operation.
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the XOR operation.
*
* @return Previous value of the atomic object.
*/
@ -200,8 +202,8 @@ extern "C" {
* @brief Macro for running an addition operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the ADD operation.
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the ADD operation.
*
* @return Previous value of the atomic object.
*/
@ -211,8 +213,8 @@ extern "C" {
* @brief Macro for running a subtraction operation on an atomic object
* and returning its previous value.
*
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the SUB operation.
* @param[in] p_data Atomic memory pointer.
* @param[in] value Value of the second operand in the SUB operation.
*
* @return Previous value of the atomic object.
*/
@ -230,34 +232,22 @@ extern "C" {
//------------------------------------------------------------------------------
/**
* @brief Bitmask defining DPPI channels reserved to be used outside of nrfx.
*/
/** @brief Bitmask that defines DPPI channels that are reserved for use outside of the nrfx library. */
#define NRFX_DPPI_CHANNELS_USED 0
/**
* @brief Bitmask defining DPPI groups reserved to be used outside of nrfx.
*/
/** @brief Bitmask that defines DPPI groups that are reserved for use outside of the nrfx library. */
#define NRFX_DPPI_GROUPS_USED 0
/**
* @brief Bitmask defining PPI channels reserved to be used outside of nrfx.
*/
/** @brief Bitmask that defines PPI channels that are reserved for use outside of the nrfx library. */
#define NRFX_PPI_CHANNELS_USED 0
/**
* @brief Bitmask defining PPI groups reserved to be used outside of nrfx.
*/
/** @brief Bitmask that defines PPI groups that are reserved for use outside of the nrfx library. */
#define NRFX_PPI_GROUPS_USED 0
/**
* @brief Bitmask defining SWI instances reserved to be used outside of nrfx.
*/
/** @brief Bitmask that defines SWI instances that are reserved for use outside of the nrfx library. */
#define NRFX_SWI_USED 0
/**
* @brief Bitmask defining TIMER instances reserved to be used outside of nrfx.
*/
/** @brief Bitmask that defines TIMER instances that are reserved for use outside of the nrfx library. */
#define NRFX_TIMERS_USED 0
//------------------------------------------------------------------------------

20
ext/hal/nordic/nrfx_log.h
View file

@ -1,5 +1,5 @@
/**
* Copyright (c) 2017 - 2018, Nordic Semiconductor ASA
/*
* Copyright (c) 2017 - 2019, Nordic Semiconductor ASA
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@ -48,32 +48,32 @@ extern "C" {
/**
* @brief Macro for logging a message with the severity level ERROR.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_ERROR(format, ...)
/**
* @brief Macro for logging a message with the severity level WARNING.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_WARNING(format, ...)
/**
* @brief Macro for logging a message with the severity level INFO.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_INFO(format, ...)
/**
* @brief Macro for logging a message with the severity level DEBUG.
*
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
* @param format printf-style format string, optionally followed by arguments
* to be formatted and inserted in the resulting string.
*/
#define NRFX_LOG_DEBUG(format, ...)