michaelh/zephyr
1
0
Fork 0
Code Releases Activity

soc: add DTS PIO module nodes for sam3x series

Browse source 
This commit adds DTS PIO nodes for sam3x series SoCs.

Signed-off-by: Piotr Mienkowski <piotr.mienkowski@gmail.com>
This commit is contained in:
Piotr Mienkowski 2019-09-10 08:13:05 +02:00 • committed by Kumar Gala
commit c249782bbc
2 changed files with 76 additions and 0 deletions
Download patch file Download diff file Expand all files Collapse all files

50
dts/arm/atmel/sam3x.dtsi
View file

@ -108,6 +108,56 @@
status = "disabled"; status = "disabled";
label = "USART_3"; label = "USART_3";
}; };
pioa: pio@400e0e00 {
compatible = "atmel,sam-gpio";
reg = <0x400e0e00 0x190>;
interrupts = <11 1>;
peripheral-id = <11>;
label = "PIO_A";
gpio-controller;
#gpio-cells = <2>;
};
piob: pio@400e1000 {
compatible = "atmel,sam-gpio";
reg = <0x400e1000 0x190>;
interrupts = <12 1>;
peripheral-id = <12>;
label = "PIO_B";
gpio-controller;
#gpio-cells = <2>;
};
pioc: pio@400e1200 {
compatible = "atmel,sam-gpio";
reg = <0x400e1200 0x190>;
interrupts = <13 1>;
peripheral-id = <13>;
label = "PIO_C";
gpio-controller;
#gpio-cells = <2>;
};
piod: pio@400e1400 {
compatible = "atmel,sam-gpio";
reg = <0x400e1400 0x190>;
interrupts = <14 1>;
peripheral-id = <14>;
label = "PIO_D";
gpio-controller;
#gpio-cells = <2>;
};
pioe: pio@400e1600 {
compatible = "atmel,sam-gpio";
reg = <0x400e1600 0x190>;
interrupts = <15 1>;
peripheral-id = <15>;
label = "PIO_E";
gpio-controller;
#gpio-cells = <2>;
};
}; };
}; };

26
soc/arm/atmel_sam/sam3x/dts_fixup.h
View file

@ -10,6 +10,32 @@
#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS #define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
#define DT_GPIO_SAM_PORTA_LABEL DT_ATMEL_SAM_GPIO_400E0E00_LABEL
#define DT_GPIO_SAM_PORTA_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E0E00_BASE_ADDRESS
#define DT_GPIO_SAM_PORTA_IRQ DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0
#define DT_GPIO_SAM_PORTA_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E0E00_IRQ_0_PRIORITY
#define DT_GPIO_SAM_PORTA_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E0E00_PERIPHERAL_ID
#define DT_GPIO_SAM_PORTB_LABEL DT_ATMEL_SAM_GPIO_400E1000_LABEL
#define DT_GPIO_SAM_PORTB_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1000_BASE_ADDRESS
#define DT_GPIO_SAM_PORTB_IRQ DT_ATMEL_SAM_GPIO_400E1000_IRQ_0
#define DT_GPIO_SAM_PORTB_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1000_IRQ_0_PRIORITY
#define DT_GPIO_SAM_PORTB_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1000_PERIPHERAL_ID
#define DT_GPIO_SAM_PORTC_LABEL DT_ATMEL_SAM_GPIO_400E1200_LABEL
#define DT_GPIO_SAM_PORTC_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1200_BASE_ADDRESS
#define DT_GPIO_SAM_PORTC_IRQ DT_ATMEL_SAM_GPIO_400E1200_IRQ_0
#define DT_GPIO_SAM_PORTC_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1200_IRQ_0_PRIORITY
#define DT_GPIO_SAM_PORTC_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1200_PERIPHERAL_ID
#define DT_GPIO_SAM_PORTD_LABEL DT_ATMEL_SAM_GPIO_400E1400_LABEL
#define DT_GPIO_SAM_PORTD_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1400_BASE_ADDRESS
#define DT_GPIO_SAM_PORTD_IRQ DT_ATMEL_SAM_GPIO_400E1400_IRQ_0
#define DT_GPIO_SAM_PORTD_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1400_IRQ_0_PRIORITY
#define DT_GPIO_SAM_PORTD_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1400_PERIPHERAL_ID
#define DT_GPIO_SAM_PORTE_LABEL DT_ATMEL_SAM_GPIO_400E1600_LABEL
#define DT_GPIO_SAM_PORTE_BASE_ADDRESS DT_ATMEL_SAM_GPIO_400E1600_BASE_ADDRESS
#define DT_GPIO_SAM_PORTE_IRQ DT_ATMEL_SAM_GPIO_400E1600_IRQ_0
#define DT_GPIO_SAM_PORTE_IRQ_PRIO DT_ATMEL_SAM_GPIO_400E1600_IRQ_0_PRIORITY
#define DT_GPIO_SAM_PORTE_PERIPHERAL_ID DT_ATMEL_SAM_GPIO_400E1600_PERIPHERAL_ID
#define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4008C000_BASE_ADDRESS #define DT_I2C_0_BASE_ADDRESS DT_ATMEL_SAM_I2C_TWI_4008C000_BASE_ADDRESS
#define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL #define CONFIG_I2C_0_NAME DT_ATMEL_SAM_I2C_TWI_4008C000_LABEL
#define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY #define DT_I2C_0_BITRATE DT_ATMEL_SAM_I2C_TWI_4008C000_CLOCK_FREQUENCY