From c180e059bf3766424a612c69f2edfbfd21be2889 Mon Sep 17 00:00:00 2001 From: Alexander Wachter Date: Fri, 8 Nov 2019 14:57:59 +0100 Subject: [PATCH] soc: stm32f103Xb: Enable CAN support for this SoC This commit enables CAN on the STM32F103Xb SoC series. Signed-off-by: Alexander Wachter --- drivers/pinmux/stm32/pinmux_stm32f1.h | 3 +++ dts/arm/st/f1/stm32f103Xb.dtsi | 12 ++++++++++++ include/dt-bindings/pinctrl/stm32-pinctrlf1.h | 2 ++ soc/arm/st_stm32/stm32f1/dts_fixup.h | 16 ++++++++++++++++ 4 files changed, 33 insertions(+) diff --git a/drivers/pinmux/stm32/pinmux_stm32f1.h b/drivers/pinmux/stm32/pinmux_stm32f1.h index 5c2a4004a72..e9a75ff53b8 100644 --- a/drivers/pinmux/stm32/pinmux_stm32f1.h +++ b/drivers/pinmux/stm32/pinmux_stm32f1.h @@ -104,4 +104,7 @@ #define STM32F1_PINMUX_FUNC_PB0_ADC12_IN8 STM32_CNF_IN_ANALOG #define STM32F1_PINMUX_FUNC_PB1_ADC12_IN9 STM32_CNF_IN_ANALOG +#define STM32F1_PINMUX_FUNC_PB8_CAN_RX STM32_PIN_CAN_RX +#define STM32F1_PINMUX_FUNC_PB9_CAN_TX STM32_PIN_CAN_TX + #endif /* ZEPHYR_DRIVERS_PINMUX_STM32_PINMUX_STM32F1_H_ */ diff --git a/dts/arm/st/f1/stm32f103Xb.dtsi b/dts/arm/st/f1/stm32f103Xb.dtsi index 68f0f87cd0c..78d8890dc91 100644 --- a/dts/arm/st/f1/stm32f103Xb.dtsi +++ b/dts/arm/st/f1/stm32f103Xb.dtsi @@ -45,6 +45,18 @@ clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00800000>; label= "USB"; }; + + can1: can@40006400 { + compatible = "st,stm32-can"; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40006400 0x400>; + interrupts = <19 0>, <20 0>, <21 0>, <22 0>; + interrupt-names = "TX", "RX0", "RX1", "SCE"; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; + status = "disabled"; + label = "CAN_1"; + }; }; usb_fs_phy: usbphy { diff --git a/include/dt-bindings/pinctrl/stm32-pinctrlf1.h b/include/dt-bindings/pinctrl/stm32-pinctrlf1.h index 39dc5ae53ac..5ff7078d11e 100644 --- a/include/dt-bindings/pinctrl/stm32-pinctrlf1.h +++ b/include/dt-bindings/pinctrl/stm32-pinctrlf1.h @@ -85,6 +85,8 @@ #define STM32_PIN_SPI_SLAVE_MOSI (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT) #define STM32_PIN_SPI_MASTER_MISO (STM32_MODE_INPUT | STM32_CNF_IN_FLOAT) #define STM32_PIN_SPI_SLAVE_MISO (STM32_MODE_OUTPUT | STM32_CNF_ALT_FUNC | STM32_CNF_PUSH_PULL) +#define STM32_PIN_CAN_TX (STM32_MODE_OUTPUT | STM32_CNF_ALT_FUNC | STM32_CNF_PUSH_PULL) +#define STM32_PIN_CAN_RX (STM32_MODE_INPUT | STM32_PUPD_PULL_UP) /* * Reference manual (RM0008) diff --git a/soc/arm/st_stm32/stm32f1/dts_fixup.h b/soc/arm/st_stm32/stm32f1/dts_fixup.h index 9f4bb932552..7238498268d 100644 --- a/soc/arm/st_stm32/stm32f1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32f1/dts_fixup.h @@ -225,4 +225,20 @@ #define DT_ADC_1_CLOCK_BITS DT_ST_STM32_ADC_40012400_CLOCK_BITS_0 #define DT_ADC_1_CLOCK_BUS DT_ST_STM32_ADC_40012400_CLOCK_BUS_0 + +#define DT_CAN_1_BASE_ADDRESS DT_ST_STM32_CAN_40006400_BASE_ADDRESS +#define DT_CAN_1_BUS_SPEED DT_ST_STM32_CAN_40006400_BUS_SPEED +#define DT_CAN_1_NAME DT_ST_STM32_CAN_40006400_LABEL +#define DT_CAN_1_IRQ_TX DT_ST_STM32_CAN_40006400_IRQ_TX +#define DT_CAN_1_IRQ_RX0 DT_ST_STM32_CAN_40006400_IRQ_RX0 +#define DT_CAN_1_IRQ_RX1 DT_ST_STM32_CAN_40006400_IRQ_RX1 +#define DT_CAN_1_IRQ_SCE DT_ST_STM32_CAN_40006400_IRQ_SCE +#define DT_CAN_1_IRQ_PRIORITY DT_ST_STM32_CAN_40006400_IRQ_0_PRIORITY +#define DT_CAN_1_SJW DT_ST_STM32_CAN_40006400_SJW +#define DT_CAN_1_PROP_SEG DT_ST_STM32_CAN_40006400_PROP_SEG +#define DT_CAN_1_PHASE_SEG1 DT_ST_STM32_CAN_40006400_PHASE_SEG1 +#define DT_CAN_1_PHASE_SEG2 DT_ST_STM32_CAN_40006400_PHASE_SEG2 +#define DT_CAN_1_CLOCK_BUS DT_ST_STM32_CAN_40006400_CLOCK_BUS +#define DT_CAN_1_CLOCK_BITS DT_ST_STM32_CAN_40006400_CLOCK_BITS + /* End of SoC Level DTS fixup file */