debug: coredump: add xtensa coredump

Adds Xtensa as supported architecture for coredump. Fixes
a few typos in documentation, Kconfig and a C file. Dumps
minimal set of registers shown by 'info registers' in GDB
for the sample_controller and ESP32 SOCs. Updates tests.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
This commit is contained in:
Lauren Murphy 2021-10-20 20:53:04 -05:00 committed by Anas Nashif
commit c1711997bc
9 changed files with 174 additions and 12 deletions

View file

@ -78,6 +78,7 @@ enum coredump_tgt_code {
COREDUMP_TGT_X86_64,
COREDUMP_TGT_ARM_CORTEX_M,
COREDUMP_TGT_RISC_V,
COREDUMP_TGT_XTENSA,
};
/* Coredump header */