x86: use z_bss_zero and z_data_copy
Instead of doing these in assembly, use the common z_bss_zero() and z_data_copy() C functions instead. This simplifies code a bit and we won't miss any additions to these two functions (if any) under x86 in the future (as x86_64 was actually not clearing gcov bss area). Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung
Anas Nashif
parent
dd98de880a
commit
c0ee8c4a43
3 changed files with 19 additions and 115 deletions
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@ -25,6 +25,8 @@
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/* externs */
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GTEXT(z_x86_prep_c)
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GTEXT(z_bss_zero)
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GTEXT(z_data_copy)
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GDATA(_idt_base_address)
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GDATA(z_interrupt_stacks)
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@ -152,42 +154,17 @@ __csSet:
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addl $CONFIG_ISR_STACK_SIZE, %esp
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#endif
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/* Clear BSS */
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call z_bss_zero
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#ifdef CONFIG_XIP
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/*
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* copy DATA section from ROM to RAM region
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* DATA is followed by BSS section.
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*/
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movl $__data_ram_start, %edi /* DATA in RAM (dest) */
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movl $__data_rom_start, %esi /* DATA in ROM (src) */
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movl $__data_num_words, %ecx /* Size of DATA in quad bytes */
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call _x86_data_copy
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#ifdef CONFIG_USERSPACE
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movl $_app_smem_start, %edi /* DATA in RAM (dest) */
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movl $_app_smem_rom_start, %esi /* DATA in ROM (src) */
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movl $_app_smem_num_words, %ecx /* Size of DATA in quad bytes */
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call _x86_data_copy
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#endif /* CONFIG_USERSPACE */
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#endif /* CONFIG_XIP */
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/*
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* Clear BSS: bzero (__bss_start, __bss_num_words*4)
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/* Copy data from flash to RAM.
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*
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* It's assumed that BSS size will be a multiple of a long (4 bytes),
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* and aligned on a double word (32-bit) boundary
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* This is a must is CONFIG_GDT_DYNAMIC is enabled,
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* as _gdt needs to be in RAM.
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*/
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movl $__bss_start, %edi /* load BSS start address */
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movl $__bss_num_words, %ecx /* number of quad bytes in .bss */
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call _x86_bss_zero
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#ifdef CONFIG_COVERAGE_GCOV
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movl $__gcov_bss_start, %edi /* load gcov BSS start address */
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movl $__gcov_bss_num_words, %ecx /* number of quad bytes */
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call _x86_bss_zero
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#endif /* CONFIG_COVERAGE_GCOV */
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call z_data_copy
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#endif
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#ifdef CONFIG_GDT_DYNAMIC
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/* activate RAM-based Global Descriptor Table (GDT) */
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@ -227,70 +204,6 @@ __csSet:
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pushl %ebx /* pointer to multiboot info, or NULL */
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call z_x86_prep_c /* enter kernel; never returns */
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_x86_bss_zero:
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/* ECX = size, EDI = starting address */
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#ifdef CONFIG_X86_SSE
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/* use XMM register to clear 16 bytes at a time */
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pxor %xmm0, %xmm0 /* zero out xmm0 register */
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movl %ecx, %edx /* make a copy of # quad bytes */
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shrl $2, %ecx /* How many multiples of 16 byte ? */
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je bssWords
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bssDQ:
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movdqu %xmm0, (%edi) /* zero 16 bytes... */
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addl $16, %edi
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loop bssDQ
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/* fall through to handle the remaining double words (32-bit chunks) */
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bssWords:
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xorl %eax, %eax /* fill memory with 0 */
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movl %edx, %ecx /* move # quad bytes into ECX (for rep) */
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andl $0x3, %ecx /* only need to zero at most 3 quad bytes */
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cld
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rep
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stosl /* zero memory per 4 bytes */
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#else /* !CONFIG_X86_SSE */
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/* clear out BSS double words (32-bits at a time) */
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xorl %eax, %eax /* fill memory with 0 */
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cld
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rep
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stosl /* zero memory per 4 bytes */
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#endif /* CONFIG_X86_SSE */
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ret
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#ifdef CONFIG_XIP
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_x86_data_copy:
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/* EDI = dest, ESI = source, ECX = size in 32-bit chunks */
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#ifdef CONFIG_X86_SSE
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/* copy 16 bytes at a time using XMM until < 16 bytes remain */
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movl %ecx ,%edx /* save number of quad bytes */
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shrl $2, %ecx /* How many 16 bytes? */
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je dataWords
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dataDQ:
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movdqu (%esi), %xmm0
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movdqu %xmm0, (%edi)
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addl $16, %esi
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addl $16, %edi
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loop dataDQ
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dataWords:
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movl %edx, %ecx /* restore # quad bytes */
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andl $0x3, %ecx /* only need to copy at most 3 quad bytes */
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#endif /* CONFIG_X86_SSE */
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rep
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movsl /* copy data 4 bytes at a time */
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ret
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#endif /* CONFIG_XIP */
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#if defined(CONFIG_X86_SSE)
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/* SSE control & status register initial value */
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@ -163,19 +163,18 @@ FUNC_NORETURN void z_x86_cpu_init(struct x86_cpuboot *cpuboot)
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{
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x86_sse_init(NULL);
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#if CONFIG_MP_NUM_CPUS > 1
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/* The internal cpu_number is the index to x86_cpuboot[] */
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unsigned char cpu_num = (unsigned char)(cpuboot - x86_cpuboot);
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if (cpu_num > 0) {
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/*
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* For CPU #0, z_loapic_enable(0) will be done
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* inside z_x86_prep_c() so there is no need to do it
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* here.
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*/
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z_loapic_enable(cpu_num);
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}
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if (cpu_num == 0) {
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/* Only need to do these once per boot */
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z_bss_zero();
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#ifdef CONFIG_XIP
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z_data_copy();
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#endif
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}
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z_loapic_enable(cpu_num);
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#ifdef CONFIG_USERSPACE
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/* Set landing site for 'syscall' instruction */
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@ -148,16 +148,8 @@ __start:
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/*
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* N.B.: if multiboot info struct is present, "common.S"
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* has left a pointer to it in EBX. do not clobber (yet).
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*
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* next, clear the BSS. note we're still in 32-bit mode,
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* so the BSS must fit entirely in the first 4GB of RAM.
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* has left a pointer to it in EBX.
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*/
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cld
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xorl %eax, %eax
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movl $__bss_start, %edi
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movl $__bss_num_dwords, %ecx
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rep stosl
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movl $x86_cpuboot, %ebp /* BSP is always logical CPU id 0 */
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movl %ebx, __x86_cpuboot_t_arg_OFFSET(%ebp) /* multiboot info */
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