arch: arm: aarch32: Change CPU_CORTEX_R kconfig option
Change the CPU_CORTEX_R kconfig option to CPU_AARCH32_CORTEX_R to distinguish the armv7 version from the armv8 version of Cortex-R. Signed-off-by: Bradley Bolen <bbolen@lexmark.com>
This commit is contained in:
parent
3b51f9b9e8
commit
c0dd594d4d
38 changed files with 119 additions and 119 deletions
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@ -33,7 +33,7 @@ config ARM
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# FIXME: current state of the code for all ARM requires this, but
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# is really only necessary for Cortex-M with ARM MPU!
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select GEN_PRIV_STACKS
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select ARCH_HAS_THREAD_LOCAL_STORAGE if CPU_CORTEX_R || CPU_CORTEX_M
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select ARCH_HAS_THREAD_LOCAL_STORAGE if CPU_AARCH32_CORTEX_R || CPU_CORTEX_M
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help
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ARM architecture
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@ -29,7 +29,7 @@ add_subdirectory_ifdef(CONFIG_ARM_NONSECURE_FIRMWARE cortex_m/tz)
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add_subdirectory_ifdef(CONFIG_ARM_MPU mpu)
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add_subdirectory_ifdef(CONFIG_ARM_AARCH32_MMU mmu)
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add_subdirectory_ifdef(CONFIG_CPU_CORTEX_R cortex_a_r)
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add_subdirectory_ifdef(CONFIG_CPU_AARCH32_CORTEX_R cortex_a_r)
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add_subdirectory_ifdef(CONFIG_CPU_AARCH32_CORTEX_A cortex_a_r)
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zephyr_linker_sources(ROM_START SORT_KEY 0x0vectors vector_table.ld)
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@ -25,7 +25,7 @@ config CPU_CORTEX_M
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help
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This option signifies the use of a CPU of the Cortex-M family.
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config CPU_CORTEX_R
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config CPU_AARCH32_CORTEX_R
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bool
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select CPU_CORTEX
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select HAS_CMSIS_CORE
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@ -7,11 +7,11 @@
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# SPDX-License-Identifier: Apache-2.0
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# NOTE: We have the specific core implementations first and outside of the
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# if CPU_AARCH32_CORTEX_A / if CPU_CORTEX_R block so that SoCs can select
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# which core they are using without having to select all the options related
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# to that core. Everything else is captured inside the if CPU_CORTEX_A / if
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# CPU_CORTEX_R blocks so they are not exposed if one selects a different ARM
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# Cortex Family (Cortex-M).
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# if CPU_AARCH32_CORTEX_A / if CPU_AARCH32_CORTEX_R block so that SoCs can
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# select which core they are using without having to select all the options
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# related to that core. Everything else is captured inside the if
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# CPU_AARCH32_CORTEX_A / if CPU_AARCH32_CORTEX_R blocks so they are not
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# exposed if one selects a different ARM Cortex Family (Cortex-M).
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config CPU_CORTEX_A9
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bool
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@ -65,7 +65,7 @@ endif # CPU_AARCH32_CORTEX_A
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config CPU_CORTEX_R4
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bool
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select CPU_CORTEX_R
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select CPU_AARCH32_CORTEX_R
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select ARMV7_R
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select ARMV7_R_FP if CPU_HAS_FPU
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help
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@ -73,7 +73,7 @@ config CPU_CORTEX_R4
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config CPU_CORTEX_R5
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bool
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select CPU_CORTEX_R
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select CPU_AARCH32_CORTEX_R
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select ARMV7_R
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select ARMV7_R_FP if CPU_HAS_FPU
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help
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@ -81,13 +81,13 @@ config CPU_CORTEX_R5
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config CPU_CORTEX_R7
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bool
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select CPU_CORTEX_R
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select CPU_AARCH32_CORTEX_R
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select ARMV7_R
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select ARMV7_R_FP if CPU_HAS_FPU
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help
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This option signifies the use of a Cortex-R7 CPU
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if CPU_CORTEX_R
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if CPU_AARCH32_CORTEX_R
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config ARMV7_R
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bool
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@ -150,4 +150,4 @@ config DISABLE_TCM_ECC
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help
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This option disables ECC checks on Tightly Coupled Memory.
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endif # CPU_CORTEX_R
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endif # CPU_AARCH32_CORTEX_R
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@ -19,7 +19,7 @@
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#if defined(CONFIG_CPU_CORTEX_M)
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#include <arch/arm/aarch32/cortex_m/cmsis.h>
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_A) \
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|| defined(CONFIG_CPU_CORTEX_R)
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|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
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#include <drivers/interrupt_controller/gic.h>
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#endif
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#include <sys/__assert.h>
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@ -92,7 +92,7 @@ void z_arm_irq_priority_set(unsigned int irq, unsigned int prio, uint32_t flags)
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}
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_A) \
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|| defined(CONFIG_CPU_CORTEX_R)
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|| defined(CONFIG_CPU_AARCH32_CORTEX_R)
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/*
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* For Cortex-A and Cortex-R cores, the default interrupt controller is the ARM
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* Generic Interrupt Controller (GIC) and therefore the architecture interrupt
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@ -47,7 +47,7 @@ SECTION_FUNC(TEXT, _isr_wrapper)
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#if defined(CONFIG_CPU_CORTEX_M)
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push {r0,lr} /* r0, lr are now the first items on the stack */
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#if defined(CONFIG_USERSPACE)
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/* See comment below about svc stack usage */
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@ -190,7 +190,7 @@ _idle_state_cleared:
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sub r0, r0, #16 /* get IRQ number */
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lsl r0, r0, #3 /* table is 8-byte wide */
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#endif /* CONFIG_ARMV6_M_ARMV8_M_BASELINE */
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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/* Get active IRQ number from the interrupt controller */
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#if !defined(CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER)
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bl arm_gic_get_active
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@ -232,7 +232,7 @@ _idle_state_cleared:
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ldm r1!,{r0,r3} /* arg in r0, ISR in r3 */
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blx r3 /* call ISR */
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#if defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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spurious_continue:
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/* Signal end-of-interrupt */
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pop {r0, r1}
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@ -241,7 +241,7 @@ spurious_continue:
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#else
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bl z_soc_irq_eoi
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#endif /* !CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER */
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#endif /* CONFIG_CPU_CORTEX_R || CONFIG_CPU_AARCH32_CORTEX_A */
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#endif /* CONFIG_CPU_AARCH32_CORTEX_R || CONFIG_CPU_AARCH32_CORTEX_A */
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#ifdef CONFIG_TRACING_ISR
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bl sys_trace_isr_exit
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@ -6,7 +6,7 @@ zephyr_library_sources( arm_core_mpu.c)
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zephyr_library_sources_ifdef(CONFIG_CPU_HAS_ARM_MPU arm_mpu.c)
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zephyr_library_sources_ifdef(CONFIG_CPU_HAS_NXP_MPU nxp_mpu.c)
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if (CONFIG_CPU_CORTEX_R)
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if (CONFIG_CPU_AARCH32_CORTEX_R)
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zephyr_library_include_directories(cortex_a_r)
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elseif (CONFIG_CPU_CORTEX_M)
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zephyr_library_include_directories(cortex_m)
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@ -44,7 +44,7 @@ static uint8_t static_regions_num;
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defined(CONFIG_CPU_CORTEX_M3) || \
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defined(CONFIG_CPU_CORTEX_M4) || \
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defined(CONFIG_CPU_CORTEX_M7) || \
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defined(CONFIG_CPU_CORTEX_R)
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defined(CONFIG_CPU_AARCH32_CORTEX_R)
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#include "arm_mpu_v7_internal.h"
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#elif defined(CONFIG_CPU_CORTEX_M23) || \
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defined(CONFIG_CPU_CORTEX_M33) || \
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@ -85,7 +85,7 @@ static int mpu_configure_region(const uint8_t index,
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/* Populate internal ARM MPU region configuration structure. */
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region_conf.base = new_region->start;
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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region_conf.size = size_to_mpu_rasr_size(new_region->size);
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#endif
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get_region_attr_from_mpu_partition_info(®ion_conf.attr,
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@ -138,7 +138,7 @@ static int mpu_configure_regions(const struct z_arm_mpu_partition
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/* ARM Core MPU Driver API Implementation for ARM MPU */
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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/**
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* @brief enable the MPU by setting bit in SCTRL register
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*/
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@ -33,7 +33,7 @@ static void region_init(const uint32_t index,
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set_region_number(index);
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/* Configure the region */
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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/*
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* Clear size register, which disables the entry. It cannot be
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* enabled as we reconfigure it.
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@ -119,7 +119,7 @@ static inline void get_region_attr_from_mpu_partition_info(
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*/
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(void) base;
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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(void) size;
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p_attr->rasr = attr->rasr_attr;
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@ -42,7 +42,7 @@ int arch_swap(unsigned int key)
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/* clear mask or enable all irqs to take a pendsv */
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irq_unlock(0);
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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z_arm_cortex_r_svc();
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irq_unlock(key);
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#endif
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@ -184,7 +184,7 @@ out_fp_endif:
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adds r4, r2, r4
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ldr r0, [r4]
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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/* Store TLS pointer in the "Process ID" register.
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* This register is used as a base pointer to all
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* thread variables with offsets added by toolchain.
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@ -267,7 +267,7 @@ FUNC_NORETURN void arch_user_mode_enter(k_thread_entry_t user_entry,
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#endif /* CONFIG_FPU && CONFIG_FPU_SHARING */
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#endif /* CONFIG_MPU_STACK_GUARD */
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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_current->arch.priv_stack_end =
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_current->arch.priv_stack_start + CONFIG_PRIVILEGED_STACK_SIZE;
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#endif
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@ -40,7 +40,7 @@ GEN_OFFSET_SYM(_thread_arch_t, mode_exc_return);
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#endif
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#if defined(CONFIG_USERSPACE)
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GEN_OFFSET_SYM(_thread_arch_t, priv_stack_start);
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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GEN_OFFSET_SYM(_thread_arch_t, priv_stack_end);
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GEN_OFFSET_SYM(_thread_arch_t, sp_usr);
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#endif
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@ -40,7 +40,7 @@
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#define _thread_offset_to_priv_stack_start \
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(___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_start_OFFSET)
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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#define _thread_offset_to_priv_stack_end \
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(___thread_t_arch_OFFSET + ___thread_arch_t_priv_stack_end_OFFSET)
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@ -27,7 +27,7 @@
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#if defined(CONFIG_CPU_CORTEX_M)
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#include <aarch32/cortex_m/stack.h>
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#include <aarch32/cortex_m/exc.h>
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#include <aarch32/cortex_a_r/stack.h>
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#include <aarch32/cortex_a_r/exc.h>
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#endif
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@ -37,7 +37,7 @@
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#include <arch/arm/aarch32/cortex_m/cpu.h>
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#include <arch/arm/aarch32/cortex_m/memory_map.h>
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#include <arch/common/sys_io.h>
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#include <arch/arm/aarch32/cortex_a_r/cpu.h>
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#include <arch/arm/aarch32/cortex_a_r/sys_io.h>
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#include <arch/arm/aarch32/cortex_a_r/timer.h>
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@ -22,7 +22,7 @@
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#include <arch/arm/aarch32/exc.h>
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#include <irq.h>
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#if defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#include <arch/arm/aarch32/cortex_a_r/cpu.h>
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#endif
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@ -10,7 +10,7 @@
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defined(CONFIG_CPU_CORTEX_M3) || \
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defined(CONFIG_CPU_CORTEX_M4) || \
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defined(CONFIG_CPU_CORTEX_M7) || \
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defined(CONFIG_CPU_CORTEX_R)
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defined(CONFIG_CPU_AARCH32_CORTEX_R)
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#include <arch/arm/aarch32/mpu/arm_mpu_v7m.h>
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#elif defined(CONFIG_CPU_CORTEX_M23) || \
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defined(CONFIG_CPU_CORTEX_M33) || \
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@ -28,7 +28,7 @@ struct arm_mpu_region {
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uint32_t base;
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/* Region Name */
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const char *name;
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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/* Region Size */
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uint32_t size;
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#endif
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const struct arm_mpu_region *mpu_regions;
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};
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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#define MPU_REGION_ENTRY(_name, _base, _size, _attr) \
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{\
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.name = _name, \
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@ -121,7 +121,7 @@ struct _thread_arch {
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#if defined(CONFIG_USERSPACE)
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uint32_t priv_stack_start;
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#if defined(CONFIG_CPU_CORTEX_R)
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#if defined(CONFIG_CPU_AARCH32_CORTEX_R)
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uint32_t priv_stack_end;
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uint32_t sp_usr;
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#endif
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@ -5,7 +5,7 @@ config HAS_CMSIS_CORE
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bool
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select HAS_CMSIS_CORE_A if CPU_CORTEX_A
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select HAS_CMSIS_CORE_A if CPU_AARCH32_CORTEX_A
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select HAS_CMSIS_CORE_R if CPU_CORTEX_R
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select HAS_CMSIS_CORE_R if CPU_AARCH32_CORTEX_R
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select HAS_CMSIS_CORE_M if CPU_CORTEX_M
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if HAS_CMSIS_CORE
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@ -30,7 +30,7 @@ static inline void timestamp_serialize(void)
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/* isb is available in all Cortex-M */
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__ISB();
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}
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#include <arch/arm/aarch32/cortex_a_r/cpu.h>
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static inline void timestamp_serialize(void)
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{
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@ -1,5 +1,5 @@
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tests:
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arch.arm.mem_protect.syscalls:
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arch_allow: arm
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filter: CONFIG_CPU_CORTEX_R and CONFIG_ARCH_HAS_USERSPACE
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filter: CONFIG_CPU_AARCH32_CORTEX_R and CONFIG_ARCH_HAS_USERSPACE
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tags: arm userspace
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@ -4,7 +4,7 @@ common:
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tests:
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benchmark.cmsis_dsp.basicmath:
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filter: (CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1
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filter: (CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1
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integration_platforms:
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- frdm_k64f
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- sam_e70_xplained
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@ -13,7 +13,7 @@ tests:
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min_flash: 128
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min_ram: 64
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benchmark.cmsis_dsp.basicmath.fpu:
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filter: (CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1
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filter: (CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1
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integration_platforms:
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- mps2_an521_remote
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tags: benchmark cmsis_dsp fpu
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@ -97,7 +97,7 @@ void entry_cpu_exception_extend(void *p1, void *p2, void *p3)
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#if defined(CONFIG_ARM64)
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__asm__ volatile ("svc 0");
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#elif defined(CONFIG_CPU_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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#elif defined(CONFIG_CPU_AARCH32_CORTEX_R) || defined(CONFIG_CPU_AARCH32_CORTEX_A)
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__asm__ volatile ("BKPT");
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#elif defined(CONFIG_CPU_CORTEX_M)
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__asm__ volatile ("swi 0");
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|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.basicmath:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.basicmath.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.bayes:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 64
|
||||
min_ram: 32
|
||||
libraries.cmsis_dsp.bayes.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.complexmath:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.complexmath.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.distance:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 64
|
||||
min_ram: 32
|
||||
libraries.cmsis_dsp.distance.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.fastmath:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.fastmath.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -5,11 +5,11 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.filtering:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
tags: cmsis_dsp
|
||||
skip: true
|
||||
libraries.cmsis_dsp.filtering.biquad:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -22,7 +22,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_FILTERING_BIQUAD=y
|
||||
libraries.cmsis_dsp.filtering.biquad.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -33,7 +33,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_FILTERING_BIQUAD=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.filtering.decim:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -46,7 +46,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_FILTERING_DECIM=y
|
||||
libraries.cmsis_dsp.filtering.decim.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -57,7 +57,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_FILTERING_DECIM=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.filtering.fir:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -70,7 +70,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_FILTERING_FIR=y
|
||||
libraries.cmsis_dsp.filtering.fir.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -81,7 +81,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_FILTERING_FIR=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.filtering.misc:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -94,7 +94,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_FILTERING_MISC=y
|
||||
libraries.cmsis_dsp.filtering.misc.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.interpolation:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.interpolation.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,11 +4,11 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.matrix:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
tags: cmsis_dsp
|
||||
skip: true
|
||||
libraries.cmsis_dsp.matrix.unary_q7:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -21,7 +21,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_Q7=y
|
||||
libraries.cmsis_dsp.matrix.unary_q7.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -32,7 +32,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_Q7=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.unary_q15:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -45,7 +45,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_Q15=y
|
||||
libraries.cmsis_dsp.matrix.unary_q15.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -56,7 +56,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_Q15=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.unary_q31:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -69,7 +69,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_Q31=y
|
||||
libraries.cmsis_dsp.matrix.unary_q31.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -80,7 +80,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_Q31=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.unary_f16:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -93,7 +93,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_F16=y
|
||||
libraries.cmsis_dsp.matrix.unary_f16.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -104,7 +104,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_F16=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.unary_f32:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -117,7 +117,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_F32=y
|
||||
libraries.cmsis_dsp.matrix.unary_f32.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -128,7 +128,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_F32=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.unary_f64:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -141,7 +141,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_F64=y
|
||||
libraries.cmsis_dsp.matrix.unary_f64.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -152,7 +152,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_UNARY_F64=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.binary_q7:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -166,7 +166,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_Q7=y
|
||||
libraries.cmsis_dsp.matrix.binary_q7.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -178,7 +178,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_Q7=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.binary_q15:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -192,7 +192,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_Q15=y
|
||||
libraries.cmsis_dsp.matrix.binary_q15.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -204,7 +204,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_Q15=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.binary_q31:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -218,7 +218,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_Q31=y
|
||||
libraries.cmsis_dsp.matrix.binary_q31.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -230,7 +230,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_Q31=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.binary_f16:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -243,7 +243,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_F16=y
|
||||
libraries.cmsis_dsp.matrix.binary_f16.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -254,7 +254,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_F16=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.binary_f32:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -268,7 +268,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_F32=y
|
||||
libraries.cmsis_dsp.matrix.binary_f32.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -280,7 +280,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_F32=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.matrix.binary_f64:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -294,7 +294,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_MATRIX_BINARY_F64=y
|
||||
libraries.cmsis_dsp.matrix.binary_f64.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.quaternionmath:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.quaternionmath.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.statistics:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.statistics.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.support:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.support.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,7 +4,7 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.svm:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -14,7 +14,7 @@ tests:
|
|||
min_flash: 128
|
||||
min_ram: 64
|
||||
libraries.cmsis_dsp.svm.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -4,11 +4,11 @@ common:
|
|||
|
||||
tests:
|
||||
libraries.cmsis_dsp.transform:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
tags: cmsis_dsp
|
||||
skip: true
|
||||
libraries.cmsis_dsp.transform.cq15:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -21,7 +21,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CQ15=y
|
||||
libraries.cmsis_dsp.transform.cq15.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -32,7 +32,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CQ15=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.rq15:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -45,7 +45,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RQ15=y
|
||||
libraries.cmsis_dsp.transform.rq15.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -56,7 +56,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RQ15=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.cq31:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -69,7 +69,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CQ31=y
|
||||
libraries.cmsis_dsp.transform.cq31.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -80,7 +80,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CQ31=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.rq31:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -93,7 +93,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RQ31=y
|
||||
libraries.cmsis_dsp.transform.rq31.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -104,7 +104,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RQ31=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.cf16:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -117,7 +117,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CF16=y
|
||||
libraries.cmsis_dsp.transform.cf16.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -128,7 +128,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CF16=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.rf16:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -141,7 +141,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RF16=y
|
||||
libraries.cmsis_dsp.transform.rf16.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -152,7 +152,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RF16=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.cf32:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -165,7 +165,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CF32=y
|
||||
libraries.cmsis_dsp.transform.cf32.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -176,7 +176,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CF32=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.rf32:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -189,7 +189,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RF32=y
|
||||
libraries.cmsis_dsp.transform.rf32.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -200,7 +200,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RF32=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.cf64:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -213,7 +213,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CF64=y
|
||||
libraries.cmsis_dsp.transform.cf64.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
@ -224,7 +224,7 @@ tests:
|
|||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_CF64=y
|
||||
- CONFIG_FPU=y
|
||||
libraries.cmsis_dsp.transform.rf64:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- frdm_k64f
|
||||
- sam_e70_xplained
|
||||
|
@ -237,7 +237,7 @@ tests:
|
|||
extra_configs:
|
||||
- CONFIG_CMSIS_DSP_TEST_TRANSFORM_RF64=y
|
||||
libraries.cmsis_dsp.transform.rf64.fpu:
|
||||
filter: ((CONFIG_CPU_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
filter: ((CONFIG_CPU_AARCH32_CORTEX_R or CONFIG_CPU_CORTEX_M) and CONFIG_CPU_HAS_FPU and TOOLCHAIN_HAS_NEWLIB == 1) or CONFIG_ARCH_POSIX
|
||||
integration_platforms:
|
||||
- mps2_an521_remote
|
||||
tags: cmsis_dsp fpu
|
||||
|
|
|
@ -66,7 +66,7 @@ __no_optimization static void trigger_fault_access(void)
|
|||
* address instead to trigger exception. See issue #31419.
|
||||
*/
|
||||
void *a = (void *)0xFFFFFFFF;
|
||||
#elif defined(CONFIG_CPU_CORTEX_M) || defined(CONFIG_CPU_CORTEX_R) || \
|
||||
#elif defined(CONFIG_CPU_CORTEX_M) || defined(CONFIG_CPU_AARCH32_CORTEX_R) || \
|
||||
defined(CONFIG_CPU_AARCH64_CORTEX_R)
|
||||
/* As this test case only runs when User Mode is enabled,
|
||||
* accessing _current always triggers a memory access fault,
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue