Renaming include/nanokernel to include/arch

Renaming the directory include/nanokernel to be include/arch, which
better reflects the real nature of the directory and the contents
inside.

Change-Id: I2bc33ebc6715e2f0403227a558279fdf52398ade
Signed-off-by: Dan Kalowsky <daniel.kalowsky@intel.com>

arch/arm/core/basepri.s

@@ -52,7 +52,7 @@ unlocked. This achieves two purposes:
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/cpu_idle.s

@@ -39,7 +39,7 @@ DESCRIPTION
 #include <offsets.h>
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #ifdef CONFIG_TICKLESS_IDLE
 #include <nanok.h>
 #endif

arch/arm/core/exc_exit.s

@@ -43,7 +43,7 @@ wrapped around by _isr_wrapper()).
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/fault.c

@@ -40,7 +40,7 @@ Common fault handler for ARM Cortex-M processors.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 
 #ifdef CONFIG_PRINTK

arch/arm/core/fault_s.s

@@ -39,7 +39,7 @@ Fault handlers for ARM Cortex-M processors.
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/gdb_stub.s

@@ -47,7 +47,7 @@ anymore.
 #include <toolchain.h>
 #include <sections.h>
 #include <nanok.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/gdb_stub_irq_vector_table.c

@@ -39,7 +39,7 @@ user-installed ISRs.
 
 #include <toolchain.h>
 #include <sections.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 typedef void (*vth)(void); /* Vector Table Handler */
 

arch/arm/core/irq_init.c

@@ -43,7 +43,7 @@ the PendSV exception.
 #include <toolchain.h>
 #include <sections.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 /*******************************************************************************
 *

arch/arm/core/irq_manage.c

@@ -38,7 +38,7 @@ SW_ISR_TABLE_DYNAMIC has to be enabled for connecting ISRs at runtime.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <misc/__assert.h>
 #include <toolchain.h>
 #include <sections.h>

arch/arm/core/isr_wrapper.s

@@ -44,7 +44,7 @@ a parameter.
 #include <sections.h>
 #include <sw_isr_table.h>
 #include <nanok.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE
 

arch/arm/core/nano_fiber_abort.c

@@ -49,7 +49,7 @@ the PendSV exception.
 #include <toolchain.h>
 #include <sections.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 extern void _nano_fiber_swap(void);
 

arch/arm/core/nanocontext.c

@@ -37,7 +37,7 @@ architecture.
 */
 
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <toolchain.h>
 #include <nanok.h>
 #include <nanocontextentry.h>

arch/arm/core/nanofatal.c

@@ -42,7 +42,7 @@ This module provides the _NanoFatalErrorHandler() routine for ARM Cortex-M.
 
 #include <cputype.h>
 #include <nanokernel.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 #include <nanok.h>
 
 #ifdef CONFIG_PRINTK

arch/arm/core/swap.s

@@ -41,7 +41,7 @@ on ARM Cortex-M3/M4 CPUs.
 #include <nanok.h>
 #include <offsets.h>
 #include <toolchain.h>
-#include <nanokernel/cpu.h>
+#include <arch/cpu.h>
 
 _ASM_FILE_PROLOGUE