From bfe3f8806b97eb6542502c5cf5f18406b0b74bc0 Mon Sep 17 00:00:00 2001 From: Andy Ross Date: Thu, 12 Aug 2021 09:05:01 -0700 Subject: [PATCH] soc: cavs_v25: Clean up platform config to reflect recent work Use the built-in IDC handling and not IPM (which is limited to two CPUs). Declare two cpus for now, Zephyr tests are having problems with more at the moment (that isn't a CI configuration, so we may have work to do). Signed-off-by: Andy Ross --- .../cavs_v25/Kconfig.defconfig.series | 21 ++++--------------- soc/xtensa/intel_adsp/cavs_v25/Kconfig.series | 1 + 2 files changed, 5 insertions(+), 17 deletions(-) diff --git a/soc/xtensa/intel_adsp/cavs_v25/Kconfig.defconfig.series b/soc/xtensa/intel_adsp/cavs_v25/Kconfig.defconfig.series index 31add8ed410..175ea5693cc 100644 --- a/soc/xtensa/intel_adsp/cavs_v25/Kconfig.defconfig.series +++ b/soc/xtensa/intel_adsp/cavs_v25/Kconfig.defconfig.series @@ -15,6 +15,10 @@ config SOC string default "intel_cavs_25" +# Hardware has four cores, limited to two pending test fixes +config MP_NUM_CPUS + default 2 + config SMP default y @@ -66,21 +70,4 @@ config LOG_BACKEND_ADSP endif # LOG -if SMP - -# FIXME: these DSPs can have more cores, but Zephyr only supports up to 2 cores on them -config MP_NUM_CPUS - default 2 - -config IPM - default y - -config IPM_CAVS_IDC - default y if IPM - -config SCHED_IPI_SUPPORTED - default y if IPM_CAVS_IDC - -endif # SMP - endif # SOC_SERIES_INTEL_CAVS_V25 diff --git a/soc/xtensa/intel_adsp/cavs_v25/Kconfig.series b/soc/xtensa/intel_adsp/cavs_v25/Kconfig.series index 38293a7a97d..f6d55fcd8da 100644 --- a/soc/xtensa/intel_adsp/cavs_v25/Kconfig.series +++ b/soc/xtensa/intel_adsp/cavs_v25/Kconfig.series @@ -10,5 +10,6 @@ config SOC_SERIES_INTEL_CAVS_V25 select XTENSA_USE_CORE_CRT1 select ATOMIC_OPERATIONS_BUILTIN if "$(ZEPHYR_TOOLCHAIN_VARIANT)" != "xcc" select ARCH_HAS_COHERENCE + select SCHED_IPI_SUPPORTED help Intel CAVS v2.5