drivers: serial: Update sam drivers to use pinctrl
This update Atmel sam serial drivers to use pinctrl driver and API. It updates all boards with new pinctrl groups format. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
This commit is contained in:
parent
cb201430cf
commit
bfaf027dde
23 changed files with 379 additions and 71 deletions
42
boards/arm/arduino_due/arduino_due-pinctrl.dtsi
Normal file
42
boards/arm/arduino_due/arduino_due-pinctrl.dtsi
Normal file
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@ -0,0 +1,42 @@
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/*
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* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/sam3XXh-pinctrl.h>
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&pinctrl {
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uart_default: uart_default {
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group1 {
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pinmux = <PA8A_UART_RXD>;
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bias-pull-up;
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};
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group2 {
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pinmux = <PA9A_UART_TXD>;
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};
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};
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usart0_default: usart0_default {
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group1 {
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pinmux = <PA10A_USART0_RXD>,
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<PA11A_USART0_TXD>;
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};
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};
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usart1_default: usart1_default {
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group1 {
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pinmux = <PA12A_USART1_RXD>,
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<PA13A_USART1_TXD>;
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};
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};
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usart2_default: usart2_default {
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group1 {
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pinmux = <PB21A_USART2_RXD>,
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<PB20A_USART2_TXD>;
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};
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};
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usart3_default: usart3_default {
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group1 {
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pinmux = <PD5B_USART3_RXD>,
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<PD4B_USART3_TXD>;
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};
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};
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};
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@ -3,6 +3,7 @@
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/dts-v1/;
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#include <atmel/sam3x.dtsi>
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#include "arduino_due-pinctrl.dtsi"
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/ {
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model = "Arduino Due with an Atmel SAM3X8E SoC";
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@ -51,10 +52,9 @@
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&uart {
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status = "okay";
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current-speed = <115200>;
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};
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&pa8a_uart_urxd {
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bias-pull-up;
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pinctrl-0 = <&uart_default>;
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pinctrl-names = "default";
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};
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arduino_i2c: &twi1 { };
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32
boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi
Normal file
32
boards/arm/sam4e_xpro/sam4e_xpro-pinctrl.dtsi
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@ -0,0 +1,32 @@
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/*
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* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/sam4eXe-pinctrl.h>
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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pinmux = <PA9A_UART0_RXD>,
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<PA10A_UART0_TXD>;
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};
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};
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uart1_default: uart1_default {
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group1 {
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pinmux = <PA5C_UART1_RXD>,
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<PA6C_UART1_TXD>;
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};
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};
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usart1_default: usart1_default {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PA24A_USART1_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PA22A_USART1_TXD>,
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<PA25A_USART1_CTS>;
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};
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};
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};
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@ -7,6 +7,7 @@
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/dts-v1/;
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#include <atmel/sam4e16e.dtsi>
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#include "sam4e_xpro-pinctrl.dtsi"
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/ {
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model = "Atmel SAM4E Xplained Pro Board with an Atmel SAM4E16E SoC";
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@ -135,14 +136,24 @@
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};
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&uart0 {
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current-speed = <115200>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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&uart1 {
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pinctrl-0 = <&uart1_default>;
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pinctrl-names = "default";
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};
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&usart1 {
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pinctrl-0 = <&pa21a_usart1_rxd1 &pa22a_usart1_txd1>;
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current-speed = <115200>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&usart1_default>;
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pinctrl-names = "default";
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};
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&gmac {
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32
boards/arm/sam4l_ek/sam4l_ek-pinctrl.dtsi
Normal file
32
boards/arm/sam4l_ek/sam4l_ek-pinctrl.dtsi
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@ -0,0 +1,32 @@
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/*
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* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/sam4lcXc-pinctrl.h>
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&pinctrl {
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usart0_default: usart0_default {
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group1 {
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pinmux = <PC2C_USART0_RXD>,
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<PA7B_USART0_TXD>;
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};
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};
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usart0_hw_ctrl_flow: usart0_hw_ctrl_flow {
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group1 {
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pinmux = <PC2C_USART0_RXD>,
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<PC7B_USART2_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PA7B_USART0_TXD>,
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<PC8E_USART2_CTS>;
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};
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};
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usart2_default: usart2_default {
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group1 {
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pinmux = <PC11B_USART2_RXD>,
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<PC12B_USART2_TXD>;
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};
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};
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};
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@ -6,6 +6,7 @@
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/dts-v1/;
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#include <atmel/sam4lx4.dtsi>
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#include "sam4l_ek-pinctrl.dtsi"
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/ {
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model = "Atmel SAM4L-EK Board with an Atmel SAM4LC4C SoC";
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};
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&usart2 {
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current-speed = <115200>;
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pinctrl-0 = <&pc11b_usart2_rxd2 &pc12b_usart2_txd2>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&usart2_default>;
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pinctrl-names = "default";
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};
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&spi0 {
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27
boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi
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27
boards/arm/sam4s_xplained/sam4s_xplained-pinctrl.dtsi
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@ -0,0 +1,27 @@
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/*
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* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/sam4sXc-pinctrl.h>
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&pinctrl {
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uart0_default: uart0_default {
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group1 {
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pinmux = <PA9A_UART0_RXD>,
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<PA10A_UART0_TXD>;
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};
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};
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uart1_default: uart1_default {
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group1 {
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pinmux = <PB2A_UART1_RXD>,
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<PB3A_UART1_TXD>;
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};
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};
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usart1_default: usart1_default {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PA22A_USART1_TXD>;
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};
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};
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};
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@ -6,6 +6,7 @@
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/dts-v1/;
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#include <atmel/sam4s16c.dtsi>
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#include "sam4s_xplained-pinctrl.dtsi"
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/ {
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model = "Atmel SAM4S Xplained Board with an Atmel SAM4S16C SoC";
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@ -135,13 +136,19 @@
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};
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&uart0 {
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current-speed = <115200>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart0_default>;
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pinctrl-names = "default";
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};
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&uart1 {
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current-speed = <115200>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&uart1_default>;
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pinctrl-names = "default";
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};
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&wdt {
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sam_e70_xplained-pinctrl.dtsi"
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/ {
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aliases {
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i2c-0 = &twihs0;
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};
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&usart1 {
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current-speed = <115200>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&usart1_default>;
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pinctrl-names = "default";
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};
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&wdt {
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74
boards/arm/sam_e70_xplained/sam_e70_xplained-pinctrl.dtsi
Normal file
74
boards/arm/sam_e70_xplained/sam_e70_xplained-pinctrl.dtsi
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@ -0,0 +1,74 @@
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/*
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* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/same70q-pinctrl.h>
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&pinctrl {
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uart3_default: uart3_default {
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group1 {
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pinmux = <PD28A_UART3_RXD>,
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<PD30A_UART3_TXD>;
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};
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};
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uart4_default: uart4_default {
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group1 {
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pinmux = <PD19C_UART4_TXD>,
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<PD18C_UART4_RXD>;
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};
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};
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usart0_default: usart0_default {
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group1 {
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pinmux = <PB0C_USART0_RXD>,
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<PB1C_USART0_TXD>;
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};
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};
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usart0_hw_ctrl_flow_clk: usart0_hw_ctrl_flow_clk {
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group1 {
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pinmux = <PB0C_USART0_RXD>,
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<PB3C_USART0_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PB1C_USART0_TXD>,
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<PB2C_USART0_CTS>,
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<PB13C_USART0_SCK>;
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};
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};
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usart1_default: usart1_default {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PB4D_USART1_TXD>;
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};
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};
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usart1_hw_ctrl_flow: usart1_hw_ctrl_flow {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PA24A_USART1_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PB4D_USART1_TXD>,
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<PA25A_USART1_CTS>;
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};
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};
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usart2_default: usart2_default {
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group1 {
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pinmux = <PD15B_USART2_RXD>,
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<PD16B_USART2_TXD>;
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};
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};
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usart2_hw_ctrl_flow_clk: usart2_hw_ctrl_flow_clk {
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group1 {
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pinmux = <PD15B_USART2_RXD>,
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<PD18B_USART2_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PD16B_USART2_TXD>,
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<PD19B_USART2_CTS>,
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<PD17B_USART2_SCK>;
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};
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};
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};
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@ -1,12 +1,14 @@
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/*
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* Copyright (c) 2017 Piotr Mienkowski
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* Copyright (c) 2017 Justin Watson
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* Copyright (c) 2019-2020 Gerson Fernando Budke <nandojve@gmail.com>
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* Copyright (c) 2020 Stephanos Ioannidis <root@stephanos.io>
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* Copyright (c) 2019-2022 Gerson Fernando Budke <nandojve@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include "sam_v71_xult-pinctrl.dtsi"
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/ {
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aliases {
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i2c-0 = &twihs0;
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};
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&usart1 {
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current-speed = <115200>;
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status = "okay";
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current-speed = <115200>;
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pinctrl-0 = <&usart1_default>;
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pinctrl-names = "default";
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};
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&uart3 {
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status = "okay";
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pinctrl-0 = <&pd28a_uart3_urxd3 &pd30a_uart3_utxd3>;
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current-speed = <115200>;
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pinctrl-0 = <&uart3_default>;
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pinctrl-names = "default";
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};
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&wdt {
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72
boards/arm/sam_v71_xult/sam_v71_xult-pinctrl.dtsi
Normal file
72
boards/arm/sam_v71_xult/sam_v71_xult-pinctrl.dtsi
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/*
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* Copyright (c) 2022, Gerson Fernando Budke <nandojve@gmail.com>
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/samv71q-pinctrl.h>
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&pinctrl {
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uart3_default: uart3_default {
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group1 {
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pinmux = <PD28A_UART3_RXD>,
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<PD30A_UART3_TXD>;
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};
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};
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uart4_default: uart4_default {
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group1 {
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pinmux = <PD19C_UART4_TXD>,
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<PD18C_UART4_RXD>;
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};
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};
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usart0_default: usart0_default {
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group1 {
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pinmux = <PB0C_USART0_RXD>,
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<PB1C_USART0_TXD>;
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};
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};
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usart0_hw_ctrl_flow: usart0_hw_ctrl_flow {
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group1 {
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pinmux = <PB0C_USART0_RXD>,
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<PB3C_USART0_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PB1C_USART0_TXD>,
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<PB2C_USART0_CTS>;
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};
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};
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usart1_default: usart1_default {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PB4D_USART1_TXD>;
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};
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};
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usart1_hw_ctrl_flow: usart1_hw_ctrl_flow {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PA24A_USART1_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PB4D_USART1_TXD>,
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<PA25A_USART1_CTS>;
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};
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};
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usart2_default: usart2_default {
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group1 {
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pinmux = <PD15B_USART2_RXD>,
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<PD16B_USART2_TXD>;
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};
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};
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usart2_hw_ctrl_flow: usart2_hw_ctrl_flow_clk {
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group1 {
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pinmux = <PD15B_USART2_RXD>,
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<PD18B_USART2_RTS>;
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bias-pull-up;
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};
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group1 {
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pinmux = <PD16B_USART2_TXD>,
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<PD19B_USART2_CTS>;
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};
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};
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};
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@ -4,11 +4,21 @@
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* SPDX-License-Identifier: Apache-2.0
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*/
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&pinctrl {
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usart1_esp_wifi: usart1_esp_wifi {
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group1 {
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pinmux = <PA21A_USART1_RXD>,
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<PA22A_USART1_TXD>;
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};
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};
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};
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&usart1 {
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status = "okay";
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current-speed = <115200>;
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|
||||
pinctrl-0 = <&pa21a_usart1_rxd1 &pa22a_usart1_txd1>;
|
||||
pinctrl-0 = <&usart1_esp_wifi>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
esp8266 {
|
||||
compatible = "espressif,esp-at";
|
||||
|
|
|
@ -20,13 +20,13 @@
|
|||
#include <init.h>
|
||||
#include <soc.h>
|
||||
#include <drivers/uart.h>
|
||||
#include <drivers/pinctrl.h>
|
||||
|
||||
/* Device constant configuration parameters */
|
||||
struct uart_sam_dev_cfg {
|
||||
Uart *regs;
|
||||
uint32_t periph_id;
|
||||
struct soc_gpio_pin pin_rx;
|
||||
struct soc_gpio_pin pin_tx;
|
||||
const struct pinctrl_dev_config *pcfg;
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
uart_irq_config_func_t irq_config_func;
|
||||
|
@ -58,8 +58,10 @@ static int uart_sam_init(const struct device *dev)
|
|||
soc_pmc_peripheral_enable(cfg->periph_id);
|
||||
|
||||
/* Connect pins to the peripheral */
|
||||
soc_gpio_configure(&cfg->pin_rx);
|
||||
soc_gpio_configure(&cfg->pin_tx);
|
||||
retval = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
|
||||
if (retval < 0) {
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* Reset and disable UART */
|
||||
uart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX
|
||||
|
@ -356,8 +358,7 @@ static const struct uart_driver_api uart_sam_driver_api = {
|
|||
.regs = (Uart *)DT_INST_REG_ADDR(n), \
|
||||
.periph_id = DT_INST_PROP(n, peripheral_id), \
|
||||
\
|
||||
.pin_rx = ATMEL_SAM_DT_INST_PIN(n, 0), \
|
||||
.pin_tx = ATMEL_SAM_DT_INST_PIN(n, 1), \
|
||||
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
|
||||
\
|
||||
IRQ_FUNC_INIT \
|
||||
}
|
||||
|
@ -384,6 +385,7 @@ static const struct uart_driver_api uart_sam_driver_api = {
|
|||
#endif
|
||||
|
||||
#define UART_SAM_INIT(n) \
|
||||
PINCTRL_DT_INST_DEFINE(n); \
|
||||
static struct uart_sam_dev_data uart##n##_sam_data = { \
|
||||
.baud_rate = DT_INST_PROP(n, current_speed), \
|
||||
}; \
|
||||
|
|
|
@ -20,13 +20,13 @@
|
|||
#include <init.h>
|
||||
#include <soc.h>
|
||||
#include <drivers/uart.h>
|
||||
#include <drivers/pinctrl.h>
|
||||
|
||||
/* Device constant configuration parameters */
|
||||
struct usart_sam_dev_cfg {
|
||||
Usart *regs;
|
||||
uint32_t periph_id;
|
||||
struct soc_gpio_pin pin_rx;
|
||||
struct soc_gpio_pin pin_tx;
|
||||
const struct pinctrl_dev_config *pcfg;
|
||||
|
||||
#ifdef CONFIG_UART_INTERRUPT_DRIVEN
|
||||
uart_irq_config_func_t irq_config_func;
|
||||
|
@ -58,8 +58,10 @@ static int usart_sam_init(const struct device *dev)
|
|||
soc_pmc_peripheral_enable(cfg->periph_id);
|
||||
|
||||
/* Connect pins to the peripheral */
|
||||
soc_gpio_configure(&cfg->pin_rx);
|
||||
soc_gpio_configure(&cfg->pin_tx);
|
||||
retval = pinctrl_apply_state(cfg->pcfg, PINCTRL_STATE_DEFAULT);
|
||||
if (retval < 0) {
|
||||
return retval;
|
||||
}
|
||||
|
||||
/* Reset and disable USART */
|
||||
usart->US_CR = US_CR_RSTRX | US_CR_RSTTX
|
||||
|
@ -357,8 +359,7 @@ static const struct uart_driver_api usart_sam_driver_api = {
|
|||
.regs = (Usart *)DT_INST_REG_ADDR(n), \
|
||||
.periph_id = DT_INST_PROP(n, peripheral_id), \
|
||||
\
|
||||
.pin_rx = ATMEL_SAM_DT_INST_PIN(n, 0), \
|
||||
.pin_tx = ATMEL_SAM_DT_INST_PIN(n, 1), \
|
||||
.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(n), \
|
||||
\
|
||||
IRQ_FUNC_INIT \
|
||||
}
|
||||
|
@ -385,6 +386,7 @@ static const struct uart_driver_api usart_sam_driver_api = {
|
|||
#endif
|
||||
|
||||
#define USART_SAM_INIT(n) \
|
||||
PINCTRL_DT_INST_DEFINE(n); \
|
||||
static struct usart_sam_dev_data usart##n##_sam_data = { \
|
||||
.baud_rate = DT_INST_PROP(n, current_speed), \
|
||||
}; \
|
||||
|
|
|
@ -96,7 +96,6 @@
|
|||
peripheral-id = <8>;
|
||||
status = "disabled";
|
||||
label = "UART_0";
|
||||
pinctrl-0 = <&pa8a_uart_urxd &pa9a_uart_utxd>;
|
||||
};
|
||||
|
||||
usart0: usart@40098000 {
|
||||
|
@ -135,7 +134,7 @@
|
|||
label = "USART_3";
|
||||
};
|
||||
|
||||
pinctrl@400e0e00 {
|
||||
pinctrl: pinctrl@400e0e00 {
|
||||
compatible = "atmel,sam-pinctrl";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -115,7 +115,6 @@
|
|||
peripheral-id = <7>;
|
||||
status = "disabled";
|
||||
label = "UART_0";
|
||||
pinctrl-0 = <&pa9a_uart0_urxd0 &pa10a_uart0_utxd0>;
|
||||
};
|
||||
|
||||
uart1: uart@40060600 {
|
||||
|
@ -125,7 +124,6 @@
|
|||
peripheral-id = <45>;
|
||||
status = "disabled";
|
||||
label = "UART_1";
|
||||
pinctrl-0 = <&pa5c_uart1_urxd1 &pa6c_uart1_utxd1>;
|
||||
};
|
||||
|
||||
usart0: usart@400a0000 {
|
||||
|
@ -174,11 +172,13 @@
|
|||
};
|
||||
};
|
||||
|
||||
pinctrl@400e0e00 {
|
||||
pinctrl: pinctrl@400e0e00 {
|
||||
compatible = "atmel,sam-pinctrl";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x400e0e00 0x400e0e00 0xa00>;
|
||||
status = "okay";
|
||||
label = "PINCTRL";
|
||||
|
||||
pioa: gpio@400e0e00 {
|
||||
compatible = "atmel,sam-gpio";
|
||||
|
|
|
@ -177,7 +177,7 @@
|
|||
pinctrl-0 = <&pa25a_usbc_dm &pa26a_usbc_dp>;
|
||||
};
|
||||
|
||||
pinctrl@400e1000 {
|
||||
pinctrl: pinctrl@400e1000 {
|
||||
compatible = "atmel,sam-pinctrl";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -116,7 +116,6 @@
|
|||
peripheral-id = <8>;
|
||||
status = "disabled";
|
||||
label = "UART_0";
|
||||
pinctrl-0 = <&pa9a_uart0_urxd0 &pa10a_uart0_utxd0>;
|
||||
};
|
||||
|
||||
uart1: uart@400e0800 {
|
||||
|
@ -126,7 +125,6 @@
|
|||
peripheral-id = <9>;
|
||||
status = "disabled";
|
||||
label = "UART_1";
|
||||
pinctrl-0 = <&pb2a_uart1_urxd1 &pb3a_uart1_utxd1>;
|
||||
};
|
||||
|
||||
usart0: usart@40024000 {
|
||||
|
@ -147,11 +145,13 @@
|
|||
label = "USART_1";
|
||||
};
|
||||
|
||||
pinctrl@400e0e00 {
|
||||
pinctrl: pinctrl@400e0e00 {
|
||||
compatible = "atmel,sam-pinctrl";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x400e0e00 0x400e0e00 0x600>;
|
||||
status = "okay";
|
||||
label = "PINCTRL";
|
||||
|
||||
pioa: gpio@400e0e00 {
|
||||
compatible = "atmel,sam-gpio";
|
||||
|
|
|
@ -147,7 +147,6 @@
|
|||
peripheral-id = <7>;
|
||||
status = "disabled";
|
||||
label = "UART_0";
|
||||
pinctrl-0 = <&pa9a_uart0_urxd0 &pa10a_uart0_utxd0>;
|
||||
};
|
||||
|
||||
uart1: uart@400e0a00 {
|
||||
|
@ -193,7 +192,6 @@
|
|||
peripheral-id = <13>;
|
||||
status = "disabled";
|
||||
label = "USART_0";
|
||||
pinctrl-0 = <&pb0c_usart0_rxd0 &pb1c_usart0_txd0>;
|
||||
};
|
||||
|
||||
usart1: usart@40028000 {
|
||||
|
@ -203,7 +201,6 @@
|
|||
peripheral-id = <14>;
|
||||
status = "disabled";
|
||||
label = "USART_1";
|
||||
pinctrl-0 = <&pa21a_usart1_rxd1 &pb4d_usart1_txd1>;
|
||||
};
|
||||
|
||||
usart2: usart@4002c000 {
|
||||
|
@ -213,7 +210,6 @@
|
|||
peripheral-id = <15>;
|
||||
status = "disabled";
|
||||
label = "USART_2";
|
||||
pinctrl-0 = <&pd15b_usart2_rxd2 &pd16b_usart2_txd2>;
|
||||
};
|
||||
|
||||
afec0: adc@4003c000 {
|
||||
|
@ -248,7 +244,7 @@
|
|||
#io-channel-cells = <1>;
|
||||
};
|
||||
|
||||
pinctrl@400e0e00 {
|
||||
pinctrl: pinctrl@400e0e00 {
|
||||
compatible = "atmel,sam-pinctrl";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
|
|
@ -2,7 +2,9 @@ description: SAM family UART
|
|||
|
||||
compatible: "atmel,sam-uart"
|
||||
|
||||
include: uart-controller.yaml
|
||||
include:
|
||||
- name: uart-controller.yaml
|
||||
- name: pinctrl-device.yaml
|
||||
|
||||
properties:
|
||||
reg:
|
||||
|
@ -15,16 +17,3 @@ properties:
|
|||
type: int
|
||||
description: peripheral ID
|
||||
required: true
|
||||
|
||||
pinctrl-0:
|
||||
type: phandles
|
||||
description: |
|
||||
PIO pin configuration for URXD & UTRD signals. We expect that
|
||||
the phandles will reference pinctrl nodes. These nodes will
|
||||
have a nodelabel that matches the Atmel SoC HAL defines and
|
||||
be of the form p<port><pin><periph>_<inst>_<signal>.
|
||||
|
||||
For example the UART on SAM3x would be
|
||||
pinctrl-0 = <&pa8a_uart_urxd &pa9a_uart_utxd>;
|
||||
|
||||
required: true
|
||||
|
|
|
@ -2,7 +2,9 @@ description: Atmel SAM family USART
|
|||
|
||||
compatible: "atmel,sam-usart"
|
||||
|
||||
include: uart-controller.yaml
|
||||
include:
|
||||
- name: uart-controller.yaml
|
||||
- name: pinctrl-device.yaml
|
||||
|
||||
properties:
|
||||
reg:
|
||||
|
@ -15,16 +17,3 @@ properties:
|
|||
type: int
|
||||
description: peripheral ID
|
||||
required: true
|
||||
|
||||
pinctrl-0:
|
||||
type: phandles
|
||||
description: |
|
||||
PIO pin configuration for RXD & TRD signals. We expect that
|
||||
the phandles will reference pinctrl nodes. These nodes will
|
||||
have a nodelabel that matches the Atmel SoC HAL defines and
|
||||
be of the form p<port><pin><periph>_<inst>_<signal>.
|
||||
|
||||
For example the USART0 on SAME7x would be
|
||||
pinctrl-0 = <&pb0c_usart0_rxd0 &pb1c_usart0_txd0>;
|
||||
|
||||
required: true
|
||||
|
|
|
@ -1,5 +1,13 @@
|
|||
/* SPDX-License-Identifier: Apache-2.0 */
|
||||
|
||||
&pinctrl {
|
||||
sercom3_loopback: sercom3_loopback {
|
||||
group1 {
|
||||
pinmux = <PA16D_SERCOM3_PAD0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&dmac {
|
||||
status = "okay";
|
||||
};
|
||||
|
@ -20,7 +28,8 @@
|
|||
txpo = <0>;
|
||||
|
||||
/* PAD0 must be configured to allow working loop-back */
|
||||
pinctrl-0 = <&pa16d_sercom3_pad0>;
|
||||
pinctrl-0 = <&sercom3_loopback>;
|
||||
pinctrl-names = "default";
|
||||
|
||||
/* Configure DMA channels for async operation */
|
||||
dmas = <&dmac 10 7>, <&dmac 11 8>;
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue