drivers: flash: stm32: ospi: writing single, dual and quad modes
Support writing to NOR-Flash over OSPI using the following modes: * 1-1-1 * 1-1-4 * 1-4-4 Supports 4-Byte opcodes conversion for write opcodes. Allows users to set what write/program opcode is used in the DTS (not for OPI mode). Will use some default PP opcodes based on the mode. Signed-off-by: Georgij Cernysiov <geo.cgv@gmail.com>
This commit is contained in:
Georgij Cernysiov
Carles Cufí
parent
f278db7071
commit
bf974902bf
1 changed files with 91 additions and 8 deletions
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@ -38,6 +38,9 @@ LOG_MODULE_REGISTER(flash_stm32_ospi, CONFIG_FLASH_LOG_LEVEL);
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#define STM32_OSPI_SUBSECTOR_4K_ERASE_MAX_TIME 400U
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#define STM32_OSPI_WRITE_REG_MAX_TIME 40U
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/* used as default value for DTS writeoc */
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#define SPI_NOR_WRITEOC_NONE 0xFF
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typedef void (*irq_config_func_t)(const struct device *dev);
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struct flash_stm32_ospi_config {
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@ -72,6 +75,7 @@ struct flash_stm32_ospi_data {
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/* Read operation dummy cycles */
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uint8_t read_dummy;
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uint32_t read_opcode;
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uint32_t write_opcode;
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enum jesd216_mode_type read_mode;
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enum jesd216_dw15_qer_type qer_type;
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int cmd_status;
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@ -921,6 +925,7 @@ static int flash_stm32_ospi_write(const struct device *dev, off_t addr,
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{
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const struct flash_stm32_ospi_config *dev_cfg = dev->config;
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struct flash_stm32_ospi_data *dev_data = dev->data;
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size_t to_write;
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int ret = 0;
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if (!ospi_address_is_valid(dev, addr, size)) {
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@ -937,13 +942,49 @@ static int flash_stm32_ospi_write(const struct device *dev, off_t addr,
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/* page program for STR or DTR mode */
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OSPI_RegularCmdTypeDef cmd_pp = ospi_prepare_cmd(dev_cfg->data_mode, dev_cfg->data_rate);
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cmd_pp.DummyCycles = 0;
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cmd_pp.Instruction = dev_data->write_opcode;
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LOG_INF("OSPI: write %u data", size);
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if (dev_cfg->data_mode != OSPI_OPI_MODE) {
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switch (cmd_pp.Instruction) {
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case SPI_NOR_CMD_PP_4B:
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__fallthrough;
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case SPI_NOR_CMD_PP: {
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cmd_pp.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
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cmd_pp.AddressMode = HAL_OSPI_ADDRESS_1_LINE;
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cmd_pp.DataMode = HAL_OSPI_DATA_1_LINE;
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break;
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}
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case SPI_NOR_CMD_PP_1_1_4_4B:
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__fallthrough;
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case SPI_NOR_CMD_PP_1_1_4: {
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cmd_pp.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
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cmd_pp.AddressMode = HAL_OSPI_ADDRESS_1_LINE;
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cmd_pp.DataMode = HAL_OSPI_DATA_4_LINES;
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break;
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}
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case SPI_NOR_CMD_PP_1_4_4_4B:
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__fallthrough;
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case SPI_NOR_CMD_PP_1_4_4: {
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cmd_pp.InstructionMode = HAL_OSPI_INSTRUCTION_1_LINE;
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cmd_pp.AddressMode = HAL_OSPI_ADDRESS_4_LINES;
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cmd_pp.DataMode = HAL_OSPI_DATA_4_LINES;
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break;
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}
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default:
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/* use the mode from ospi_prepare_cmd */
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break;
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}
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}
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cmd_pp.Address = addr;
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cmd_pp.AddressSize = stm32_ospi_hal_address_size(dev);
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cmd_pp.DummyCycles = 0U;
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LOG_DBG("OSPI: write %zu data", size);
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ospi_lock_thread(dev);
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while ((size > 0) && (ret == 0)) {
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size_t to_write = size;
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to_write = size;
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ret = stm32_ospi_mem_ready(&dev_data->hospi,
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dev_cfg->data_mode, dev_cfg->data_rate);
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@ -968,10 +1009,6 @@ static int flash_stm32_ospi_write(const struct device *dev, off_t addr,
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(addr % SPI_NOR_PAGE_SIZE);
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}
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cmd_pp.Instruction = (dev_cfg->data_mode == OSPI_SPI_MODE)
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? SPI_NOR_CMD_PP_4B
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: SPI_NOR_OCMD_PAGE_PRG;
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cmd_pp.Address = addr;
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ret = ospi_write_access(dev, &cmd_pp, data, to_write);
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if (ret != 0) {
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break;
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@ -1334,7 +1371,9 @@ static int stm32_ospi_enable_qe(const struct device *dev)
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return ret;
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}
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static void spi_nor_process_bfp_addrbytes(const struct device *dev, const uint8_t jesd216_bfp_addrbytes) {
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static void spi_nor_process_bfp_addrbytes(const struct device *dev,
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const uint8_t jesd216_bfp_addrbytes)
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{
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struct flash_stm32_ospi_data *data = dev->data;
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if (jesd216_bfp_addrbytes == JESD216_SFDP_BFP_DW1_ADDRBYTES_VAL_4B) {
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@ -1363,6 +1402,21 @@ static inline uint8_t spi_nor_convert_read_to_4b(const uint8_t opcode)
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}
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}
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static inline uint8_t spi_nor_convert_write_to_4b(const uint8_t opcode)
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{
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switch (opcode) {
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case SPI_NOR_CMD_PP:
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return SPI_NOR_CMD_PP_4B;
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case SPI_NOR_CMD_PP_1_1_4:
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return SPI_NOR_CMD_PP_1_1_4_4B;
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case SPI_NOR_CMD_PP_1_4_4:
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return SPI_NOR_CMD_PP_1_4_4_4B;
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default:
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/* use provided */
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return opcode;
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}
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}
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static int spi_nor_process_bfp(const struct device *dev,
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const struct jesd216_param_header *php,
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const struct jesd216_bfp *bfp)
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@ -1401,6 +1455,24 @@ static int spi_nor_process_bfp(const struct device *dev,
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spi_nor_process_bfp_addrbytes(dev, jesd216_bfp_addrbytes(bfp));
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LOG_DBG("Address width: %u Bytes", data->address_width);
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/* use PP opcode based on configured data mode if nothing is set in DTS */
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if (data->write_opcode == SPI_NOR_WRITEOC_NONE) {
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switch (dev_cfg->data_mode) {
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case OSPI_OPI_MODE:
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data->write_opcode = SPI_NOR_OCMD_PAGE_PRG;
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break;
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case OSPI_QUAD_MODE:
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data->write_opcode = SPI_NOR_CMD_PP_1_4_4;
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break;
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case OSPI_DUAL_MODE:
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data->write_opcode = SPI_NOR_CMD_PP_1_1_2;
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break;
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default:
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data->write_opcode = SPI_NOR_CMD_PP;
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break;
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}
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}
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if (dev_cfg->data_mode != OSPI_OPI_MODE) {
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/* determine supported read modes, begin from the slowest */
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data->read_mode = JESD216_MODE_111;
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@ -1438,6 +1510,9 @@ static int spi_nor_process_bfp(const struct device *dev,
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return -ENOTSUP;
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}
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data->read_opcode = spi_nor_convert_read_to_4b(data->read_opcode);
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data->write_opcode = spi_nor_convert_write_to_4b(data->write_opcode);
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}
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/* enable quad mode (if required) */
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if (dev_cfg->data_mode == OSPI_QUAD_MODE) {
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if (jesd216_bfp_decode_dw15(php, bfp, &dw15) < 0) {
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@ -1465,6 +1540,8 @@ static int spi_nor_process_bfp(const struct device *dev,
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LOG_DBG("Flash size %zu bytes", flash_size);
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LOG_DBG("Using read mode: %d, instr: 0x%X, dummy cycles: %u",
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data->read_mode, data->read_opcode, data->read_dummy);
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LOG_DBG("Using write instr: 0x%X", data->write_opcode);
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return 0;
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}
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@ -1679,6 +1756,11 @@ static int flash_stm32_ospi_init(const struct device *dev)
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#define OSPI_FLASH_MODULE(drv_id, flash_id) \
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(DT_DRV_INST(drv_id), ospi_nor_flash_##flash_id)
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#define DT_WRITEOC_PROP_OR(inst, default_value) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, writeoc), \
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(_CONCAT(SPI_NOR_CMD_, DT_STRING_TOKEN(DT_DRV_INST(inst), writeoc))), \
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((default_value)))
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#define DT_QER_PROP_OR(inst, default_value) \
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COND_CODE_1(DT_INST_NODE_HAS_PROP(inst, quad_enable_requirements), \
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(_CONCAT(JESD216_DW15_QER_VAL_, \
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@ -1722,6 +1804,7 @@ static struct flash_stm32_ospi_data flash_stm32_ospi_dev_data = {
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},
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},
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.qer_type = DT_QER_PROP_OR(0, JESD216_DW15_QER_VAL_S1B6),
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.write_opcode = DT_WRITEOC_PROP_OR(0, SPI_NOR_WRITEOC_NONE),
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};
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DEVICE_DT_INST_DEFINE(0, &flash_stm32_ospi_init, NULL,
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