x86: add a more informative page fault handler
This is only built in if CONFIG_EXCEPTION_DEBUG is turned on. Change-Id: I91f0601e344919f3481f7f5e78cb98c6784d1ec8 Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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1 changed files with 28 additions and 1 deletions
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@ -20,6 +20,7 @@
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#include <arch/x86/irq_controller.h>
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#include <arch/x86/segmentation.h>
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#include <exception.h>
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#include <inttypes.h>
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__weak void _debug_fatal_hook(const NANO_ESF *esf) { ARG_UNUSED(esf); }
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@ -168,10 +169,36 @@ EXC_FUNC_CODE(IV_INVALID_TSS);
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EXC_FUNC_CODE(IV_SEGMENT_NOT_PRESENT);
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EXC_FUNC_CODE(IV_STACK_FAULT);
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EXC_FUNC_CODE(IV_GENERAL_PROTECTION);
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EXC_FUNC_CODE(IV_PAGE_FAULT);
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EXC_FUNC_NOCODE(IV_X87_FPU_FP_ERROR);
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EXC_FUNC_CODE(IV_ALIGNMENT_CHECK);
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EXC_FUNC_NOCODE(IV_MACHINE_CHECK);
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/* Page fault error code flags */
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#define PRESENT BIT(0)
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#define WR BIT(1)
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#define US BIT(2)
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#define RSVD BIT(3)
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#define ID BIT(4)
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#define PK BIT(5)
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#define SGX BIT(15)
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FUNC_NORETURN void page_fault_handler(const NANO_ESF *pEsf)
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{
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uint32_t err, cr2;
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/* See Section 6.15 of the IA32 Software Developer's Manual vol 3 */
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__asm__ ("mov %%cr2, %0" : "=r" (cr2));
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err = pEsf->errorCode;
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printk("***** CPU Page Fault (error code 0x%08" PRIx32 ")\n", err);
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printk("%s thread %s address 0x%08" PRIx32 "\n",
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err & US ? "User" : "Supervisor",
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err & ID ? "executed" : (err & WR ? "wrote" : "read"),
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cr2);
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_NanoFatalErrorHandler(_NANO_ERR_CPU_EXCEPTION, pEsf);
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}
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_EXCEPTION_CONNECT_CODE(page_fault_handler, IV_PAGE_FAULT);
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#endif /* CONFIG_EXCEPTION_DEBUG */
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