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arch: arm: mpu: Updates in ARM MPU-related convenience macros

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This commit does the following:
- it introduces additional convenience macros for representing
  MPU attributions for no-cacheability, in both ARMv7-M and
  ARMv8-M MPU architectures,
- it adds documentation in K_MEM_PARTITION_IS_WRITABLE/CACHEABLE
  macros in all macro definitions in the different MPU variants
- it moves the type definition of k_mem_partition_attr_t inside
  the architecture-specific MPU headers, so it can be defined
  per-architecture. It generalizes app_mem_domain.h, to be able
  to work with _any_ (struct) type of k_mem_partition_attr_t.
- it refactors the type of k_mem_partition_attr_t for ARMv8-M
  to comply with the MPU register API.
- for NXP MPU, the commit moves the macros for region access
  permissions' attributes inside nxp_mpu.h, to align with what
  we do for ARM MPU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
This commit is contained in:
Ioannis Glaropoulos 2018-11-28 10:06:18 +01:00 • committed by Anas Nashif
commit bf34cf9443
9 changed files with 311 additions and 111 deletions
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72
include/arch/arm/arch.h
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@ -254,83 +254,13 @@ extern "C" {
#ifdef CONFIG_ARM_MPU
#ifdef CONFIG_CPU_HAS_ARM_MPU
#ifndef _ASMLANGUAGE
#include <arch/arm/cortex_m/mpu/arm_mpu.h>
#endif /* _ASMLANGUAGE */
#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
BUILD_ASSERT_MSG(!(((size) & ((size) - 1))) && \
(size) >= CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE && \
!((u32_t)(start) & ((size) - 1)), \
"the size of the partition must be power of 2" \
" and greater than or equal to the minimum MPU region size." \
"start address of the partition must align with size.")
#endif /* CONFIG_CPU_HAS_ARM_MPU */
#ifdef CONFIG_CPU_HAS_NXP_MPU
#ifndef _ASMLANGUAGE
#include <arch/arm/cortex_m/mpu/nxp_mpu.h>
#define K_MEM_PARTITION_P_NA_U_NA (MPU_REGION_SU)
#define K_MEM_PARTITION_P_RW_U_RW (MPU_REGION_READ | MPU_REGION_WRITE | \
MPU_REGION_SU)
#define K_MEM_PARTITION_P_RW_U_RO (MPU_REGION_READ | MPU_REGION_SU_RW)
#define K_MEM_PARTITION_P_RW_U_NA (MPU_REGION_SU_RW)
#define K_MEM_PARTITION_P_RO_U_RO (MPU_REGION_READ | MPU_REGION_SU)
#define K_MEM_PARTITION_P_RO_U_NA (MPU_REGION_SU_RX)
/* Execution-allowed attributes */
#define K_MEM_PARTITION_P_RWX_U_RWX (MPU_REGION_READ | MPU_REGION_WRITE | \
MPU_REGION_EXEC | MPU_REGION_SU)
#define K_MEM_PARTITION_P_RWX_U_RX (MPU_REGION_READ | MPU_REGION_EXEC | \
MPU_REGION_SU_RWX)
#define K_MEM_PARTITION_P_RX_U_RX (MPU_REGION_READ | MPU_REGION_EXEC | \
MPU_REGION_SU)
#define K_MEM_PARTITION_IS_WRITABLE(attr) \
({ \
int __is_writable__; \
switch (attr) { \
case MPU_REGION_WRITE: \
case MPU_REGION_SU_RW: \
__is_writable__ = 1; \
break; \
default: \
__is_writable__ = 0; \
} \
__is_writable__; \
})
#define K_MEM_PARTITION_IS_EXECUTABLE(attr) \
({ \
int __is_executable__; \
switch (attr) { \
case MPU_REGION_SU_RX: \
case MPU_REGION_EXEC: \
__is_executable__ = 1; \
break; \
default: \
__is_executable__ = 0; \
} \
__is_executable__; \
})
#endif /* _ASMLANGUAGE */
#define _ARCH_MEM_PARTITION_ALIGN_CHECK(start, size) \
BUILD_ASSERT_MSG((size) % \
CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE == 0 && \
(size) >= CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE && \
(u32_t)(start) % CONFIG_ARM_MPU_REGION_MIN_ALIGN_AND_SIZE == 0, \
"the size of the partition must align with minimum MPU \
region size" \
" and greater than or equal to minimum MPU region size." \
"start address of the partition must align with minimum MPU \
region size.")
#endif /* CONFIG_CPU_HAS_NXP_MPU */
#endif /* CONFIG_CPU_HAS_NXP_MPU */
#endif /* CONFIG_ARM_MPU */
#ifndef _ASMLANGUAGE
/* Typedef for the k_mem_partition attribute*/
typedef u32_t k_mem_partition_attr_t;
#endif /* _ASMLANGUAGE */
#ifdef __cplusplus
}
#endif