soc: nxp_imx: Enable mcux elcdif driver and clocks
Enables the mcux elcdif shim driver and clocks on imx rt socs when the display driver interface is enabled. Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
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3 changed files with 34 additions and 0 deletions
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@ -27,6 +27,13 @@ config CLOCK_CONTROL_MCUX_CCM
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endif # CLOCK_CONTROL
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endif # CLOCK_CONTROL
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if DISPLAY
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config DISPLAY_MCUX_ELCDIF
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default y if HAS_MCUX_ELCDIF
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endif # DISPLAY
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if GPIO
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if GPIO
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config GPIO_MCUX_IGPIO
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config GPIO_MCUX_IGPIO
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@ -48,6 +48,7 @@ config SOC_MIMXRT1052
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select HAS_MCUX
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select HAS_MCUX
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select HAS_MCUX_CACHE
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select HAS_MCUX_CACHE
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select HAS_MCUX_CCM
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select HAS_MCUX_CCM
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select HAS_MCUX_ELCDIF
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select HAS_MCUX_ENET
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select HAS_MCUX_ENET
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select HAS_MCUX_IGPIO
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select HAS_MCUX_IGPIO
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select HAS_MCUX_LPI2C
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select HAS_MCUX_LPI2C
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@ -59,6 +60,7 @@ config SOC_MIMXRT1052
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select INIT_ARM_PLL
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select INIT_ARM_PLL
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select INIT_SYS_PLL
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select INIT_SYS_PLL
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select INIT_USB1_PLL
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select INIT_USB1_PLL
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select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
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config SOC_MIMXRT1061
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config SOC_MIMXRT1061
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bool "SOC_MIMXRT1061"
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bool "SOC_MIMXRT1061"
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@ -81,6 +83,7 @@ config SOC_MIMXRT1062
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select HAS_MCUX
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select HAS_MCUX
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select HAS_MCUX_CACHE
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select HAS_MCUX_CACHE
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select HAS_MCUX_CCM
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select HAS_MCUX_CCM
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select HAS_MCUX_ELCDIF
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select HAS_MCUX_ENET
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select HAS_MCUX_ENET
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select HAS_MCUX_IGPIO
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select HAS_MCUX_IGPIO
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select HAS_MCUX_LPI2C
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select HAS_MCUX_LPI2C
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@ -91,11 +94,13 @@ config SOC_MIMXRT1062
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select INIT_ARM_PLL
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select INIT_ARM_PLL
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select INIT_SYS_PLL
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select INIT_SYS_PLL
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select INIT_USB1_PLL
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select INIT_USB1_PLL
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select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
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config SOC_MIMXRT1064
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config SOC_MIMXRT1064
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bool "SOC_MIMXRT1064"
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bool "SOC_MIMXRT1064"
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select HAS_MCUX
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select HAS_MCUX
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select HAS_MCUX_CCM
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select HAS_MCUX_CCM
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select HAS_MCUX_ELCDIF
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select HAS_MCUX_ENET
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select HAS_MCUX_ENET
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select HAS_MCUX_IGPIO
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select HAS_MCUX_IGPIO
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select HAS_MCUX_LPUART
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select HAS_MCUX_LPUART
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@ -105,6 +110,7 @@ config SOC_MIMXRT1064
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select INIT_ARM_PLL
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select INIT_ARM_PLL
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select INIT_SYS_PLL
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select INIT_SYS_PLL
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select INIT_USB1_PLL
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select INIT_USB1_PLL
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select INIT_VIDEO_PLL if DISPLAY_MCUX_ELCDIF
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endchoice
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endchoice
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@ -182,6 +188,9 @@ config INIT_SYS_PLL
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config INIT_USB1_PLL
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config INIT_USB1_PLL
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bool "Initialize USB1 PLL"
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bool "Initialize USB1 PLL"
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config INIT_VIDEO_PLL
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bool "Initialize Video PLL"
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config ARM_DIV
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config ARM_DIV
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int "ARM clock divider"
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int "ARM clock divider"
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range 0 7
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range 0 7
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@ -49,6 +49,15 @@ const clock_enet_pll_config_t ethPllConfig = {
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};
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};
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#endif
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#endif
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#ifdef CONFIG_INIT_VIDEO_PLL
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const clock_video_pll_config_t videoPllConfig = {
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.loopDivider = 31,
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.postDivider = 8,
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.numerator = 0,
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.denominator = 0,
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};
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#endif
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#ifdef CONFIG_NXP_IMX_RT_BOOT_HEADER
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#ifdef CONFIG_NXP_IMX_RT_BOOT_HEADER
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const __imx_boot_data_section BOOT_DATA_T boot_data = {
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const __imx_boot_data_section BOOT_DATA_T boot_data = {
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.start = CONFIG_FLASH_BASE_ADDRESS,
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.start = CONFIG_FLASH_BASE_ADDRESS,
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@ -115,6 +124,9 @@ static ALWAYS_INLINE void clkInit(void)
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#ifdef CONFIG_INIT_ENET_PLL
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#ifdef CONFIG_INIT_ENET_PLL
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CLOCK_InitEnetPll(ðPllConfig);
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CLOCK_InitEnetPll(ðPllConfig);
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#endif
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#endif
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#ifdef CONFIG_INIT_VIDEO_PLL
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CLOCK_InitVideoPll(&videoPllConfig);
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#endif
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CLOCK_SetDiv(kCLOCK_ArmDiv, CONFIG_ARM_DIV); /* Set ARM PODF */
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CLOCK_SetDiv(kCLOCK_ArmDiv, CONFIG_ARM_DIV); /* Set ARM PODF */
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CLOCK_SetDiv(kCLOCK_AhbDiv, CONFIG_AHB_DIV); /* Set AHB PODF */
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CLOCK_SetDiv(kCLOCK_AhbDiv, CONFIG_AHB_DIV); /* Set AHB PODF */
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@ -142,6 +154,12 @@ static ALWAYS_INLINE void clkInit(void)
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CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); /* Set SPI divider to 8 */
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CLOCK_SetDiv(kCLOCK_LpspiDiv, 7); /* Set SPI divider to 8 */
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#endif
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#endif
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#ifdef CONFIG_DISPLAY_MCUX_ELCDIF
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CLOCK_SetMux(kCLOCK_LcdifPreMux, 2);
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CLOCK_SetDiv(kCLOCK_LcdifPreDiv, 4);
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CLOCK_SetDiv(kCLOCK_LcdifDiv, 1);
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#endif
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/* Keep the system clock running so SYSTICK can wake up the system from
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/* Keep the system clock running so SYSTICK can wake up the system from
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* wfi.
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* wfi.
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*/
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*/
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