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drivers: dmic: remove soft_reset from dmic init flow

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DMIC does not need to use SOFT_RESET bit to start collecting data if
periodic_start bit is enabled.

Signed-off-by: Damian Nikodem <damian.nikodem@intel.com>
This commit is contained in:
Damian Nikodem 2022-10-10 12:33:04 +02:00 • committed by Carles Cufí
commit bedc2e7ab4
3 changed files with 8 additions and 20 deletions
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16
drivers/dai/intel/dmic/dmic.c
View file

@ -472,11 +472,6 @@ static void dai_dmic_gain_ramp(struct dai_intel_dmic *dmic)
for (i = 0; i < CONFIG_DAI_DMIC_HW_CONTROLLERS; i++) {
if (!dmic->enable[i])
continue;
if (dmic->startcount == DMIC_UNMUTE_CIC)
dai_dmic_update_bits(dmic, base[i] + CIC_CONTROL,
CIC_CONTROL_MIC_MUTE_BIT, 0);
if (dmic->startcount == DMIC_UNMUTE_FIR) {
switch (dmic->dai_config_params.dai_index) {
case 0:
@ -603,17 +598,6 @@ static void dai_dmic_start(struct dai_intel_dmic *dmic)
}
}
/* Clear soft reset for all/used PDM controllers. This should
* start capture in sync.
*/
for (i = 0; i < CONFIG_DAI_DMIC_HW_CONTROLLERS; i++) {
dai_dmic_update_bits(dmic, base[i] + CIC_CONTROL,
CIC_CONTROL_SOFT_RESET_BIT, 0);
LOG_INF("dmic_start(), cic 0x%08x",
dai_dmic_read(dmic, base[i] + CIC_CONTROL));
}
/* Set bit dai->index */
dai_dmic_global.active_fifos_mask |= BIT(dmic->dai_config_params.dai_index);
dai_dmic_global.pause_mask &= ~BIT(dmic->dai_config_params.dai_index);

1
drivers/dai/intel/dmic/dmic.h
View file

@ -145,6 +145,7 @@
#define DC_OFFSET_RIGHT_B 0x04c
#define OUT_GAIN_LEFT_B 0x050
#define OUT_GAIN_RIGHT_B 0x054
#define PDM_REG_END 0x058
/* Register bits */

11
drivers/dai/intel/dmic/dmic_nhlt.c
View file

@ -347,8 +347,12 @@ int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *bespoke_cf
for (n = 0; n < CONFIG_DAI_DMIC_HW_CONTROLLERS; n++) {
fir_cfg_a[n] = NULL;
fir_cfg_b[n] = NULL;
if (!(pdm_ctrl_mask & (1 << n)))
if (!(pdm_ctrl_mask & (1 << n))) {
/* Set MIC_MUTE bit to unused PDM */
dai_dmic_write(dmic, base[n] + CIC_CONTROL, CIC_CONTROL_MIC_MUTE(1));
continue;
}
LOG_DBG("dmic_set_config_nhlt(): PDM%d", n);
@ -385,9 +389,8 @@ int dai_dmic_set_config_nhlt(struct dai_intel_dmic *dmic, const void *bespoke_cf
return -EINVAL;
}
/* Clear CIC_START_A and CIC_START_B, set SOF_RESET and MIC_MUTE*/
val = (val & ~(CIC_CONTROL_CIC_START_A_BIT | CIC_CONTROL_CIC_START_A_BIT)) |
CIC_CONTROL_SOFT_RESET_BIT | CIC_CONTROL_MIC_MUTE_BIT;
/* Clear CIC_START_A and CIC_START_B */
val = (val & ~(CIC_CONTROL_CIC_START_A_BIT | CIC_CONTROL_CIC_START_B_BIT));
dai_dmic_write(dmic, base[n] + CIC_CONTROL, val);
LOG_DBG("dmic_set_config_nhlt(): CIC_CONTROL = %08x", val);