From be35a1f3f33f455de3e596a72a324fbca987ee04 Mon Sep 17 00:00:00 2001
From: Jiafei Pan <Jiafei.Pan@nxp.com>
Date: Fri, 21 Mar 2025 16:33:00 +0800
Subject: [PATCH] dts: arm64: imx93: add USDHC device nodes

Add device nodes for SDHC.

Signed-off-by: Jiafei Pan <Jiafei.Pan@nxp.com>
---
 dts/arm64/nxp/nxp_mimx93_a55.dtsi | 26 ++++++++++++++++++++++++++
 1 file changed, 26 insertions(+)

diff --git a/dts/arm64/nxp/nxp_mimx93_a55.dtsi b/dts/arm64/nxp/nxp_mimx93_a55.dtsi
index 6af6bdfffc9..253e5ad6506 100644
--- a/dts/arm64/nxp/nxp_mimx93_a55.dtsi
+++ b/dts/arm64/nxp/nxp_mimx93_a55.dtsi
@@ -375,6 +375,32 @@
 		status = "disabled";
 	};
 
+	usdhc1: usdhc@42850000 {
+		compatible = "nxp,imx-usdhc";
+		reg = <0x42850000 0x10000>;
+		interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		clocks = <&ccm IMX_CCM_USDHC1_CLK 0 0>;
+		max-current-330 = <1020>;
+		max-current-180 = <1020>;
+		max-bus-freq = <208000000>;
+		min-bus-freq = <400000>;
+		status = "disabled";
+	};
+
+	usdhc2: usdhc@42860000 {
+		compatible = "nxp,imx-usdhc";
+		reg = <0x42860000 0x10000>;
+		interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL IRQ_DEFAULT_PRIORITY>;
+		interrupt-parent = <&gic>;
+		clocks = <&ccm IMX_CCM_USDHC2_CLK 0 0>;
+		max-current-330 = <1020>;
+		max-current-180 = <1020>;
+		max-bus-freq = <208000000>;
+		min-bus-freq = <400000>;
+		status = "disabled";
+	};
+
 	enet: enet@42890000 {
 		compatible = "nxp,enet1g";
 		reg = <0x42890000 DT_SIZE_K(64)>;