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soc/intel_adsp: Unify trace backends

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This platform had separate backends for the log subsystem and printk
handler, which was silly.  Unify them to use the same backend so they
don't clobber each other.

This patch appears to be a lot of lines, but it's really mostly code
motion and renaming.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
This commit is contained in:
Andy Ross 2020-10-29 13:07:50 -07:00 • committed by Andrew Boie
commit be2a5824f3
10 changed files with 135 additions and 270 deletions
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8
soc/xtensa/intel_adsp/cavs_v15/Kconfig.defconfig.series
View file

@ -66,15 +66,9 @@ if LOG
config LOG_PRINTK
default y
config LOG_BACKEND_RB
config LOG_BACKEND_ADSP
default y
config LOG_BACKEND_RB_MEM_BASE
default 0xBE000000
config LOG_BACKEND_RB_MEM_SIZE
default 8192
endif # LOG
if SMP

8
soc/xtensa/intel_adsp/cavs_v18/Kconfig.defconfig.series
View file

@ -52,15 +52,9 @@ if LOG
config LOG_PRINTK
default y if !CONSOLE
config LOG_BACKEND_RB
config LOG_BACKEND_ADSP
default y
config LOG_BACKEND_RB_MEM_BASE
default 0xBE000000
config LOG_BACKEND_RB_MEM_SIZE
default 8192
endif # LOG
if SMP

8
soc/xtensa/intel_adsp/cavs_v20/Kconfig.defconfig.series
View file

@ -51,15 +51,9 @@ if LOG
config LOG_PRINTK
default y
config LOG_BACKEND_RB
config LOG_BACKEND_ADSP
default y
config LOG_BACKEND_RB_MEM_BASE
default 0xBE000000
config LOG_BACKEND_RB_MEM_SIZE
default 8192
endif # LOG
if SMP

8
soc/xtensa/intel_adsp/cavs_v25/Kconfig.defconfig.series
View file

@ -51,15 +51,9 @@ if LOG
config LOG_PRINTK
default y
config LOG_BACKEND_RB
config LOG_BACKEND_ADSP
default y
config LOG_BACKEND_RB_MEM_BASE
default 0xBE000000
config LOG_BACKEND_RB_MEM_SIZE
default 8192
endif # LOG
if SMP

2
soc/xtensa/intel_adsp/common/CMakeLists.txt
View file

@ -15,7 +15,7 @@ zephyr_library_sources(adsp.c)
zephyr_library_sources(main_entry.S)
zephyr_library_sources(soc.c)
zephyr_library_sources(soc_mp.c)
zephyr_library_sources(printk_out.c)
zephyr_library_sources(trace_out.c)
zephyr_library_link_libraries(INTEL_ADSP_COMMON)

58
soc/xtensa/intel_adsp/common/printk_out.c → soc/xtensa/intel_adsp/common/trace_out.c
View file

@ -7,11 +7,12 @@
#include <adsp/cache.h>
#include <soc/shim.h>
/* Simple char-at-a-time output rig to the host kernel from a ADSP
* device. The protocol uses an array of "slots" in shared memory,
* each of which has a 16 bit magic number to validate and a
* sequential ID number. The remaining bytes are a (potentially
* nul-terminated) string containing output data.
/* Simple output driver for the trace window of an ADSP device used
* for communication with the host processor as a shared memory
* region. The protocol uses an array of 64-byte "slots", each of
* which is prefixed by a 16 bit magic number followed by a sequential
* ID number. The remaining bytes are a (potentially nul-terminated)
* string containing output data.
*
* IMPORTANT NOTE on cache coherence: the shared memory window is in
* HP-SRAM. Each DSP core has an L1 cache that is incoherent (!) from
@ -44,9 +45,9 @@ struct slot {
struct metadata {
struct k_spinlock lock;
int initialized;
int curr_slot; /* To which slot are we writing? */
int n_bytes; /* How many bytes buffered in curr_slot */
bool initialized;
uint32_t curr_slot; /* To which slot are we writing? */
uint32_t n_bytes; /* How many bytes buffered in curr_slot */
};
/* Give it a cache line all its own! */
@ -64,7 +65,7 @@ static inline struct slot *slot(int i)
return &slots[i];
}
int arch_printk_char_out(int c)
void intel_adsp_trace_out(int8_t *str, size_t len)
{
k_spinlock_key_t key = k_spin_lock(&data->lock);
@ -75,22 +76,41 @@ int arch_printk_char_out(int c)
data->initialized = 1;
}
struct slot *s = slot(data->curr_slot);
/* We work with a local copy of the global data for
* performance reasons (*data is uncached!) and put it back at
* the end.
*/
uint32_t curr_slot = data->curr_slot;
uint32_t n_bytes = data->n_bytes;
s->msg[data->n_bytes++] = c;
for (size_t i = 0; i < len; i++) {
int8_t c = str[i];
struct slot *s = slot(curr_slot);
if (data->n_bytes < MSGSZ) {
s->msg[data->n_bytes] = 0;
s->msg[n_bytes++] = c;
if (c == '\n' || n_bytes >= MSGSZ) {
curr_slot = (curr_slot + 1) % NSLOTS;
n_bytes = 0;
slot(curr_slot)->hdr.magic = 0;
slot(curr_slot)->hdr.id = s->hdr.id + 1;
s->hdr.magic = SLOT_MAGIC;
}
}
if (c == '\n' || data->n_bytes >= MSGSZ) {
data->curr_slot = (data->curr_slot + 1) % NSLOTS;
data->n_bytes = 0;
slot(data->curr_slot)->hdr.magic = 0;
slot(data->curr_slot)->hdr.id = s->hdr.id + 1;
s->hdr.magic = SLOT_MAGIC;
if (n_bytes < MSGSZ) {
slot(curr_slot)->msg[n_bytes] = 0;
}
data->curr_slot = curr_slot;
data->n_bytes = n_bytes;
k_spin_unlock(&data->lock, key);
}
int arch_printk_char_out(int c)
{
int8_t s = c;
intel_adsp_trace_out(&s, 1);
return 0;
}