drivers: eSPI: add eSPI driver support for NPCX7 series.

In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.

Becisdes introducing eSPI device in npcx7, this CL also includes:

1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
   Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This commit is contained in:
Mulin Chao 2020-09-10 17:39:44 +08:00 committed by Carles Cufí
commit be217e4a3a
18 changed files with 1373 additions and 0 deletions

View file

@ -0,0 +1,35 @@
/*
* Copyright (c) 2020 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCX_ESPI_H_
#define ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCX_ESPI_H_
/* eSPI VW Master to Slave Register Index */
#define NPCX_VWEVMS0 0
#define NPCX_VWEVMS1 1
#define NPCX_VWEVMS2 2
#define NPCX_VWEVMS3 3
#define NPCX_VWEVMS4 4
#define NPCX_VWEVMS5 5
#define NPCX_VWEVMS6 6
#define NPCX_VWEVMS7 7
#define NPCX_VWEVMS8 8
#define NPCX_VWEVMS9 9
/* eSPI VW Slave to Master Register Index */
#define NPCX_VWEVSM0 0
#define NPCX_VWEVSM1 1
#define NPCX_VWEVSM2 2
#define NPCX_VWEVSM3 3
#define NPCX_VWEVSM4 4
#define NPCX_VWEVSM5 5
#define NPCX_VWEVSM6 6
#define NPCX_VWEVSM7 7
#define NPCX_VWEVSM8 8
#define NPCX_VWEVSM9 9
#define NPCX_VWEVSM10 10
#define NPCX_VWEVSM11 11
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ESPI_NPCX_ESPI_H_ */