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serial: nxp_s32: use instance-based DT macros

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At present, many of the NXP S32 shim drivers do not make use of
devicetree instance-based macros because the NXP S32 HAL relies on an
index-based approach, requiring knowledge of the peripheral instance
index during both compilation and runtime, and this index might not
align with the devicetree instance index.

The proposed solution in this patch eliminates this limitation by
determining the peripheral instance index during compilation
through macrobatics and defining the driver's ISR within the shim
driver itself.

Note that for some peripheral instances is needed to redefine the
HAL macros of the peripheral base address, since the naming is not
uniform for all instances.

Signed-off-by: Manuel Argüelles <manuel.arguelles@nxp.com>
This commit is contained in:
Manuel Argüelles 2023-11-04 09:08:15 +07:00 • committed by Carles Cufí
commit bda3b101d3
3 changed files with 88 additions and 238 deletions
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soc/arm/nxp_s32/s32ze/soc.h
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@ -15,4 +15,7 @@
/* SIUL2 */
#define IP_SIUL2_2_BASE 0U /* instance does not exist on this SoC */
/* LINFlexD*/
#define IP_LINFLEX_12_BASE IP_MSC_0_LIN_BASE
#endif /* _NXP_S32_S32ZE_SOC_H_ */