diff --git a/dts/arm/st/f7/stm32f746.dtsi b/dts/arm/st/f7/stm32f746.dtsi
index 6b3cbaf64fd..1d42aacd9c9 100644
--- a/dts/arm/st/f7/stm32f746.dtsi
+++ b/dts/arm/st/f7/stm32f746.dtsi
@@ -29,5 +29,18 @@
 				label = "GPIOK";
 			};
 		};
+
+		i2c4: i2c@40006000 {
+			compatible = "st,stm32-i2c-v2";
+			clock-frequency = <I2C_BITRATE_STANDARD>;
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0x40006000 0x400>;
+			clocks = <&rcc STM32_CLOCK_BUS_APB1 0x01000000>;
+			interrupts = <95 0>, <96 0>;
+			interrupt-names = "event", "error";
+			status = "disabled";
+			label = "I2C_4";
+		};
 	};
 };
diff --git a/soc/arm/st_stm32/stm32f7/dts_fixup.h b/soc/arm/st_stm32/stm32f7/dts_fixup.h
index 71bbb718b58..196b4df5d13 100644
--- a/soc/arm/st_stm32/stm32f7/dts_fixup.h
+++ b/soc/arm/st_stm32/stm32f7/dts_fixup.h
@@ -195,6 +195,16 @@
 #define DT_I2C_3_CLOCK_BITS			DT_ST_STM32_I2C_V2_40005C00_CLOCK_BITS
 #define DT_I2C_3_CLOCK_BUS			DT_ST_STM32_I2C_V2_40005C00_CLOCK_BUS
 
+#define DT_I2C_4_BASE_ADDRESS		DT_ST_STM32_I2C_V2_40006000_BASE_ADDRESS
+#define DT_I2C_4_EVENT_IRQ_PRI		DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT_PRIORITY
+#define DT_I2C_4_ERROR_IRQ_PRI		DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR_PRIORITY
+#define CONFIG_I2C_4_NAME			DT_ST_STM32_I2C_V2_40006000_LABEL
+#define DT_I2C_4_EVENT_IRQ			DT_ST_STM32_I2C_V2_40006000_IRQ_EVENT
+#define DT_I2C_4_ERROR_IRQ			DT_ST_STM32_I2C_V2_40006000_IRQ_ERROR
+#define DT_I2C_4_BITRATE			DT_ST_STM32_I2C_V2_40006000_CLOCK_FREQUENCY
+#define DT_I2C_4_CLOCK_BITS			DT_ST_STM32_I2C_V2_40006000_CLOCK_BITS
+#define DT_I2C_4_CLOCK_BUS			DT_ST_STM32_I2C_V2_40006000_CLOCK_BUS
+
 #define DT_SPI_1_BASE_ADDRESS               DT_ST_STM32_SPI_40013000_BASE_ADDRESS
 #define DT_SPI_1_IRQ_PRI                    DT_ST_STM32_SPI_40013000_IRQ_0_PRIORITY
 #define DT_SPI_1_NAME                       DT_ST_STM32_SPI_40013000_LABEL