drivers: gpio_mcux: Update for handling local layer in core
Remove handling for GPIO_INT_LEVELS_LOGICAL in driver now that we do that in gpio_pin_interrupt_configure and gpio_pin_configure. Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
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b535881f0c
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1 changed files with 27 additions and 39 deletions
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@ -21,7 +21,8 @@ struct gpio_mcux_config {
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};
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struct gpio_mcux_data {
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struct gpio_driver_data general;
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/* gpio_driver_data needs to be first */
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struct gpio_driver_data common;
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/* port ISR callback routine address */
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sys_slist_t callbacks;
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/* pin callback routine enable flags, by pin number */
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@ -29,40 +30,33 @@ struct gpio_mcux_data {
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};
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static u32_t get_port_pcr_irqc_value_from_flags(struct device *dev,
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u32_t pin, unsigned int flags)
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u32_t pin, enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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struct gpio_mcux_data *data = dev->driver_data;
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port_interrupt_t port_interrupt = 0;
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bool rising_edge;
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bool falling_edge;
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if ((flags & GPIO_INT_LEVELS_LOGICAL) &&
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(data->general.invert & BIT(pin))) {
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rising_edge = flags & GPIO_INT_LOW_0;
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falling_edge = flags & GPIO_INT_HIGH_1;
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if (mode == GPIO_INT_MODE_DISABLED) {
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port_interrupt = kPORT_InterruptOrDMADisabled;
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} else {
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rising_edge = flags & GPIO_INT_HIGH_1;
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falling_edge = flags & GPIO_INT_LOW_0;
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}
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if (flags & GPIO_INT_ENABLE) {
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if (flags & GPIO_INT_EDGE) {
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if (rising_edge && falling_edge) {
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port_interrupt = kPORT_InterruptEitherEdge;
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} else if (rising_edge) {
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port_interrupt = kPORT_InterruptRisingEdge;
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} else {
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port_interrupt = kPORT_InterruptFallingEdge;
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}
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} else { /* GPIO_INT_LEVEL */
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if (rising_edge) {
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port_interrupt = kPORT_InterruptLogicOne;
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} else {
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if (mode == GPIO_INT_MODE_LEVEL) {
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if (trig == GPIO_INT_TRIG_LOW) {
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port_interrupt = kPORT_InterruptLogicZero;
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} else {
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port_interrupt = kPORT_InterruptLogicOne;
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}
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} else {
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switch (trig) {
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case GPIO_INT_TRIG_LOW:
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port_interrupt = kPORT_InterruptFallingEdge;
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break;
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case GPIO_INT_TRIG_HIGH:
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port_interrupt = kPORT_InterruptRisingEdge;
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break;
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case GPIO_INT_TRIG_BOTH:
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port_interrupt = kPORT_InterruptEitherEdge;
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break;
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}
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}
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} else {
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port_interrupt = kPORT_InterruptOrDMADisabled;
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}
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return PORT_PCR_IRQC(port_interrupt);
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@ -103,12 +97,6 @@ static int gpio_mcux_configure(struct device *dev,
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return -ENOTSUP;
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}
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if ((flags & GPIO_ACTIVE_LOW) != 0) {
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data->general.invert |= BIT(pin);
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} else {
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data->general.invert &= ~BIT(pin);
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}
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/* The flags contain options that require touching registers in the
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* GPIO module and the corresponding PORT module.
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*
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@ -155,7 +143,6 @@ static int gpio_mcux_configure(struct device *dev,
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* but don't write it to the PCR register yet.
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*/
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mask |= PORT_PCR_IRQC_MASK;
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pcr |= get_port_pcr_irqc_value_from_flags(dev, pin, flags);
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/* Now we can write the PORT PCR register(s). If accessing by pin, we
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* only need to write one PCR register. Otherwise, write all the PCR
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@ -276,7 +263,8 @@ static int gpio_mcux_port_toggle_bits(struct device *dev, u32_t mask)
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}
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static int gpio_mcux_pin_interrupt_configure(struct device *dev,
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unsigned int pin, unsigned int flags)
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unsigned int pin, enum gpio_int_mode mode,
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enum gpio_int_trig trig)
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{
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const struct gpio_mcux_config *config = dev->config->config_info;
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PORT_Type *port_base = config->port_base;
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@ -288,16 +276,16 @@ static int gpio_mcux_pin_interrupt_configure(struct device *dev,
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}
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/* Check if GPIO port supports interrupts */
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if ((flags & GPIO_INT_ENABLE) &&
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if ((mode != GPIO_INT_MODE_DISABLED) &&
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((config->flags & GPIO_INT_ENABLE) == 0U)) {
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return -ENOTSUP;
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}
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u32_t pcr = get_port_pcr_irqc_value_from_flags(dev, pin, flags);
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u32_t pcr = get_port_pcr_irqc_value_from_flags(dev, pin, mode, trig);
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port_base->PCR[pin] = (port_base->PCR[pin] & ~PORT_PCR_IRQC_MASK) | pcr;
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WRITE_BIT(data->pin_callback_enables, pin, flags & GPIO_INT_ENABLE);
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WRITE_BIT(data->pin_callback_enables, pin, mode != GPIO_INT_DISABLE);
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return 0;
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}
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