drivers: can: stm32: use clock control API for FDCAN driver
The FDCAN clock was being enabled using HAL APIs instead of the generic clock control API. Signed-off-by: Gerard Marull-Paretas <gerard.marull@nordicsemi.no>
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783bc9db26
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1 changed files with 23 additions and 7 deletions
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@ -6,6 +6,8 @@
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*/
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*/
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#include <zephyr/drivers/can.h>
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#include <zephyr/drivers/can.h>
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#include <zephyr/drivers/clock_control/stm32_clock_control.h>
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#include <zephyr/drivers/clock_control.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/drivers/pinctrl.h>
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#include <zephyr/kernel.h>
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#include <zephyr/kernel.h>
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#include <soc.h>
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#include <soc.h>
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@ -44,6 +46,7 @@ LOG_MODULE_REGISTER(can_stm32fd, CONFIG_CAN_LOG_LEVEL);
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#define DT_DRV_COMPAT st_stm32_fdcan
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#define DT_DRV_COMPAT st_stm32_fdcan
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struct can_stm32fd_config {
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struct can_stm32fd_config {
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struct stm32_pclken pclken;
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void (*config_irq)(void);
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void (*config_irq)(void);
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const struct pinctrl_dev_config *pcfg;
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const struct pinctrl_dev_config *pcfg;
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};
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};
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@ -64,8 +67,12 @@ static int can_stm32fd_get_core_clock(const struct device *dev, uint32_t *rate)
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return 0;
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return 0;
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}
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}
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static void can_stm32fd_clock_enable(void)
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static int can_stm32fd_clock_enable(const struct device *dev)
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{
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{
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int ret;
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const struct can_mcan_config *mcan_cfg = dev->config;
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const struct can_stm32fd_config *stm32fd_cfg = mcan_cfg->custom;
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LL_RCC_SetFDCANClockSource(CAN_STM32FD_CLOCK_SOURCE);
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LL_RCC_SetFDCANClockSource(CAN_STM32FD_CLOCK_SOURCE);
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/* LL_RCC API names do not align with PLL output name but are correct */
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/* LL_RCC API names do not align with PLL output name but are correct */
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@ -75,11 +82,11 @@ static void can_stm32fd_clock_enable(void)
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LL_RCC_PLL2_EnableDomain_SAI();
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LL_RCC_PLL2_EnableDomain_SAI();
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#endif
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#endif
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#ifdef CONFIG_SOC_SERIES_STM32U5X
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ret = clock_control_on(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
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LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_FDCAN1);
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(clock_control_subsys_t *)&stm32fd_cfg->pclken);
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#else
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if (ret < 0) {
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__HAL_RCC_FDCAN_CLK_ENABLE();
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return ret;
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#endif
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}
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FDCAN_CONFIG->CKDIV = CAN_STM32FD_CLOCK_DIVISOR >> 1;
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FDCAN_CONFIG->CKDIV = CAN_STM32FD_CLOCK_DIVISOR >> 1;
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}
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}
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@ -97,7 +104,12 @@ static int can_stm32fd_init(const struct device *dev)
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return ret;
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return ret;
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}
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}
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can_stm32fd_clock_enable();
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ret = can_stm32fd_clock_enable(dev);
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if (ret < 0) {
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LOG_ERR("Could not turn on CAN clock (%d)", ret);
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return ret;
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}
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ret = can_mcan_init(dev);
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ret = can_mcan_init(dev);
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if (ret != 0) {
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if (ret != 0) {
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return ret;
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return ret;
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@ -173,6 +185,10 @@ static void config_can_##inst##_irq(void) \
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PINCTRL_DT_INST_DEFINE(inst); \
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PINCTRL_DT_INST_DEFINE(inst); \
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\
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\
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static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
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static const struct can_stm32fd_config can_stm32fd_cfg_##inst = { \
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.pclken = { \
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.enr = DT_INST_CLOCKS_CELL(inst, bits), \
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.bus = DT_INST_CLOCKS_CELL(inst, bus), \
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}, \
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.config_irq = config_can_##inst##_irq, \
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.config_irq = config_can_##inst##_irq, \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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.pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
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}; \
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}; \
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