michaelh/zephyr
1
0
Fork 0
Code Releases Activity

boards: arm: add Arduino GIGA

Browse source 
Add support for the Arduino GIGA board, an STM32H747XI based development
board in Arduino form factor, featuring external flash, SDRAM, Bluetooth
and WiFi.

Signed-off-by: Fabio Baltieri <fabiobaltieri@google.com>
This commit is contained in:
Fabio Baltieri 2023-02-10 19:48:11 +00:00 • committed by Carles Cufí
commit bc612b8ebd
15 changed files with 677 additions and 4 deletions
Download patch file Download diff file Expand all files Collapse all files

12
boards/arm/arduino_giga_r1/Kconfig.board Normal file
View file

@ -0,0 +1,12 @@
# Copyright 2023 Google LLC
# SPDX-License-Identifier: Apache-2.0
config BOARD_ARDUINO_GIGA_R1_M7
bool "Arduino GIGA R1 WiFi Board (M7)"
depends on SOC_STM32H747XX
select CPU_CORTEX_M7
config BOARD_ARDUINO_GIGA_R1_M4
bool "Arduino GIGA R1 WiFi Board (M4)"
depends on SOC_STM32H747XX
select CPU_CORTEX_M4

13
boards/arm/arduino_giga_r1/Kconfig.defconfig Normal file
View file

@ -0,0 +1,13 @@
# Copyright 2023 Google LLC
# SPDX-License-Identifier: Apache-2.0
if BOARD_ARDUINO_GIGA_R1_M7 || BOARD_ARDUINO_GIGA_R1_M4
config BOARD
default "arduino_giga_r1_m7" if BOARD_ARDUINO_GIGA_R1_M7
default "arduino_giga_r1_m4" if BOARD_ARDUINO_GIGA_R1_M4
config STM32H7_DUAL_CORE
default y
endif # BOARD_ARDUINO_GIGA_R1_M7 || BOARD_ARDUINO_GIGA_R1_M4

38
boards/arm/arduino_giga_r1/arduino_giga_r1.dtsi Normal file
View file

@ -0,0 +1,38 @@
/*
* Copyright 2023 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
#include "arduino_r3_connector.dtsi"
/ {
leds {
compatible = "gpio-leds";
red_led: led_0 {
gpios = <&gpioi 12 GPIO_ACTIVE_LOW>;
};
green_led: led_1 {
gpios = <&gpioj 13 GPIO_ACTIVE_LOW>;
};
blue_led: led_2 {
gpios = <&gpioe 3 GPIO_ACTIVE_LOW>;
};
};
gpio_keys {
compatible = "gpio-keys";
user_button: button_0 {
gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
};
};
};
&rcc {
d1cpre = <1>;
hpre = <2>;
d1ppre = <2>;
d2ppre1 = <2>;
d2ppre2 = <2>;
d3ppre = <2>;
};

37
boards/arm/arduino_giga_r1/arduino_giga_r1_m4.dts Normal file
View file

@ -0,0 +1,37 @@
/*
* Copyright 2023 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/h7/stm32h747Xi_m4.dtsi>
#include <st/h7/stm32h747xihx-pinctrl.dtsi>
#include "arduino_giga_r1.dtsi"
/ {
model = "Arduino GIGA R1 WiFi Board (M4)";
compatible = "arduino,giga-r1";
chosen {
zephyr,console = &usart2;
zephyr,shell-uart = &usart2;
zephyr,sram = &sram1;
zephyr,flash = &flash1;
};
aliases {
led0 = &blue_led;
};
};
&rcc {
clock-frequency = <DT_FREQ_M(240)>;
};
&usart2 {
status = "okay";
pinctrl-0 = <&usart2_tx_pd5 &usart2_rx_pd6>;
pinctrl-names = "default";
current-speed = <115200>;
};

18
boards/arm/arduino_giga_r1/arduino_giga_r1_m4.yaml Normal file
View file

@ -0,0 +1,18 @@
identifier: arduino_giga_r1_m4
name: Arduino GIGA R1 WiFi (M4)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 288
flash: 1024
supported:
- arduino_gpio
- gpio
testing:
ignore_tags:
- mpu
- nfc
- net

30
boards/arm/arduino_giga_r1/arduino_giga_r1_m4_defconfig Normal file
View file

@ -0,0 +1,30 @@
# Copyright 2023 Google LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_STM32H7X=y
CONFIG_SOC_STM32H747XX=y
# Board config should be specified since there are 2 possible targets
CONFIG_BOARD_ARDUINO_GIGA_R1_M4=y
# Enable GPIO
CONFIG_GPIO=y
# Clock configuration
CONFIG_CLOCK_CONTROL=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable uart driver
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable pin controller
CONFIG_PINCTRL=y

242
boards/arm/arduino_giga_r1/arduino_giga_r1_m7.dts Normal file
View file

@ -0,0 +1,242 @@
/*
* Copyright 2023 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <st/h7/stm32h747Xi_m7.dtsi>
#include <st/h7/stm32h747xihx-pinctrl.dtsi>
#include "arduino_giga_r1.dtsi"
/ {
model = "Arduino GIGA R1 WiFi Board (M7)";
compatible = "arduino,giga-r1";
chosen {
zephyr,console = &usart1;
zephyr,shell-uart = &usart1;
zephyr,uart-mcumgr = &usart1;
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,canbus = &can2;
zephyr,code-partition = &slot0_partition;
};
sdram1: sdram@c0000000 {
compatible = "zephyr,memory-region", "mmio-sram";
device_type = "memory";
reg = <0xc0000000 DT_SIZE_M(8)>;
zephyr,memory-region = "SDRAM1";
zephyr,memory-region-mpu = "RAM";
};
aliases {
led0 = &red_led;
led1 = &green_led;
sw0 = &user_button;
spi-flash0 = &n25q128a1;
};
};
&clk_hse {
status = "okay";
clock-frequency = <DT_FREQ_M(16)>;
};
&clk_lse {
status = "okay";
};
&clk_hsi48 {
status = "okay";
};
&pll {
div-m = <2>;
mul-n = <120>;
div-p = <2>;
div-q = <4>;
div-r = <2>;
clocks = <&clk_hse>;
status = "okay";
};
&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(480)>;
};
&usart1 {
status = "okay";
pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pb7>;
pinctrl-names = "default";
current-speed = <115200>;
};
&usart6 {
status = "disabled";
pinctrl-0 = <&usart6_tx_pg14 &usart6_rx_pc7>;
pinctrl-names = "default";
current-speed = <115200>;
};
&uart4 {
status = "disabled";
pinctrl-0 = <&uart4_tx_ph13 &uart4_rx_pi9>;
pinctrl-names = "default";
current-speed = <115200>;
};
&uart7 {
status = "disabled";
pinctrl-0 = <&uart7_tx_pf7 &uart7_rx_pa8
&uart7_cts_pf9 &uart7_rts_pf8>;
pinctrl-names = "default";
current-speed = <115200>;
status = "okay";
hw-flow-control;
};
&i2c4 {
status = "okay";
pinctrl-0 = <&i2c4_scl_pb6 &i2c4_sda_ph12>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_STANDARD>;
};
&i2c1 {
status = "disabled";
pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c2 {
status = "disabled";
pinctrl-0 = <&i2c2_scl_ph4 &i2c2_sda_pb11>;
pinctrl-names = "default";
clock-frequency = <I2C_BITRATE_FAST>;
};
&spi5 {
status = "okay";
pinctrl-0 = <&spi5_nss_pk1 &spi5_sck_ph6
&spi5_miso_pj11 &spi5_mosi_pj10>;
pinctrl-names = "default";
};
&can2 {
status = "okay";
pinctrl-0 = <&fdcan2_tx_pb13 &fdcan2_rx_pb5>;
pinctrl-names = "default";
bus-speed = <125000>;
bus-speed-data = <1000000>;
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "bootloader";
reg = <0x0 0x40000>;
read-only;
};
slot0_partition: partition@40000 {
label = "image-0";
reg = <0x40000 0x000c0000>;
};
};
};
&quadspi {
pinctrl-0 = <&quadspi_clk_pf10 &quadspi_bk1_ncs_pg6
&quadspi_bk1_io0_pd11 &quadspi_bk1_io1_pd12
&quadspi_bk1_io2_pe2 &quadspi_bk1_io3_pf6>;
pinctrl-names = "default";
status = "okay";
n25q128a1: qspi-nor-flash@0 {
compatible = "st,stm32-qspi-nor";
reg = <0>;
qspi-max-frequency = <72000000>;
size = <DT_SIZE_M(16*8)>;
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
slot1_partition: partition@0 {
label = "image-1";
reg = <0x00000000 DT_SIZE_M(1)>;
};
storage_partition: partition@100000 {
label = "storage";
reg = <0x00100000 DT_SIZE_M(15)>;
};
};
};
};
&rng {
status = "okay";
};
&dac1 {
status = "okay";
pinctrl-0 = <&dac1_out1_pa4 &dac1_out2_pa5>;
pinctrl-names = "default";
};
&fmc {
status = "okay";
pinctrl-0 = <&fmc_nbl0_pe0 &fmc_nbl1_pe1
&fmc_sdclk_pg8 &fmc_sdnwe_ph5 &fmc_sdcke0_ph2
&fmc_sdne0_ph3 &fmc_sdnras_pf11 &fmc_sdncas_pg15
&fmc_a0_pf0 &fmc_a1_pf1 &fmc_a2_pf2 &fmc_a3_pf3 &fmc_a4_pf4
&fmc_a5_pf5 &fmc_a6_pf12 &fmc_a7_pf13 &fmc_a8_pf14
&fmc_a9_pf15 &fmc_a10_pg0 &fmc_a11_pg1 &fmc_a12_pg2
&fmc_a14_pg4 &fmc_a15_pg5
&fmc_d0_pd14 &fmc_d1_pd15 &fmc_d2_pd0 &fmc_d3_pd1
&fmc_d4_pe7 &fmc_d5_pe8 &fmc_d6_pe9 &fmc_d7_pe10
&fmc_d8_pe11 &fmc_d9_pe12 &fmc_d10_pe13 &fmc_d11_pe14
&fmc_d12_pe15 &fmc_d13_pd8 &fmc_d14_pd9 &fmc_d15_pd10>;
pinctrl-names = "default";
sdram {
status = "okay";
power-up-delay = <100>;
num-auto-refresh = <8>;
mode-register = <0x220>;
refresh-rate = <603>;
bank@0 {
reg = <0>;
st,sdram-control = <STM32_FMC_SDRAM_NC_8
STM32_FMC_SDRAM_NR_12
STM32_FMC_SDRAM_MWID_16
STM32_FMC_SDRAM_NB_4
STM32_FMC_SDRAM_CAS_2
STM32_FMC_SDRAM_SDCLK_PERIOD_2
STM32_FMC_SDRAM_RBURST_ENABLE
STM32_FMC_SDRAM_RPIPE_0>;
st,sdram-timing = <2 6 4 6 2 2 2>;
};
};
};
zephyr_udc0: &usbotg_fs {
status = "okay";
pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>;
pinctrl-names = "default";
};

18
boards/arm/arduino_giga_r1/arduino_giga_r1_m7.yaml Normal file
View file

@ -0,0 +1,18 @@
identifier: arduino_giga_r1_m7
name: Arduino GIGA R1 WiFi (M7)
type: mcu
arch: arm
toolchain:
- zephyr
- gnuarmemb
- xtools
ram: 512
flash: 1024
supported:
- arduino_gpio
- gpio
- arduino_spi
- spi
- memc
- usb_cdc
- usb_device

36
boards/arm/arduino_giga_r1/arduino_giga_r1_m7_defconfig Normal file
View file

@ -0,0 +1,36 @@
# Copyright 2023 Google LLC
# SPDX-License-Identifier: Apache-2.0
CONFIG_SOC_SERIES_STM32H7X=y
CONFIG_SOC_STM32H747XX=y
# Board config should be specified since there are 2 possible targets
CONFIG_BOARD_ARDUINO_GIGA_R1_M7=y
# Disable the internal SMPS regulator
CONFIG_POWER_SUPPLY_DIRECT_SMPS=n
# Enable GPIO
CONFIG_GPIO=y
# Enable clocks
CONFIG_CLOCK_CONTROL=y
# Enable MPU
CONFIG_ARM_MPU=y
# Enable HW stack protection
CONFIG_HW_STACK_PROTECTION=y
# Enable uart driver
CONFIG_SERIAL=y
# Console
CONFIG_CONSOLE=y
CONFIG_UART_CONSOLE=y
# Enable pin controller
CONFIG_PINCTRL=y
# Use zephyr,code-partition as flash offset
CONFIG_USE_DT_CODE_PARTITION=y

40
boards/arm/arduino_giga_r1/arduino_r3_connector.dtsi Normal file
View file

@ -0,0 +1,40 @@
/*
* Copyright 2023 Google LLC
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
arduino_header: connector {
compatible = "arduino-header-r3";
#gpio-cells = <2>;
gpio-map-mask = <0xffffffff 0xffffffc0>;
gpio-map-pass-thru = <0 0x3f>;
gpio-map = < 0 0 &gpioc 4 0>, /* A0 */
< 1 0 &gpioc 5 0>, /* A1 */
< 2 0 &gpiob 0 0>, /* A2 */
< 3 0 &gpiob 1 0>, /* A3 */
< 4 0 &gpioc 3 0>, /* A4 */
< 5 0 &gpioc 2 0>, /* A5 */
< 6 0 &gpiob 7 0>, /* D0 */
< 7 0 &gpioa 9 0>, /* D1 */
< 8 0 &gpioa 3 0>, /* D2 */
< 9 0 &gpioa 2 0>, /* D3 */
<10 0 &gpioj 8 0>, /* D4 */
<11 0 &gpioa 7 0>, /* D5 */
<12 0 &gpiod 13 0>, /* D6 */
<13 0 &gpiob 4 0>, /* D7 */
<14 0 &gpiob 8 0>, /* D8 */
<15 0 &gpiob 9 0>, /* D9 */
<16 0 &gpiok 1 0>, /* D10 */
<17 0 &gpioj 10 0>, /* D11 */
<18 0 &gpioj 11 0>, /* D12 */
<19 0 &gpioh 6 0>, /* D13 */
<20 0 &gpioh 12 0>, /* D14 */
<21 0 &gpiob 6 0>; /* D15 */
};
};
arduino_i2c: &i2c4 {};
arduino_spi: &spi5 {};
arduino_serial: &usart1 {};

13
boards/arm/arduino_giga_r1/board.cmake Normal file
View file

@ -0,0 +1,13 @@
# SPDX-License-Identifier: Apache-2.0
if(CONFIG_BOARD_ARDUINO_GIGA_R1_M7)
board_runner_args(jlink "--device=STM32H747XI_M7" "--speed=4000")
elseif(CONFIG_BOARD_ARDUINO_GIGA_R1_M4)
board_runner_args(jlink "--device=STM32H747XI_M4" "--speed=4000")
endif()
board_runner_args(dfu-util "--pid=2341:0366" "--alt=0" "--dfuse")
board_runner_args(blackmagicprobe "--connect-rst")
include(${ZEPHYR_BASE}/boards/common/dfu-util.board.cmake)
include(${ZEPHYR_BASE}/boards/common/blackmagicprobe.board.cmake)
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

BIN
boards/arm/arduino_giga_r1/doc/img/arduino_giga_r1.jpg Normal file
View file

Binary file not shown.
Side by side

After

Width:  |  Height:  |  Size: 48 KiB

172
boards/arm/arduino_giga_r1/doc/index.rst Normal file
View file

@ -0,0 +1,172 @@
.. _arduino_giga_r1_board:
Arduino GIGA R1 WiFi
####################
Overview
********
Arduino GIGA R1 WiFi is a development board by Arduino based on the
STM32H747XI, a dual core ARM Cortex-M7 + Cortex-M4 MCU, with 2MBytes of Flash
memory and 1MB SRAM.
The board features:
- RGB LED
- Reset and Boot buttons
- USB-C device
- USB Host
- 16MB external QSPI flash
- 8MB external SDRAM
- Murata Type 1DX Bluetooth + WiFi module (CYW4343W based)
- Audio jack
- ATECC608A secure element
.. image:: img/arduino_giga_r1.jpg
:align: center
:alt: Arduino GIGA R1 WiFi
More information about the board, including the datasheet, pinout and
schematics, can be found at the `Arduino GIGA website`_.
More information about STM32H747XIH6 can be found here:
- `STM32H747XI on www.st.com`_
- `STM32H747xx reference manual`_
- `STM32H747xx datasheet`_
Supported Features
==================
The current Zephyr ``arduino_giga_r1_m7`` board configuration supports the
following hardware features:
+-----------+------------+-------------------------------------+
| Interface | Controller | Driver/Component |
+===========+============+=====================================+
| NVIC | on-chip | nested vector interrupt controller |
+-----------+------------+-------------------------------------+
| UART | on-chip | serial port-polling; |
| | | serial port-interrupt |
+-----------+------------+-------------------------------------+
| PINMUX | on-chip | pinmux |
+-----------+------------+-------------------------------------+
| GPIO | on-chip | gpio |
+-----------+------------+-------------------------------------+
| FLASH | on-chip | flash memory |
+-----------+------------+-------------------------------------+
| RNG | on-chip | True Random number generator |
+-----------+------------+-------------------------------------+
| I2C | on-chip | i2c |
+-----------+------------+-------------------------------------+
| SPI | on-chip | spi |
+-----------+------------+-------------------------------------+
| IPM | on-chip | virtual mailbox based on HSEM |
+-----------+------------+-------------------------------------+
| FMC | on-chip | memc (SDRAM) |
+-----------+------------+-------------------------------------+
| QSPI | on-chip | QSPI flash |
+-----------+------------+-------------------------------------+
Other hardware features are not yet supported on Zephyr port.
Resources sharing
=================
The dual core nature of STM32H747 SoC requires sharing HW resources between the
two cores. This is done in 3 ways:
- **Compilation**: Clock configuration is only accessible to M7 core. M4 core only
has access to bus clock activation and deactivation.
- **Static pre-compilation assignment**: Peripherals such as a UART are assigned in
devicetree before compilation. The user must ensure peripherals are not assigned
to both cores at the same time.
- **Run time protection**: Interrupt-controller and GPIO configurations could be
accessed by both cores at run time. Accesses are protected by a hardware semaphore
to avoid potential concurrent access issues.
Programming and Debugging
*************************
Applications for the ``arduino_giga_r1`` board should be built per core target,
using either ``arduino_giga_r1_m7`` or ``arduino_giga_r1_m4`` as the target.
See :ref:`build_an_application` for more information about application builds.
Flashing
========
This board can be flashed either using dfu-util, or with an external debugging
probe, such as a J-Link or Black Magic Probe, connected to the on board MIPI-10
SWD port marked as "JTAG".
.. note::
The board ships with a custom Arduino bootloader programmed in the first
flash page that can be triggered by double clicking the ``RST`` button. This
bootloader is USB-DFU compatible and supports programming both the internal
and external flash and is the one used by ``west flash`` by default. The
internal STM32 ROM bootloader can also be used by pressing ``RST`` while
holding the ``BOOT0`` button, this also supports USB-DFU but can only
program the internal flash and can overwrite the Arduino bootloader. More
details can be found in the "Boot0" section of the `Arduino GIGA Cheat
Sheet`_.
First, connect the Arduino GIGA R1 board to your host computer using the USB
port to prepare it for flashing. Double click the ``RST`` button to put the
board into the Arduino Bootloader mode. Then build and flash your application.
Here is an example for the :ref:`hello_world` application.
.. zephyr-app-commands::
:zephyr-app: samples/hello_world
:board: arduino_giga_r1_m7
:goals: build flash
Run a serial host program to connect with your board:
.. code-block:: console
$ minicom -D /dev/ttyACM0
You should see the following message on the console:
.. code-block:: console
Hello World! arduino_giga_r1_m7
Similarly, you can build and flash samples on the M4 target.
Here is an example for the :ref:`blinky-sample` application on M4 core.
.. zephyr-app-commands::
:zephyr-app: samples/basic/blinky
:board: arduino_giga_r1_m4
:goals: build flash
Debugging
=========
Debugging is supported by using ``west debug`` with an external probe such as a
J-Link or Black Magic Probe, connected to the on board MIPI-10 SWD port marked
as "JTAG". For example::
west debug -r jlink
.. _Arduino GIGA website:
https://docs.arduino.cc/hardware/giga-r1-wifi
.. _Arduino GIGA Cheat Sheet:
https://docs.arduino.cc/tutorials/giga-r1-wifi/cheat-sheet
.. _STM32H747XI on www.st.com:
https://www.st.com/content/st_com/en/products/microcontrollers-microprocessors/stm32-32-bit-arm-cortex-mcus/stm32-high-performance-mcus/stm32h7-series/stm32h747-757/stm32h747xi.html
.. _STM32H747xx reference manual:
http://www.st.com/resource/en/reference_manual/dm00176879.pdf
.. _STM32H747xx datasheet:
https://www.st.com/resource/en/datasheet/stm32h747xi.pdf
.. _dfu-util:
http://dfu-util.sourceforge.net/build.html

3
samples/drivers/flash_shell/sample.yaml
View file

@ -6,6 +6,7 @@ tests:
sample.drivers.flash.shell:
tags: flash shell
filter: CONFIG_FLASH_HAS_DRIVER_ENABLED
platform_exclude: nucleo_h745zi_q_m4 stm32h747i_disco_m4 gd32f350r_eval arduino_portenta_h7_m4
platform_exclude: nucleo_h745zi_q_m4 stm32h747i_disco_m4 gd32f350r_eval
arduino_portenta_h7_m4 arduino_giga_r1_m4
harness: keyboard
min_ram: 12

9
tests/subsys/mgmt/mcumgr/fs_mgmt_hash_supported/testcase.yaml
View file

@ -9,12 +9,15 @@ tests:
mgmt.mcumgr.fs.mgmt.hash.supported.crc32:
extra_args: >
OVERLAY_CONFIG="configuration/crc32.conf"
platform_exclude: nucleo_h745zi_q_m4 arduino_portenta_h7_m4 stm32h747i_disco_m4 esp32_net
platform_exclude: nucleo_h745zi_q_m4 arduino_portenta_h7_m4
stm32h747i_disco_m4 arduino_giga_r1_m4 esp32_net
mgmt.mcumgr.fs.mgmt.hash.supported.sha256:
extra_args: >
OVERLAY_CONFIG="configuration/sha256.conf"
platform_exclude: nucleo_h745zi_q_m4 arduino_portenta_h7_m4 stm32h747i_disco_m4 esp32_net
platform_exclude: nucleo_h745zi_q_m4 arduino_portenta_h7_m4
stm32h747i_disco_m4 arduino_giga_r1_m4 esp32_net
mgmt.mcumgr.fs.mgmt.hash.supported.all:
extra_args: >
OVERLAY_CONFIG="configuration/all.conf"
platform_exclude: nucleo_h745zi_q_m4 arduino_portenta_h7_m4 stm32h747i_disco_m4 esp32_net
platform_exclude: nucleo_h745zi_q_m4 arduino_portenta_h7_m4
stm32h747i_disco_m4 arduino_giga_r1_m4 esp32_net