boards: mimxrt700_evk: Fix USB failures
1. Update the USB clock init code 2. Pass a flag to USB HAL driver for cache management Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
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2 changed files with 8 additions and 2 deletions
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@ -408,6 +408,9 @@ void board_early_init_hook(void)
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#endif
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb0)) && CONFIG_UDC_NXP_EHCI
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(usb0)) && CONFIG_UDC_NXP_EHCI
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/* Power on COM VDDN domain for USB */
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POWER_DisablePD(kPDRUNCFG_DSR_VDDN_COM);
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/* Power on usb ram array as need, powered USB0RAM array*/
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/* Power on usb ram array as need, powered USB0RAM array*/
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POWER_DisablePD(kPDRUNCFG_APD_USB0_SRAM);
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POWER_DisablePD(kPDRUNCFG_APD_USB0_SRAM);
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POWER_DisablePD(kPDRUNCFG_PPD_USB0_SRAM);
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POWER_DisablePD(kPDRUNCFG_PPD_USB0_SRAM);
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@ -425,8 +428,10 @@ void board_early_init_hook(void)
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CLOCK_EnableClock(kCLOCK_UsbphyRef);
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CLOCK_EnableClock(kCLOCK_UsbphyRef);
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RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn);
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RESET_PeripheralReset(kUSB0_RST_SHIFT_RSTn);
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RESET_PeripheralReset(kUSBPHY0_RST_SHIFT_RSTn);
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RESET_PeripheralReset(kUSBPHY0_RST_SHIFT_RSTn);
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CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, usbClockFreq);
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CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M,
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CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, usbClockFreq);
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DT_PROP_BY_PHANDLE(DT_NODELABEL(usb0), clocks, clock_frequency));
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CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M,
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DT_PROP_BY_PHANDLE(DT_NODELABEL(usb0), clocks, clock_frequency));
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#endif
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#endif
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(wwdt0))
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#if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(wwdt0))
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@ -5,6 +5,7 @@
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#
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#
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zephyr_compile_definitions_ifdef(CONFIG_NXP_LP_FLEXCOMM LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER=1)
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zephyr_compile_definitions_ifdef(CONFIG_NXP_LP_FLEXCOMM LPFLEXCOMM_INIT_NOT_USED_IN_DRIVER=1)
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zephyr_compile_definitions_ifdef(CONFIG_UDC_DRIVER USB_DEVICE_CONFIG_BUFFER_PROPERTY_CACHEABLE=1)
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zephyr_compile_definitions(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE)
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zephyr_compile_definitions(FSL_SDK_DRIVER_QUICK_ACCESS_ENABLE)
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