From bb39e9fcb4b0a24bca49bc4b1209039e5329d99a Mon Sep 17 00:00:00 2001
From: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Date: Wed, 3 Mar 2021 22:37:07 -0300
Subject: [PATCH] boards: arm: cy8ckit_062_ble: Add spi config

Create a common dtsi file to share peripherals between both CPU cores.
The spi is the initial shared peripheral.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
---
 .../arm/cy8ckit_062_ble/cy8ckit_062_ble_common.dtsi  | 12 ++++++++++++
 boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.dts    |  8 +++++++-
 boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.yaml   |  3 ++-
 boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m4.dts    |  3 ++-
 boards/arm/cy8ckit_062_ble/doc/index.rst             |  2 ++
 5 files changed, 25 insertions(+), 3 deletions(-)
 create mode 100644 boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_common.dtsi

diff --git a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_common.dtsi b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_common.dtsi
new file mode 100644
index 00000000000..146a299e47b
--- /dev/null
+++ b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_common.dtsi
@@ -0,0 +1,12 @@
+/*
+ * Copyright (c) 2021, ATL Electronics
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+&spi6 {
+	cs-gpios = <&gpio_prt12 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>,
+		   <&gpio_prt13 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
+
+	pinctrl-0 = <&p12_0_spi6_mosi &p12_1_spi6_miso &p12_2_spi6_clk>;
+};
diff --git a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.dts b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.dts
index 18ef546dfd8..b9209e0b61e 100644
--- a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.dts
+++ b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.dts
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2018, Cypress
- * Copyright (c) 2020, ATL Electronics
+ * Copyright (c) 2020-2021, ATL Electronics
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 #include <cypress/psoc6_cm0.dtsi>
+#include "cy8ckit_062_ble_common.dtsi"
 
 / {
 	model = "Cypress PSoC6 BLE Pioneer Kit";
@@ -49,3 +50,8 @@
 &gpio_prt13 {
 	status = "okay";
 };
+
+&spi6 {
+	status = "okay";
+	interrupt-parent = <&intmux_ch16>;
+};
diff --git a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.yaml b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.yaml
index f6aacd9dff5..96ca684ba3e 100644
--- a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.yaml
+++ b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m0.yaml
@@ -1,6 +1,6 @@
 #
 # Copyright (c) 2018, Cypress
-# Copyright (c) 2020, ATL Electronics
+# Copyright (c) 2020-2021, ATL Electronics
 #
 # SPDX-License-Identifier: Apache-2.0
 #
@@ -17,3 +17,4 @@ toolchain:
   - xtools
 supported:
   - gpio
+  - spi
diff --git a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m4.dts b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m4.dts
index 9056f2484d3..82887420422 100644
--- a/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m4.dts
+++ b/boards/arm/cy8ckit_062_ble/cy8ckit_062_ble_m4.dts
@@ -1,6 +1,6 @@
 /*
  * Copyright (c) 2018, Cypress
- * Copyright (c) 2020, ATL Electronics
+ * Copyright (c) 2020-2021, ATL Electronics
  *
  * SPDX-License-Identifier: Apache-2.0
  */
@@ -8,6 +8,7 @@
 /dts-v1/;
 
 #include <cypress/psoc6_cm4.dtsi>
+#include "cy8ckit_062_ble_common.dtsi"
 
 / {
 	model = "Cypress PSoC6 BLE Pioneer Kit";
diff --git a/boards/arm/cy8ckit_062_ble/doc/index.rst b/boards/arm/cy8ckit_062_ble/doc/index.rst
index 4f8b598ccc1..58081f97d9c 100644
--- a/boards/arm/cy8ckit_062_ble/doc/index.rst
+++ b/boards/arm/cy8ckit_062_ble/doc/index.rst
@@ -103,6 +103,8 @@ The board configuration supports the following hardware features:
 +-----------+------------+-----------------------+
 | PINCTRL   | on-chip    | pin control           |
 +-----------+------------+-----------------------+
+| SPI       | on-chip    | spi                   |
++-----------+------------+-----------------------+
 | UART      | on-chip    | serial port-polling;  |
 |           |            | serial port-interrupt |
 +-----------+------------+-----------------------+