soc: esp32: XIP removed from Espressif targets

The way ESP32 XIP works (with MMU and cache) does no fit the way Zephyr XIP
is implemented, causing issues related to included Zephyr linker files.
Flash code still resides in flash for execution, but MMU/Cache handles it
in such way that XIP might not (or should not) be used with current Zephyr
approach. To address this problem, XIP configuration option is being
removed from Espressif targets.

Signed-off-by: Marcio Ribeiro <marcio.ribeiro@espressif.com>
This commit is contained in:
Marcio Ribeiro 2024-08-23 15:20:36 -03:00 committed by Anas Nashif
commit baf62b7a98
17 changed files with 56 additions and 44 deletions

View file

@ -36,12 +36,21 @@ user_dram_seg_len = user_idram_size;
#define RAMABLE_REGION dram0_0_seg
#define ROMABLE_REGION FLASH
#undef GROUP_DATA_LINK_IN
#define GROUP_DATA_LINK_IN(vregion, lregion) > vregion AT > lregion
#undef GROUP_NOLOAD_LINK_IN
#define GROUP_NOLOAD_LINK_IN(vregion, lregion) > vregion
/* Flash segments (rodata and text) should be mapped in the virtual address spaces.
* Executing directly from LMA is not possible. */
#undef GROUP_ROM_LINK_IN
#define GROUP_ROM_LINK_IN(vregion, lregion) > RODATA_REGION AT > lregion
/* Make sure new sections have consistent alignment between input and output sections */
#undef SECTION_DATA_PROLOGUE
#define SECTION_DATA_PROLOGUE(name, options, align) name options : ALIGN_WITH_INPUT
#undef SECTION_PROLOGUE
#define SECTION_PROLOGUE SECTION_DATA_PROLOGUE