drivers: uart_ns16550: Remove CMake-based templating
With some additional macro-magic we can remove the CMake-based header file template feature, and instead take advantage of the usual DT_INST_FOREACH_STATUS_OKAY() macro. Signed-off-by: Johan Hedberg <johan.hedberg@intel.com>
This commit is contained in:
Johan Hedberg
Kumar Gala
parent
8cfa5deb16
commit
baecd7e55a
5 changed files with 117 additions and 150 deletions
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@ -18,6 +18,7 @@ zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPUART uart_mcux_lpuart.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPSCI uart_mcux_lpsci.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MCUX_LPSCI uart_mcux_lpsci.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MIV uart_miv.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MIV uart_miv.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MSP432P4XX uart_msp432p4xx.c)
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zephyr_library_sources_ifdef(CONFIG_UART_MSP432P4XX uart_msp432p4xx.c)
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zephyr_library_sources_ifdef(CONFIG_UART_NS16550 uart_ns16550.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_UART_PERIPHERAL uart_nrfx_uart.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_UART_PERIPHERAL uart_nrfx_uart.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_UARTE_PERIPHERAL uart_nrfx_uarte.c)
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zephyr_library_sources_ifdef(CONFIG_NRF_UARTE_PERIPHERAL uart_nrfx_uarte.c)
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zephyr_library_sources_ifdef(CONFIG_UART_NUVOTON uart_nuvoton.c)
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zephyr_library_sources_ifdef(CONFIG_UART_NUVOTON uart_nuvoton.c)
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@ -40,19 +41,6 @@ zephyr_library_sources_ifdef(CONFIG_USB_CDC_ACM ${ZEPHYR_BASE}/misc/empty_file.c
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zephyr_library_sources_ifdef(CONFIG_USERSPACE uart_handlers.c)
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zephyr_library_sources_ifdef(CONFIG_USERSPACE uart_handlers.c)
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if(CONFIG_UART_NS16550)
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zephyr_library_sources(uart_ns16550.c)
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math(EXPR max_index "${CONFIG_UART_NS16550_MAX_INSTANCES} - 1")
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foreach(NUM RANGE 0 ${max_index})
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math(EXPR NEXT_NUM "${NUM} + 1")
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configure_file(
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uart_ns16550_port_x.h
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${PROJECT_BINARY_DIR}/include/generated/uart_ns16550_port_${NUM}.h
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@ONLY
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)
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endforeach(NUM)
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endif()
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if(CONFIG_UART_NATIVE_POSIX)
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if(CONFIG_UART_NATIVE_POSIX)
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zephyr_library_compile_definitions(NO_POSIX_CHEATS)
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zephyr_library_compile_definitions(NO_POSIX_CHEATS)
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zephyr_library_sources(uart_native_posix.c)
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zephyr_library_sources(uart_native_posix.c)
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@ -11,13 +11,6 @@ menuconfig UART_NS16550
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if UART_NS16550
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if UART_NS16550
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config UART_NS16550_MAX_INSTANCES
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int "Maximum number of supported driver instances"
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range 1 32
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default 4
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help
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The maximum number of supported driver instances in device tree.
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config UART_NS16550_LINE_CTRL
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config UART_NS16550_LINE_CTRL
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bool "Enable Serial Line Control for Apps"
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bool "Enable Serial Line Control for Apps"
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depends on UART_LINE_CTRL
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depends on UART_LINE_CTRL
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@ -979,8 +979,119 @@ static const struct uart_driver_api uart_ns16550_driver_api = {
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#endif
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#endif
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};
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};
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/* The instance-specific header files are chained together (each instance
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#define UART_NS16550_IRQ_FLAGS_SENSE0(n) 0
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* includes the next one, unless it's the last instance) so we only need to
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#define UART_NS16550_IRQ_FLAGS_SENSE1(n) DT_INST_IRQ(n, sense)
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* include the first instance.
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#define UART_NS16550_IRQ_FLAGS(n) \
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*/
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_CONCAT(UART_NS16550_IRQ_FLAGS_SENSE, DT_INST_IRQ_HAS_CELL(n, sense))(n)
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#include <uart_ns16550_port_0.h>
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/* not PCI(e) */
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#define UART_NS16550_IRQ_CONFIG_PCIE0(n) \
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static void irq_config_func##n(const struct device *dev) \
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{ \
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ARG_UNUSED(dev); \
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IRQ_CONNECT(DT_INST_IRQN(n), DT_INST_IRQ(n, priority), \
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uart_ns16550_isr, DEVICE_DT_INST_GET(n), \
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UART_NS16550_IRQ_FLAGS(n)); \
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irq_enable(DT_INST_IRQN(n)); \
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}
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/* PCI(e) with auto IRQ detection */
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#define UART_NS16550_IRQ_CONFIG_PCIE1(n) \
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static void irq_config_func##n(const struct device *dev) \
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{ \
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ARG_UNUSED(dev); \
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BUILD_ASSERT(DT_INST_IRQN(n) == PCIE_IRQ_DETECT, \
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"Only runtime IRQ configuration is supported"); \
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BUILD_ASSERT(IS_ENABLED(CONFIG_DYNAMIC_INTERRUPTS), \
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"NS16550 PCIe requires dynamic interrupts"); \
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unsigned int irq = pcie_alloc_irq(DT_INST_REG_ADDR(n)); \
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if (irq == PCIE_CONF_INTR_IRQ_NONE) { \
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return; \
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} \
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irq_connect_dynamic(irq, DT_INST_IRQ(n, priority), \
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(void (*)(const void *))uart_ns16550_isr, \
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DEVICE_DT_INST_GET(n), \
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UART_NS16550_IRQ_FLAGS(n)); \
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pcie_irq_enable(DT_INST_REG_ADDR(n), irq); \
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}
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#ifdef UART_NS16550_ACCESS_IOPORT
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#define DEV_CONFIG_REG_INIT(n) \
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.port = DT_INST_REG_ADDR(n),
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#else
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#define DEV_CONFIG_REG_INIT_PCIE0(n) DEVICE_MMIO_ROM_INIT(DT_DRV_INST(n)),
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#define DEV_CONFIG_REG_INIT_PCIE1(n)
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#define DEV_CONFIG_REG_INIT(n) \
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_CONCAT(DEV_CONFIG_REG_INIT_PCIE, DT_INST_ON_BUS(n, pcie))(n)
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#endif
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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#define DEV_CONFIG_IRQ_FUNC_INIT(n) \
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.irq_config_func = irq_config_func##n,
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#define UART_NS16550_IRQ_FUNC_DECLARE(n) \
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static void irq_config_func##n(const struct device *dev);
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#define UART_NS16550_IRQ_FUNC_DEFINE(n) \
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_CONCAT(UART_NS16550_IRQ_CONFIG_PCIE, DT_INST_ON_BUS(n, pcie))(n)
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#else
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/* !CONFIG_UART_INTERRUPT_DRIVEN */
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#define DEV_CONFIG_IRQ_FUNC_INIT(n)
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#define UART_NS16550_IRQ_FUNC_DECLARE(n)
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#define UART_NS16550_IRQ_FUNC_DEFINE(n)
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#endif /* CONFIG_UART_INTERRUPT_DRIVEN */
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#if UART_NS16550_PCP_ENABLED
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#define DEV_CONFIG_PCP_INIT(n) .pcp = DT_INST_PROP_OR(n, pcp, 0),
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#else
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#define DEV_CONFIG_PCP_INIT(n)
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#endif
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#define DEV_CONFIG_REG_INT0(n)
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#define DEV_CONFIG_REG_INT1(n) \
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.reg_interval = (1 << DT_INST_PROP(n, reg_shift)),
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#define DEV_CONFIG_REG_INT_INIT(n) \
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_CONCAT(DEV_CONFIG_REG_INT, DT_INST_NODE_HAS_PROP(n, reg_shift))(n)
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#define DEV_CONFIG_PCIE0(n)
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#define DEV_CONFIG_PCIE1(n) \
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.pcie = true, \
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.pcie_bdf = DT_INST_REG_ADDR(n), \
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.pcie_id = DT_INST_REG_SIZE(n),
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#define DEV_CONFIG_PCIE_INIT(n) \
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_CONCAT(DEV_CONFIG_PCIE, DT_INST_ON_BUS(n, pcie))(n)
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#define DEV_DATA_FLOW_CTRL0 UART_CFG_FLOW_CTRL_NONE
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#define DEV_DATA_FLOW_CTRL1 UART_CFG_FLOW_CTRL_RTS_CTS
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#define DEV_DATA_FLOW_CTRL(n) \
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_CONCAT(DEV_DATA_FLOW_CTRL, DT_INST_NODE_HAS_PROP(n, hw_flow_control))
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#define DEV_DATA_DLF0(n)
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#define DEV_DATA_DLF1(n) \
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.dlf = DT_INST_PROP(n, dlf),
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#define DEV_DATA_DLF_INIT(n) \
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_CONCAT(DEV_DATA_DLF, DT_INST_NODE_HAS_PROP(n, dlf))(n)
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#define UART_NS16550_DEVICE_INIT(n) \
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UART_NS16550_IRQ_FUNC_DECLARE(n); \
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_##n = { \
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DEV_CONFIG_REG_INIT(n) \
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.sys_clk_freq = DT_INST_PROP(n, clock_frequency), \
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DEV_CONFIG_IRQ_FUNC_INIT(n) \
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DEV_CONFIG_PCP_INIT(n) \
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DEV_CONFIG_REG_INT_INIT(n) \
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DEV_CONFIG_PCIE_INIT(n) \
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}; \
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_##n = { \
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.uart_config.baudrate = DT_INST_PROP_OR(n, current_speed, 0), \
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.uart_config.parity = UART_CFG_PARITY_NONE, \
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.uart_config.stop_bits = UART_CFG_STOP_BITS_1, \
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.uart_config.data_bits = UART_CFG_DATA_BITS_8, \
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.uart_config.flow_ctrl = DEV_DATA_FLOW_CTRL(n), \
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DEV_DATA_DLF_INIT(n) \
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}; \
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DEVICE_DT_INST_DEFINE(n, &uart_ns16550_init, device_pm_control_nop, \
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&uart_ns16550_dev_data_##n, &uart_ns16550_dev_cfg_##n, \
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE, \
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&uart_ns16550_driver_api); \
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UART_NS16550_IRQ_FUNC_DEFINE(n)
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DT_INST_FOREACH_STATUS_OKAY(UART_NS16550_DEVICE_INIT)
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@ -1,121 +0,0 @@
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/*
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* Copyright (c) 2010, 2012-2015 Wind River Systems, Inc.
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* Copyright (c) 2019-2020 Intel Corp.
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*
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* SPDX-License-Identifier: Apache-2.0
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*
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* This file is a template for cmake and is not meant to be used directly!
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*/
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#if DT_NODE_HAS_STATUS(DT_DRV_INST(@NUM@), okay)
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_@NUM@(const struct device *port);
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#endif
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static const struct uart_ns16550_device_config uart_ns16550_dev_cfg_@NUM@ = {
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#ifdef UART_NS16550_ACCESS_IOPORT
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.port = DT_INST_REG_ADDR(@NUM@),
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#elif !DT_INST_ON_BUS(@NUM@, pcie)
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DEVICE_MMIO_ROM_INIT(DT_DRV_INST(@NUM@)),
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#endif
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.sys_clk_freq = DT_INST_PROP(@NUM@, clock_frequency),
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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.irq_config_func = irq_config_func_@NUM@,
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#endif
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#if DT_INST_NODE_HAS_PROP(@NUM@, pcp)
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.pcp = DT_INST_PROP(@NUM@, pcp),
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#endif
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#if DT_INST_NODE_HAS_PROP(@NUM@, reg_shift)
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.reg_interval = (1 << DT_INST_PROP(@NUM@, reg_shift))
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#endif
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#if DT_INST_ON_BUS(@NUM@, pcie)
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.pcie = true,
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.pcie_bdf = DT_INST_REG_ADDR(@NUM@),
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.pcie_id = DT_INST_REG_SIZE(@NUM@),
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#endif
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};
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static struct uart_ns16550_dev_data_t uart_ns16550_dev_data_@NUM@ = {
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#if DT_INST_NODE_HAS_PROP(@NUM@, current_speed)
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.uart_config.baudrate = DT_INST_PROP(@NUM@, current_speed),
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#endif
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.uart_config.parity = UART_CFG_PARITY_NONE,
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.uart_config.stop_bits = UART_CFG_STOP_BITS_1,
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.uart_config.data_bits = UART_CFG_DATA_BITS_8,
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#if DT_INST_PROP(@NUM@, hw_flow_control)
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.uart_config.flow_ctrl = UART_CFG_FLOW_CTRL_RTS_CTS,
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#else
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.uart_config.flow_ctrl = UART_CFG_FLOW_CTRL_NONE,
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#endif
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#if DT_INST_NODE_HAS_PROP(@NUM@, dlf)
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.dlf = DT_INST_PROP(@NUM@, dlf),
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#endif
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};
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DEVICE_DT_INST_DEFINE(@NUM@,
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&uart_ns16550_init,
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device_pm_control_nop,
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&uart_ns16550_dev_data_@NUM@, &uart_ns16550_dev_cfg_@NUM@,
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PRE_KERNEL_1, CONFIG_KERNEL_INIT_PRIORITY_DEVICE,
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&uart_ns16550_driver_api);
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#if DT_INST_IRQ_HAS_CELL(@NUM@, sense)
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#define INST_@NUM@_IRQ_FLAGS DT_INST_IRQ(@NUM@, sense)
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#else
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#define INST_@NUM@_IRQ_FLAGS 0
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#endif
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#ifdef CONFIG_UART_INTERRUPT_DRIVEN
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static void irq_config_func_@NUM@(const struct device *dev)
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{
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ARG_UNUSED(dev);
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#if DT_INST_ON_BUS(@NUM@, pcie)
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/* PCI(e) with auto IRQ detection */
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BUILD_ASSERT(DT_INST_IRQN(@NUM@) == PCIE_IRQ_DETECT,
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"Only runtime IRQ configuration is supported");
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BUILD_ASSERT(IS_ENABLED(CONFIG_DYNAMIC_INTERRUPTS),
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"NS16550 PCI auto-IRQ needs CONFIG_DYNAMIC_INTERRUPTS");
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unsigned int irq;
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irq = pcie_alloc_irq(DT_INST_REG_ADDR(@NUM@));
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if (irq == PCIE_CONF_INTR_IRQ_NONE) {
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return;
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}
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irq_connect_dynamic(irq,
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DT_INST_IRQ(@NUM@, priority),
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(void (*)(const void *))uart_ns16550_isr,
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DEVICE_DT_INST_GET(@NUM@),
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INST_@NUM@_IRQ_FLAGS);
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pcie_irq_enable(DT_INST_REG_ADDR(@NUM@), irq);
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#else
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/* not PCI(e) */
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IRQ_CONNECT(DT_INST_IRQN(@NUM@),
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DT_INST_IRQ(@NUM@, priority),
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uart_ns16550_isr,
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DEVICE_DT_INST_GET(@NUM@),
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INST_@NUM@_IRQ_FLAGS);
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irq_enable(DT_INST_IRQN(@NUM@));
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#endif
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}
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#endif
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#endif
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/* Include subsequent instances */
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#if @NUM@ < (CONFIG_UART_NS16550_MAX_INSTANCES - 1)
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#include <uart_ns16550_port_@NEXT_NUM@.h>
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#endif
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@ -49,8 +49,4 @@ config I2C_DW
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default y
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default y
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depends on I2C
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depends on I2C
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config UART_NS16550_MAX_INSTANCES
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default 11
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depends on UART_NS16550
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endif # SOC_ELKHART_LAKE
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endif # SOC_ELKHART_LAKE
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