Bluetooth controller: nrf: Switch to use SOC_COMPATIBLE
Switch use of kconfig: * SOC_SERIES_NRF53X -> SOC_COPATIBLE_NRF53X * SOC_NRF5340_CPUNET -> SOC_COMPATIBLE_NRF5340_CPUNET to also select those options/code when building for the nrf53 simulated targets. Also switch three kconfig range dependencies from SOC_SERIES_NRF52X to SOC_COPATIBLE_NRF52X (IRQ priority related) for consistency. These sound not really have an impact. Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit is contained in:
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c7c3c82aa0
commit
bab4ed1623
5 changed files with 48 additions and 48 deletions
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@ -643,7 +643,7 @@ config BT_CTLR_SLOT_RESERVATION_UPDATE
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config BT_CTLR_LLL_PRIO
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int "Lower Link Layer (Radio) IRQ priority" if (BT_CTLR_ULL_LLL_PRIO_SUPPORT && !BT_CTLR_ZLI)
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range 0 3 if SOC_SERIES_NRF51X
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range 0 6 if (SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
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range 0 6 if (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
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default 0
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help
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The interrupt priority for event preparation and radio IRQ.
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@ -651,7 +651,7 @@ config BT_CTLR_LLL_PRIO
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config BT_CTLR_ULL_HIGH_PRIO
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int "Upper Link Layer High IRQ priority" if BT_CTLR_ULL_LLL_PRIO_SUPPORT
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range BT_CTLR_LLL_PRIO 3 if SOC_SERIES_NRF51X
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range BT_CTLR_LLL_PRIO 6 if (SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
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range BT_CTLR_LLL_PRIO 6 if (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
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default BT_CTLR_LLL_PRIO if (!BT_CTLR_ULL_LLL_PRIO_SUPPORT || BT_CTLR_ZLI || BT_CTLR_LOW_LAT)
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default 1
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help
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@ -661,7 +661,7 @@ config BT_CTLR_ULL_HIGH_PRIO
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config BT_CTLR_ULL_LOW_PRIO
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int "Upper Link Layer Low IRQ priority" if BT_CTLR_ULL_LLL_PRIO_SUPPORT
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range BT_CTLR_ULL_HIGH_PRIO 3 if SOC_SERIES_NRF51X
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range BT_CTLR_ULL_HIGH_PRIO 6 if (SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
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range BT_CTLR_ULL_HIGH_PRIO 6 if (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
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default BT_CTLR_ULL_HIGH_PRIO
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help
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The interrupt priority for Ticker's Job IRQ and Upper Link Layer
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@ -705,7 +705,7 @@ config BT_CTLR_RX_PDU_META
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config BT_CTLR_RADIO_ENABLE_FAST
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bool "Use tTXEN/RXEN,FAST ramp-up"
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depends on SOC_COMPATIBLE_NRF52X || SOC_SERIES_NRF53X
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depends on SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X
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default y
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help
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Enable use of fast radio ramp-up mode.
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@ -719,7 +719,7 @@ config BT_CTLR_TIFS_HW
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config BT_CTLR_SW_SWITCH_SINGLE_TIMER
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bool "Single TIMER tIFS Trx SW switching"
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depends on (!BT_CTLR_TIFS_HW) && (SOC_COMPATIBLE_NRF52X || SOC_SERIES_NRF53X)
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depends on (!BT_CTLR_TIFS_HW) && (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
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help
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Implement the tIFS Trx SW switch with the same TIMER
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instance, as the one used for BLE event timing. Requires
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@ -10,7 +10,7 @@
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#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF51X
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#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X)
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#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF52X
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#elif defined(CONFIG_SOC_SERIES_NRF53X)
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#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF53X
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#endif
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#else
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@ -311,7 +311,7 @@ void radio_phy_set(uint8_t phy, uint8_t flags)
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void radio_tx_power_set(int8_t power)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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uint32_t value;
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/* NOTE: TXPOWER register only accepts upto 0dBm, hence use the HAL
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@ -322,12 +322,12 @@ void radio_tx_power_set(int8_t power)
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NRF_RADIO->TXPOWER = value;
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hal_radio_tx_power_high_voltage_set(power);
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#else /* !CONFIG_SOC_SERIES_NRF53X */
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#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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/* NOTE: valid value range is passed by Kconfig define. */
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NRF_RADIO->TXPOWER = (uint32_t)power;
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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}
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void radio_tx_power_max_set(void)
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@ -345,25 +345,25 @@ int8_t radio_tx_power_min_get(void)
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int8_t radio_tx_power_max_get(void)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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return RADIO_TXPOWER_TXPOWER_Pos3dBm;
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#else /* !CONFIG_SOC_SERIES_NRF53X */
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#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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return (int8_t)hal_radio_tx_power_max_get();
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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}
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int8_t radio_tx_power_floor(int8_t power)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* NOTE: TXPOWER register only accepts upto 0dBm, +3dBm permitted by
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* use of high voltage being set for radio when TXPOWER register is set.
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*/
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if (power >= (int8_t)RADIO_TXPOWER_TXPOWER_Pos3dBm) {
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return RADIO_TXPOWER_TXPOWER_Pos3dBm;
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}
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#endif /* CONFIG_SOC_SERIES_NRF53X */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
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return (int8_t)hal_radio_tx_power_floor(power);
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}
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@ -413,7 +413,7 @@ void radio_pkt_configure(uint8_t bits_len, uint8_t max_len, uint8_t flags)
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bits_s1 = RADIO_PKT_CONF_LENGTH_8BIT - bits_len;
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#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X) || \
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defined(CONFIG_SOC_SERIES_NRF53X)
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defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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extra = 0U;
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phy = RADIO_PKT_CONF_PHY_GET(flags);
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@ -510,7 +510,7 @@ uint32_t radio_rx_chain_delay_get(uint8_t phy, uint8_t flags)
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void radio_rx_enable(void)
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{
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#if !defined(CONFIG_BT_CTLR_TIFS_HW)
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* NOTE: Timer clear DPPI configuration is needed only for nRF53
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* because of calls to radio_disable() and
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* radio_switch_complete_and_disable() inside a radio event call
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@ -523,7 +523,7 @@ void radio_rx_enable(void)
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* radio event but when the radio event is done.
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*/
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hal_sw_switch_timer_clear_ppi_config();
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#endif /* CONFIG_SOC_SERIES_NRF53X */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* !CONFIG_BT_CTLR_TIFS_HW */
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nrf_radio_task_trigger(NRF_RADIO, NRF_RADIO_TASK_RXEN);
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@ -532,7 +532,7 @@ void radio_rx_enable(void)
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void radio_tx_enable(void)
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{
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#if !defined(CONFIG_BT_CTLR_TIFS_HW)
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* NOTE: Timer clear DPPI configuration is needed only for nRF53
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* because of calls to radio_disable() and
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* radio_switch_complete_and_disable() inside a radio event call
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@ -545,7 +545,7 @@ void radio_tx_enable(void)
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* radio event but when the radio event is done.
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*/
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hal_sw_switch_timer_clear_ppi_config();
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#endif /* CONFIG_SOC_SERIES_NRF53X */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* !CONFIG_BT_CTLR_TIFS_HW */
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nrf_radio_task_trigger(NRF_RADIO, NRF_RADIO_TASK_TXEN);
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@ -891,13 +891,13 @@ void sw_switch(uint8_t dir_curr, uint8_t dir_next, uint8_t phy_curr, uint8_t fla
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* time-stamp.
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*/
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hal_radio_end_time_capture_ppi_config();
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#if !defined(CONFIG_SOC_SERIES_NRF53X)
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#if !defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* The function is not called for nRF5340 single timer configuration because
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* HAL_SW_SWITCH_TIMER_CLEAR_PPI is equal to HAL_RADIO_END_TIME_CAPTURE_PPI,
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* so channel is already enabled.
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*/
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hal_radio_nrf_ppi_channels_enable(BIT(HAL_RADIO_END_TIME_CAPTURE_PPI));
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
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sw_tifs_toggle += 1U;
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@ -1186,38 +1186,38 @@ void radio_tmr_rx_status_reset(void)
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void radio_tmr_tx_enable(void)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#else /* !CONFIG_SOC_SERIES_NRF53X */
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI)
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hal_radio_enable_on_tick_ppi_config_and_enable(1U);
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#endif /* HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI */
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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}
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void radio_tmr_rx_enable(void)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#else /* !CONFIG_SOC_SERIES_NRF53X */
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI)
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hal_radio_enable_on_tick_ppi_config_and_enable(0U);
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#endif /* HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI */
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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}
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void radio_tmr_tx_disable(void)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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nrf_radio_subscribe_clear(NRF_RADIO, NRF_RADIO_TASK_TXEN);
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#else /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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}
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void radio_tmr_rx_disable(void)
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{
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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nrf_radio_subscribe_clear(NRF_RADIO, NRF_RADIO_TASK_RXEN);
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#else /* !CONFIG_SOC_SERIES_NRF53X */
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#endif /* !CONFIG_SOC_SERIES_NRF53X */
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#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
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}
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void radio_tmr_tifs_set(uint32_t tifs)
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@ -1304,7 +1304,7 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t tick)
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#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
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last_pdu_end_us = 0U;
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#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* NOTE: Timer clear DPPI configuration is needed only for nRF53
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* because of calls to radio_disable() and
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* radio_switch_complete_and_disable() inside a radio event call
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* radio event but when the radio event is done.
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*/
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hal_sw_switch_timer_clear_ppi_config();
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#endif /* CONFIG_SOC_SERIES_NRF53X */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* !CONFIG_BT_CTLR_TIFS_HW */
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return remainder_us;
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@ -1331,7 +1331,7 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
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#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
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last_pdu_end_us = 0U;
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#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
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#if defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* NOTE: Timer clear DPPI configuration is needed only for nRF53
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* because of calls to radio_disable() and
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* radio_switch_complete_and_disable() inside a radio event call
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* radio event but when the radio event is done.
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*/
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hal_sw_switch_timer_clear_ppi_config();
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#endif /* CONFIG_SOC_SERIES_NRF53X */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
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#endif /* !CONFIG_BT_CTLR_TIFS_HW */
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/* start_us could be the current count in the timer */
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* hal_sw_switch_timer_clear_ppi_config() and sw_switch(). There is no need to
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* configure the channel again in this function.
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*/
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#if !defined(CONFIG_SOC_SERIES_NRF53X) || \
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(defined(CONFIG_SOC_SERIES_NRF53X) && !defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER))
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#if !defined(CONFIG_SOC_COMPATIBLE_NRF53X) || \
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(defined(CONFIG_SOC_COMPATIBLE_NRF53X) && !defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER))
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hal_radio_end_time_capture_ppi_config();
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hal_radio_nrf_ppi_channels_enable(BIT(HAL_RADIO_END_TIME_CAPTURE_PPI));
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#endif /* !CONFIG_SOC_SERIES_NRF53X ||
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* (CONFIG_SOC_SERIES_NRF53X && !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
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#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X ||
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* (CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
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*/
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}
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@ -1776,7 +1776,7 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
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NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Enabled;
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mode = (CCM_MODE_MODE_Encryption << CCM_MODE_MODE_Pos) &
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CCM_MODE_MODE_Msk;
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#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* Enable CCM support for 8-bit length field PDUs. */
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mode |= (CCM_MODE_LENGTH_Extended << CCM_MODE_LENGTH_Pos) &
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CCM_MODE_LENGTH_Msk;
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@ -3,7 +3,7 @@
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#if defined(CONFIG_SOC_NRF5340_CPUNET) || defined(DPPI_PRESENT)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(DPPI_PRESENT)
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/*******************************************************************************
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* Enable Radio on Event Timer tick:
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#define SW_SWITCH_TIMER_TASK_GROUP_BASE 0
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#endif /* !CONFIG_BT_CTLR_TIFS_HW */
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#endif /* CONFIG_SOC_NRF5340_CPUNET || DPPI_PRESENT */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || DPPI_PRESENT */
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#endif
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/* nRF53 Series IRQ mapping */
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#elif defined(CONFIG_SOC_SERIES_NRF53X)
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#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X)
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/* nRF53 Series Engineering D and Revision 1 IRQ mapping */
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#if defined(CONFIG_SOC_NRF5340_CPUNET)
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#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
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#define HAL_SWI_RADIO_IRQ SWI2_IRQn
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#define HAL_SWI_WORKER_IRQ RTC0_IRQn
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#define HAL_SWI_JOB_IRQ SWI3_IRQn
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#endif
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#endif /* CONFIG_SOC_NRF5340_CPUNET */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET */
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#endif /* CONFIG_SOC_SERIES_NRF53X */
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#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
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static inline void hal_swi_init(void)
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{
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