Bluetooth controller: nrf: Switch to use SOC_COMPATIBLE

Switch use of kconfig:
* SOC_SERIES_NRF53X -> SOC_COPATIBLE_NRF53X
* SOC_NRF5340_CPUNET -> SOC_COMPATIBLE_NRF5340_CPUNET
to also select those options/code when building for
the nrf53 simulated targets.

Also switch three kconfig range dependencies from
SOC_SERIES_NRF52X to SOC_COPATIBLE_NRF52X
(IRQ priority related) for consistency. These sound
not really have an impact.

Signed-off-by: Alberto Escolar Piedras <alberto.escolar.piedras@nordicsemi.no>
This commit is contained in:
Alberto Escolar Piedras 2023-09-21 08:57:08 +02:00 committed by Carles Cufí
commit bab4ed1623
5 changed files with 48 additions and 48 deletions

View file

@ -643,7 +643,7 @@ config BT_CTLR_SLOT_RESERVATION_UPDATE
config BT_CTLR_LLL_PRIO
int "Lower Link Layer (Radio) IRQ priority" if (BT_CTLR_ULL_LLL_PRIO_SUPPORT && !BT_CTLR_ZLI)
range 0 3 if SOC_SERIES_NRF51X
range 0 6 if (SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
range 0 6 if (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
default 0
help
The interrupt priority for event preparation and radio IRQ.
@ -651,7 +651,7 @@ config BT_CTLR_LLL_PRIO
config BT_CTLR_ULL_HIGH_PRIO
int "Upper Link Layer High IRQ priority" if BT_CTLR_ULL_LLL_PRIO_SUPPORT
range BT_CTLR_LLL_PRIO 3 if SOC_SERIES_NRF51X
range BT_CTLR_LLL_PRIO 6 if (SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
range BT_CTLR_LLL_PRIO 6 if (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
default BT_CTLR_LLL_PRIO if (!BT_CTLR_ULL_LLL_PRIO_SUPPORT || BT_CTLR_ZLI || BT_CTLR_LOW_LAT)
default 1
help
@ -661,7 +661,7 @@ config BT_CTLR_ULL_HIGH_PRIO
config BT_CTLR_ULL_LOW_PRIO
int "Upper Link Layer Low IRQ priority" if BT_CTLR_ULL_LLL_PRIO_SUPPORT
range BT_CTLR_ULL_HIGH_PRIO 3 if SOC_SERIES_NRF51X
range BT_CTLR_ULL_HIGH_PRIO 6 if (SOC_SERIES_NRF52X || SOC_SERIES_NRF53X)
range BT_CTLR_ULL_HIGH_PRIO 6 if (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
default BT_CTLR_ULL_HIGH_PRIO
help
The interrupt priority for Ticker's Job IRQ and Upper Link Layer
@ -705,7 +705,7 @@ config BT_CTLR_RX_PDU_META
config BT_CTLR_RADIO_ENABLE_FAST
bool "Use tTXEN/RXEN,FAST ramp-up"
depends on SOC_COMPATIBLE_NRF52X || SOC_SERIES_NRF53X
depends on SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X
default y
help
Enable use of fast radio ramp-up mode.
@ -719,7 +719,7 @@ config BT_CTLR_TIFS_HW
config BT_CTLR_SW_SWITCH_SINGLE_TIMER
bool "Single TIMER tIFS Trx SW switching"
depends on (!BT_CTLR_TIFS_HW) && (SOC_COMPATIBLE_NRF52X || SOC_SERIES_NRF53X)
depends on (!BT_CTLR_TIFS_HW) && (SOC_COMPATIBLE_NRF52X || SOC_COMPATIBLE_NRF53X)
help
Implement the tIFS Trx SW switch with the same TIMER
instance, as the one used for BLE event timing. Requires

View file

@ -10,7 +10,7 @@
#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF51X
#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X)
#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF52X
#elif defined(CONFIG_SOC_SERIES_NRF53X)
#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#define BT_HCI_VS_HW_VAR BT_HCI_VS_HW_VAR_NORDIC_NRF53X
#endif
#else

View file

@ -311,7 +311,7 @@ void radio_phy_set(uint8_t phy, uint8_t flags)
void radio_tx_power_set(int8_t power)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
uint32_t value;
/* NOTE: TXPOWER register only accepts upto 0dBm, hence use the HAL
@ -322,12 +322,12 @@ void radio_tx_power_set(int8_t power)
NRF_RADIO->TXPOWER = value;
hal_radio_tx_power_high_voltage_set(power);
#else /* !CONFIG_SOC_SERIES_NRF53X */
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
/* NOTE: valid value range is passed by Kconfig define. */
NRF_RADIO->TXPOWER = (uint32_t)power;
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
}
void radio_tx_power_max_set(void)
@ -345,25 +345,25 @@ int8_t radio_tx_power_min_get(void)
int8_t radio_tx_power_max_get(void)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
return RADIO_TXPOWER_TXPOWER_Pos3dBm;
#else /* !CONFIG_SOC_SERIES_NRF53X */
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
return (int8_t)hal_radio_tx_power_max_get();
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
}
int8_t radio_tx_power_floor(int8_t power)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* NOTE: TXPOWER register only accepts upto 0dBm, +3dBm permitted by
* use of high voltage being set for radio when TXPOWER register is set.
*/
if (power >= (int8_t)RADIO_TXPOWER_TXPOWER_Pos3dBm) {
return RADIO_TXPOWER_TXPOWER_Pos3dBm;
}
#endif /* CONFIG_SOC_SERIES_NRF53X */
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
return (int8_t)hal_radio_tx_power_floor(power);
}
@ -413,7 +413,7 @@ void radio_pkt_configure(uint8_t bits_len, uint8_t max_len, uint8_t flags)
bits_s1 = RADIO_PKT_CONF_LENGTH_8BIT - bits_len;
#elif defined(CONFIG_SOC_COMPATIBLE_NRF52X) || \
defined(CONFIG_SOC_SERIES_NRF53X)
defined(CONFIG_SOC_COMPATIBLE_NRF53X)
extra = 0U;
phy = RADIO_PKT_CONF_PHY_GET(flags);
@ -510,7 +510,7 @@ uint32_t radio_rx_chain_delay_get(uint8_t phy, uint8_t flags)
void radio_rx_enable(void)
{
#if !defined(CONFIG_BT_CTLR_TIFS_HW)
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
* because of calls to radio_disable() and
* radio_switch_complete_and_disable() inside a radio event call
@ -523,7 +523,7 @@ void radio_rx_enable(void)
* radio event but when the radio event is done.
*/
hal_sw_switch_timer_clear_ppi_config();
#endif /* CONFIG_SOC_SERIES_NRF53X */
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
nrf_radio_task_trigger(NRF_RADIO, NRF_RADIO_TASK_RXEN);
@ -532,7 +532,7 @@ void radio_rx_enable(void)
void radio_tx_enable(void)
{
#if !defined(CONFIG_BT_CTLR_TIFS_HW)
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
* because of calls to radio_disable() and
* radio_switch_complete_and_disable() inside a radio event call
@ -545,7 +545,7 @@ void radio_tx_enable(void)
* radio event but when the radio event is done.
*/
hal_sw_switch_timer_clear_ppi_config();
#endif /* CONFIG_SOC_SERIES_NRF53X */
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
nrf_radio_task_trigger(NRF_RADIO, NRF_RADIO_TASK_TXEN);
@ -891,13 +891,13 @@ void sw_switch(uint8_t dir_curr, uint8_t dir_next, uint8_t phy_curr, uint8_t fla
* time-stamp.
*/
hal_radio_end_time_capture_ppi_config();
#if !defined(CONFIG_SOC_SERIES_NRF53X)
#if !defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* The function is not called for nRF5340 single timer configuration because
* HAL_SW_SWITCH_TIMER_CLEAR_PPI is equal to HAL_RADIO_END_TIME_CAPTURE_PPI,
* so channel is already enabled.
*/
hal_radio_nrf_ppi_channels_enable(BIT(HAL_RADIO_END_TIME_CAPTURE_PPI));
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
sw_tifs_toggle += 1U;
@ -1186,38 +1186,38 @@ void radio_tmr_rx_status_reset(void)
void radio_tmr_tx_enable(void)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#else /* !CONFIG_SOC_SERIES_NRF53X */
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI)
hal_radio_enable_on_tick_ppi_config_and_enable(1U);
#endif /* HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI */
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
}
void radio_tmr_rx_enable(void)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#else /* !CONFIG_SOC_SERIES_NRF53X */
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
#if (HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI)
hal_radio_enable_on_tick_ppi_config_and_enable(0U);
#endif /* HAL_RADIO_ENABLE_TX_ON_TICK_PPI == HAL_RADIO_ENABLE_RX_ON_TICK_PPI */
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
}
void radio_tmr_tx_disable(void)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
nrf_radio_subscribe_clear(NRF_RADIO, NRF_RADIO_TASK_TXEN);
#else /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
}
void radio_tmr_rx_disable(void)
{
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
nrf_radio_subscribe_clear(NRF_RADIO, NRF_RADIO_TASK_RXEN);
#else /* !CONFIG_SOC_SERIES_NRF53X */
#endif /* !CONFIG_SOC_SERIES_NRF53X */
#else /* !CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X */
}
void radio_tmr_tifs_set(uint32_t tifs)
@ -1304,7 +1304,7 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t tick)
#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
last_pdu_end_us = 0U;
#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
* because of calls to radio_disable() and
* radio_switch_complete_and_disable() inside a radio event call
@ -1317,7 +1317,7 @@ uint32_t radio_tmr_start_tick(uint8_t trx, uint32_t tick)
* radio event but when the radio event is done.
*/
hal_sw_switch_timer_clear_ppi_config();
#endif /* CONFIG_SOC_SERIES_NRF53X */
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
return remainder_us;
@ -1331,7 +1331,7 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
#if defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
last_pdu_end_us = 0U;
#endif /* CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER */
#if defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* NOTE: Timer clear DPPI configuration is needed only for nRF53
* because of calls to radio_disable() and
* radio_switch_complete_and_disable() inside a radio event call
@ -1344,7 +1344,7 @@ uint32_t radio_tmr_start_us(uint8_t trx, uint32_t start_us)
* radio event but when the radio event is done.
*/
hal_sw_switch_timer_clear_ppi_config();
#endif /* CONFIG_SOC_SERIES_NRF53X */
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
/* start_us could be the current count in the timer */
@ -1464,12 +1464,12 @@ void radio_tmr_end_capture(void)
* hal_sw_switch_timer_clear_ppi_config() and sw_switch(). There is no need to
* configure the channel again in this function.
*/
#if !defined(CONFIG_SOC_SERIES_NRF53X) || \
(defined(CONFIG_SOC_SERIES_NRF53X) && !defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER))
#if !defined(CONFIG_SOC_COMPATIBLE_NRF53X) || \
(defined(CONFIG_SOC_COMPATIBLE_NRF53X) && !defined(CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER))
hal_radio_end_time_capture_ppi_config();
hal_radio_nrf_ppi_channels_enable(BIT(HAL_RADIO_END_TIME_CAPTURE_PPI));
#endif /* !CONFIG_SOC_SERIES_NRF53X ||
* (CONFIG_SOC_SERIES_NRF53X && !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
#endif /* !CONFIG_SOC_COMPATIBLE_NRF53X ||
* (CONFIG_SOC_COMPATIBLE_NRF53X && !CONFIG_BT_CTLR_SW_SWITCH_SINGLE_TIMER)
*/
}
@ -1776,7 +1776,7 @@ static void *radio_ccm_ext_tx_pkt_set(struct ccm *cnf, uint8_t pdu_type, void *p
NRF_CCM->ENABLE = CCM_ENABLE_ENABLE_Enabled;
mode = (CCM_MODE_MODE_Encryption << CCM_MODE_MODE_Pos) &
CCM_MODE_MODE_Msk;
#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
#if defined(CONFIG_SOC_COMPATIBLE_NRF52X) || defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* Enable CCM support for 8-bit length field PDUs. */
mode |= (CCM_MODE_LENGTH_Extended << CCM_MODE_LENGTH_Pos) &
CCM_MODE_LENGTH_Msk;

View file

@ -3,7 +3,7 @@
*
* SPDX-License-Identifier: Apache-2.0
*/
#if defined(CONFIG_SOC_NRF5340_CPUNET) || defined(DPPI_PRESENT)
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET) || defined(DPPI_PRESENT)
/*******************************************************************************
* Enable Radio on Event Timer tick:
@ -157,4 +157,4 @@
#define SW_SWITCH_TIMER_TASK_GROUP_BASE 0
#endif /* !CONFIG_BT_CTLR_TIFS_HW */
#endif /* CONFIG_SOC_NRF5340_CPUNET || DPPI_PRESENT */
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET || DPPI_PRESENT */

View file

@ -18,10 +18,10 @@
#endif
/* nRF53 Series IRQ mapping */
#elif defined(CONFIG_SOC_SERIES_NRF53X)
#elif defined(CONFIG_SOC_COMPATIBLE_NRF53X)
/* nRF53 Series Engineering D and Revision 1 IRQ mapping */
#if defined(CONFIG_SOC_NRF5340_CPUNET)
#if defined(CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET)
#define HAL_SWI_RADIO_IRQ SWI2_IRQn
#define HAL_SWI_WORKER_IRQ RTC0_IRQn
@ -33,9 +33,9 @@
#define HAL_SWI_JOB_IRQ SWI3_IRQn
#endif
#endif /* CONFIG_SOC_NRF5340_CPUNET */
#endif /* CONFIG_SOC_COMPATIBLE_NRF5340_CPUNET */
#endif /* CONFIG_SOC_SERIES_NRF53X */
#endif /* CONFIG_SOC_COMPATIBLE_NRF53X */
static inline void hal_swi_init(void)
{