drivers: stm32: fix MSI PLL mode enabling
1. clock: move the call for MSI hardware auto calibration enabling before the control of MSI enable to ensure its execution in all cases. 2. counter: add call for MSI hardware auto calibration enabling after the LSE enabling and after possible backup domain reset that may clear MSIPLLEN. Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
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776e0db03d
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2 changed files with 10 additions and 4 deletions
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@ -485,6 +485,11 @@ static int stm32_clock_control_init(const struct device *dev)
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LL_RCC_MSI_EnableRangeSelection();
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LL_RCC_MSI_EnableRangeSelection();
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LL_RCC_MSI_SetRange(CONFIG_CLOCK_STM32_MSI_RANGE << RCC_CR_MSIRANGE_Pos);
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LL_RCC_MSI_SetRange(CONFIG_CLOCK_STM32_MSI_RANGE << RCC_CR_MSIRANGE_Pos);
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#if defined(CONFIG_CLOCK_STM32_MSI_PLL_MODE)
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/* Enable MSI hardware auto calibration */
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LL_RCC_MSI_EnablePLLMode();
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#endif
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/* Enable MSI if not enabled */
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/* Enable MSI if not enabled */
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if (LL_RCC_MSI_IsReady() != 1) {
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if (LL_RCC_MSI_IsReady() != 1) {
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/* Enable MSI */
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/* Enable MSI */
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@ -492,10 +497,6 @@ static int stm32_clock_control_init(const struct device *dev)
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while (LL_RCC_MSI_IsReady() != 1) {
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while (LL_RCC_MSI_IsReady() != 1) {
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/* Wait for HSI ready */
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/* Wait for HSI ready */
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}
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}
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#ifdef CONFIG_CLOCK_STM32_MSI_PLL_MODE
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/* Enable MSI hardware auto calibration */
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LL_RCC_MSI_EnablePLLMode();
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#endif
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}
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}
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/* Set MSI as SYSCLCK source */
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/* Set MSI as SYSCLCK source */
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@ -333,6 +333,11 @@ static int rtc_stm32_init(const struct device *dev)
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while (LL_RCC_LSE_IsReady() != 1) {
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while (LL_RCC_LSE_IsReady() != 1) {
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}
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}
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#if defined(CONFIG_CLOCK_STM32_MSI_PLL_MODE)
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/* Enable MSI hardware auto calibration */
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LL_RCC_MSI_EnablePLLMode();
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#endif
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LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
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LL_RCC_SetRTCClockSource(LL_RCC_RTC_CLKSOURCE_LSE);
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#endif /* CONFIG_COUNTER_RTC_STM32_CLOCK_SRC */
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#endif /* CONFIG_COUNTER_RTC_STM32_CLOCK_SRC */
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