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gpio: mchp_xec: fix erroneous interrupt triggers

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If interrupt is previously enabled and triggering condition
changes, it might fire callback based on previous condition.
To avoid this issue, disable interrupt before trying to
change settings, and enable afterwards.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2020-05-08 15:03:21 -07:00 • committed by Carles Cufí
commit ba5b141e2f
1 changed files with 11 additions and 9 deletions
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20
drivers/gpio/gpio_mchp_xec.c
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@ -150,6 +150,9 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev,
return -ENOTSUP; return -ENOTSUP;
} }
/* Disable interrupt in the EC aggregator */
MCHP_GIRQ_ENCLR(config->girq_id) = BIT(pin);
/* Assemble mask for level/edge triggered interrrupts */ /* Assemble mask for level/edge triggered interrrupts */
mask |= MCHP_GPIO_CTRL_IDET_MASK; mask |= MCHP_GPIO_CTRL_IDET_MASK;
@ -158,9 +161,6 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev,
* results in level triggered/low interrupts * results in level triggered/low interrupts
*/ */
pcr1 |= MCHP_GPIO_CTRL_IDET_DISABLE; pcr1 |= MCHP_GPIO_CTRL_IDET_DISABLE;
/* Disable interrupt in the EC aggregator */
MCHP_GIRQ_ENCLR(config->girq_id) = BIT(pin);
} else { } else {
if (mode == GPIO_INT_MODE_LEVEL) { if (mode == GPIO_INT_MODE_LEVEL) {
/* Enable level interrupts */ /* Enable level interrupts */
@ -187,12 +187,6 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev,
} }
pcr1 |= gpio_interrupt; pcr1 |= gpio_interrupt;
/* We enable the interrupts in the EC aggregator so that the
* result can be forwarded to the ARM NVIC
*/
MCHP_GIRQ_SRC_CLR(config->girq_id, pin);
MCHP_GIRQ_ENSET(config->girq_id) = BIT(pin);
} }
/* Now write contents of pcr1 variable to the PCR1 register that /* Now write contents of pcr1 variable to the PCR1 register that
@ -207,6 +201,14 @@ static int gpio_xec_pin_interrupt_configure(struct device *dev,
drv_data->pin_callback_enables |= BIT(pin); drv_data->pin_callback_enables |= BIT(pin);
} }
if (mode != GPIO_INT_MODE_DISABLED) {
/* We enable the interrupts in the EC aggregator so that the
* result can be forwarded to the ARM NVIC
*/
MCHP_GIRQ_SRC_CLR(config->girq_id, pin);
MCHP_GIRQ_ENSET(config->girq_id) = BIT(pin);
}
return 0; return 0;
} }