diff --git a/arch/x86/core/crt0.S b/arch/x86/core/crt0.S
index 8b4d273bb1b..f97111998b4 100644
--- a/arch/x86/core/crt0.S
+++ b/arch/x86/core/crt0.S
@@ -12,6 +12,7 @@
  */
 
 #include <arch/x86/asm.h>
+#include <arch/x86/msr.h>
 #include <kernel_arch_data.h>
 #include <arch/cpu.h>
 #include <arch/x86/multiboot.h>
@@ -47,8 +48,6 @@
 
 #define RM_CODE_SEG             0x8
 #define RM_DATA_SEG             0x18
-#define MSR_MTRR_DEF_TYPE       0x000002ff
-#define MTRR_ENABLE             0x00000800
 #define X86_CR0_PE              0x00000001
 #define X86_CR0_WP              0x00010000
 #define X86_CR4_PSE             0x00000010
@@ -82,9 +81,9 @@ start32:
 	mov $(X86_CR0_WP | X86_CR0_PE),%eax
 	mov %eax,%cr0
 
-	movl $MSR_MTRR_DEF_TYPE,%ecx
+	movl $X86_MTRR_DEF_TYPE_MSR,%ecx
 	rdmsr
-	or $MTRR_ENABLE,%eax
+	or $X86_MTRR_DEF_TYPE_MSR_ENABLE,%eax
 	wrmsr
 
 	mov $RM_DATA_SEG,%eax
diff --git a/include/arch/x86/msr.h b/include/arch/x86/msr.h
index 4d720b84644..9e57bcaadf7 100644
--- a/include/arch/x86/msr.h
+++ b/include/arch/x86/msr.h
@@ -102,7 +102,10 @@
 #define X86_MC19_CTL2_MSR 0x0293
 #define X86_MC20_CTL2_MSR 0x0294
 #define X86_MC21_CTL2_MSR 0x0295
+
 #define X86_MTRR_DEF_TYPE_MSR 0x02ff
+#define X86_MTRR_DEF_TYPE_MSR_ENABLE BIT(11)
+
 #define X86_FIXED_CTR0_MSR 0x0309
 #define X86_FIXED_CTR1_MSR 0x030a
 #define X86_FIXED_CTR2_MSR 0x030b