From ba459d002c5d60399884a33bfdcc1ef826b68e65 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Sun, 20 Jan 2019 21:14:08 +0100 Subject: [PATCH] soc: nxp_imx: Fix enabling ENET PLL outputs The ENET PLL should be enabled if the SoC is the MIMXRT1021 (it used by the ARM core) or if the ENET device is enabled. The 500MHz clock should be enabled if the SoC is the MIMXRT1021. The ENET clock should be enabled if the ENET device is enabled. Signed-off-by: Aurelien Jarno --- soc/arm/nxp_imx/rt/soc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/soc/arm/nxp_imx/rt/soc.c b/soc/arm/nxp_imx/rt/soc.c index 5f29b7e918c..772c07b78d6 100644 --- a/soc/arm/nxp_imx/rt/soc.c +++ b/soc/arm/nxp_imx/rt/soc.c @@ -40,7 +40,8 @@ const clock_usb_pll_config_t usb1PllConfig = { const clock_enet_pll_config_t ethPllConfig = { #ifdef CONFIG_SOC_MIMXRT1021 .enableClkOutput500M = true, -#else +#endif +#ifdef CONFIG_ETH_MCUX .enableClkOutput = true, #endif .enableClkOutput25M = false,