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SoC: SAM3x and SAM4: Add the Flash Controller to the DT

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This commit adds Device-Tree instances of the Flash controller
to the SAM3X, SAM4E and SAM4S series. The Flash-Controller
is used to get the unique device identifier.

Signed-off-by: Alexander Wachter <alexander@wachter.cloud>
This commit is contained in:
Alexander Wachter 2020-02-20 13:36:52 +01:00 • committed by Carles Cufí
commit b96477dd69
6 changed files with 42 additions and 0 deletions
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11
dts/arm/atmel/sam3x.dtsi
View file

@ -35,6 +35,17 @@
}; };
soc { soc {
/* Only used for HWINFO device ID */
flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
label = "FLASH_CTRL";
reg = <0x400e0a00 0x200>;
peripheral-id = <6>;
#address-cells = <1>;
#size-cells = <1>;
};
wdog: watchdog@400e1a50 { wdog: watchdog@400e1a50 {
compatible = "atmel,sam-watchdog"; compatible = "atmel,sam-watchdog";
reg = <0x400e1a50 0xc>; reg = <0x400e1a50 0xc>;

11
dts/arm/atmel/sam4e.dtsi
View file

@ -34,6 +34,17 @@
}; };
soc { soc {
/* Only used for HWINFO device ID */
flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
label = "FLASH_CTRL";
reg = <0x400e0a00 0x200>;
peripheral-id = <6>;
#address-cells = <1>;
#size-cells = <1>;
};
wdog: watchdog@400e1850 { wdog: watchdog@400e1850 {
compatible = "atmel,sam-watchdog"; compatible = "atmel,sam-watchdog";
reg = <0x400e1850 0x10>; reg = <0x400e1850 0x10>;

11
dts/arm/atmel/sam4s.dtsi
View file

@ -35,6 +35,17 @@
}; };
soc { soc {
/* Only used for HWINFO device ID */
flash-controller@400e0a00 {
compatible = "atmel,sam-flash-controller";
label = "FLASH_CTRL";
reg = <0x400e0a00 0x200>;
peripheral-id = <6>;
#address-cells = <1>;
#size-cells = <1>;
};
wdog: watchdog@400e1450 { wdog: watchdog@400e1450 {
compatible = "atmel,sam-watchdog"; compatible = "atmel,sam-watchdog";
reg = <0x400e1450 0xc>; reg = <0x400e1450 0xc>;

3
soc/arm/atmel_sam/sam3x/dts_fixup.h
View file

@ -68,4 +68,7 @@
#define DT_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1A50_LABEL #define DT_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1A50_LABEL
#define DT_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1A50_BASE_ADDRESS #define DT_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1A50_BASE_ADDRESS
#define DT_FLASH_DEV_BASE_ADDRESS DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_BASE_ADDRESS
#define DT_FLASH_DEV_NAME DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

3
soc/arm/atmel_sam/sam4e/dts_fixup.h
View file

@ -82,4 +82,7 @@
#define DT_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1850_IRQ_0_PRIORITY #define DT_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1850_IRQ_0_PRIORITY
#define DT_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1850_LABEL #define DT_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1850_LABEL
#define DT_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1850_BASE_ADDRESS #define DT_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1850_BASE_ADDRESS
#define DT_FLASH_DEV_BASE_ADDRESS DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_BASE_ADDRESS
#define DT_FLASH_DEV_NAME DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */

3
soc/arm/atmel_sam/sam4s/dts_fixup.h
View file

@ -66,4 +66,7 @@
#define DT_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1450_IRQ_0_PRIORITY #define DT_WDT_SAM_IRQ_PRIORITY DT_ATMEL_SAM_WATCHDOG_400E1450_IRQ_0_PRIORITY
#define DT_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1450_LABEL #define DT_WDT_SAM_LABEL DT_ATMEL_SAM_WATCHDOG_400E1450_LABEL
#define DT_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1450_BASE_ADDRESS #define DT_WDT_SAM_BASE_ADDRESS DT_ATMEL_SAM_WATCHDOG_400E1450_BASE_ADDRESS
#define DT_FLASH_DEV_BASE_ADDRESS DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_BASE_ADDRESS
#define DT_FLASH_DEV_NAME DT_ATMEL_SAM_FLASH_CONTROLLER_400E0A00_LABEL
/* End of SoC Level DTS fixup file */ /* End of SoC Level DTS fixup file */