diff --git a/boards/arm/lpcxpresso54114/lpcxpresso54114_m4_defconfig b/boards/arm/lpcxpresso54114/lpcxpresso54114_m4_defconfig
index 1a4d61e6ad4..02a1dffa046 100644
--- a/boards/arm/lpcxpresso54114/lpcxpresso54114_m4_defconfig
+++ b/boards/arm/lpcxpresso54114/lpcxpresso54114_m4_defconfig
@@ -16,3 +16,4 @@ CONFIG_CORTEX_M_SYSTICK=y
 CONFIG_GPIO=y
 CONFIG_PINMUX=y
 CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=48000000
+CONFIG_ARM_MPU=y
diff --git a/soc/arm/nxp_lpc/lpc54xxx/CMakeLists.txt b/soc/arm/nxp_lpc/lpc54xxx/CMakeLists.txt
index 3df8e924bee..2347dcb3a0c 100644
--- a/soc/arm/nxp_lpc/lpc54xxx/CMakeLists.txt
+++ b/soc/arm/nxp_lpc/lpc54xxx/CMakeLists.txt
@@ -7,6 +7,8 @@ zephyr_library()
 
 zephyr_library_sources(soc.c)
 
+zephyr_sources_ifdef(CONFIG_ARM_MPU arm_mpu_regions.c)
+
 if (CONFIG_SLAVE_CORE_MCUX)
   set(gen_dir ${ZEPHYR_BINARY_DIR}/include/generated/)
   string(CONFIGURE ${CONFIG_SLAVE_IMAGE_MCUX} core_m0_image)
diff --git a/soc/arm/nxp_lpc/lpc54xxx/Kconfig.soc b/soc/arm/nxp_lpc/lpc54xxx/Kconfig.soc
index 9815636bbd8..4477aa5759a 100644
--- a/soc/arm/nxp_lpc/lpc54xxx/Kconfig.soc
+++ b/soc/arm/nxp_lpc/lpc54xxx/Kconfig.soc
@@ -12,6 +12,7 @@ depends on SOC_SERIES_LPC54XXX
 config SOC_LPC54114_M4
 	bool "SOC_LPC54114_M4"
 	select CPU_CORTEX_M4
+	select CPU_HAS_ARM_MPU
 	select PLATFORM_SPECIFIC_INIT
 
 config SOC_LPC54114_M0
diff --git a/soc/arm/nxp_lpc/lpc54xxx/arm_mpu_mem_cfg.h b/soc/arm/nxp_lpc/lpc54xxx/arm_mpu_mem_cfg.h
new file mode 100644
index 00000000000..7dac17ae7c5
--- /dev/null
+++ b/soc/arm/nxp_lpc/lpc54xxx/arm_mpu_mem_cfg.h
@@ -0,0 +1,58 @@
+/*
+ * Copyright (c) 2017, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+#ifndef _ARM_MPU_MEM_CFG_H_
+#define _ARM_MPU_MEM_CFG_H_
+
+#include <soc.h>
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+
+/* Flash Region Definitions */
+#if CONFIG_FLASH_SIZE == 32
+#define REGION_FLASH_SIZE REGION_32K
+#elif CONFIG_FLASH_SIZE == 64
+#define REGION_FLASH_SIZE REGION_64K
+#elif CONFIG_FLASH_SIZE == 128
+#define REGION_FLASH_SIZE REGION_128K
+#elif CONFIG_FLASH_SIZE == 256
+#define REGION_FLASH_SIZE REGION_256K
+#elif CONFIG_FLASH_SIZE == 512
+#define REGION_FLASH_SIZE REGION_512K
+#elif CONFIG_FLASH_SIZE == 1024
+#define REGION_FLASH_SIZE REGION_1M
+#elif CONFIG_FLASH_SIZE == 2048
+#define REGION_FLASH_SIZE REGION_2M
+#elif CONFIG_FLASH_SIZE == 4096
+#define REGION_FLASH_SIZE REGION_4M
+#elif CONFIG_FLASH_SIZE == 8192
+#define REGION_FLASH_SIZE REGION_8M
+#elif CONFIG_FLASH_SIZE == 16384
+#define REGION_FLASH_SIZE REGION_16M
+#elif CONFIG_FLASH_SIZE == 65536
+#define REGION_FLASH_SIZE REGION_64M
+#else
+#error "Unsupported configuration"
+#endif
+
+/* SRAM Region Definitions */
+#if CONFIG_SRAM_SIZE == 32
+#define REGION_SRAM_0_SIZE REGION_32K
+#elif CONFIG_SRAM_SIZE == 64
+#define REGION_SRAM_0_SIZE REGION_64K
+#elif CONFIG_SRAM_SIZE == 128
+#define REGION_SRAM_0_SIZE REGION_128K
+#elif CONFIG_SRAM_SIZE == 256
+#define REGION_SRAM_0_SIZE REGION_256K
+#elif CONFIG_SRAM_SIZE == 512
+#define REGION_SRAM_0_SIZE REGION_512K
+#elif CONFIG_SRAM_SIZE == 768
+#define REGION_SRAM_0_SIZE REGION_1M /* MPU expects power of two size */
+#elif CONFIG_SRAM_SIZE == 32768
+#define REGION_SRAM_0_SIZE REGION_32M
+#else
+#error "Unsupported configuration"
+#endif
+
+#endif /* _ARM_MPU_MEM_CFG_H_ */
diff --git a/soc/arm/nxp_lpc/lpc54xxx/arm_mpu_regions.c b/soc/arm/nxp_lpc/lpc54xxx/arm_mpu_regions.c
new file mode 100644
index 00000000000..06a0d6aa538
--- /dev/null
+++ b/soc/arm/nxp_lpc/lpc54xxx/arm_mpu_regions.c
@@ -0,0 +1,26 @@
+/*
+ * Copyright (c) 2017, NXP
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#include <soc.h>
+#include <arch/arm/cortex_m/mpu/arm_mpu.h>
+
+#include "arm_mpu_mem_cfg.h"
+
+static const struct arm_mpu_region mpu_regions[] = {
+	/* Region 0 */
+	MPU_REGION_ENTRY("FLASH_0",
+			 CONFIG_FLASH_BASE_ADDRESS,
+			 REGION_FLASH_ATTR(REGION_FLASH_SIZE)),
+	/* Region 1 */
+	MPU_REGION_ENTRY("SRAM_0",
+			 CONFIG_SRAM_BASE_ADDRESS,
+			 REGION_RAM_ATTR(REGION_SRAM_0_SIZE)),
+};
+
+const struct arm_mpu_config mpu_config = {
+	.num_regions = ARRAY_SIZE(mpu_regions),
+	.mpu_regions = mpu_regions,
+};
diff --git a/soc/arm/nxp_lpc/lpc54xxx/soc.h b/soc/arm/nxp_lpc/lpc54xxx/soc.h
index 19792488010..ed8eaa3c131 100644
--- a/soc/arm/nxp_lpc/lpc54xxx/soc.h
+++ b/soc/arm/nxp_lpc/lpc54xxx/soc.h
@@ -16,9 +16,14 @@
 #define _SOC__H_
 
 #ifndef _ASMLANGUAGE
-#include <device.h>
 #include <sys/util.h>
 #include <fsl_common.h>
+
+/* ARM CMSIS definitions must be included before kernel_includes.h.
+ * Therefore, it is essential to include kernel_includes.h after including
+ * core SOC-specific headers.
+ */
+#include <kernel_includes.h>
 #endif /* !_ASMLANGUAGE */
 
 #define IOCON_PIO_DIGITAL_EN	0x80u