diff --git a/tests/drivers/uart/uart_async_api/boards/nucleo_f746zg_nocachemem.overlay b/tests/drivers/uart/uart_async_api/boards/nucleo_f746zg_nocachemem.overlay new file mode 100644 index 00000000000..2657a0bf45f --- /dev/null +++ b/tests/drivers/uart/uart_async_api/boards/nucleo_f746zg_nocachemem.overlay @@ -0,0 +1,17 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +/ { + /* The async_api.nocache_mem_dt test case expects a non-cachable RAM region */ + sram_nocache: memory@2004c000 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x2004c000 DT_SIZE_K(16)>; + zephyr,memory-region = "RAM_NOCACHE"; + zephyr,memory-attr = ; + }; +}; diff --git a/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg.overlay b/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg.overlay index 1eef7ad3ae9..9ecaf11a081 100644 --- a/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg.overlay +++ b/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg.overlay @@ -1,11 +1,18 @@ /* + * Copyright (c) 2024 STMicroelectronics + * * SPDX-License-Identifier: Apache-2.0 */ -dut: &usart2 { - dmas = <&dmamux1 2 44 STM32_DMA_PERIPH_TX>, - <&dmamux1 3 43 STM32_DMA_PERIPH_RX>; +/* Arduino Header pins: Tx:D9, Rx:D10 */ +dut: &uart9 { + pinctrl-0 = <&uart9_tx_pd15 &uart9_rx_pd14>; + pinctrl-names = "default"; + current-speed = <115200>; + dmas = <&dmamux1 2 117 STM32_DMA_PERIPH_TX>, + <&dmamux1 3 116 STM32_DMA_PERIPH_RX>; dma-names = "tx", "rx"; + status = "okay"; }; &dma1 { diff --git a/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg_nocachemem.overlay b/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg_nocachemem.overlay new file mode 100644 index 00000000000..fc9393dcf42 --- /dev/null +++ b/tests/drivers/uart/uart_async_api/boards/nucleo_h723zg_nocachemem.overlay @@ -0,0 +1,12 @@ +/* + * Copyright (c) 2024 STMicroelectronics + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include + +&sram1 { + zephyr,memory-attr = ; + zephyr,memory-region = "RAM_NOCACHE"; +}; diff --git a/tests/drivers/uart/uart_async_api/stm32_nocache_mem_dt.conf b/tests/drivers/uart/uart_async_api/stm32_nocache_mem_dt.conf new file mode 100644 index 00000000000..1d24d39f824 --- /dev/null +++ b/tests/drivers/uart/uart_async_api/stm32_nocache_mem_dt.conf @@ -0,0 +1,4 @@ +CONFIG_DCACHE=y +CONFIG_DT_DEFINED_NOCACHE=y +CONFIG_DT_DEFINED_NOCACHE_NAME="RAM_NOCACHE" +CONFIG_USERSPACE=n diff --git a/tests/drivers/uart/uart_async_api/testcase.yaml b/tests/drivers/uart/uart_async_api/testcase.yaml index a3665f7c570..e7a970d4a58 100644 --- a/tests/drivers/uart/uart_async_api/testcase.yaml +++ b/tests/drivers/uart/uart_async_api/testcase.yaml @@ -74,3 +74,39 @@ tests: - CONFIG_UART_SAM0_ASYNC=y - CONFIG_DMA=y build_only: true + drivers.uart.async_api.nocache_mem: + # nocache memory region is defined by the linker + filter: CONFIG_SERIAL_SUPPORT_ASYNC and CONFIG_CPU_HAS_DCACHE + harness: ztest + harness_config: + fixture: gpio_loopback + depends_on: gpio + platform_allow: + - nucleo_f746zg + - nucleo_h723zg + extra_configs: + - CONFIG_DCACHE=y + - CONFIG_NOCACHE_MEMORY=y + - CONFIG_USERSPACE=n + drivers.uart.async_api.nocache_mem_dt.nucleo_f746zg: + # nocache memory region is defined in DT + harness: ztest + harness_config: + fixture: gpio_loopback + depends_on: gpio + platform_allow: + - nucleo_f746zg + extra_args: + - DTC_OVERLAY_FILE="boards/nucleo_f746zg.overlay;boards/nucleo_f746zg_nocachemem.overlay" + - EXTRA_CONF_FILE=stm32_nocache_mem_dt.conf + drivers.uart.async_api.nocache_mem_dt.nucleo_h723zg: + # nocache memory region is defined in DT + harness: ztest + harness_config: + fixture: gpio_loopback + depends_on: gpio + platform_allow: + - nucleo_h723zg + extra_args: + - DTC_OVERLAY_FILE="boards/nucleo_h723zg.overlay;boards/nucleo_h723zg_nocachemem.overlay" + - EXTRA_CONF_FILE=stm32_nocache_mem_dt.conf