From b87878d09c203ab660d217af5b0547007945dd05 Mon Sep 17 00:00:00 2001 From: Richard Osterloh Date: Sun, 1 Sep 2019 18:30:41 +0100 Subject: [PATCH] soc: arm: st_stm32: Add STM32G4 SoC series Add soc and dts files to support for most of the common peripherals in the STM32G4 series. Add specific support for the STM32G431RB. Signed-off-by: Richard Osterloh --- dts/arm/st/g4/stm32g4.dtsi | 34 ++++++++++++++ dts/arm/st/g4/stm32g431.dtsi | 7 +++ dts/arm/st/g4/stm32g431Xb.dtsi | 22 +++++++++ soc/arm/st_stm32/stm32g4/CMakeLists.txt | 6 +++ .../st_stm32/stm32g4/Kconfig.defconfig.series | 15 ++++++ .../stm32g4/Kconfig.defconfig.stm32g431rb | 21 +++++++++ soc/arm/st_stm32/stm32g4/Kconfig.series | 16 +++++++ soc/arm/st_stm32/stm32g4/Kconfig.soc | 15 ++++++ soc/arm/st_stm32/stm32g4/dts_fixup.h | 11 +++++ soc/arm/st_stm32/stm32g4/linker.ld | 9 ++++ soc/arm/st_stm32/stm32g4/soc.c | 47 +++++++++++++++++++ soc/arm/st_stm32/stm32g4/soc.h | 32 +++++++++++++ 12 files changed, 235 insertions(+) create mode 100644 dts/arm/st/g4/stm32g4.dtsi create mode 100644 dts/arm/st/g4/stm32g431.dtsi create mode 100644 dts/arm/st/g4/stm32g431Xb.dtsi create mode 100644 soc/arm/st_stm32/stm32g4/CMakeLists.txt create mode 100644 soc/arm/st_stm32/stm32g4/Kconfig.defconfig.series create mode 100644 soc/arm/st_stm32/stm32g4/Kconfig.defconfig.stm32g431rb create mode 100644 soc/arm/st_stm32/stm32g4/Kconfig.series create mode 100644 soc/arm/st_stm32/stm32g4/Kconfig.soc create mode 100644 soc/arm/st_stm32/stm32g4/dts_fixup.h create mode 100644 soc/arm/st_stm32/stm32g4/linker.ld create mode 100644 soc/arm/st_stm32/stm32g4/soc.c create mode 100644 soc/arm/st_stm32/stm32g4/soc.h diff --git a/dts/arm/st/g4/stm32g4.dtsi b/dts/arm/st/g4/stm32g4.dtsi new file mode 100644 index 00000000000..fba1bc54baa --- /dev/null +++ b/dts/arm/st/g4/stm32g4.dtsi @@ -0,0 +1,34 @@ +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + + +#include + +/ { + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-m4f"; + reg = <0>; + }; + }; + + sram0: memory@20000000 { + compatible = "mmio-sram"; + }; + + soc { + + }; + +}; + +&nvic { + arm,num-irq-priority-bits = <4>; +}; diff --git a/dts/arm/st/g4/stm32g431.dtsi b/dts/arm/st/g4/stm32g431.dtsi new file mode 100644 index 00000000000..74a7ed46c4f --- /dev/null +++ b/dts/arm/st/g4/stm32g431.dtsi @@ -0,0 +1,7 @@ +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include diff --git a/dts/arm/st/g4/stm32g431Xb.dtsi b/dts/arm/st/g4/stm32g431Xb.dtsi new file mode 100644 index 00000000000..7bc59dee867 --- /dev/null +++ b/dts/arm/st/g4/stm32g431Xb.dtsi @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include +#include + +/ { + sram0: memory@20000000 { + reg = <0x20000000 DT_SIZE_K(32)>; + }; + + soc { + flash-controller@40022000 { + flash0: flash@8000000 { + reg = <0x08000000 DT_SIZE_K(128)>; + }; + }; + }; +}; diff --git a/soc/arm/st_stm32/stm32g4/CMakeLists.txt b/soc/arm/st_stm32/stm32g4/CMakeLists.txt new file mode 100644 index 00000000000..ac3ba70ace6 --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/CMakeLists.txt @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: Apache-2.0 + +zephyr_include_directories(${ZEPHYR_BASE}/drivers) +zephyr_sources( + soc.c + ) diff --git a/soc/arm/st_stm32/stm32g4/Kconfig.defconfig.series b/soc/arm/st_stm32/stm32g4/Kconfig.defconfig.series new file mode 100644 index 00000000000..07acc937604 --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/Kconfig.defconfig.series @@ -0,0 +1,15 @@ +# Kconfig - STMicroelectronics STM32G4 MCU line +# +# Copyright (c) 2019 Richard Osterloh +# +# SPDX-License-Identifier: Apache-2.0 +# + +if SOC_SERIES_STM32G4X + +source "soc/arm/st_stm32/stm32g4/Kconfig.defconfig.stm32g4*" + +config SOC_SERIES + default "stm32g4" + +endif # SOC_SERIES_STM32G4X diff --git a/soc/arm/st_stm32/stm32g4/Kconfig.defconfig.stm32g431rb b/soc/arm/st_stm32/stm32g4/Kconfig.defconfig.stm32g431rb new file mode 100644 index 00000000000..42a5a06bf74 --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/Kconfig.defconfig.stm32g431rb @@ -0,0 +1,21 @@ +# Kconfig - STMicroelectronics STM32G431RB MCU +# +# Copyright (c) 2019 Richard Osterloh +# +# SPDX-License-Identifier: Apache-2.0 +# + +if SOC_STM32G431XX + +config SOC + string + default "stm32g431xx" + +config NUM_IRQS + int + default 102 + +if GPIO_STM32 + +endif # GPIO_STM32 +endif # SOC_STM32G431XX diff --git a/soc/arm/st_stm32/stm32g4/Kconfig.series b/soc/arm/st_stm32/stm32g4/Kconfig.series new file mode 100644 index 00000000000..f8e34eadb38 --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/Kconfig.series @@ -0,0 +1,16 @@ +# Kconfig - STMicroelectronics STM32G4 MCU series +# +# Copyright (c) 2019 Richard Osterloh +# +# SPDX-License-Identifier: Apache-2.0 +# + +config SOC_SERIES_STM32G4X + bool "STM32G4x Series MCU" + select CPU_CORTEX_M4 + select CPU_HAS_FPU + select SOC_FAMILY_STM32 + select HAS_STM32CUBE + select CPU_HAS_ARM_MPU + help + Enable support for STM32G4 MCU series diff --git a/soc/arm/st_stm32/stm32g4/Kconfig.soc b/soc/arm/st_stm32/stm32g4/Kconfig.soc new file mode 100644 index 00000000000..4da74f01b43 --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/Kconfig.soc @@ -0,0 +1,15 @@ +# Kconfig - STMicroelectronics STM32G4 MCU line +# +# Copyright (c) 2019 Richard Osterloh +# +# SPDX-License-Identifier: Apache-2.0 +# + +choice +prompt "STM32G4x MCU Selection" +depends on SOC_SERIES_STM32G4X + +config SOC_STM32G431XX + bool "STM32G431XX" + +endchoice diff --git a/soc/arm/st_stm32/stm32g4/dts_fixup.h b/soc/arm/st_stm32/stm32g4/dts_fixup.h new file mode 100644 index 00000000000..20be3443b2f --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/dts_fixup.h @@ -0,0 +1,11 @@ +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/* SoC level DTS fixup file */ + +#define DT_NUM_IRQ_PRIO_BITS DT_ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS + +/* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32g4/linker.ld b/soc/arm/st_stm32/stm32g4/linker.ld new file mode 100644 index 00000000000..21cc003f6c9 --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/linker.ld @@ -0,0 +1,9 @@ +/* linker.ld - Linker command/script file */ + +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + +#include diff --git a/soc/arm/st_stm32/stm32g4/soc.c b/soc/arm/st_stm32/stm32g4/soc.c new file mode 100644 index 00000000000..3a289917eea --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/soc.c @@ -0,0 +1,47 @@ +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file + * @brief System/hardware module for STM32G4 processor + */ + +#include +#include +#include +#include + +/** + * @brief Perform basic hardware initialization at boot. + * + * This needs to be run from the very beginning. + * So the init priority has to be 0 (zero). + * + * @return 0 + */ +static int stm32g4_init(struct device *arg) +{ + u32_t key; + + ARG_UNUSED(arg); + + key = irq_lock(); + + /* Install default handler that simply resets the CPU + * if configured in the kernel, NOP otherwise + */ + NMI_INIT(); + + irq_unlock(key); + + /* Update CMSIS SystemCoreClock variable (HCLK) */ + /* At reset, system core clock is set to 16 MHz from HSI */ + SystemCoreClock = 16000000; + + return 0; +} + +SYS_INIT(stm32g4_init, PRE_KERNEL_1, 0); diff --git a/soc/arm/st_stm32/stm32g4/soc.h b/soc/arm/st_stm32/stm32g4/soc.h new file mode 100644 index 00000000000..1a82d4d14cf --- /dev/null +++ b/soc/arm/st_stm32/stm32g4/soc.h @@ -0,0 +1,32 @@ +/* + * Copyright (c) 2019 Richard Osterloh + * + * SPDX-License-Identifier: Apache-2.0 + */ + +/** + * @file SoC configuration macros for the STM32G4 family processors. + * + * Based on reference manual: + * STM32G4xx advanced ARM ® -based 32-bit MCUs + * + * Chapter 2.2: Memory organization + */ + + +#ifndef _STM32G4_SOC_H_ +#define _STM32G4_SOC_H_ + +#include + +#ifndef _ASMLANGUAGE + +#include +#include + +/* Add include for DTS generated information */ +#include + +#endif /* !_ASMLANGUAGE */ + +#endif /* _STM32G4_SOC_H_ */