xtensa: optionally build reset vector code
In real-world use-cases this isn't always needed. Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
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2 changed files with 10 additions and 1 deletions
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@ -68,6 +68,15 @@ config SW_ISR_TABLE_DYNAMIC
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SRAM so that it is writable. This has the side-effect of removing
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write-protection on the ISR table.
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config XTENSA_RESET_VECTOR
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bool
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prompt "Build reset vector code"
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default y
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help
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This option controls whether the initial reset vector code is built.
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This is always needed for the simulator. Real boards may already
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implement this in boot ROM.
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menu "Specific core configuration"
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config IRQ_OFFLOAD_INTNUM
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@ -1,2 +1,2 @@
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asflags-y := -c -xassembler-with-cpp $(XTENSA_INCLUDE) $(flagBoardType) -mtext-section-literals -mlongcalls
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obj-y = reset-vector.o
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obj-$(CONFIG_XTENSA_RESET_VECTOR) = reset-vector.o
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