diff --git a/soc/renesas/ra/ra2a1/soc.c b/soc/renesas/ra/ra2a1/soc.c
index 76fc4803360..5585eba6a6d 100644
--- a/soc/renesas/ra/ra2a1/soc.c
+++ b/soc/renesas/ra/ra2a1/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -35,4 +40,12 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 	bsp_clock_init();
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra2l1/soc.c b/soc/renesas/ra/ra2l1/soc.c
index 9e1cdb39302..82a889c994a 100644
--- a/soc/renesas/ra/ra2l1/soc.c
+++ b/soc/renesas/ra/ra2l1/soc.c
@@ -27,6 +27,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -34,8 +39,14 @@ volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
  */
 void soc_early_init_hook(void)
 {
-
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra4e1/soc.c b/soc/renesas/ra/ra4e1/soc.c
index a14c81ddb4c..c243bb776b3 100644
--- a/soc/renesas/ra/ra4e1/soc.c
+++ b/soc/renesas/ra/ra4e1/soc.c
@@ -26,6 +26,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -59,4 +64,12 @@ void soc_early_init_hook(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra4e2/soc.c b/soc/renesas/ra/ra4e2/soc.c
index 6d11bae8208..dbac92defa9 100644
--- a/soc/renesas/ra/ra4e2/soc.c
+++ b/soc/renesas/ra/ra4e2/soc.c
@@ -26,6 +26,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -59,4 +64,12 @@ void soc_early_init_hook(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra4l1/soc.c b/soc/renesas/ra/ra4l1/soc.c
index b207d99c65f..b756cdd319c 100644
--- a/soc/renesas/ra/ra4l1/soc.c
+++ b/soc/renesas/ra/ra4l1/soc.c
@@ -26,6 +26,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -59,4 +64,12 @@ void soc_early_init_hook(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra4m1/soc.c b/soc/renesas/ra/ra4m1/soc.c
index 06202352c51..f89098d5267 100644
--- a/soc/renesas/ra/ra4m1/soc.c
+++ b/soc/renesas/ra/ra4m1/soc.c
@@ -144,6 +144,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -158,5 +163,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra4m2/soc.c b/soc/renesas/ra/ra4m2/soc.c
index c3c21184aa4..7c95131bebe 100644
--- a/soc/renesas/ra/ra4m2/soc.c
+++ b/soc/renesas/ra/ra4m2/soc.c
@@ -26,6 +26,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -59,4 +64,12 @@ void soc_early_init_hook(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra4m3/soc.c b/soc/renesas/ra/ra4m3/soc.c
index 10658184372..d751f7e6829 100644
--- a/soc/renesas/ra/ra4m3/soc.c
+++ b/soc/renesas/ra/ra4m3/soc.c
@@ -26,6 +26,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -59,4 +64,12 @@ void soc_early_init_hook(void)
 
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra4w1/soc.c b/soc/renesas/ra/ra4w1/soc.c
index 6d84c068f7d..c62592e320c 100644
--- a/soc/renesas/ra/ra4w1/soc.c
+++ b/soc/renesas/ra/ra4w1/soc.c
@@ -26,6 +26,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -35,4 +40,12 @@ void soc_early_init_hook(void)
 {
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra6e1/soc.c b/soc/renesas/ra/ra6e1/soc.c
index ca37db8e274..7b4331e6926 100644
--- a/soc/renesas/ra/ra6e1/soc.c
+++ b/soc/renesas/ra/ra6e1/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -63,5 +68,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra6e2/soc.c b/soc/renesas/ra/ra6e2/soc.c
index 2b34260479e..0a929d7b300 100644
--- a/soc/renesas/ra/ra6e2/soc.c
+++ b/soc/renesas/ra/ra6e2/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -63,5 +68,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra6m1/soc.c b/soc/renesas/ra/ra6m1/soc.c
index c9809254ae2..1986da3ec8c 100644
--- a/soc/renesas/ra/ra6m1/soc.c
+++ b/soc/renesas/ra/ra6m1/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -39,5 +44,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra6m2/soc.c b/soc/renesas/ra/ra6m2/soc.c
index f0d399463f5..90d7cd7fad1 100644
--- a/soc/renesas/ra/ra6m2/soc.c
+++ b/soc/renesas/ra/ra6m2/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -39,5 +44,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra6m3/soc.c b/soc/renesas/ra/ra6m3/soc.c
index 99f9a60e6eb..9c520b99e3a 100644
--- a/soc/renesas/ra/ra6m3/soc.c
+++ b/soc/renesas/ra/ra6m3/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -39,5 +44,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra6m4/soc.c b/soc/renesas/ra/ra6m4/soc.c
index f561d631b67..c93933f4fb8 100644
--- a/soc/renesas/ra/ra6m4/soc.c
+++ b/soc/renesas/ra/ra6m4/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -63,5 +68,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra6m5/soc.c b/soc/renesas/ra/ra6m5/soc.c
index f156a3c5fb2..872b89421d3 100644
--- a/soc/renesas/ra/ra6m5/soc.c
+++ b/soc/renesas/ra/ra6m5/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -63,5 +68,13 @@ void soc_early_init_hook(void)
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
 
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif
+
 	irq_unlock(key);
 }
diff --git a/soc/renesas/ra/ra8d1/soc.c b/soc/renesas/ra/ra8d1/soc.c
index 1629ca7900e..afde75b266a 100644
--- a/soc/renesas/ra/ra8d1/soc.c
+++ b/soc/renesas/ra/ra8d1/soc.c
@@ -29,6 +29,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -61,4 +66,12 @@ void soc_early_init_hook(void)
 
 	sys_cache_data_enable();
 #endif
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra8m1/soc.c b/soc/renesas/ra/ra8m1/soc.c
index a0da08c8616..d898ab3957c 100644
--- a/soc/renesas/ra/ra8m1/soc.c
+++ b/soc/renesas/ra/ra8m1/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -34,4 +39,12 @@ void soc_early_init_hook(void)
 {
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }
diff --git a/soc/renesas/ra/ra8t1/soc.c b/soc/renesas/ra/ra8t1/soc.c
index 33948ba3097..3c02a1cae0b 100644
--- a/soc/renesas/ra/ra8t1/soc.c
+++ b/soc/renesas/ra/ra8t1/soc.c
@@ -25,6 +25,11 @@ uint32_t SystemCoreClock BSP_SECTION_EARLY_INIT;
 
 volatile uint32_t g_protect_pfswe_counter BSP_SECTION_EARLY_INIT;
 
+#ifdef CONFIG_RUNTIME_NMI
+extern bsp_grp_irq_cb_t g_bsp_group_irq_sources[];
+extern void NMI_Handler(void);
+#endif /* CONFIG_RUNTIME_NMI */
+
 /**
  * @brief Perform basic hardware initialization at boot.
  *
@@ -34,4 +39,12 @@ void soc_early_init_hook(void)
 {
 	SystemCoreClock = BSP_MOCO_HZ;
 	g_protect_pfswe_counter = 0;
+
+#ifdef CONFIG_RUNTIME_NMI
+	for (uint32_t i = 0; i < 16; i++) {
+		g_bsp_group_irq_sources[i] = 0;
+	}
+
+	z_arm_nmi_set_handler(NMI_Handler);
+#endif /* CONFIG_RUNTIME_NMI */
 }