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snippets: nordic: Add nRF54L09 FLPR

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Add nrF54L09 FLPR core support.

Signed-off-by: Adam Kondraciuk <adam.kondraciuk@nordicsemi.no>
This commit is contained in:
Adam Kondraciuk 2025-02-06 14:02:03 +01:00 • committed by Benjamin Cabé
commit b6d208d292
2 changed files with 41 additions and 0 deletions
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3
snippets/nordic-flpr/snippet.yml
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@ -9,6 +9,9 @@ boards:
/.*/nrf54h20/cpuapp/: /.*/nrf54h20/cpuapp/:
append: append:
EXTRA_DTC_OVERLAY_FILE: soc/nrf54h20_cpuapp.overlay EXTRA_DTC_OVERLAY_FILE: soc/nrf54h20_cpuapp.overlay
/.*/nrf54l09/cpuapp/:
append:
EXTRA_DTC_OVERLAY_FILE: soc/nrf54l09_cpuapp.overlay
/.*/nrf54l20/cpuapp/: /.*/nrf54l20/cpuapp/:
append: append:
EXTRA_DTC_OVERLAY_FILE: soc/nrf54l20_cpuapp.overlay EXTRA_DTC_OVERLAY_FILE: soc/nrf54l20_cpuapp.overlay

38
snippets/nordic-flpr/soc/nrf54l09_cpuapp.overlay Normal file
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@ -0,0 +1,38 @@
/*
* Copyright (c) 2025 Nordic Semiconductor
* SPDX-License-Identifier: Apache-2.0
*/
/ {
soc {
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
cpuflpr_code_partition: image@ee000 {
/* FLPR core code partition */
reg = <0xee000 DT_SIZE_K(48)>;
};
};
cpuflpr_sram_code_data: memory@20023c00 {
compatible = "mmio-sram";
reg = <0x20023c00 DT_SIZE_K(48)>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x20023c00 DT_SIZE_K(48)>;
};
};
};
&uart30 {
status = "reserved";
};
&cpuflpr_vpr {
execution-memory = <&cpuflpr_sram_code_data>;
source-memory = <&cpuflpr_code_partition>;
};
&cpuapp_vevif_tx {
status = "okay";
};