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gdbstub: xtensa: add support for dc233c core

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This adds support for using coredump with Xtensa DC233C core,
which are being used by qemu_xtensa and qemu_xtensa_mmu.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
This commit is contained in:
Daniel Leung 2023-09-14 13:17:05 -07:00 • committed by David Leach
commit b4da11f929
2 changed files with 41 additions and 0 deletions
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3
arch/xtensa/core/coredump.c
View file

@ -19,6 +19,7 @@ enum xtensa_soc_code {
XTENSA_SOC_INTEL_ADSP, XTENSA_SOC_INTEL_ADSP,
XTENSA_SOC_ESP32S2, XTENSA_SOC_ESP32S2,
XTENSA_SOC_ESP32S3, XTENSA_SOC_ESP32S3,
XTENSA_SOC_DC233C,
}; };
struct xtensa_arch_block { struct xtensa_arch_block {
@ -117,6 +118,8 @@ void arch_coredump_info_dump(const z_arch_esf_t *esf)
arch_blk.soc = XTENSA_SOC_ESP32S2; arch_blk.soc = XTENSA_SOC_ESP32S2;
#elif CONFIG_SOC_SERIES_ESP32S3 #elif CONFIG_SOC_SERIES_ESP32S3
arch_blk.soc = XTENSA_SOC_ESP32S3; arch_blk.soc = XTENSA_SOC_ESP32S3;
#elif CONFIG_SOC_XTENSA_DC233C
arch_blk.soc = XTENSA_SOC_DC233C;
#else #else
arch_blk.soc = XTENSA_SOC_UNKNOWN; arch_blk.soc = XTENSA_SOC_UNKNOWN;
#endif #endif

38
scripts/coredump/gdbstubs/arch/xtensa.py
View file

@ -25,6 +25,7 @@ class XtensaSoc(Enum):
INTEL_ADSP_CAVS = 3 INTEL_ADSP_CAVS = 3
ESP32S2 = 4 ESP32S2 = 4
ESP32S3 = 5 ESP32S3 = 5
DC233C = 6
# The previous version of this script didn't need to know # The previous version of this script didn't need to know
@ -68,6 +69,8 @@ def get_gdb_reg_definition(soc, toolchain):
return GdbRegDef_ESP32S2 return GdbRegDef_ESP32S2
elif soc == XtensaSoc.ESP32S3: elif soc == XtensaSoc.ESP32S3:
return GdbRegDef_ESP32S3 return GdbRegDef_ESP32S3
elif soc == XtensaSoc.DC233C:
return GdbRegDef_DC233C
else: else:
raise NotImplementedError raise NotImplementedError
@ -476,3 +479,38 @@ class GdbRegDef_Intel_Adsp_CAVS_XCC:
LCOUNT = 514 LCOUNT = 514
WINDOWBASE = 584 WINDOWBASE = 584
WINDOWSTART = 585 WINDOWSTART = 585
# sdk-ng -> overlays/xtensa_dc233c/gdb/gdb/xtensa-config.c
class GdbRegDef_DC233C:
ARCH_DATA_BLK_STRUCT_REGS = '<IIIIIIIIIIIIIIIIIIIIIIIII'
SOC_GDB_GPKT_BIN_SIZE = 568
class RegNum(Enum):
PC = 0
EXCCAUSE = 93
EXCVADDR = 99
SAR = 36
PS = 42
SCOMPARE1 = 44
A0 = 105
A1 = 106
A2 = 107
A3 = 108
A4 = 109
A5 = 110
A6 = 111
A7 = 112
A8 = 113
A9 = 114
A10 = 115
A11 = 116
A12 = 117
A13 = 118
A14 = 119
A15 = 120
LBEG = 33
LEND = 34
LCOUNT = 35
WINDOWBASE = 38
WINDOWSTART = 39