tests: improve test cases for interrupt testing
Improve dynamic interrupt test cases of interrupt for platform such as x86, x86_64, native_posix, this improve code coverage of it. Signed-off-by: Enjia Mai <enjiax.mai@intel.com>
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30a1a4bb44
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4 changed files with 155 additions and 8 deletions
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@ -6,3 +6,8 @@ project(interrupt)
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FILE(GLOB app_sources src/*.c)
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target_sources(app PRIVATE ${app_sources})
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target_include_directories(app PRIVATE
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${ZEPHYR_BASE}/kernel/include
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${ZEPHYR_BASE}/arch/${ARCH}/include
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)
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@ -1,3 +1,4 @@
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CONFIG_ZTEST=y
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CONFIG_DYNAMIC_INTERRUPTS=y
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CONFIG_MP_NUM_CPUS=1
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CONFIG_THREAD_STACK_INFO=y
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@ -5,25 +5,37 @@
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*/
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#include <ztest.h>
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#include "interrupt_util.h"
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#if defined(CONFIG_DYNAMIC_INTERRUPTS) && defined(CONFIG_GEN_SW_ISR_TABLE)
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extern struct _isr_table_entry __sw_isr_table _sw_isr_table[];
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extern void z_irq_spurious(const void *unused);
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#if defined(CONFIG_DYNAMIC_INTERRUPTS)
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#define ISR_DYN_ARG 0xab249cfd
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static unsigned int handler_has_run;
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static uintptr_t handler_test_result;
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static void dyn_isr(const void *arg)
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{
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ARG_UNUSED(arg);
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handler_test_result = (uintptr_t)arg;
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handler_has_run = 1;
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}
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#if defined(CONFIG_GEN_SW_ISR_TABLE)
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extern struct _isr_table_entry __sw_isr_table _sw_isr_table[];
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extern void z_irq_spurious(const void *unused);
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/**
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* @brief Test dynamic ISR installation
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*
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* @ingroup kernel_interrupt_tests
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*
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* This routine locates an unused entry in the software ISR table, installs a
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* dynamic ISR to the unused entry by calling the `arch_irq_connect_dynamic`
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* function, and verifies that the ISR is successfully installed by checking
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* the software ISR table entry.
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* @details This routine locates an unused entry in the software ISR table,
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* installs a dynamic ISR to the unused entry by calling the dynamic
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* configured function, and verifies that the ISR is successfully installed
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* by checking the software ISR table entry.
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*
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* @see arch_irq_connect_dynamic()
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*/
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void test_isr_dynamic(void)
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{
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@ -50,10 +62,76 @@ void test_isr_dynamic(void)
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_sw_isr_table[i].arg == argval,
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"dynamic isr did not install successfully");
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}
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#else
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/*
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* For testing arch such as x86, x86_64 and posix which support dynamic
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* interrupt but without SW ISR table, we test it by applying for a dynamic
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* interrupt and then trigger it to check if happened correctly.
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*/
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static int get_dynamic_interrupt_line(void)
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{
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#ifdef TEST_IRQ_DYN_LINE
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return TEST_IRQ_DYN_LINE;
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#else
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return -1;
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#endif
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}
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void test_isr_dynamic(void)
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{
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int irq_dyn_line;
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int vector_num;
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/* Get a irq line for dynamic interrupt */
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irq_dyn_line = get_dynamic_interrupt_line();
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/**TESTPOINT: configuration of interrupts dynamically at runtime */
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vector_num = arch_irq_connect_dynamic(irq_dyn_line, 1, dyn_isr,
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(void *)ISR_DYN_ARG, 0);
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#if defined(CONFIG_X86_64)
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/* The isr table for x86_64 is visiable, so check it up here */
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extern void (*x86_irq_funcs[])(const void *);
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extern const void *x86_irq_args[];
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zassert_true(x86_irq_funcs[irq_dyn_line] == dyn_isr &&
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x86_irq_args[irq_dyn_line] == (void *)ISR_DYN_ARG,
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"dynamic isr did not install successfully");
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#endif
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TC_PRINT("vector(%d)\n", vector_num);
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zassert_true(vector_num > 0,
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"irq connect dynamic failed");
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zassert_equal(handler_has_run, 0,
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"handler has run before interrupt trigger");
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irq_enable(irq_dyn_line);
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trigger_irq(irq_dyn_line);
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zassert_equal(handler_has_run, 1,
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"interrupt triggered but handler has not run(%d)",
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handler_has_run);
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/**TESTPOINT: pass word-sized parameter to interrupt */
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zassert_equal(handler_test_result, ISR_DYN_ARG,
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"parameter(0x%lx) in handler is not correct",
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handler_test_result);
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irq_disable(irq_dyn_line);
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/**TESTPOINT: interrupt cannot be triggered when disable it */
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zassert_equal(handler_has_run, 1,
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"interrupt handler should not be triggered again(%d)",
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handler_has_run);
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}
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#endif /* CONFIG_GEN_SW_ISR_TABLE */
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#else
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/* Skip the dynamic interrupt test for the platforms that do not support it */
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void test_isr_dynamic(void)
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{
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ztest_test_skip();
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}
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#endif /* CONFIG_DYNAMIC_INTERRUPTS && CONFIG_GEN_SW_ISR_TABLE */
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#endif /* CONFIG_DYNAMIC_INTERRUPTS */
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@ -99,6 +99,69 @@ static inline void trigger_irq(int irq)
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printk("Triggering irq : %d\n", irq);
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z_arc_v2_aux_reg_write(_ARC_V2_AUX_IRQ_HINT, irq);
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}
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#elif defined(CONFIG_X86)
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#define TEST_IRQ_DYN_LINE 16
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#define TEST_DYNAMIC_VECTOR TEST_IRQ_DYN_LINE+32
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static inline void trigger_irq(int irq)
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{
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int vector = irq + 32;
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/*
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* Trigger an interrupt of x86 under gcov code coverage report enabled,
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* which means GCC optimization will be -O0, so need to hard code the
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* immediate number for INT instruction. Otherwise, an build error
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* happends and shows:
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* "error: 'asm' operand 0 probably does not match constraints" and
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* "error: impossible constraint in 'asm'"
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*/
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#if defined(CONFIG_COVERAGE)
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if (vector == TEST_DYNAMIC_VECTOR) {
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__asm__ volatile("int %0" :: "i"(TEST_DYNAMIC_VECTOR));
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} else {
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printk("not interrupt");
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}
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#else
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__asm__ volatile("int %0" :: "i"(vector));
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#endif
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}
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#elif defined(CONFIG_ARCH_POSIX)
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#include "irq_ctrl.h"
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#define TEST_IRQ_DYN_LINE 5
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static inline void trigger_irq(int irq)
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{
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hw_irq_ctrl_raise_im_from_sw(irq);
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}
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#elif defined(CONFIG_RISCV)
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static inline void trigger_irq(int irq)
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{
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uint32_t mip;
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__asm__ volatile ("csrrs %0, mip, %1\n"
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: "=r" (mip)
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: "r" (1 << irq));
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}
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#elif defined(CONFIG_XTENSA)
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static inline void trigger_irq(int irq)
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{
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z_xt_set_intset(BIT((unsigned int)irq));
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}
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#elif defined(CONFIG_SPARC)
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extern void z_sparc_enter_irq(int);
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static inline void trigger_irq(int irq)
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{
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z_sparc_enter_irq(irq);
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}
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#else
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/* for not supported architecture */
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#define NO_TRIGGER_FROM_SW
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