From b452817b67fc5befb57da33b27e7dcdb4468ffb1 Mon Sep 17 00:00:00 2001 From: Benjamin Walsh Date: Thu, 27 Oct 2016 16:57:13 -0400 Subject: [PATCH] kernel: merge _IS_IN_ISR() with _is_in_isr() They were the same, standardize on the lowercase one. Change-Id: I8bca080e45f3e0970697d4451e468b9081f96f5f Signed-off-by: Benjamin Walsh --- arch/arc/include/nano_private.h | 2 -- arch/arm/include/nano_private.h | 1 - arch/nios2/include/nano_private.h | 1 - arch/x86/include/nano_private.h | 1 - kernel/nanokernel/nano_context.c | 2 +- kernel/unified/thread.c | 2 +- tests/kernel/test_irq_offload/src/main.c | 2 +- 7 files changed, 3 insertions(+), 8 deletions(-) diff --git a/arch/arc/include/nano_private.h b/arch/arc/include/nano_private.h index f2244fd6158..c88f7b11b4b 100644 --- a/arch/arc/include/nano_private.h +++ b/arch/arc/include/nano_private.h @@ -350,8 +350,6 @@ static ALWAYS_INLINE int _is_in_isr(void) return ((act & 0xffff) != 0); } -#define _IS_IN_ISR _is_in_isr - /** * * @bried Indicates the interrupt number of the highest priority diff --git a/arch/arm/include/nano_private.h b/arch/arm/include/nano_private.h index edafbb7e754..a92dbad22c0 100644 --- a/arch/arm/include/nano_private.h +++ b/arch/arm/include/nano_private.h @@ -322,7 +322,6 @@ _set_thread_return_value_with_data(struct k_thread *thread, unsigned int value, extern void nano_cpu_atomic_idle(unsigned int); -#define _IS_IN_ISR() _IsInIsr() #define _is_in_isr() _IsInIsr() extern void _IntLibInit(void); diff --git a/arch/nios2/include/nano_private.h b/arch/nios2/include/nano_private.h index 39548af7766..beee5564526 100644 --- a/arch/nios2/include/nano_private.h +++ b/arch/nios2/include/nano_private.h @@ -263,7 +263,6 @@ FUNC_NORETURN void _NanoFatalErrorHandler(unsigned int reason, const NANO_ESF *esf); -#define _IS_IN_ISR() (_nanokernel.nested != 0) #define _is_in_isr() (_nanokernel.nested != 0) #ifdef CONFIG_IRQ_OFFLOAD diff --git a/arch/x86/include/nano_private.h b/arch/x86/include/nano_private.h index 77c38075198..68a3b5d0868 100644 --- a/arch/x86/include/nano_private.h +++ b/arch/x86/include/nano_private.h @@ -919,7 +919,6 @@ extern unsigned char _idt_base_address[]; } #endif -#define _IS_IN_ISR() (_nanokernel.nested != 0) #define _is_in_isr() (_nanokernel.nested != 0) #endif /* _ASMLANGUAGE */ diff --git a/kernel/nanokernel/nano_context.c b/kernel/nanokernel/nano_context.c index ca59fe834a8..d22a2b23162 100644 --- a/kernel/nanokernel/nano_context.c +++ b/kernel/nanokernel/nano_context.c @@ -38,7 +38,7 @@ nano_thread_id_t sys_thread_self_get(void) nano_context_type_t sys_execution_context_type_get(void) { - if (_IS_IN_ISR()) + if (_is_in_isr()) return NANO_CTX_ISR; if ((_nanokernel.current->flags & TASK) == TASK) diff --git a/kernel/unified/thread.c b/kernel/unified/thread.c index e93e2a39dd1..72fceec3b36 100644 --- a/kernel/unified/thread.c +++ b/kernel/unified/thread.c @@ -62,7 +62,7 @@ int sys_execution_context_type_get(void) */ int k_am_in_isr(void) { - return _IS_IN_ISR(); + return _is_in_isr(); } /* diff --git a/tests/kernel/test_irq_offload/src/main.c b/tests/kernel/test_irq_offload/src/main.c index 1b60c01d870..ad35206a2b5 100644 --- a/tests/kernel/test_irq_offload/src/main.c +++ b/tests/kernel/test_irq_offload/src/main.c @@ -29,7 +29,7 @@ void offload_function(void *param) TC_PRINT("offload_function running\n"); /* Make sure we're in IRQ context */ - if (!_IS_IN_ISR()) { + if (!_is_in_isr()) { TC_PRINT("Not in IRQ context!\n"); return; }