From b416758e9f11d2ef0b1456b80d4fe36554c8dec0 Mon Sep 17 00:00:00 2001 From: Ryan QIAN Date: Tue, 8 Jan 2019 08:27:52 +0800 Subject: [PATCH] arch: arm: nxp: imxrt1021: add device support - Add Soc information for RT1020 Signed-off-by: Ryan QIAN --- .../nxp_imx/rt/Kconfig.defconfig.mimxrt1021 | 47 +++++++++++++++++++ soc/arm/nxp_imx/rt/Kconfig.soc | 29 ++++++++++++ soc/arm/nxp_imx/rt/soc.c | 4 ++ 3 files changed, 80 insertions(+) create mode 100644 soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1021 diff --git a/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1021 b/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1021 new file mode 100644 index 00000000000..e7b25882050 --- /dev/null +++ b/soc/arm/nxp_imx/rt/Kconfig.defconfig.mimxrt1021 @@ -0,0 +1,47 @@ +# Kconfig - i.MX RT1021 +# +# Copyright (c) 2018, NXP +# +# SPDX-License-Identifier: Apache-2.0 +# + +if SOC_MIMXRT1021 + +config SOC + string + default "mimxrt1021" + +if CLOCK_CONTROL + +config CLOCK_CONTROL_MCUX_CCM + default y + +endif # CLOCK_CONTROL + +config ARM_DIV + default 0 + +config AHB_DIV + default 0 + +config IPG_DIV + default 3 + +config GPIO + default y + +if GPIO + +config GPIO_MCUX_IGPIO + default y + +endif # GPIO + +if SERIAL + +config UART_MCUX_LPUART + default y + +endif # SERIAL + +endif # SOC_MIMXRT1021 diff --git a/soc/arm/nxp_imx/rt/Kconfig.soc b/soc/arm/nxp_imx/rt/Kconfig.soc index 4affd3ee341..122ab0068ff 100644 --- a/soc/arm/nxp_imx/rt/Kconfig.soc +++ b/soc/arm/nxp_imx/rt/Kconfig.soc @@ -9,6 +9,19 @@ choice prompt "i.MX RT Selection" depends on SOC_SERIES_IMX_RT +config SOC_MIMXRT1021 + bool "SOC_MIMXRT1021" + select HAS_MCUX + select HAS_MCUX_CCM + select HAS_MCUX_IGPIO + select HAS_MCUX_LPSPI + select HAS_MCUX_LPUART + select CPU_HAS_FPU + select CPU_HAS_ARM_MPU + select INIT_SYS_PLL + select INIT_USB1_PLL + select INIT_ENET_PLL + config SOC_MIMXRT1051 bool "SOC_MIMXRT1051" select HAS_MCUX @@ -63,6 +76,18 @@ endchoice if SOC_SERIES_IMX_RT +config SOC_PART_NUMBER_MIMXRT1021CAG4A + bool + +config SOC_PART_NUMBER_MIMXRT1021CAF4A + bool + +config SOC_PART_NUMBER_MIMXRT1021DAG5A + bool + +config SOC_PART_NUMBER_MIMXRT1021DAF5A + bool + config SOC_PART_NUMBER_MIMXRT1051CVL5A bool @@ -89,6 +114,10 @@ config SOC_PART_NUMBER_MIMXRT1062DVL6A config SOC_PART_NUMBER_IMX_RT string + default "MIMXRT1021CAG4A" if SOC_PART_NUMBER_MIMXRT1021CAG4A + default "MIMXRT1021CAF4A" if SOC_PART_NUMBER_MIMXRT1021CAF4A + default "MIMXRT1021DAG5A" if SOC_PART_NUMBER_MIMXRT1021DAG5A + default "MIMXRT1021DAF5A" if SOC_PART_NUMBER_MIMXRT1021DAF5A default "MIMXRT1051CVL5A" if SOC_PART_NUMBER_MIMXRT1051CVL5A default "MIMXRT1051DVL6A" if SOC_PART_NUMBER_MIMXRT1051DVL6A default "MIMXRT1052CVL5A" if SOC_PART_NUMBER_MIMXRT1052CVL5A diff --git a/soc/arm/nxp_imx/rt/soc.c b/soc/arm/nxp_imx/rt/soc.c index 3767acbfd08..3659a0cc959 100644 --- a/soc/arm/nxp_imx/rt/soc.c +++ b/soc/arm/nxp_imx/rt/soc.c @@ -37,7 +37,11 @@ const clock_usb_pll_config_t usb1PllConfig = { #ifdef CONFIG_INIT_ENET_PLL /* ENET PLL configuration for RUN mode */ const clock_enet_pll_config_t ethPllConfig = { +#ifdef CONFIG_SOC_MIMXRT1021 + .enableClkOutput500M = true, +#else .enableClkOutput = true, +#endif .enableClkOutput25M = false, .loopDivider = 1, };