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arch: arm64: Remove _BIT suffix

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This is redundant and not coherent with the rest of the file. Thus
remove the _BIT suffix from the bit field names.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
This commit is contained in:
Carlo Caione 2020-09-24 11:14:24 +02:00 • committed by Ioannis Glaropoulos
commit b3ff89bd51
3 changed files with 8 additions and 8 deletions
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4
arch/arm/core/aarch64/arm_mmu.c
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@ -409,7 +409,7 @@ static void enable_mmu_el1(unsigned int flags)
__asm__ volatile("mrs %0, sctlr_el1" : "=r" (val));
__asm__ volatile("msr sctlr_el1, %0"
:
: "r" (val | SCTLR_M_BIT | SCTLR_C_BIT)
: "r" (val | SCTLR_M | SCTLR_C)
: "memory", "cc");
/* Ensure the MMU enable takes effect immediately */
@ -439,7 +439,7 @@ static int arm_mmu_init(const struct device *arg)
/* Ensure that MMU is already not enabled */
__asm__ volatile("mrs %0, sctlr_el1" : "=r" (val));
__ASSERT((val & SCTLR_M_BIT) == 0, "MMU is already enabled\n");
__ASSERT((val & SCTLR_M) == 0, "MMU is already enabled\n");
MMU_DEBUG("xlat tables:\n");
MMU_DEBUG("base table(L%d): %p, %d entries\n", XLAT_TABLE_BASE_LEVEL,

2
arch/arm/core/aarch64/reset.S
View file

@ -131,7 +131,7 @@ SECTION_SUBSEC_FUNC(TEXT,_reset_section,__start)
msr cpacr_el1, x0
/* Enable the instruction cache and EL1 stack alignment check. */
mov_imm x1, (SCTLR_I_BIT | SCTLR_SA_BIT)
mov_imm x1, (SCTLR_I | SCTLR_SA)
mrs x0, sctlr_el1
orr x0, x0, x1
msr sctlr_el1, x0

10
include/arch/arm/aarch64/cpu.h
View file

@ -28,11 +28,11 @@
#define SCTLR_EL1_RES1 (BIT(29) | BIT(28) | BIT(23) | \
BIT(22) | BIT(20) | BIT(11))
#define SCTLR_M_BIT BIT(0)
#define SCTLR_A_BIT BIT(1)
#define SCTLR_C_BIT BIT(2)
#define SCTLR_SA_BIT BIT(3)
#define SCTLR_I_BIT BIT(12)
#define SCTLR_M BIT(0)
#define SCTLR_A BIT(1)
#define SCTLR_C BIT(2)
#define SCTLR_SA BIT(3)
#define SCTLR_I BIT(12)
#define CPACR_EL1_FPEN_NOTRAP (0x3 << 20)