drivers: Replace DEV_INVALID_CONF by -EINVAL
This patch replaces all occurences of the macro DEV_INVALID_CONF by -EINVAL at the driver level. So this patch touch the files under drivers/, include/ and samples/drivers/ when applicable. This patch is part of the effort to transition from DEV_* codes to errno.h codes. Change-Id: Idae0d5af8dd780416977c9261a5fb6188c3aab64 Signed-off-by: Andre Guedes <andre.guedes@intel.com>
This commit is contained in:
parent
245e140da6
commit
b3cb3a1f68
27 changed files with 83 additions and 70 deletions
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@ -139,7 +139,7 @@ static int adc_qmsi_read(struct device *dev, struct adc_seq_table *seq_tbl)
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adc_lock(info);
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if (qm_adc_set_config(QM_ADC_0, &cfg) != QM_RC_OK) {
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ret = DEV_INVALID_CONF;
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ret = -EINVAL;
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adc_unlock(info);
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break;
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}
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@ -188,7 +188,7 @@ static int adc_qmsi_read(struct device *dev, struct adc_seq_table *seq_tbl)
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adc_lock(info);
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if (qm_adc_set_config(QM_ADC_0, &cfg) != QM_RC_OK) {
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ret = DEV_INVALID_CONF;
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ret = -EINVAL;
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adc_unlock(info);
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break;
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}
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@ -184,7 +184,7 @@ static int ti_adc108s102_read(struct device *dev,
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memset(adc->chans, 0, ADC108S102_CHANNELS_SIZE);
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if (_verify_entries(seq_table) == 0) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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adc->seq_table = seq_table;
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@ -14,6 +14,7 @@
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* limitations under the License.
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <nanokernel.h>
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@ -35,7 +36,7 @@ static int dw_aio_cmp_disable(struct device *dev, uint8_t index)
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(struct dw_aio_cmp_t *)config->base_address;
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if (index >= AIO_DW_CMP_COUNT) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* Disable interrupt to host */
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@ -64,16 +65,16 @@ static int dw_aio_cmp_configure(struct device *dev, uint8_t index,
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/* index out of range */
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if (index >= AIO_DW_CMP_COUNT) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* make sure reference makes sense */
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if ((refsel != AIO_CMP_REF_A) && (refsel != AIO_CMP_REF_B))
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return DEV_INVALID_CONF;
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return -EINVAL;
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/* make sure polarity makes sense */
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if ((polarity != AIO_CMP_POL_RISE) && (polarity != AIO_CMP_POL_FALL))
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return DEV_INVALID_CONF;
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return -EINVAL;
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dev_data->cb[index].cb = cb;
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dev_data->cb[index].param = param;
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@ -162,7 +163,7 @@ int dw_aio_cmp_init(struct device *dev)
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int i;
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if ((config->base_address == 0) || (config->interrupt_num == 0))
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return DEV_INVALID_CONF;
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return -EINVAL;
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if (config->config_func) {
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i = config->config_func(dev);
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@ -14,6 +14,8 @@
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* limitations under the License.
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*/
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#include <errno.h>
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#include <stdio.h>
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#include <nanokernel.h>
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#include <board.h>
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@ -45,11 +47,11 @@ static int aio_qmsi_cmp_disable(struct device *dev, uint8_t index)
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qm_ac_config_t config;
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if (qm_ac_get_config(&config) != QM_RC_OK) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (index >= AIO_QMSI_CMP_COUNT) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* Disable interrupt to host */
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@ -60,7 +62,7 @@ static int aio_qmsi_cmp_disable(struct device *dev, uint8_t index)
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config.power &= ~(1 << index);
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if (qm_ac_set_config(&config) != QM_RC_OK) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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return 0;
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@ -77,11 +79,11 @@ static int aio_qmsi_cmp_configure(struct device *dev, uint8_t index,
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qm_ac_config_t config;
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if (qm_ac_get_config(&config) != QM_RC_OK) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (index >= AIO_QMSI_CMP_COUNT) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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aio_qmsi_cmp_disable(dev, index);
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@ -107,7 +109,7 @@ static int aio_qmsi_cmp_configure(struct device *dev, uint8_t index,
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config.power |= (1 << index);
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if (qm_ac_set_config(&config) != QM_RC_OK) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* Enable Interrupts to host for an specific comparator */
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@ -249,7 +249,7 @@ static int _bt_uart_init(struct device *unused)
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h4_dev = device_get_binding(CONFIG_BLUETOOTH_UART_ON_DEV_NAME);
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if (!h4_dev) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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bt_driver_register(&drv);
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@ -776,7 +776,7 @@ static int _bt_uart_init(struct device *unused)
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h5_dev = device_get_binding(CONFIG_BLUETOOTH_UART_ON_DEV_NAME);
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if (h5_dev == NULL) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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bt_driver_register(&drv);
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@ -16,6 +16,8 @@
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* limitations under the License.
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*/
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#include <errno.h>
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#include <nanokernel.h>
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#include <misc/ring_buffer.h>
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#include <misc/printk.h>
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@ -102,13 +104,13 @@ int ipm_console_receiver_init(struct device *d)
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if (!ipm) {
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printk("unable to bind IPM console receiver to '%s'\n",
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__func__, config_info->bind_to);
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (ipm_max_id_val_get(ipm) < 0xFF) {
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printk("IPM driver %s doesn't support 8-bit id values",
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config_info->bind_to);
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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nano_sem_init(&driver_data->sem);
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@ -16,6 +16,8 @@
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* limitations under the License.
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*/
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#include <errno.h>
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#include <nanokernel.h>
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#include <misc/printk.h>
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#include <ipm.h>
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@ -51,7 +53,7 @@ int ipm_console_sender_init(struct device *d)
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if (!ipm_console_device) {
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printk("unable to bind IPM console sender to '%s'\n",
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config_info->bind_to);
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (config_info->flags & IPM_CONSOLE_STDOUT) {
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@ -112,7 +112,7 @@ static int gpio_mmio_config(struct device *dev, int access_op,
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/* Setup direction register */
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if (!cfg->reg.dir) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (cfg->cfg_flags & GPIO_MMIO_CFG_DIR_MASK) {
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@ -197,7 +197,7 @@ static int gpio_mmio_write(struct device *dev, int access_op,
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dev->config->config_info;
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if (!cfg->reg.output) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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switch (access_op) {
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@ -231,7 +231,7 @@ static int gpio_mmio_read(struct device *dev, int access_op,
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dev->config->config_info;
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if (!cfg->reg.input) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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switch (access_op) {
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@ -385,7 +385,7 @@ static int gpio_pcal9535a_config(struct device *dev, int access_op,
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#endif
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if (!_has_i2c_master(dev)) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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ret = _setup_pin_dir(dev, access_op, pin, flags);
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@ -434,7 +434,7 @@ static int gpio_pcal9535a_write(struct device *dev, int access_op,
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int ret;
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if (!_has_i2c_master(dev)) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* Invert input value for pins configurated as active low. */
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@ -490,7 +490,7 @@ static int gpio_pcal9535a_read(struct device *dev, int access_op,
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int ret;
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if (!_has_i2c_master(dev)) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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ret = _read_port_regs(dev, REG_INPUT_PORT0, &buf);
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@ -546,7 +546,7 @@ static int gpio_pcal9535a_disable_callback(struct device *dev,
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static int gpio_pcal9535a_suspend_port(struct device *dev)
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{
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if (!_has_i2c_master(dev)) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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return -ENOTSUP;
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@ -555,7 +555,7 @@ static int gpio_pcal9535a_suspend_port(struct device *dev)
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static int gpio_pcal9535a_resume_port(struct device *dev)
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{
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if (!_has_i2c_master(dev)) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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return -ENOTSUP;
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@ -591,7 +591,7 @@ int gpio_pcal9535a_init(struct device *dev)
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/* Find out the device struct of the I2C master */
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i2c_master = device_get_binding((char *)config->i2c_master_dev_name);
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if (!i2c_master) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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drv_data->i2c_master = i2c_master;
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@ -183,7 +183,7 @@ static inline int gpio_qmsi_config(struct device *port, int access_op,
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{
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if (((flags & GPIO_INT) && (flags & GPIO_DIR_OUT)) ||
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((flags & GPIO_DIR_IN) && (flags & GPIO_DIR_OUT))) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (access_op == GPIO_ACCESS_BY_PIN) {
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@ -143,7 +143,7 @@ static int gpio_sch_config(struct device *dev,
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if (access_op == GPIO_ACCESS_BY_PIN) {
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if (pin >= info->bits) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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_gpio_pin_config(dev, pin, flags);
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@ -216,13 +216,13 @@ static int i2c_sam3_runtime_configure(struct device *dev, uint32_t config)
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/* Currently support master mode only */
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if (dev_data->dev_config.bits.is_slave_read) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* Calculate clock dividers */
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clk = clk_div_calc(dev);
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if (!clk) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* Disable controller first before changing anything */
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@ -628,7 +628,7 @@ static int i2c_sam3_init(struct device *dev)
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!= 0) {
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DBG("I2C: Cannot set default configuration 0x%x\n",
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dev_data->dev_config.raw);
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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return 0;
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@ -375,7 +375,7 @@ static int _i2c_dw_setup(struct device *dev, uint16_t slave_address)
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break;
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case I2C_SPEED_HIGH:
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if (!dw->support_hs_mode) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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DBG("I2C: speed set to HIGH\n");
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@ -386,7 +386,7 @@ static int _i2c_dw_setup(struct device *dev, uint16_t slave_address)
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break;
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default:
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DBG("I2C: invalid speed requested\n");
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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DBG("I2C: lcnt = %d\n", dw->lcnt);
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@ -605,12 +605,12 @@ static int i2c_dw_runtime_configure(struct device *dev, uint32_t config)
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dw->hcnt = value;
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} else {
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rc = DEV_INVALID_CONF;
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rc = -EINVAL;
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}
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break;
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default:
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/* TODO change */
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rc = DEV_INVALID_CONF;
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rc = -EINVAL;
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}
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/*
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@ -76,7 +76,7 @@ static int i2c_qmsi_configure(struct device *dev, uint32_t config)
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/* This driver only supports master mode. */
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if (!cfg.bits.is_master_device)
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return DEV_INVALID_CONF;
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return -EINVAL;
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qm_cfg.mode = QM_I2C_MASTER;
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qm_cfg.address_mode = (cfg.bits.use_10_bit_addr) ? QM_I2C_10_BIT :
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@ -93,7 +93,7 @@ static int i2c_qmsi_configure(struct device *dev, uint32_t config)
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qm_cfg.speed = QM_I2C_SPEED_FAST_PLUS;
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break;
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default:
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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if (qm_i2c_set_config(instance, &qm_cfg) != QM_RC_OK)
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@ -392,7 +392,7 @@ static int _i2c_qse_ss_setup(struct device *dev, uint16_t addr)
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default:
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DBG("I2C: invalid speed requested\n");
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/* TODO change */
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rc = DEV_INVALID_CONF;
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rc = -EINVAL;
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goto done;
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}
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@ -584,7 +584,7 @@ static int i2c_qse_ss_runtime_configure(struct device *dev, uint32_t config)
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break;
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default:
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/* TODO change */
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rc = DEV_INVALID_CONF;
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rc = -EINVAL;
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}
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/*
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@ -16,6 +16,8 @@
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* limitations under the License.
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*/
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#include <errno.h>
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#include <nanokernel.h>
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#include <sections.h>
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@ -226,7 +228,7 @@ static int _bt_nble_init(struct device *unused)
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nble_dev = device_get_binding(CONFIG_NBLE_UART_ON_DEV_NAME);
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if (!nble_dev) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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net_buf_pool_init(rx_pool);
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@ -310,35 +310,35 @@ int pinmux_fsl_k64_initialize(struct device *port)
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#ifdef CONFIG_GPIO_K64_A
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data->gpio_a = device_get_binding(CONFIG_PINMUX_K64_GPIO_A_NAME);
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if (!data->gpio_a) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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#endif
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#ifdef CONFIG_GPIO_K64_B
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data->gpio_b = device_get_binding(CONFIG_PINMUX_K64_GPIO_B_NAME);
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if (!data->gpio_b) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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#endif
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#ifdef CONFIG_GPIO_K64_C
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data->gpio_c = device_get_binding(CONFIG_PINMUX_K64_GPIO_C_NAME);
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if (!data->gpio_c) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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#endif
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#ifdef CONFIG_GPIO_K64_D
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data->gpio_d = device_get_binding(CONFIG_PINMUX_K64_GPIO_D_NAME);
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if (!data->gpio_d) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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#endif
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#ifdef CONFIG_GPIO_K64_E
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data->gpio_e = device_get_binding(CONFIG_PINMUX_K64_GPIO_E_NAME);
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if (!data->gpio_e) {
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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#endif
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@ -94,7 +94,7 @@ static int pwm_ftm_clk_enable(uint8_t ftm_num)
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if (ftm_num > 3) {
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DBG("ERROR: Illegal FTM number (%d).\n"
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" Cannot enable PWM clock\n", ftm_num);
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return DEV_INVALID_CONF;
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return -EINVAL;
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}
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/* enabling the FTM by setting one of the bits SIM_SCGC6[26:24] */
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@ -339,7 +339,7 @@ static int pwm_ftm_set_values(struct device *dev, int access_op,
|
|||
/* If phase != 0 enable combine mode */
|
||||
if (channel % 2 != 0) {
|
||||
DBG("If Phase is non-zero pwm must be 0, 2, 4, 6.\n");
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
DBG("Note: Enabling phase on pwm%d therefore "
|
||||
|
@ -352,14 +352,14 @@ static int pwm_ftm_set_values(struct device *dev, int access_op,
|
|||
case 0:
|
||||
if (!config->phase_enable0) {
|
||||
DBG("Error: Phase capability must be enabled on FTM0\n");
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
|
||||
case 1:
|
||||
if (!config->phase_enable2) {
|
||||
DBG("Error: Phase capability must be enabled on FTM2\n");
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
drv_data->phase[1] = on;
|
||||
break;
|
||||
|
@ -367,19 +367,19 @@ static int pwm_ftm_set_values(struct device *dev, int access_op,
|
|||
case 2:
|
||||
if (!config->phase_enable4) {
|
||||
DBG("Error: Phase capability must be enabled on FTM4\n");
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
|
||||
case 3:
|
||||
if (!config->phase_enable6) {
|
||||
DBG("Error: Phase capability must be enabled on FTM0\n");
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
break;
|
||||
|
||||
default:
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
drv_data->phase[pwm_pair] = on;
|
||||
|
@ -406,7 +406,7 @@ static int pwm_ftm_set_values(struct device *dev, int access_op,
|
|||
sys_write32(off, PWM_K64_FTM_CNV(config->reg_base, channel+1));
|
||||
#else /*COMBINE_MODE_SUPPORT*/
|
||||
DBG("Error: \"on\" value must be zero. Phase is not supported\n");
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
#endif /*COMBINE_MODE_SUPPORT*/
|
||||
|
||||
} else {
|
||||
|
|
|
@ -88,13 +88,13 @@ static int pwm_pca9685_set_values(struct device *dev, int access_op,
|
|||
uint8_t buf[] = { 0, 0, 0, 0, 0};
|
||||
|
||||
if (!_has_i2c_master(dev)) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (access_op) {
|
||||
case PWM_ACCESS_BY_PIN:
|
||||
if (pwm > MAX_PWM_OUT) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
buf[0] = REG_LED_ON_L(pwm);
|
||||
break;
|
||||
|
@ -159,7 +159,7 @@ static int pwm_pca9685_set_duty_cycle(struct device *dev, int access_op,
|
|||
static int pwm_pca9685_suspend(struct device *dev)
|
||||
{
|
||||
if (!_has_i2c_master(dev)) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return -ENOTSUP;
|
||||
|
@ -168,7 +168,7 @@ static int pwm_pca9685_suspend(struct device *dev)
|
|||
static int pwm_pca9685_resume(struct device *dev)
|
||||
{
|
||||
if (!_has_i2c_master(dev)) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return -ENOTSUP;
|
||||
|
@ -203,7 +203,7 @@ int pwm_pca9685_init(struct device *dev)
|
|||
/* Find out the device struct of the I2C master */
|
||||
i2c_master = device_get_binding((char *)config->i2c_master_dev_name);
|
||||
if (!i2c_master) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
drv_data->i2c_master = i2c_master;
|
||||
|
||||
|
|
|
@ -102,7 +102,7 @@ int mcp9808_init(struct device *dev)
|
|||
if (!data->i2c_master) {
|
||||
DBG("mcp9808: i2c master not found: %s\n",
|
||||
CONFIG_MCP9808_I2C_DEV_NAME);
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
data->i2c_slave_addr = CONFIG_MCP9808_I2C_ADDR;
|
||||
|
|
|
@ -16,6 +16,8 @@
|
|||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include <errno.h>
|
||||
|
||||
#include <nanokernel.h>
|
||||
#include <i2c.h>
|
||||
#include <gpio.h>
|
||||
|
@ -76,7 +78,7 @@ int mcp9808_attr_set(struct device *dev, enum sensor_channel chan,
|
|||
|
||||
#ifdef CONFIG_SENSOR_DEBUG
|
||||
if (chan != SENSOR_CHAN_TEMP) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
#endif
|
||||
|
||||
|
@ -92,7 +94,7 @@ int mcp9808_attr_set(struct device *dev, enum sensor_channel chan,
|
|||
reg_val |= val->val1 << 4;
|
||||
break;
|
||||
default:
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (attr) {
|
||||
|
@ -103,7 +105,7 @@ int mcp9808_attr_set(struct device *dev, enum sensor_channel chan,
|
|||
reg_addr = MCP9808_REG_UPPER_LIMIT;
|
||||
break;
|
||||
default:
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return mcp9808_reg_write(data, reg_addr, reg_val);
|
||||
|
|
|
@ -170,7 +170,7 @@ int sx9500_init(struct device *dev)
|
|||
if (!data->i2c_master) {
|
||||
DBG("sx9500: i2c master not found: %s\n",
|
||||
CONFIG_SX9500_I2C_DEV_NAME);
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
data->i2c_slave_addr = CONFIG_SX9500_I2C_ADDR;
|
||||
|
|
|
@ -14,6 +14,8 @@
|
|||
* limitations under the License.
|
||||
*/
|
||||
|
||||
#include <errno.h>
|
||||
|
||||
#include <nanokernel.h>
|
||||
#include <i2c.h>
|
||||
#include <sensor.h>
|
||||
|
@ -56,7 +58,7 @@ int sx9500_trigger_set(struct device *dev,
|
|||
break;
|
||||
|
||||
default:
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -145,7 +147,7 @@ int sx9500_setup_interrupt(struct device *dev)
|
|||
if (!gpio) {
|
||||
DBG("sx9500: gpio controller %s not found\n",
|
||||
CONFIG_SX9500_GPIO_CONTROLLER);
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
gpio_pin_configure(gpio, CONFIG_SX9500_GPIO_PIN,
|
||||
|
|
|
@ -258,7 +258,7 @@ static inline int ns16550_pci_uart_scan(struct device *dev)
|
|||
struct uart_device_config * const dev_cfg = DEV_CFG(dev);
|
||||
|
||||
if (dev_cfg->pci_dev.vendor_id == 0x0000) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
pci_bus_scan_init();
|
||||
|
|
|
@ -250,7 +250,7 @@ static int spi_dw_slave_select(struct device *dev, uint32_t slave)
|
|||
DBG("%s: %p %d\n", __func__, dev, slave);
|
||||
|
||||
if (slave == 0 || slave > 4) {
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
spi->slave = 1 << (slave - 1);
|
||||
|
|
|
@ -200,7 +200,7 @@ static int spi_qmsi_transceive(struct device *dev,
|
|||
|
||||
rc = qm_spi_set_config(spi, cfg);
|
||||
if (rc != QM_RC_OK)
|
||||
return DEV_INVALID_CONF;
|
||||
return -EINVAL;
|
||||
|
||||
spi_control_cs(dev, true);
|
||||
|
||||
|
|
Loading…
Add table
Add a link
Reference in a new issue