drivers: serial: bouffalolab: UART_INT_CLEAR is write-only
Fix incorrect read being made to "write 1 to clear" register UART_INT_CLEAR Signed-off-by: Benjamin Cabé <benjamin@zephyrproject.org>
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34f9cd9490
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b33e28d233
1 changed files with 7 additions and 5 deletions
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@ -90,28 +90,30 @@ static int uart_bflb_err_check(const struct device *dev)
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{
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{
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const struct bflb_config *const cfg = dev->config;
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const struct bflb_config *const cfg = dev->config;
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uint32_t status = BL_RD_REG(cfg->reg, UART_INT_STS);
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uint32_t status = BL_RD_REG(cfg->reg, UART_INT_STS);
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uint32_t tmp = BL_RD_REG(cfg->reg, UART_INT_CLEAR);
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uint32_t clear_mask = 0;
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int errors = 0;
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int errors = 0;
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if (status & BIT(UART_INT_RX_FER)) {
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if (status & BIT(UART_INT_RX_FER)) {
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tmp |= BIT(UART_INT_RX_FER);
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clear_mask |= BIT(UART_INT_RX_FER);
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errors |= UART_ERROR_OVERRUN;
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errors |= UART_ERROR_OVERRUN;
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}
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}
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if (status & BIT(UART_INT_TX_FER)) {
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if (status & BIT(UART_INT_TX_FER)) {
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tmp |= BIT(UART_INT_TX_FER);
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clear_mask |= BIT(UART_INT_TX_FER);
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errors |= UART_ERROR_OVERRUN;
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errors |= UART_ERROR_OVERRUN;
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}
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}
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if (status & BIT(UART_INT_PCE)) {
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if (status & BIT(UART_INT_PCE)) {
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tmp |= BIT(UART_INT_PCE);
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clear_mask |= BIT(UART_INT_PCE);
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errors |= UART_ERROR_PARITY;
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errors |= UART_ERROR_PARITY;
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}
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}
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BL_WR_REG(cfg->reg, UART_INT_CLEAR, tmp);
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if (clear_mask != 0) {
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BL_WR_REG(cfg->reg, UART_INT_CLEAR, clear_mask);
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}
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return errors;
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return errors;
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}
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}
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