From b31adf2d33ca858d5c7df09abf2fabd6778cbf72 Mon Sep 17 00:00:00 2001 From: Manivannan Sadhasivam Date: Fri, 4 Jan 2019 22:05:03 +0530 Subject: [PATCH] drivers: i2c: Add STM32L1X I2C support Add I2C support for STM32L1X SoC series based on I2C_STM32_V1 driver. Signed-off-by: Manivannan Sadhasivam --- drivers/i2c/Kconfig.stm32 | 4 +-- dts/arm/st/l1/stm32l1.dtsi | 27 +++++++++++++++++++ .../st_stm32/stm32l1/Kconfig.defconfig.series | 7 +++++ soc/arm/st_stm32/stm32l1/dts_fixup.h | 20 ++++++++++++++ soc/arm/st_stm32/stm32l1/soc.h | 4 +++ 5 files changed, 60 insertions(+), 2 deletions(-) diff --git a/drivers/i2c/Kconfig.stm32 b/drivers/i2c/Kconfig.stm32 index f54de1beae7..945395b3192 100644 --- a/drivers/i2c/Kconfig.stm32 +++ b/drivers/i2c/Kconfig.stm32 @@ -13,8 +13,8 @@ menuconfig I2C_STM32 if I2C_STM32 config I2C_STM32_V1 - bool "STM32 V1 Driver (F1/F4X)" - depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F4X + bool "STM32 V1 Driver (F1/F4X/L1X)" + depends on SOC_SERIES_STM32F1X || SOC_SERIES_STM32F4X || SOC_SERIES_STM32L1X select HAS_DTS_I2C select USE_STM32_LL_I2C help diff --git a/dts/arm/st/l1/stm32l1.dtsi b/dts/arm/st/l1/stm32l1.dtsi index c42fcf1ac5c..4a9b31542aa 100644 --- a/dts/arm/st/l1/stm32l1.dtsi +++ b/dts/arm/st/l1/stm32l1.dtsi @@ -8,6 +8,7 @@ #include #include #include +#include / { cpus { @@ -45,6 +46,32 @@ label = "UART_3"; }; + i2c1: i2c@40005400 { + compatible = "st,stm32-i2c-v1"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005400 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00200000>; + interrupts = <31 0>, <32 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_1"; + }; + + i2c2: i2c@40005800 { + compatible = "st,stm32-i2c-v1"; + clock-frequency = ; + #address-cells = <1>; + #size-cells = <0>; + reg = <0x40005800 0x400>; + clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00400000>; + interrupts = <33 0>, <34 0>; + interrupt-names = "event", "error"; + status = "disabled"; + label= "I2C_2"; + }; + usart1: serial@40013800 { compatible = "st,stm32-usart", "st,stm32-uart"; reg = <0x40013800 0x400>; diff --git a/soc/arm/st_stm32/stm32l1/Kconfig.defconfig.series b/soc/arm/st_stm32/stm32l1/Kconfig.defconfig.series index 4d4090ce408..90293e6f7ba 100644 --- a/soc/arm/st_stm32/stm32l1/Kconfig.defconfig.series +++ b/soc/arm/st_stm32/stm32l1/Kconfig.defconfig.series @@ -12,4 +12,11 @@ source "soc/arm/st_stm32/stm32l1/Kconfig.defconfig.stm32l1*" config SOC_SERIES default "stm32l1" +if I2C_STM32 + +config I2C_STM32_V1 + default y + +endif # I2C_STM32 + endif # SOC_SERIES_STM32L1X diff --git a/soc/arm/st_stm32/stm32l1/dts_fixup.h b/soc/arm/st_stm32/stm32l1/dts_fixup.h index 55320e0d619..f165e6bcfea 100644 --- a/soc/arm/st_stm32/stm32l1/dts_fixup.h +++ b/soc/arm/st_stm32/stm32l1/dts_fixup.h @@ -89,4 +89,24 @@ #define DT_UART_STM32_USART_3_CLOCK_BUS DT_ST_STM32_USART_40004800_CLOCK_BUS #define DT_UART_STM32_USART_3_HW_FLOW_CONTROL DT_ST_STM32_USART_40004800_HW_FLOW_CONTROL +#define DT_I2C_1_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005400_BASE_ADDRESS +#define DT_I2C_1_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT_PRIORITY +#define DT_I2C_1_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR_PRIORITY +#define CONFIG_I2C_1_NAME DT_ST_STM32_I2C_V1_40005400_LABEL +#define DT_I2C_1_EVENT_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_EVENT +#define DT_I2C_1_ERROR_IRQ DT_ST_STM32_I2C_V1_40005400_IRQ_ERROR +#define DT_I2C_1_BITRATE DT_ST_STM32_I2C_V1_40005400_CLOCK_FREQUENCY +#define DT_I2C_1_CLOCK_BITS DT_ST_STM32_I2C_V1_40005400_CLOCK_BITS +#define DT_I2C_1_CLOCK_BUS DT_ST_STM32_I2C_V1_40005400_CLOCK_BUS + +#define DT_I2C_2_BASE_ADDRESS DT_ST_STM32_I2C_V1_40005800_BASE_ADDRESS +#define DT_I2C_2_EVENT_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT_PRIORITY +#define DT_I2C_2_ERROR_IRQ_PRI DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR_PRIORITY +#define CONFIG_I2C_2_NAME DT_ST_STM32_I2C_V1_40005800_LABEL +#define DT_I2C_2_EVENT_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_EVENT +#define DT_I2C_2_ERROR_IRQ DT_ST_STM32_I2C_V1_40005800_IRQ_ERROR +#define DT_I2C_2_BITRATE DT_ST_STM32_I2C_V1_40005800_CLOCK_FREQUENCY +#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS +#define DT_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS + /* End of SoC Level DTS fixup file */ diff --git a/soc/arm/st_stm32/stm32l1/soc.h b/soc/arm/st_stm32/stm32l1/soc.h index 40a5c39128c..70ebde39ec0 100644 --- a/soc/arm/st_stm32/stm32l1/soc.h +++ b/soc/arm/st_stm32/stm32l1/soc.h @@ -47,6 +47,10 @@ #include #endif +#ifdef CONFIG_I2C +#include +#endif + #endif /* !_ASMLANGUAGE */ #endif /* _STM32L1_SOC_H_ */