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ext: stm32cube: update stm32l4xx cube version

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Update Cube version for STM32L4XX family
from version: V1.10.0
to version: V1.12.0

This version solves patch in drivers/include/stm32l4xx_ll_spi.h

Note: git shows 100% diff on all files.
You need to tick "Ignore space change" in git UI to see real
differences. I tried different things to fix this without
success (dos2unix, file encoding, files access right).

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
This commit is contained in:
Erwan Gouriou 2018-06-27 16:53:28 +02:00 • committed by Kumar Gala
commit b3127629c7
230 changed files with 638806 additions and 621060 deletions
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16
ext/hal/st/stm32cube/stm32l4xx/README
View file

@ -6,7 +6,7 @@ Origin:
http://www.st.com/en/embedded-software/stm32cubel4.html http://www.st.com/en/embedded-software/stm32cubel4.html
Status: Status:
version 1.10.0 version 1.12.0
Purpose: Purpose:
ST Microelectronics official MCU package for STM32L4 series. ST Microelectronics official MCU package for STM32L4 series.
@ -23,7 +23,7 @@ URL:
http://www.st.com/en/embedded-software/stm32cubel4.html http://www.st.com/en/embedded-software/stm32cubel4.html
commit: commit:
version 1.10.0 version 1.12.0
Maintained-by: Maintained-by:
External External
@ -36,18 +36,6 @@ License Link:
Patch List: Patch List:
*Current implementation of LL_SPI_TransmitData16 on F3/F7/L4 family
generates following warning:
"warning: dereferencing type-punned pointer will break strict-aliasing
rules [-Wstrict-aliasing]"
Besides being forbidden by rule, this cast is not needed, as register is
16 bits wide. Modification has been tested on L4 SoC.
stm32yyxx_ll_spi.h being included in soc.h file, warning is generated
at each compiled object, this commit allows a clean build.
Impacted files:
drivers/include/stm32l4xx_ll_spi.h
ST Bug tracker ID: 13359
* The STM32L4x2 SoCs need to control the isolation of the USB features * The STM32L4x2 SoCs need to control the isolation of the USB features
from VDDUSB. This is done through the PWR_CR2 bit USV. The STM32L4 HAL from VDDUSB. This is done through the PWR_CR2 bit USV. The STM32L4 HAL
in stm32l4xx_ll_pwr.h wrongly checks for the PWR_CR2_PVME1 bit, which in stm32l4xx_ll_pwr.h wrongly checks for the PWR_CR2_PVME1 bit, which

6628
ext/hal/st/stm32cube/stm32l4xx/drivers/include/Legacy/stm32_hal_legacy.h
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769
ext/hal/st/stm32cube/stm32l4xx/drivers/include/Legacy/stm32l4xx_hal_can_legacy.h Normal file
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@ -0,0 +1,769 @@
/**
******************************************************************************
* @file stm32l4xx_hal_can_legacy.h
* @author MCD Application Team
* @brief Header file of CAN HAL module.
******************************************************************************
* @attention
*
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
******************************************************************************
*/
/* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_CAN_LEGACY_H
#define __STM32L4xx_CAN_LEGACY_H
#ifdef __cplusplus
extern "C" {
#endif
#if defined(CAN1)
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
*/
/** @addtogroup CAN
* @{
*/
/* Exported types ------------------------------------------------------------*/
/** @defgroup CAN_Exported_Types CAN Exported Types
* @{
*/
/**
* @brief HAL State structures definition
*/
typedef enum
{
HAL_CAN_STATE_RESET = 0x00, /*!< CAN not yet initialized or disabled */
HAL_CAN_STATE_READY = 0x01, /*!< CAN initialized and ready for use */
HAL_CAN_STATE_BUSY = 0x02, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_TX = 0x12, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_RX = 0x22, /*!< CAN process is ongoing */
HAL_CAN_STATE_BUSY_TX_RX = 0x32, /*!< CAN process is ongoing */
HAL_CAN_STATE_TIMEOUT = 0x03, /*!< Timeout state */
HAL_CAN_STATE_ERROR = 0x04 /*!< CAN error state */
}HAL_CAN_StateTypeDef;
/**
* @brief CAN init structure definition
*/
typedef struct
{
uint32_t Prescaler; /*!< Specifies the length of a time quantum.
This parameter must be a number between Min_Data = 1 and Max_Data = 1024 */
uint32_t Mode; /*!< Specifies the CAN operating mode.
This parameter can be a value of @ref CAN_operating_mode */
uint32_t SJW; /*!< Specifies the maximum number of time quanta
the CAN hardware is allowed to lengthen or
shorten a bit to perform resynchronization.
This parameter can be a value of @ref CAN_synchronisation_jump_width */
uint32_t BS1; /*!< Specifies the number of time quanta in Bit Segment 1.
This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_1 */
uint32_t BS2; /*!< Specifies the number of time quanta in Bit Segment 2.
This parameter can be a value of @ref CAN_time_quantum_in_bit_segment_2 */
uint32_t TTCM; /*!< Enable or disable the time triggered communication mode.
This parameter can be set to ENABLE or DISABLE. */
uint32_t ABOM; /*!< Enable or disable the automatic bus-off management.
This parameter can be set to ENABLE or DISABLE */
uint32_t AWUM; /*!< Enable or disable the automatic wake-up mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t NART; /*!< Enable or disable the non-automatic retransmission mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t RFLM; /*!< Enable or disable the receive FIFO Locked mode.
This parameter can be set to ENABLE or DISABLE */
uint32_t TXFP; /*!< Enable or disable the transmit FIFO priority.
This parameter can be set to ENABLE or DISABLE */
}CAN_InitTypeDef;
/**
* @brief CAN filter configuration structure definition
*/
typedef struct
{
uint32_t FilterIdHigh; /*!< Specifies the filter identification number (MSBs for a 32-bit
configuration, first one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterIdLow; /*!< Specifies the filter identification number (LSBs for a 32-bit
configuration, second one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterMaskIdHigh; /*!< Specifies the filter mask number or identification number,
according to the mode (MSBs for a 32-bit configuration,
first one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterMaskIdLow; /*!< Specifies the filter mask number or identification number,
according to the mode (LSBs for a 32-bit configuration,
second one for a 16-bit configuration).
This parameter must be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
uint32_t FilterFIFOAssignment; /*!< Specifies the FIFO (0 or 1) which will be assigned to the filter.
This parameter can be a value of @ref CAN_filter_FIFO */
uint32_t FilterNumber; /*!< Specifies the filter which will be initialized.
This parameter must be a number between Min_Data = 0 and Max_Data = 27 */
uint32_t FilterMode; /*!< Specifies the filter mode to be initialized.
This parameter can be a value of @ref CAN_filter_mode */
uint32_t FilterScale; /*!< Specifies the filter scale.
This parameter can be a value of @ref CAN_filter_scale */
uint32_t FilterActivation; /*!< Enable or disable the filter.
This parameter can be set to ENABLE or DISABLE */
uint32_t BankNumber; /*!< Select the start slave bank filter.
This parameter must be a number between Min_Data = 0 and Max_Data = 28 */
}CAN_FilterConfTypeDef;
/**
* @brief CAN Tx message structure definition
*/
typedef struct
{
uint32_t StdId; /*!< Specifies the standard identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
uint32_t ExtId; /*!< Specifies the extended identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
uint32_t IDE; /*!< Specifies the type of identifier for the message that will be transmitted.
This parameter can be a value of @ref CAN_identifier_type */
uint32_t RTR; /*!< Specifies the type of frame for the message that will be transmitted.
This parameter can be a value of @ref CAN_remote_transmission_request */
uint32_t DLC; /*!< Specifies the length of the frame that will be transmitted.
This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
uint8_t Data[8]; /*!< Contains the data to be transmitted.
This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
}CanTxMsgTypeDef;
/**
* @brief CAN Rx message structure definition
*/
typedef struct
{
uint32_t StdId; /*!< Specifies the standard identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x7FF */
uint32_t ExtId; /*!< Specifies the extended identifier.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x1FFFFFFF */
uint32_t IDE; /*!< Specifies the type of identifier for the message that will be received.
This parameter can be a value of @ref CAN_identifier_type */
uint32_t RTR; /*!< Specifies the type of frame for the received message.
This parameter can be a value of @ref CAN_remote_transmission_request */
uint32_t DLC; /*!< Specifies the length of the frame that will be received.
This parameter must be a number between Min_Data = 0 and Max_Data = 8 */
uint8_t Data[8]; /*!< Contains the data to be received.
This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
uint32_t FMI; /*!< Specifies the index of the filter the message stored in the mailbox passes through.
This parameter must be a number between Min_Data = 0 and Max_Data = 0xFF */
uint32_t FIFONumber; /*!< Specifies the receive FIFO number.
This parameter can be CAN_FIFO0 or CAN_FIFO1 */
}CanRxMsgTypeDef;
/**
* @brief CAN handle Structure definition
*/
typedef struct
{
CAN_TypeDef *Instance; /*!< Register base address */
CAN_InitTypeDef Init; /*!< CAN required parameters */
CanTxMsgTypeDef* pTxMsg; /*!< Pointer to transmit structure */
CanRxMsgTypeDef* pRxMsg; /*!< Pointer to reception structure */
__IO HAL_CAN_StateTypeDef State; /*!< CAN communication state */
HAL_LockTypeDef Lock; /*!< CAN locking object */
__IO uint32_t ErrorCode; /*!< CAN Error code */
}CAN_HandleTypeDef;
/**
* @}
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup CAN_Exported_Constants CAN Exported Constants
* @{
*/
/** @defgroup CAN_Error_Code CAN Error Code
* @{
*/
#define HAL_CAN_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
#define HAL_CAN_ERROR_EWG ((uint32_t)0x00000001) /*!< EWG error */
#define HAL_CAN_ERROR_EPV ((uint32_t)0x00000002) /*!< EPV error */
#define HAL_CAN_ERROR_BOF ((uint32_t)0x00000004) /*!< BOF error */
#define HAL_CAN_ERROR_STF ((uint32_t)0x00000008) /*!< Stuff error */
#define HAL_CAN_ERROR_FOR ((uint32_t)0x00000010) /*!< Form error */
#define HAL_CAN_ERROR_ACK ((uint32_t)0x00000020) /*!< Acknowledgment error */
#define HAL_CAN_ERROR_BR ((uint32_t)0x00000040) /*!< Bit recessive */
#define HAL_CAN_ERROR_BD ((uint32_t)0x00000080) /*!< LEC dominant */
#define HAL_CAN_ERROR_CRC ((uint32_t)0x00000100) /*!< LEC transfer error */
#define HAL_CAN_ERROR_FOV0 ((uint32_t)0x00000200) /*!< FIFO0 overrun error */
#define HAL_CAN_ERROR_FOV1 ((uint32_t)0x00000400) /*!< FIFO1 overrun error */
/**
* @}
*/
/** @defgroup CAN_InitStatus CAN initialization Status
* @{
*/
#define CAN_INITSTATUS_FAILED ((uint32_t)0x00000000) /*!< CAN initialization failed */
#define CAN_INITSTATUS_SUCCESS ((uint32_t)0x00000001) /*!< CAN initialization OK */
/**
* @}
*/
/** @defgroup CAN_operating_mode CAN Operating Mode
* @{
*/
#define CAN_MODE_NORMAL ((uint32_t)0x00000000) /*!< Normal mode */
#define CAN_MODE_LOOPBACK ((uint32_t)CAN_BTR_LBKM) /*!< Loopback mode */
#define CAN_MODE_SILENT ((uint32_t)CAN_BTR_SILM) /*!< Silent mode */
#define CAN_MODE_SILENT_LOOPBACK ((uint32_t)(CAN_BTR_LBKM | CAN_BTR_SILM)) /*!< Loopback combined with silent mode */
/**
* @}
*/
/** @defgroup CAN_synchronisation_jump_width CAN Synchronization Jump Width
* @{
*/
#define CAN_SJW_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
#define CAN_SJW_2TQ ((uint32_t)CAN_BTR_SJW_0) /*!< 2 time quantum */
#define CAN_SJW_3TQ ((uint32_t)CAN_BTR_SJW_1) /*!< 3 time quantum */
#define CAN_SJW_4TQ ((uint32_t)CAN_BTR_SJW) /*!< 4 time quantum */
/**
* @}
*/
/** @defgroup CAN_time_quantum_in_bit_segment_1 CAN Time Quantum in Bit Segment 1
* @{
*/
#define CAN_BS1_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
#define CAN_BS1_2TQ ((uint32_t)CAN_BTR_TS1_0) /*!< 2 time quantum */
#define CAN_BS1_3TQ ((uint32_t)CAN_BTR_TS1_1) /*!< 3 time quantum */
#define CAN_BS1_4TQ ((uint32_t)(CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 4 time quantum */
#define CAN_BS1_5TQ ((uint32_t)CAN_BTR_TS1_2) /*!< 5 time quantum */
#define CAN_BS1_6TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 6 time quantum */
#define CAN_BS1_7TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 7 time quantum */
#define CAN_BS1_8TQ ((uint32_t)(CAN_BTR_TS1_2 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 8 time quantum */
#define CAN_BS1_9TQ ((uint32_t)CAN_BTR_TS1_3) /*!< 9 time quantum */
#define CAN_BS1_10TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_0)) /*!< 10 time quantum */
#define CAN_BS1_11TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1)) /*!< 11 time quantum */
#define CAN_BS1_12TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_1 | CAN_BTR_TS1_0)) /*!< 12 time quantum */
#define CAN_BS1_13TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2)) /*!< 13 time quantum */
#define CAN_BS1_14TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_0)) /*!< 14 time quantum */
#define CAN_BS1_15TQ ((uint32_t)(CAN_BTR_TS1_3 | CAN_BTR_TS1_2 | CAN_BTR_TS1_1)) /*!< 15 time quantum */
#define CAN_BS1_16TQ ((uint32_t)CAN_BTR_TS1) /*!< 16 time quantum */
/**
* @}
*/
/** @defgroup CAN_time_quantum_in_bit_segment_2 CAN Time Quantum in Bit Segment 2
* @{
*/
#define CAN_BS2_1TQ ((uint32_t)0x00000000) /*!< 1 time quantum */
#define CAN_BS2_2TQ ((uint32_t)CAN_BTR_TS2_0) /*!< 2 time quantum */
#define CAN_BS2_3TQ ((uint32_t)CAN_BTR_TS2_1) /*!< 3 time quantum */
#define CAN_BS2_4TQ ((uint32_t)(CAN_BTR_TS2_1 | CAN_BTR_TS2_0)) /*!< 4 time quantum */
#define CAN_BS2_5TQ ((uint32_t)CAN_BTR_TS2_2) /*!< 5 time quantum */
#define CAN_BS2_6TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_0)) /*!< 6 time quantum */
#define CAN_BS2_7TQ ((uint32_t)(CAN_BTR_TS2_2 | CAN_BTR_TS2_1)) /*!< 7 time quantum */
#define CAN_BS2_8TQ ((uint32_t)CAN_BTR_TS2) /*!< 8 time quantum */
/**
* @}
*/
/** @defgroup CAN_filter_mode CAN Filter Mode
* @{
*/
#define CAN_FILTERMODE_IDMASK ((uint8_t)0x00) /*!< Identifier mask mode */
#define CAN_FILTERMODE_IDLIST ((uint8_t)0x01) /*!< Identifier list mode */
/**
* @}
*/
/** @defgroup CAN_filter_scale CAN Filter Scale
* @{
*/
#define CAN_FILTERSCALE_16BIT ((uint8_t)0x00) /*!< Two 16-bit filters */
#define CAN_FILTERSCALE_32BIT ((uint8_t)0x01) /*!< One 32-bit filter */
/**
* @}
*/
/** @defgroup CAN_filter_FIFO CAN Filter FIFO
* @{
*/
#define CAN_FILTER_FIFO0 ((uint8_t)0x00) /*!< Filter FIFO 0 assignment for filter x */
#define CAN_FILTER_FIFO1 ((uint8_t)0x01) /*!< Filter FIFO 1 assignment for filter x */
/**
* @}
*/
/** @defgroup CAN_identifier_type CAN Identifier Type
* @{
*/
#define CAN_ID_STD ((uint32_t)0x00000000) /*!< Standard Id */
#define CAN_ID_EXT ((uint32_t)0x00000004) /*!< Extended Id */
/**
* @}
*/
/** @defgroup CAN_remote_transmission_request CAN Remote Transmission Request
* @{
*/
#define CAN_RTR_DATA ((uint32_t)0x00000000) /*!< Data frame */
#define CAN_RTR_REMOTE ((uint32_t)0x00000002) /*!< Remote frame */
/**
* @}
*/
/** @defgroup CAN_receive_FIFO_number_constants CAN Receive FIFO Number
* @{
*/
#define CAN_FIFO0 ((uint8_t)0x00) /*!< CAN FIFO 0 used to receive */
#define CAN_FIFO1 ((uint8_t)0x01) /*!< CAN FIFO 1 used to receive */
/**
* @}
*/
/** @defgroup CAN_flags CAN Flags
* @{
*/
/* If the flag is 0x3XXXXXXX, it means that it can be used with CAN_GetFlagStatus()
and CAN_ClearFlag() functions. */
/* If the flag is 0x1XXXXXXX, it means that it can only be used with
CAN_GetFlagStatus() function. */
/* Transmit Flags */
#define CAN_FLAG_RQCP0 ((uint32_t)0x00000500) /*!< Request MailBox0 flag */
#define CAN_FLAG_RQCP1 ((uint32_t)0x00000508) /*!< Request MailBox1 flag */
#define CAN_FLAG_RQCP2 ((uint32_t)0x00000510) /*!< Request MailBox2 flag */
#define CAN_FLAG_TXOK0 ((uint32_t)0x00000501) /*!< Transmission OK MailBox0 flag */
#define CAN_FLAG_TXOK1 ((uint32_t)0x00000509) /*!< Transmission OK MailBox1 flag */
#define CAN_FLAG_TXOK2 ((uint32_t)0x00000511) /*!< Transmission OK MailBox2 flag */
#define CAN_FLAG_TME0 ((uint32_t)0x0000051A) /*!< Transmit mailbox 0 empty flag */
#define CAN_FLAG_TME1 ((uint32_t)0x0000051B) /*!< Transmit mailbox 0 empty flag */
#define CAN_FLAG_TME2 ((uint32_t)0x0000051C) /*!< Transmit mailbox 0 empty flag */
/* Receive Flags */
#define CAN_FLAG_FF0 ((uint32_t)0x00000203) /*!< FIFO 0 Full flag */
#define CAN_FLAG_FOV0 ((uint32_t)0x00000204) /*!< FIFO 0 Overrun flag */
#define CAN_FLAG_FF1 ((uint32_t)0x00000403) /*!< FIFO 1 Full flag */
#define CAN_FLAG_FOV1 ((uint32_t)0x00000404) /*!< FIFO 1 Overrun flag */
/* Operating Mode Flags */
#define CAN_FLAG_WKU ((uint32_t)0x00000103) /*!< Wake up flag */
#define CAN_FLAG_SLAK ((uint32_t)0x00000101) /*!< Sleep acknowledge flag */
#define CAN_FLAG_SLAKI ((uint32_t)0x00000104) /*!< Sleep acknowledge flag */
/* @note When SLAK interrupt is disabled (SLKIE=0), no polling on SLAKI is possible.
In this case the SLAK bit can be polled.*/
/* Error Flags */
#define CAN_FLAG_EWG ((uint32_t)0x00000300) /*!< Error warning flag */
#define CAN_FLAG_EPV ((uint32_t)0x00000301) /*!< Error passive flag */
#define CAN_FLAG_BOF ((uint32_t)0x00000302) /*!< Bus-Off flag */
/**
* @}
*/
/** @defgroup CAN_interrupts CAN Interrupts
* @{
*/
#define CAN_IT_TME ((uint32_t)CAN_IER_TMEIE) /*!< Transmit mailbox empty interrupt */
/* Receive Interrupts */
#define CAN_IT_FMP0 ((uint32_t)CAN_IER_FMPIE0) /*!< FIFO 0 message pending interrupt */
#define CAN_IT_FF0 ((uint32_t)CAN_IER_FFIE0) /*!< FIFO 0 full interrupt */
#define CAN_IT_FOV0 ((uint32_t)CAN_IER_FOVIE0) /*!< FIFO 0 overrun interrupt */
#define CAN_IT_FMP1 ((uint32_t)CAN_IER_FMPIE1) /*!< FIFO 1 message pending interrupt */
#define CAN_IT_FF1 ((uint32_t)CAN_IER_FFIE1) /*!< FIFO 1 full interrupt */
#define CAN_IT_FOV1 ((uint32_t)CAN_IER_FOVIE1) /*!< FIFO 1 overrun interrupt */
/* Operating Mode Interrupts */
#define CAN_IT_WKU ((uint32_t)CAN_IER_WKUIE) /*!< Wake-up interrupt */
#define CAN_IT_SLK ((uint32_t)CAN_IER_SLKIE) /*!< Sleep acknowledge interrupt */
/* Error Interrupts */
#define CAN_IT_EWG ((uint32_t)CAN_IER_EWGIE) /*!< Error warning interrupt */
#define CAN_IT_EPV ((uint32_t)CAN_IER_EPVIE) /*!< Error passive interrupt */
#define CAN_IT_BOF ((uint32_t)CAN_IER_BOFIE) /*!< Bus-off interrupt */
#define CAN_IT_LEC ((uint32_t)CAN_IER_LECIE) /*!< Last error code interrupt */
#define CAN_IT_ERR ((uint32_t)CAN_IER_ERRIE) /*!< Error Interrupt */
/**
* @}
*/
/* Mailboxes definition */
#define CAN_TXMAILBOX_0 ((uint8_t)0x00)
#define CAN_TXMAILBOX_1 ((uint8_t)0x01)
#define CAN_TXMAILBOX_2 ((uint8_t)0x02)
/**
* @}
*/
/* Exported macros -----------------------------------------------------------*/
/** @defgroup CAN_Exported_Macro CAN Exported Macros
* @{
*/
/** @brief Reset CAN handle state.
* @param __HANDLE__: CAN handle.
* @retval None
*/
#define __HAL_CAN_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CAN_STATE_RESET)
/**
* @brief Enable the specified CAN interrupt.
* @param __HANDLE__: CAN handle.
* @param __INTERRUPT__: CAN Interrupt.
* @retval None
*/
#define __HAL_CAN_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) |= (__INTERRUPT__))
/**
* @brief Disable the specified CAN interrupt.
* @param __HANDLE__: CAN handle.
* @param __INTERRUPT__: CAN Interrupt.
* @retval None
*/
#define __HAL_CAN_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->IER) &= ~(__INTERRUPT__))
/**
* @brief Return the number of pending received messages.
* @param __HANDLE__: CAN handle.
* @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
* @retval The number of pending message.
*/
#define __HAL_CAN_MSG_PENDING(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
((uint8_t)((__HANDLE__)->Instance->RF0R&(uint32_t)0x03)) : ((uint8_t)((__HANDLE__)->Instance->RF1R&(uint32_t)0x03)))
/** @brief Check whether the specified CAN flag is set or not.
* @param __HANDLE__: specifies the CAN Handle.
* @param __FLAG__: specifies the flag to check.
* This parameter can be one of the following values:
* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
* @arg CAN_FLAG_WKU: Wake up Flag
* @arg CAN_FLAG_SLAK: Sleep acknowledge Flag
* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
* @arg CAN_FLAG_EWG: Error Warning Flag
* @arg CAN_FLAG_EPV: Error Passive Flag
* @arg CAN_FLAG_BOF: Bus-Off Flag
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_CAN_GET_FLAG(__HANDLE__, __FLAG__) \
((((__FLAG__) >> 8) == 5)? ((((__HANDLE__)->Instance->TSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8) == 2)? ((((__HANDLE__)->Instance->RF0R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8) == 4)? ((((__HANDLE__)->Instance->RF1R) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8) == 1)? ((((__HANDLE__)->Instance->MSR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
((((__HANDLE__)->Instance->ESR) & (1U << ((__FLAG__) & CAN_FLAG_MASK))) == (1U << ((__FLAG__) & CAN_FLAG_MASK))))
/** @brief Clear the specified CAN pending flag.
* @param __HANDLE__: specifies the CAN Handle.
* @param __FLAG__: specifies the flag to check.
* This parameter can be one of the following values:
* @arg CAN_TSR_RQCP0: Request MailBox0 Flag
* @arg CAN_TSR_RQCP1: Request MailBox1 Flag
* @arg CAN_TSR_RQCP2: Request MailBox2 Flag
* @arg CAN_FLAG_TXOK0: Transmission OK MailBox0 Flag
* @arg CAN_FLAG_TXOK1: Transmission OK MailBox1 Flag
* @arg CAN_FLAG_TXOK2: Transmission OK MailBox2 Flag
* @arg CAN_FLAG_TME0: Transmit mailbox 0 empty Flag
* @arg CAN_FLAG_TME1: Transmit mailbox 1 empty Flag
* @arg CAN_FLAG_TME2: Transmit mailbox 2 empty Flag
* @arg CAN_FLAG_FMP0: FIFO 0 Message Pending Flag
* @arg CAN_FLAG_FF0: FIFO 0 Full Flag
* @arg CAN_FLAG_FOV0: FIFO 0 Overrun Flag
* @arg CAN_FLAG_FMP1: FIFO 1 Message Pending Flag
* @arg CAN_FLAG_FF1: FIFO 1 Full Flag
* @arg CAN_FLAG_FOV1: FIFO 1 Overrun Flag
* @arg CAN_FLAG_WKU: Wake up Flag
* @arg CAN_FLAG_SLAKI: Sleep acknowledge Flag
* @retval The new state of __FLAG__ (TRUE or FALSE).
*/
#define __HAL_CAN_CLEAR_FLAG(__HANDLE__, __FLAG__) \
((((__FLAG__) >> 8U) == 5)? (((__HANDLE__)->Instance->TSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 2)? (((__HANDLE__)->Instance->RF0R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 4)? (((__HANDLE__)->Instance->RF1R) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): \
(((__FLAG__) >> 8U) == 1)? (((__HANDLE__)->Instance->MSR) = (1U << ((__FLAG__) & CAN_FLAG_MASK))): 0)
/** @brief Check whether the specified CAN interrupt source is enabled or not.
* @param __HANDLE__: specifies the CAN Handle.
* @param __INTERRUPT__: specifies the CAN interrupt source to check.
* This parameter can be one of the following values:
* @arg CAN_IT_TME: Transmit mailbox empty interrupt enable
* @arg CAN_IT_FMP0: FIFO0 message pending interrupt enable
* @arg CAN_IT_FMP1: FIFO1 message pending interrupt enable
* @retval The new state of __IT__ (TRUE or FALSE).
*/
#define __HAL_CAN_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IER & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
/**
* @brief Check the transmission status of a CAN Frame.
* @param __HANDLE__: specifies the CAN Handle.
* @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
* @retval The new status of transmission (TRUE or FALSE).
*/
#define __HAL_CAN_TRANSMIT_STATUS(__HANDLE__, __TRANSMITMAILBOX__)\
(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) == (CAN_TSR_RQCP0 | CAN_TSR_TXOK0 | CAN_TSR_TME0)) :\
((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) == (CAN_TSR_RQCP1 | CAN_TSR_TXOK1 | CAN_TSR_TME1)) :\
((((__HANDLE__)->Instance->TSR) & (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)) == (CAN_TSR_RQCP2 | CAN_TSR_TXOK2 | CAN_TSR_TME2)))
/**
* @brief Release the specified receive FIFO.
* @param __HANDLE__: CAN handle.
* @param __FIFONUMBER__: Receive FIFO number, CAN_FIFO0 or CAN_FIFO1.
* @retval None
*/
#define __HAL_CAN_FIFO_RELEASE(__HANDLE__, __FIFONUMBER__) (((__FIFONUMBER__) == CAN_FIFO0)? \
((__HANDLE__)->Instance->RF0R |= CAN_RF0R_RFOM0) : ((__HANDLE__)->Instance->RF1R |= CAN_RF1R_RFOM1))
/**
* @brief Cancel a transmit request.
* @param __HANDLE__: specifies the CAN Handle.
* @param __TRANSMITMAILBOX__: the number of the mailbox that is used for transmission.
* @retval None
*/
#define __HAL_CAN_CANCEL_TRANSMIT(__HANDLE__, __TRANSMITMAILBOX__)\
(((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_0)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ0) :\
((__TRANSMITMAILBOX__) == CAN_TXMAILBOX_1)? ((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ1) :\
((__HANDLE__)->Instance->TSR |= CAN_TSR_ABRQ2))
/**
* @brief Enable or disable the DBG Freeze for CAN.
* @param __HANDLE__: specifies the CAN Handle.
* @param __NEWSTATE__: new state of the CAN peripheral.
* This parameter can be: ENABLE (CAN reception/transmission is frozen
* during debug. Reception FIFO can still be accessed/controlled normally)
* or DISABLE (CAN is working during debug).
* @retval None
*/
#define __HAL_CAN_DBG_FREEZE(__HANDLE__, __NEWSTATE__) (((__NEWSTATE__) == ENABLE)? \
((__HANDLE__)->Instance->MCR |= CAN_MCR_DBF) : ((__HANDLE__)->Instance->MCR &= ~CAN_MCR_DBF))
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup CAN_Exported_Functions CAN Exported Functions
* @{
*/
/** @defgroup CAN_Exported_Functions_Group1 Initialization and de-initialization functions
* @brief Initialization and Configuration functions
* @{
*/
/* addtogroup and de-initialization functions *****************************/
HAL_StatusTypeDef HAL_CAN_Init(CAN_HandleTypeDef* hcan);
HAL_StatusTypeDef HAL_CAN_ConfigFilter(CAN_HandleTypeDef* hcan, CAN_FilterConfTypeDef* sFilterConfig);
HAL_StatusTypeDef HAL_CAN_DeInit(CAN_HandleTypeDef* hcan);
void HAL_CAN_MspInit(CAN_HandleTypeDef* hcan);
void HAL_CAN_MspDeInit(CAN_HandleTypeDef* hcan);
/**
* @}
*/
/** @addtogroup CAN_Exported_Functions_Group2 Input and Output operation functions
* @brief I/O operation functions
* @{
*/
/* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_CAN_Transmit(CAN_HandleTypeDef *hcan, uint32_t Timeout);
HAL_StatusTypeDef HAL_CAN_Transmit_IT(CAN_HandleTypeDef *hcan);
HAL_StatusTypeDef HAL_CAN_Receive(CAN_HandleTypeDef *hcan, uint8_t FIFONumber, uint32_t Timeout);
HAL_StatusTypeDef HAL_CAN_Receive_IT(CAN_HandleTypeDef *hcan, uint8_t FIFONumber);
HAL_StatusTypeDef HAL_CAN_Sleep(CAN_HandleTypeDef *hcan);
HAL_StatusTypeDef HAL_CAN_WakeUp(CAN_HandleTypeDef *hcan);
void HAL_CAN_IRQHandler(CAN_HandleTypeDef* hcan);
void HAL_CAN_TxCpltCallback(CAN_HandleTypeDef* hcan);
void HAL_CAN_RxCpltCallback(CAN_HandleTypeDef* hcan);
void HAL_CAN_ErrorCallback(CAN_HandleTypeDef *hcan);
/**
* @}
*/
/** @addtogroup CAN_Exported_Functions_Group3 Peripheral State and Error functions
* @brief CAN Peripheral State functions
* @{
*/
/* Peripheral State and Error functions ***************************************/
uint32_t HAL_CAN_GetError(CAN_HandleTypeDef *hcan);
HAL_CAN_StateTypeDef HAL_CAN_GetState(CAN_HandleTypeDef* hcan);
/**
* @}
*/
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/** @defgroup CAN_Private_Constants CAN Private Constants
* @{
*/
/** @defgroup CAN_transmit_constants CAN Transmit Constants
* @{
*/
#define CAN_TXSTATUS_NOMAILBOX ((uint8_t)0x04) /*!< CAN cell did not provide CAN_TxStatus_NoMailBox */
/**
* @}
*/
#define CAN_FLAG_MASK ((uint32_t)0x000000FF)
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup CAN_Private_Macros CAN Private Macros
* @{
*/
#define IS_CAN_MODE(MODE) (((MODE) == CAN_MODE_NORMAL) || \
((MODE) == CAN_MODE_LOOPBACK)|| \
((MODE) == CAN_MODE_SILENT) || \
((MODE) == CAN_MODE_SILENT_LOOPBACK))
#define IS_CAN_SJW(SJW) (((SJW) == CAN_SJW_1TQ) || ((SJW) == CAN_SJW_2TQ)|| \
((SJW) == CAN_SJW_3TQ) || ((SJW) == CAN_SJW_4TQ))
#define IS_CAN_BS1(BS1) ((BS1) <= CAN_BS1_16TQ)
#define IS_CAN_BS2(BS2) ((BS2) <= CAN_BS2_8TQ)
#define IS_CAN_PRESCALER(PRESCALER) (((PRESCALER) >= 1) && ((PRESCALER) <= 1024))
#define IS_CAN_FILTER_NUMBER(NUMBER) ((NUMBER) <= 27)
#define IS_CAN_FILTER_MODE(MODE) (((MODE) == CAN_FILTERMODE_IDMASK) || \
((MODE) == CAN_FILTERMODE_IDLIST))
#define IS_CAN_FILTER_SCALE(SCALE) (((SCALE) == CAN_FILTERSCALE_16BIT) || \
((SCALE) == CAN_FILTERSCALE_32BIT))
#define IS_CAN_FILTER_FIFO(FIFO) (((FIFO) == CAN_FILTER_FIFO0) || \
((FIFO) == CAN_FILTER_FIFO1))
#define IS_CAN_BANKNUMBER(BANKNUMBER) ((BANKNUMBER) <= 28)
#define IS_CAN_TRANSMITMAILBOX(TRANSMITMAILBOX) ((TRANSMITMAILBOX) <= ((uint8_t)0x02))
#define IS_CAN_STDID(STDID) ((STDID) <= ((uint32_t)0x7FF))
#define IS_CAN_EXTID(EXTID) ((EXTID) <= ((uint32_t)0x1FFFFFFF))
#define IS_CAN_DLC(DLC) ((DLC) <= ((uint8_t)0x08))
#define IS_CAN_IDTYPE(IDTYPE) (((IDTYPE) == CAN_ID_STD) || \
((IDTYPE) == CAN_ID_EXT))
#define IS_CAN_RTR(RTR) (((RTR) == CAN_RTR_DATA) || ((RTR) == CAN_RTR_REMOTE))
#define IS_CAN_FIFO(FIFO) (((FIFO) == CAN_FIFO0) || ((FIFO) == CAN_FIFO1))
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
#endif /* CAN1 */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_CAN_LEGACY_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32_assert.h * @file stm32_assert.h
* @author MCD Application Team * @author MCD Application Team
* @brief STM32 assert template file. * @brief STM32 assert template file.
* This file should be copied to the application folder and renamed * This file should be copied to the application folder and renamed
* to stm32_assert.h. * to stm32_assert.h.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32_ASSERT_H #ifndef __STM32_ASSERT_H
#define __STM32_ASSERT_H #define __STM32_ASSERT_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT #ifdef USE_FULL_ASSERT
/** /**
* @brief The assert_param macro is used for function's parameters check. * @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function * @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source * which reports the name of the source file and the source
* line number of the call that failed. * line number of the call that failed.
* If expr is true, it returns no value. * If expr is true, it returns no value.
* @retval None * @retval None
*/ */
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) #define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */ /* Exported functions ------------------------------------------------------- */
void assert_failed(char *file, uint32_t line); void assert_failed(char *file, uint32_t line);
#else #else
#define assert_param(expr) ((void)0U) #define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */ #endif /* USE_FULL_ASSERT */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32_ASSERT_H */ #endif /* __STM32_ASSERT_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_conf.h * @file stm32l4xx_hal_conf.h
* @author MCD Application Team * @author MCD Application Team
* @brief HAL configuration template file. * @brief HAL configuration template file.
* This file should be copied to the application folder and renamed * This file should be copied to the application folder and renamed
* to stm32l4xx_hal_conf.h. * to stm32l4xx_hal_conf.h.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_CONF_H #ifndef __STM32L4xx_HAL_CONF_H
#define __STM32L4xx_HAL_CONF_H #define __STM32L4xx_HAL_CONF_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* ########################## Module Selection ############################## */ /* ########################## Module Selection ############################## */
/** /**
* @brief This is the list of modules to be used in the HAL driver * @brief This is the list of modules to be used in the HAL driver
*/ */
#define HAL_MODULE_ENABLED #define HAL_MODULE_ENABLED
#define HAL_ADC_MODULE_ENABLED #define HAL_ADC_MODULE_ENABLED
#define HAL_CAN_MODULE_ENABLED #define HAL_CAN_MODULE_ENABLED
#define HAL_COMP_MODULE_ENABLED /* #define HAL_CAN_LEGACY_MODULE_ENABLED */
#define HAL_CORTEX_MODULE_ENABLED #define HAL_COMP_MODULE_ENABLED
#define HAL_CRC_MODULE_ENABLED #define HAL_CORTEX_MODULE_ENABLED
#define HAL_CRYP_MODULE_ENABLED #define HAL_CRC_MODULE_ENABLED
#define HAL_DAC_MODULE_ENABLED #define HAL_CRYP_MODULE_ENABLED
#define HAL_DCMI_MODULE_ENABLED #define HAL_DAC_MODULE_ENABLED
#define HAL_DFSDM_MODULE_ENABLED #define HAL_DCMI_MODULE_ENABLED
#define HAL_DMA_MODULE_ENABLED #define HAL_DFSDM_MODULE_ENABLED
#define HAL_DMA2D_MODULE_ENABLED #define HAL_DMA_MODULE_ENABLED
#define HAL_DSI_MODULE_ENABLED #define HAL_DMA2D_MODULE_ENABLED
#define HAL_FIREWALL_MODULE_ENABLED #define HAL_DSI_MODULE_ENABLED
#define HAL_FLASH_MODULE_ENABLED #define HAL_FIREWALL_MODULE_ENABLED
#define HAL_GFXMMU_MODULE_ENABLED #define HAL_FLASH_MODULE_ENABLED
#define HAL_HASH_MODULE_ENABLED #define HAL_GFXMMU_MODULE_ENABLED
#define HAL_HCD_MODULE_ENABLED #define HAL_HASH_MODULE_ENABLED
#define HAL_NAND_MODULE_ENABLED #define HAL_HCD_MODULE_ENABLED
#define HAL_NOR_MODULE_ENABLED #define HAL_NAND_MODULE_ENABLED
#define HAL_SRAM_MODULE_ENABLED #define HAL_NOR_MODULE_ENABLED
#define HAL_GPIO_MODULE_ENABLED #define HAL_SRAM_MODULE_ENABLED
#define HAL_I2C_MODULE_ENABLED #define HAL_GPIO_MODULE_ENABLED
#define HAL_IRDA_MODULE_ENABLED #define HAL_I2C_MODULE_ENABLED
#define HAL_IWDG_MODULE_ENABLED #define HAL_IRDA_MODULE_ENABLED
#define HAL_LCD_MODULE_ENABLED #define HAL_IWDG_MODULE_ENABLED
#define HAL_LPTIM_MODULE_ENABLED #define HAL_LCD_MODULE_ENABLED
#define HAL_LTDC_MODULE_ENABLED #define HAL_LPTIM_MODULE_ENABLED
#define HAL_OPAMP_MODULE_ENABLED #define HAL_LTDC_MODULE_ENABLED
#define HAL_OSPI_MODULE_ENABLED #define HAL_OPAMP_MODULE_ENABLED
#define HAL_PCD_MODULE_ENABLED #define HAL_OSPI_MODULE_ENABLED
#define HAL_PWR_MODULE_ENABLED #define HAL_PCD_MODULE_ENABLED
#define HAL_QSPI_MODULE_ENABLED #define HAL_PWR_MODULE_ENABLED
#define HAL_RCC_MODULE_ENABLED #define HAL_QSPI_MODULE_ENABLED
#define HAL_RNG_MODULE_ENABLED #define HAL_RCC_MODULE_ENABLED
#define HAL_RTC_MODULE_ENABLED #define HAL_RNG_MODULE_ENABLED
#define HAL_SAI_MODULE_ENABLED #define HAL_RTC_MODULE_ENABLED
#define HAL_SD_MODULE_ENABLED #define HAL_SAI_MODULE_ENABLED
#define HAL_SMARTCARD_MODULE_ENABLED #define HAL_SD_MODULE_ENABLED
#define HAL_SMBUS_MODULE_ENABLED #define HAL_SMARTCARD_MODULE_ENABLED
#define HAL_SPI_MODULE_ENABLED #define HAL_SMBUS_MODULE_ENABLED
#define HAL_SWPMI_MODULE_ENABLED #define HAL_SPI_MODULE_ENABLED
#define HAL_TIM_MODULE_ENABLED #define HAL_SWPMI_MODULE_ENABLED
#define HAL_TSC_MODULE_ENABLED #define HAL_TIM_MODULE_ENABLED
#define HAL_UART_MODULE_ENABLED #define HAL_TSC_MODULE_ENABLED
#define HAL_USART_MODULE_ENABLED #define HAL_UART_MODULE_ENABLED
#define HAL_WWDG_MODULE_ENABLED #define HAL_USART_MODULE_ENABLED
#define HAL_WWDG_MODULE_ENABLED
/* ########################## Oscillator Values adaptation ####################*/
/** /* ########################## Oscillator Values adaptation ####################*/
* @brief Adjust the value of External High Speed oscillator (HSE) used in your application. /**
* This value is used by the RCC HAL module to compute the system frequency * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
* (when HSE is used as system clock source, directly or through the PLL). * This value is used by the RCC HAL module to compute the system frequency
*/ * (when HSE is used as system clock source, directly or through the PLL).
#if !defined (HSE_VALUE) */
#define HSE_VALUE ((uint32_t)8000000U) /*!< Value of the External oscillator in Hz */ #if !defined (HSE_VALUE)
#endif /* HSE_VALUE */ #define HSE_VALUE 8000000U /*!< Value of the External oscillator in Hz */
#endif /* HSE_VALUE */
#if !defined (HSE_STARTUP_TIMEOUT)
#define HSE_STARTUP_TIMEOUT ((uint32_t)100U) /*!< Time out for HSE start up, in ms */ #if !defined (HSE_STARTUP_TIMEOUT)
#endif /* HSE_STARTUP_TIMEOUT */ #define HSE_STARTUP_TIMEOUT 100U /*!< Time out for HSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief Internal Multiple Speed oscillator (MSI) default value. /**
* This value is the default MSI range value after Reset. * @brief Internal Multiple Speed oscillator (MSI) default value.
*/ * This value is the default MSI range value after Reset.
#if !defined (MSI_VALUE) */
#define MSI_VALUE ((uint32_t)4000000U) /*!< Value of the Internal oscillator in Hz*/ #if !defined (MSI_VALUE)
#endif /* MSI_VALUE */ #define MSI_VALUE 4000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* MSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI) value. /**
* This value is used by the RCC HAL module to compute the system frequency * @brief Internal High Speed oscillator (HSI) value.
* (when HSI is used as system clock source, directly or through the PLL). * This value is used by the RCC HAL module to compute the system frequency
*/ * (when HSI is used as system clock source, directly or through the PLL).
#if !defined (HSI_VALUE) */
#define HSI_VALUE ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/ #if !defined (HSI_VALUE)
#endif /* HSI_VALUE */ #define HSI_VALUE 16000000U /*!< Value of the Internal oscillator in Hz*/
#endif /* HSI_VALUE */
/**
* @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG. /**
* This internal oscillator is mainly dedicated to provide a high precision clock to * @brief Internal High Speed oscillator (HSI48) value for USB FS, SDMMC and RNG.
* the USB peripheral by means of a special Clock Recovery System (CRS) circuitry. * This internal oscillator is mainly dedicated to provide a high precision clock to
* When the CRS is not used, the HSI48 RC oscillator runs on it default frequency * the USB peripheral by means of a special Clock Recovery System (CRS) circuitry.
* which is subject to manufacturing process variations. * When the CRS is not used, the HSI48 RC oscillator runs on it default frequency
*/ * which is subject to manufacturing process variations.
#if !defined (HSI48_VALUE) */
#define HSI48_VALUE ((uint32_t)48000000U) /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz. #if !defined (HSI48_VALUE)
The real value my vary depending on manufacturing process variations.*/ #define HSI48_VALUE 48000000U /*!< Value of the Internal High Speed oscillator for USB FS/SDMMC/RNG in Hz.
#endif /* HSI48_VALUE */ The real value my vary depending on manufacturing process variations.*/
#endif /* HSI48_VALUE */
/**
* @brief Internal Low Speed oscillator (LSI) value. /**
*/ * @brief Internal Low Speed oscillator (LSI) value.
#if !defined (LSI_VALUE) */
#define LSI_VALUE ((uint32_t)32000U) /*!< LSI Typical Value in Hz*/ #if !defined (LSI_VALUE)
#endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz #define LSI_VALUE 32000U /*!< LSI Typical Value in Hz*/
The real value may vary depending on the variations #endif /* LSI_VALUE */ /*!< Value of the Internal Low Speed oscillator in Hz
in voltage and temperature.*/ The real value may vary depending on the variations
/** in voltage and temperature.*/
* @brief External Low Speed oscillator (LSE) value. /**
* This value is used by the UART, RTC HAL module to compute the system frequency * @brief External Low Speed oscillator (LSE) value.
*/ * This value is used by the UART, RTC HAL module to compute the system frequency
#if !defined (LSE_VALUE) */
#define LSE_VALUE ((uint32_t)32768U) /*!< Value of the External oscillator in Hz*/ #if !defined (LSE_VALUE)
#endif /* LSE_VALUE */ #define LSE_VALUE 32768U /*!< Value of the External oscillator in Hz*/
#endif /* LSE_VALUE */
#if !defined (LSE_STARTUP_TIMEOUT)
#define LSE_STARTUP_TIMEOUT ((uint32_t)5000U) /*!< Time out for LSE start up, in ms */ #if !defined (LSE_STARTUP_TIMEOUT)
#endif /* HSE_STARTUP_TIMEOUT */ #define LSE_STARTUP_TIMEOUT 5000U /*!< Time out for LSE start up, in ms */
#endif /* HSE_STARTUP_TIMEOUT */
/**
* @brief External clock source for SAI1 peripheral /**
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source * @brief External clock source for SAI1 peripheral
* frequency. * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
*/ * frequency.
#if !defined (EXTERNAL_SAI1_CLOCK_VALUE) */
#define EXTERNAL_SAI1_CLOCK_VALUE ((uint32_t)48000U) /*!< Value of the SAI1 External clock source in Hz*/ #if !defined (EXTERNAL_SAI1_CLOCK_VALUE)
#endif /* EXTERNAL_SAI1_CLOCK_VALUE */ #define EXTERNAL_SAI1_CLOCK_VALUE 48000U /*!< Value of the SAI1 External clock source in Hz*/
#endif /* EXTERNAL_SAI1_CLOCK_VALUE */
/**
* @brief External clock source for SAI2 peripheral /**
* This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source * @brief External clock source for SAI2 peripheral
* frequency. * This value is used by the RCC HAL module to compute the SAI1 & SAI2 clock source
*/ * frequency.
#if !defined (EXTERNAL_SAI2_CLOCK_VALUE) */
#define EXTERNAL_SAI2_CLOCK_VALUE ((uint32_t)48000U) /*!< Value of the SAI2 External clock source in Hz*/ #if !defined (EXTERNAL_SAI2_CLOCK_VALUE)
#endif /* EXTERNAL_SAI2_CLOCK_VALUE */ #define EXTERNAL_SAI2_CLOCK_VALUE 48000U /*!< Value of the SAI2 External clock source in Hz*/
#endif /* EXTERNAL_SAI2_CLOCK_VALUE */
/* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */ /* Tip: To avoid modifying this file each time you need to use different HSE,
=== you can define the HSE value in your toolchain compiler preprocessor. */
/* ########################### System Configuration ######################### */
/** /* ########################### System Configuration ######################### */
* @brief This is the HAL system configuration section /**
*/ * @brief This is the HAL system configuration section
#define VDD_VALUE ((uint32_t)3300U) /*!< Value of VDD in mv */ */
#define TICK_INT_PRIORITY ((uint32_t)0x0FU) /*!< tick interrupt priority */ #define VDD_VALUE 3300U /*!< Value of VDD in mv */
#define USE_RTOS 0U #define TICK_INT_PRIORITY 0x0FU /*!< tick interrupt priority */
#define PREFETCH_ENABLE 0U #define USE_RTOS 0U
#define INSTRUCTION_CACHE_ENABLE 1U #define PREFETCH_ENABLE 0U
#define DATA_CACHE_ENABLE 1U #define INSTRUCTION_CACHE_ENABLE 1U
#define DATA_CACHE_ENABLE 1U
/* ########################## Assert Selection ############################## */
/** /* ########################## Assert Selection ############################## */
* @brief Uncomment the line below to expanse the "assert_param" macro in the /**
* HAL drivers code * @brief Uncomment the line below to expanse the "assert_param" macro in the
*/ * HAL drivers code
/* #define USE_FULL_ASSERT 1U */ */
/* #define USE_FULL_ASSERT 1U */
/* ################## SPI peripheral configuration ########################## */
/* ################## Register callback feature configuration ############### */
/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver /**
* Activated: CRC code is present inside driver * @brief Set below the peripheral configuration to "1U" to add the support
* Deactivated: CRC code cleaned from driver * of HAL callback registration/deregistration feature for the HAL
*/ * driver(s). This allows user application to provide specific callback
* functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
#define USE_SPI_CRC 1U * the default weak callback functions (see each stm32l4xx_hal_ppp.h file
* for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
/* Includes ------------------------------------------------------------------*/ * for each PPP peripheral).
/** */
* @brief Include module's header file #define USE_HAL_ADC_REGISTER_CALLBACKS 0U
*/ #define USE_HAL_CAN_REGISTER_CALLBACKS 0U
#define USE_HAL_COMP_REGISTER_CALLBACKS 0U
#ifdef HAL_RCC_MODULE_ENABLED #define USE_HAL_CRYP_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_rcc.h" #define USE_HAL_DAC_REGISTER_CALLBACKS 0U
#endif /* HAL_RCC_MODULE_ENABLED */ #define USE_HAL_DCMI_REGISTER_CALLBACKS 0U
#define USE_HAL_DFSDM_REGISTER_CALLBACKS 0U
#ifdef HAL_GPIO_MODULE_ENABLED #define USE_HAL_DMA2D_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_gpio.h" #define USE_HAL_DSI_REGISTER_CALLBACKS 0U
#endif /* HAL_GPIO_MODULE_ENABLED */ #define USE_HAL_GFXMMU_REGISTER_CALLBACKS 0U
#define USE_HAL_HASH_REGISTER_CALLBACKS 0U
#ifdef HAL_DMA_MODULE_ENABLED #define USE_HAL_HCD_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_dma.h" #define USE_HAL_I2C_REGISTER_CALLBACKS 0U
#endif /* HAL_DMA_MODULE_ENABLED */ #define USE_HAL_IRDA_REGISTER_CALLBACKS 0U
#define USE_HAL_LPTIM_REGISTER_CALLBACKS 0U
#ifdef HAL_DFSDM_MODULE_ENABLED #define USE_HAL_LTDC_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_dfsdm.h" #define USE_HAL_OPAMP_REGISTER_CALLBACKS 0U
#endif /* HAL_DFSDM_MODULE_ENABLED */ #define USE_HAL_OSPI_REGISTER_CALLBACKS 0U
#define USE_HAL_PCD_REGISTER_CALLBACKS 0U
#ifdef HAL_CORTEX_MODULE_ENABLED #define USE_HAL_QSPI_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_cortex.h" #define USE_HAL_RNG_REGISTER_CALLBACKS 0U
#endif /* HAL_CORTEX_MODULE_ENABLED */ #define USE_HAL_RTC_REGISTER_CALLBACKS 0U
#define USE_HAL_SAI_REGISTER_CALLBACKS 0U
#ifdef HAL_ADC_MODULE_ENABLED #define USE_HAL_SD_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_adc.h" #define USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U
#endif /* HAL_ADC_MODULE_ENABLED */ #define USE_HAL_SMBUS_REGISTER_CALLBACKS 0U
#define USE_HAL_SPI_REGISTER_CALLBACKS 0U
#ifdef HAL_CAN_MODULE_ENABLED #define USE_HAL_SWPMI_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_can.h" #define USE_HAL_TIM_REGISTER_CALLBACKS 0U
#endif /* HAL_CAN_MODULE_ENABLED */ #define USE_HAL_TSC_REGISTER_CALLBACKS 0U
#define USE_HAL_UART_REGISTER_CALLBACKS 0U
#ifdef HAL_COMP_MODULE_ENABLED #define USE_HAL_USART_REGISTER_CALLBACKS 0U
#include "stm32l4xx_hal_comp.h" #define USE_HAL_WWDG_REGISTER_CALLBACKS 0U
#endif /* HAL_COMP_MODULE_ENABLED */
/* ################## SPI peripheral configuration ########################## */
#ifdef HAL_CRC_MODULE_ENABLED
#include "stm32l4xx_hal_crc.h" /* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
#endif /* HAL_CRC_MODULE_ENABLED */ * Activated: CRC code is present inside driver
* Deactivated: CRC code cleaned from driver
#ifdef HAL_CRYP_MODULE_ENABLED */
#include "stm32l4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */ #define USE_SPI_CRC 1U
#ifdef HAL_DAC_MODULE_ENABLED /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_dac.h" /**
#endif /* HAL_DAC_MODULE_ENABLED */ * @brief Include module's header file
*/
#ifdef HAL_DCMI_MODULE_ENABLED
#include "stm32l4xx_hal_dcmi.h" #ifdef HAL_RCC_MODULE_ENABLED
#endif /* HAL_DCMI_MODULE_ENABLED */ #include "stm32l4xx_hal_rcc.h"
#endif /* HAL_RCC_MODULE_ENABLED */
#ifdef HAL_DMA2D_MODULE_ENABLED
#include "stm32l4xx_hal_dma2d.h" #ifdef HAL_GPIO_MODULE_ENABLED
#endif /* HAL_DMA2D_MODULE_ENABLED */ #include "stm32l4xx_hal_gpio.h"
#endif /* HAL_GPIO_MODULE_ENABLED */
#ifdef HAL_DSI_MODULE_ENABLED
#include "stm32l4xx_hal_dsi.h" #ifdef HAL_DMA_MODULE_ENABLED
#endif /* HAL_DSI_MODULE_ENABLED */ #include "stm32l4xx_hal_dma.h"
#endif /* HAL_DMA_MODULE_ENABLED */
#ifdef HAL_FIREWALL_MODULE_ENABLED
#include "stm32l4xx_hal_firewall.h" #ifdef HAL_DFSDM_MODULE_ENABLED
#endif /* HAL_FIREWALL_MODULE_ENABLED */ #include "stm32l4xx_hal_dfsdm.h"
#endif /* HAL_DFSDM_MODULE_ENABLED */
#ifdef HAL_FLASH_MODULE_ENABLED
#include "stm32l4xx_hal_flash.h" #ifdef HAL_CORTEX_MODULE_ENABLED
#endif /* HAL_FLASH_MODULE_ENABLED */ #include "stm32l4xx_hal_cortex.h"
#endif /* HAL_CORTEX_MODULE_ENABLED */
#ifdef HAL_HASH_MODULE_ENABLED
#include "stm32l4xx_hal_hash.h" #ifdef HAL_ADC_MODULE_ENABLED
#endif /* HAL_HASH_MODULE_ENABLED */ #include "stm32l4xx_hal_adc.h"
#endif /* HAL_ADC_MODULE_ENABLED */
#ifdef HAL_SRAM_MODULE_ENABLED
#include "stm32l4xx_hal_sram.h" #ifdef HAL_CAN_MODULE_ENABLED
#endif /* HAL_SRAM_MODULE_ENABLED */ #include "stm32l4xx_hal_can.h"
#endif /* HAL_CAN_MODULE_ENABLED */
#ifdef HAL_NOR_MODULE_ENABLED
#include "stm32l4xx_hal_nor.h" #ifdef HAL_CAN_LEGACY_MODULE_ENABLED
#endif /* HAL_NOR_MODULE_ENABLED */ #include "Legacy/stm32l4xx_hal_can_legacy.h"
#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
#ifdef HAL_NAND_MODULE_ENABLED
#include "stm32l4xx_hal_nand.h" #ifdef HAL_COMP_MODULE_ENABLED
#endif /* HAL_NAND_MODULE_ENABLED */ #include "stm32l4xx_hal_comp.h"
#endif /* HAL_COMP_MODULE_ENABLED */
#ifdef HAL_I2C_MODULE_ENABLED
#include "stm32l4xx_hal_i2c.h" #ifdef HAL_CRC_MODULE_ENABLED
#endif /* HAL_I2C_MODULE_ENABLED */ #include "stm32l4xx_hal_crc.h"
#endif /* HAL_CRC_MODULE_ENABLED */
#ifdef HAL_IWDG_MODULE_ENABLED
#include "stm32l4xx_hal_iwdg.h" #ifdef HAL_CRYP_MODULE_ENABLED
#endif /* HAL_IWDG_MODULE_ENABLED */ #include "stm32l4xx_hal_cryp.h"
#endif /* HAL_CRYP_MODULE_ENABLED */
#ifdef HAL_LCD_MODULE_ENABLED
#include "stm32l4xx_hal_lcd.h" #ifdef HAL_DAC_MODULE_ENABLED
#endif /* HAL_LCD_MODULE_ENABLED */ #include "stm32l4xx_hal_dac.h"
#endif /* HAL_DAC_MODULE_ENABLED */
#ifdef HAL_LPTIM_MODULE_ENABLED
#include "stm32l4xx_hal_lptim.h" #ifdef HAL_DCMI_MODULE_ENABLED
#endif /* HAL_LPTIM_MODULE_ENABLED */ #include "stm32l4xx_hal_dcmi.h"
#endif /* HAL_DCMI_MODULE_ENABLED */
#ifdef HAL_LTDC_MODULE_ENABLED
#include "stm32l4xx_hal_ltdc.h" #ifdef HAL_DMA2D_MODULE_ENABLED
#endif /* HAL_LTDC_MODULE_ENABLED */ #include "stm32l4xx_hal_dma2d.h"
#endif /* HAL_DMA2D_MODULE_ENABLED */
#ifdef HAL_OPAMP_MODULE_ENABLED
#include "stm32l4xx_hal_opamp.h" #ifdef HAL_DSI_MODULE_ENABLED
#endif /* HAL_OPAMP_MODULE_ENABLED */ #include "stm32l4xx_hal_dsi.h"
#endif /* HAL_DSI_MODULE_ENABLED */
#ifdef HAL_OSPI_MODULE_ENABLED
#include "stm32l4xx_hal_ospi.h" #ifdef HAL_FIREWALL_MODULE_ENABLED
#endif /* HAL_OSPI_MODULE_ENABLED */ #include "stm32l4xx_hal_firewall.h"
#endif /* HAL_FIREWALL_MODULE_ENABLED */
#ifdef HAL_PWR_MODULE_ENABLED
#include "stm32l4xx_hal_pwr.h" #ifdef HAL_FLASH_MODULE_ENABLED
#endif /* HAL_PWR_MODULE_ENABLED */ #include "stm32l4xx_hal_flash.h"
#endif /* HAL_FLASH_MODULE_ENABLED */
#ifdef HAL_QSPI_MODULE_ENABLED
#include "stm32l4xx_hal_qspi.h" #ifdef HAL_HASH_MODULE_ENABLED
#endif /* HAL_QSPI_MODULE_ENABLED */ #include "stm32l4xx_hal_hash.h"
#endif /* HAL_HASH_MODULE_ENABLED */
#ifdef HAL_RNG_MODULE_ENABLED
#include "stm32l4xx_hal_rng.h" #ifdef HAL_SRAM_MODULE_ENABLED
#endif /* HAL_RNG_MODULE_ENABLED */ #include "stm32l4xx_hal_sram.h"
#endif /* HAL_SRAM_MODULE_ENABLED */
#ifdef HAL_RTC_MODULE_ENABLED
#include "stm32l4xx_hal_rtc.h" #ifdef HAL_NOR_MODULE_ENABLED
#endif /* HAL_RTC_MODULE_ENABLED */ #include "stm32l4xx_hal_nor.h"
#endif /* HAL_NOR_MODULE_ENABLED */
#ifdef HAL_SAI_MODULE_ENABLED
#include "stm32l4xx_hal_sai.h" #ifdef HAL_NAND_MODULE_ENABLED
#endif /* HAL_SAI_MODULE_ENABLED */ #include "stm32l4xx_hal_nand.h"
#endif /* HAL_NAND_MODULE_ENABLED */
#ifdef HAL_SD_MODULE_ENABLED
#include "stm32l4xx_hal_sd.h" #ifdef HAL_I2C_MODULE_ENABLED
#endif /* HAL_SD_MODULE_ENABLED */ #include "stm32l4xx_hal_i2c.h"
#endif /* HAL_I2C_MODULE_ENABLED */
#ifdef HAL_SMBUS_MODULE_ENABLED
#include "stm32l4xx_hal_smbus.h" #ifdef HAL_IWDG_MODULE_ENABLED
#endif /* HAL_SMBUS_MODULE_ENABLED */ #include "stm32l4xx_hal_iwdg.h"
#endif /* HAL_IWDG_MODULE_ENABLED */
#ifdef HAL_SPI_MODULE_ENABLED
#include "stm32l4xx_hal_spi.h" #ifdef HAL_LCD_MODULE_ENABLED
#endif /* HAL_SPI_MODULE_ENABLED */ #include "stm32l4xx_hal_lcd.h"
#endif /* HAL_LCD_MODULE_ENABLED */
#ifdef HAL_SWPMI_MODULE_ENABLED
#include "stm32l4xx_hal_swpmi.h" #ifdef HAL_LPTIM_MODULE_ENABLED
#endif /* HAL_SWPMI_MODULE_ENABLED */ #include "stm32l4xx_hal_lptim.h"
#endif /* HAL_LPTIM_MODULE_ENABLED */
#ifdef HAL_TIM_MODULE_ENABLED
#include "stm32l4xx_hal_tim.h" #ifdef HAL_LTDC_MODULE_ENABLED
#endif /* HAL_TIM_MODULE_ENABLED */ #include "stm32l4xx_hal_ltdc.h"
#endif /* HAL_LTDC_MODULE_ENABLED */
#ifdef HAL_TSC_MODULE_ENABLED
#include "stm32l4xx_hal_tsc.h" #ifdef HAL_OPAMP_MODULE_ENABLED
#endif /* HAL_TSC_MODULE_ENABLED */ #include "stm32l4xx_hal_opamp.h"
#endif /* HAL_OPAMP_MODULE_ENABLED */
#ifdef HAL_UART_MODULE_ENABLED
#include "stm32l4xx_hal_uart.h" #ifdef HAL_OSPI_MODULE_ENABLED
#endif /* HAL_UART_MODULE_ENABLED */ #include "stm32l4xx_hal_ospi.h"
#endif /* HAL_OSPI_MODULE_ENABLED */
#ifdef HAL_USART_MODULE_ENABLED
#include "stm32l4xx_hal_usart.h" #ifdef HAL_PWR_MODULE_ENABLED
#endif /* HAL_USART_MODULE_ENABLED */ #include "stm32l4xx_hal_pwr.h"
#endif /* HAL_PWR_MODULE_ENABLED */
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32l4xx_hal_irda.h" #ifdef HAL_QSPI_MODULE_ENABLED
#endif /* HAL_IRDA_MODULE_ENABLED */ #include "stm32l4xx_hal_qspi.h"
#endif /* HAL_QSPI_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32l4xx_hal_smartcard.h" #ifdef HAL_RNG_MODULE_ENABLED
#endif /* HAL_SMARTCARD_MODULE_ENABLED */ #include "stm32l4xx_hal_rng.h"
#endif /* HAL_RNG_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32l4xx_hal_wwdg.h" #ifdef HAL_RTC_MODULE_ENABLED
#endif /* HAL_WWDG_MODULE_ENABLED */ #include "stm32l4xx_hal_rtc.h"
#endif /* HAL_RTC_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32l4xx_hal_pcd.h" #ifdef HAL_SAI_MODULE_ENABLED
#endif /* HAL_PCD_MODULE_ENABLED */ #include "stm32l4xx_hal_sai.h"
#endif /* HAL_SAI_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32l4xx_hal_hcd.h" #ifdef HAL_SD_MODULE_ENABLED
#endif /* HAL_HCD_MODULE_ENABLED */ #include "stm32l4xx_hal_sd.h"
#endif /* HAL_SD_MODULE_ENABLED */
#ifdef HAL_GFXMMU_MODULE_ENABLED
#include "stm32l4xx_hal_gfxmmu.h" #ifdef HAL_SMBUS_MODULE_ENABLED
#endif /* HAL_GFXMMU_MODULE_ENABLED */ #include "stm32l4xx_hal_smbus.h"
#endif /* HAL_SMBUS_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT #ifdef HAL_SPI_MODULE_ENABLED
/** #include "stm32l4xx_hal_spi.h"
* @brief The assert_param macro is used for function's parameters check. #endif /* HAL_SPI_MODULE_ENABLED */
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source #ifdef HAL_SWPMI_MODULE_ENABLED
* line number of the call that failed. #include "stm32l4xx_hal_swpmi.h"
* If expr is true, it returns no value. #endif /* HAL_SWPMI_MODULE_ENABLED */
* @retval None
*/ #ifdef HAL_TIM_MODULE_ENABLED
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__)) #include "stm32l4xx_hal_tim.h"
/* Exported functions ------------------------------------------------------- */ #endif /* HAL_TIM_MODULE_ENABLED */
void assert_failed(char *file, uint32_t line);
#else #ifdef HAL_TSC_MODULE_ENABLED
#define assert_param(expr) ((void)0U) #include "stm32l4xx_hal_tsc.h"
#endif /* USE_FULL_ASSERT */ #endif /* HAL_TSC_MODULE_ENABLED */
#ifdef __cplusplus #ifdef HAL_UART_MODULE_ENABLED
} #include "stm32l4xx_hal_uart.h"
#endif #endif /* HAL_UART_MODULE_ENABLED */
#endif /* __STM32L4xx_HAL_CONF_H */ #ifdef HAL_USART_MODULE_ENABLED
#include "stm32l4xx_hal_usart.h"
#endif /* HAL_USART_MODULE_ENABLED */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#ifdef HAL_IRDA_MODULE_ENABLED
#include "stm32l4xx_hal_irda.h"
#endif /* HAL_IRDA_MODULE_ENABLED */
#ifdef HAL_SMARTCARD_MODULE_ENABLED
#include "stm32l4xx_hal_smartcard.h"
#endif /* HAL_SMARTCARD_MODULE_ENABLED */
#ifdef HAL_WWDG_MODULE_ENABLED
#include "stm32l4xx_hal_wwdg.h"
#endif /* HAL_WWDG_MODULE_ENABLED */
#ifdef HAL_PCD_MODULE_ENABLED
#include "stm32l4xx_hal_pcd.h"
#endif /* HAL_PCD_MODULE_ENABLED */
#ifdef HAL_HCD_MODULE_ENABLED
#include "stm32l4xx_hal_hcd.h"
#endif /* HAL_HCD_MODULE_ENABLED */
#ifdef HAL_GFXMMU_MODULE_ENABLED
#include "stm32l4xx_hal_gfxmmu.h"
#endif /* HAL_GFXMMU_MODULE_ENABLED */
/* Exported macro ------------------------------------------------------------*/
#ifdef USE_FULL_ASSERT
/**
* @brief The assert_param macro is used for function's parameters check.
* @param expr: If expr is false, it calls assert_failed function
* which reports the name of the source file and the source
* line number of the call that failed.
* If expr is true, it returns no value.
* @retval None
*/
#define assert_param(expr) ((expr) ? (void)0U : assert_failed((char *)__FILE__, __LINE__))
/* Exported functions ------------------------------------------------------- */
void assert_failed(char *file, uint32_t line);
#else
#define assert_param(expr) ((void)0U)
#endif /* USE_FULL_ASSERT */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_CONF_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

898
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_cortex.h
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@ -1,465 +1,433 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_cortex.h * @file stm32l4xx_hal_cortex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CORTEX HAL module. * @brief Header file of CORTEX HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_CORTEX_H #ifndef __STM32L4xx_HAL_CORTEX_H
#define __STM32L4xx_HAL_CORTEX_H #define __STM32L4xx_HAL_CORTEX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @defgroup CORTEX CORTEX /** @defgroup CORTEX CORTEX
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Types CORTEX Exported Types /** @defgroup CORTEX_Exported_Types CORTEX Exported Types
* @{ * @{
*/ */
#if (__MPU_PRESENT == 1) #if (__MPU_PRESENT == 1)
/** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition /** @defgroup CORTEX_MPU_Region_Initialization_Structure_definition MPU Region Initialization Structure Definition
* @{ * @{
*/ */
typedef struct typedef struct
{ {
uint8_t Enable; /*!< Specifies the status of the region. uint8_t Enable; /*!< Specifies the status of the region.
This parameter can be a value of @ref CORTEX_MPU_Region_Enable */ This parameter can be a value of @ref CORTEX_MPU_Region_Enable */
uint8_t Number; /*!< Specifies the number of the region to protect. uint8_t Number; /*!< Specifies the number of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Number */ This parameter can be a value of @ref CORTEX_MPU_Region_Number */
uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */ uint32_t BaseAddress; /*!< Specifies the base address of the region to protect. */
uint8_t Size; /*!< Specifies the size of the region to protect. uint8_t Size; /*!< Specifies the size of the region to protect.
This parameter can be a value of @ref CORTEX_MPU_Region_Size */ This parameter can be a value of @ref CORTEX_MPU_Region_Size */
uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable. uint8_t SubRegionDisable; /*!< Specifies the number of the subregion protection to disable.
This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */ This parameter must be a number between Min_Data = 0x00 and Max_Data = 0xFF */
uint8_t TypeExtField; /*!< Specifies the TEX field level. uint8_t TypeExtField; /*!< Specifies the TEX field level.
This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */ This parameter can be a value of @ref CORTEX_MPU_TEX_Levels */
uint8_t AccessPermission; /*!< Specifies the region access permission type. uint8_t AccessPermission; /*!< Specifies the region access permission type.
This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */ This parameter can be a value of @ref CORTEX_MPU_Region_Permission_Attributes */
uint8_t DisableExec; /*!< Specifies the instruction access status. uint8_t DisableExec; /*!< Specifies the instruction access status.
This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */ This parameter can be a value of @ref CORTEX_MPU_Instruction_Access */
uint8_t IsShareable; /*!< Specifies the shareability status of the protected region. uint8_t IsShareable; /*!< Specifies the shareability status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */ This parameter can be a value of @ref CORTEX_MPU_Access_Shareable */
uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected. uint8_t IsCacheable; /*!< Specifies the cacheable status of the region protected.
This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */ This parameter can be a value of @ref CORTEX_MPU_Access_Cacheable */
uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region. uint8_t IsBufferable; /*!< Specifies the bufferable status of the protected region.
This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */ This parameter can be a value of @ref CORTEX_MPU_Access_Bufferable */
}MPU_Region_InitTypeDef; }MPU_Region_InitTypeDef;
/** /**
* @} * @}
*/ */
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants /** @defgroup CORTEX_Exported_Constants CORTEX Exported Constants
* @{ * @{
*/ */
/** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group /** @defgroup CORTEX_Preemption_Priority_Group CORTEX Preemption Priority Group
* @{ * @{
*/ */
#define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority, #define NVIC_PRIORITYGROUP_0 ((uint32_t)0x00000007) /*!< 0 bit for pre-emption priority,
4 bits for subpriority */ 4 bits for subpriority */
#define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority, #define NVIC_PRIORITYGROUP_1 ((uint32_t)0x00000006) /*!< 1 bit for pre-emption priority,
3 bits for subpriority */ 3 bits for subpriority */
#define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority, #define NVIC_PRIORITYGROUP_2 ((uint32_t)0x00000005) /*!< 2 bits for pre-emption priority,
2 bits for subpriority */ 2 bits for subpriority */
#define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority, #define NVIC_PRIORITYGROUP_3 ((uint32_t)0x00000004) /*!< 3 bits for pre-emption priority,
1 bit for subpriority */ 1 bit for subpriority */
#define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority, #define NVIC_PRIORITYGROUP_4 ((uint32_t)0x00000003) /*!< 4 bits for pre-emption priority,
0 bit for subpriority */ 0 bit for subpriority */
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source /** @defgroup CORTEX_SysTick_clock_source CORTEX SysTick clock source
* @{ * @{
*/ */
#define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000) #define SYSTICK_CLKSOURCE_HCLK_DIV8 ((uint32_t)0x00000000)
#define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004) #define SYSTICK_CLKSOURCE_HCLK ((uint32_t)0x00000004)
/** /**
* @} * @}
*/ */
#if (__MPU_PRESENT == 1) #if (__MPU_PRESENT == 1)
/** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control /** @defgroup CORTEX_MPU_HFNMI_PRIVDEF_Control CORTEX MPU HFNMI and PRIVILEGED Access control
* @{ * @{
*/ */
#define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000) #define MPU_HFNMI_PRIVDEF_NONE ((uint32_t)0x00000000)
#define MPU_HARDFAULT_NMI ((uint32_t)0x00000002) #define MPU_HARDFAULT_NMI ((uint32_t)0x00000002)
#define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004) #define MPU_PRIVILEGED_DEFAULT ((uint32_t)0x00000004)
#define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006) #define MPU_HFNMI_PRIVDEF ((uint32_t)0x00000006)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable /** @defgroup CORTEX_MPU_Region_Enable CORTEX MPU Region Enable
* @{ * @{
*/ */
#define MPU_REGION_ENABLE ((uint8_t)0x01) #define MPU_REGION_ENABLE ((uint8_t)0x01)
#define MPU_REGION_DISABLE ((uint8_t)0x00) #define MPU_REGION_DISABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access /** @defgroup CORTEX_MPU_Instruction_Access CORTEX MPU Instruction Access
* @{ * @{
*/ */
#define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00) #define MPU_INSTRUCTION_ACCESS_ENABLE ((uint8_t)0x00)
#define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01) #define MPU_INSTRUCTION_ACCESS_DISABLE ((uint8_t)0x01)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable /** @defgroup CORTEX_MPU_Access_Shareable CORTEX MPU Instruction Access Shareable
* @{ * @{
*/ */
#define MPU_ACCESS_SHAREABLE ((uint8_t)0x01) #define MPU_ACCESS_SHAREABLE ((uint8_t)0x01)
#define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00) #define MPU_ACCESS_NOT_SHAREABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable /** @defgroup CORTEX_MPU_Access_Cacheable CORTEX MPU Instruction Access Cacheable
* @{ * @{
*/ */
#define MPU_ACCESS_CACHEABLE ((uint8_t)0x01) #define MPU_ACCESS_CACHEABLE ((uint8_t)0x01)
#define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00) #define MPU_ACCESS_NOT_CACHEABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable /** @defgroup CORTEX_MPU_Access_Bufferable CORTEX MPU Instruction Access Bufferable
* @{ * @{
*/ */
#define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01) #define MPU_ACCESS_BUFFERABLE ((uint8_t)0x01)
#define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00) #define MPU_ACCESS_NOT_BUFFERABLE ((uint8_t)0x00)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_TEX_Levels CORTEX MPU TEX Levels /** @defgroup CORTEX_MPU_TEX_Levels CORTEX MPU TEX Levels
* @{ * @{
*/ */
#define MPU_TEX_LEVEL0 ((uint8_t)0x00) #define MPU_TEX_LEVEL0 ((uint8_t)0x00)
#define MPU_TEX_LEVEL1 ((uint8_t)0x01) #define MPU_TEX_LEVEL1 ((uint8_t)0x01)
#define MPU_TEX_LEVEL2 ((uint8_t)0x02) #define MPU_TEX_LEVEL2 ((uint8_t)0x02)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size /** @defgroup CORTEX_MPU_Region_Size CORTEX MPU Region Size
* @{ * @{
*/ */
#define MPU_REGION_SIZE_32B ((uint8_t)0x04) #define MPU_REGION_SIZE_32B ((uint8_t)0x04)
#define MPU_REGION_SIZE_64B ((uint8_t)0x05) #define MPU_REGION_SIZE_64B ((uint8_t)0x05)
#define MPU_REGION_SIZE_128B ((uint8_t)0x06) #define MPU_REGION_SIZE_128B ((uint8_t)0x06)
#define MPU_REGION_SIZE_256B ((uint8_t)0x07) #define MPU_REGION_SIZE_256B ((uint8_t)0x07)
#define MPU_REGION_SIZE_512B ((uint8_t)0x08) #define MPU_REGION_SIZE_512B ((uint8_t)0x08)
#define MPU_REGION_SIZE_1KB ((uint8_t)0x09) #define MPU_REGION_SIZE_1KB ((uint8_t)0x09)
#define MPU_REGION_SIZE_2KB ((uint8_t)0x0A) #define MPU_REGION_SIZE_2KB ((uint8_t)0x0A)
#define MPU_REGION_SIZE_4KB ((uint8_t)0x0B) #define MPU_REGION_SIZE_4KB ((uint8_t)0x0B)
#define MPU_REGION_SIZE_8KB ((uint8_t)0x0C) #define MPU_REGION_SIZE_8KB ((uint8_t)0x0C)
#define MPU_REGION_SIZE_16KB ((uint8_t)0x0D) #define MPU_REGION_SIZE_16KB ((uint8_t)0x0D)
#define MPU_REGION_SIZE_32KB ((uint8_t)0x0E) #define MPU_REGION_SIZE_32KB ((uint8_t)0x0E)
#define MPU_REGION_SIZE_64KB ((uint8_t)0x0F) #define MPU_REGION_SIZE_64KB ((uint8_t)0x0F)
#define MPU_REGION_SIZE_128KB ((uint8_t)0x10) #define MPU_REGION_SIZE_128KB ((uint8_t)0x10)
#define MPU_REGION_SIZE_256KB ((uint8_t)0x11) #define MPU_REGION_SIZE_256KB ((uint8_t)0x11)
#define MPU_REGION_SIZE_512KB ((uint8_t)0x12) #define MPU_REGION_SIZE_512KB ((uint8_t)0x12)
#define MPU_REGION_SIZE_1MB ((uint8_t)0x13) #define MPU_REGION_SIZE_1MB ((uint8_t)0x13)
#define MPU_REGION_SIZE_2MB ((uint8_t)0x14) #define MPU_REGION_SIZE_2MB ((uint8_t)0x14)
#define MPU_REGION_SIZE_4MB ((uint8_t)0x15) #define MPU_REGION_SIZE_4MB ((uint8_t)0x15)
#define MPU_REGION_SIZE_8MB ((uint8_t)0x16) #define MPU_REGION_SIZE_8MB ((uint8_t)0x16)
#define MPU_REGION_SIZE_16MB ((uint8_t)0x17) #define MPU_REGION_SIZE_16MB ((uint8_t)0x17)
#define MPU_REGION_SIZE_32MB ((uint8_t)0x18) #define MPU_REGION_SIZE_32MB ((uint8_t)0x18)
#define MPU_REGION_SIZE_64MB ((uint8_t)0x19) #define MPU_REGION_SIZE_64MB ((uint8_t)0x19)
#define MPU_REGION_SIZE_128MB ((uint8_t)0x1A) #define MPU_REGION_SIZE_128MB ((uint8_t)0x1A)
#define MPU_REGION_SIZE_256MB ((uint8_t)0x1B) #define MPU_REGION_SIZE_256MB ((uint8_t)0x1B)
#define MPU_REGION_SIZE_512MB ((uint8_t)0x1C) #define MPU_REGION_SIZE_512MB ((uint8_t)0x1C)
#define MPU_REGION_SIZE_1GB ((uint8_t)0x1D) #define MPU_REGION_SIZE_1GB ((uint8_t)0x1D)
#define MPU_REGION_SIZE_2GB ((uint8_t)0x1E) #define MPU_REGION_SIZE_2GB ((uint8_t)0x1E)
#define MPU_REGION_SIZE_4GB ((uint8_t)0x1F) #define MPU_REGION_SIZE_4GB ((uint8_t)0x1F)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes /** @defgroup CORTEX_MPU_Region_Permission_Attributes CORTEX MPU Region Permission Attributes
* @{ * @{
*/ */
#define MPU_REGION_NO_ACCESS ((uint8_t)0x00) #define MPU_REGION_NO_ACCESS ((uint8_t)0x00)
#define MPU_REGION_PRIV_RW ((uint8_t)0x01) #define MPU_REGION_PRIV_RW ((uint8_t)0x01)
#define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02) #define MPU_REGION_PRIV_RW_URO ((uint8_t)0x02)
#define MPU_REGION_FULL_ACCESS ((uint8_t)0x03) #define MPU_REGION_FULL_ACCESS ((uint8_t)0x03)
#define MPU_REGION_PRIV_RO ((uint8_t)0x05) #define MPU_REGION_PRIV_RO ((uint8_t)0x05)
#define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06) #define MPU_REGION_PRIV_RO_URO ((uint8_t)0x06)
/** /**
* @} * @}
*/ */
/** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number /** @defgroup CORTEX_MPU_Region_Number CORTEX MPU Region Number
* @{ * @{
*/ */
#define MPU_REGION_NUMBER0 ((uint8_t)0x00) #define MPU_REGION_NUMBER0 ((uint8_t)0x00)
#define MPU_REGION_NUMBER1 ((uint8_t)0x01) #define MPU_REGION_NUMBER1 ((uint8_t)0x01)
#define MPU_REGION_NUMBER2 ((uint8_t)0x02) #define MPU_REGION_NUMBER2 ((uint8_t)0x02)
#define MPU_REGION_NUMBER3 ((uint8_t)0x03) #define MPU_REGION_NUMBER3 ((uint8_t)0x03)
#define MPU_REGION_NUMBER4 ((uint8_t)0x04) #define MPU_REGION_NUMBER4 ((uint8_t)0x04)
#define MPU_REGION_NUMBER5 ((uint8_t)0x05) #define MPU_REGION_NUMBER5 ((uint8_t)0x05)
#define MPU_REGION_NUMBER6 ((uint8_t)0x06) #define MPU_REGION_NUMBER6 ((uint8_t)0x06)
#define MPU_REGION_NUMBER7 ((uint8_t)0x07) #define MPU_REGION_NUMBER7 ((uint8_t)0x07)
/** /**
* @} * @}
*/ */
#endif /* __MPU_PRESENT */ #endif /* __MPU_PRESENT */
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros /** @defgroup CORTEX_Exported_Macros CORTEX Exported Macros
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions /** @defgroup CORTEX_Exported_Functions CORTEX Exported Functions
* @{ * @{
*/ */
/** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions /** @defgroup CORTEX_Exported_Functions_Group1 Initialization and Configuration functions
* @brief Initialization and Configuration functions * @brief Initialization and Configuration functions
* @{ * @{
*/ */
/* Initialization and Configuration functions *****************************/ /* Initialization and Configuration functions *****************************/
void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup); void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup);
void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority); void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority);
void HAL_NVIC_EnableIRQ(IRQn_Type IRQn); void HAL_NVIC_EnableIRQ(IRQn_Type IRQn);
void HAL_NVIC_DisableIRQ(IRQn_Type IRQn); void HAL_NVIC_DisableIRQ(IRQn_Type IRQn);
void HAL_NVIC_SystemReset(void); void HAL_NVIC_SystemReset(void);
uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb); uint32_t HAL_SYSTICK_Config(uint32_t TicksNumb);
#if (__MPU_PRESENT == 1) /**
/** * @}
* @brief Disable the MPU. */
* @retval None
*/ /** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions
__STATIC_INLINE void HAL_MPU_Disable(void) * @brief Cortex control functions
{ * @{
/* Disable fault exceptions */ */
SCB->SHCSR &= ~SCB_SHCSR_MEMFAULTENA_Msk; /* Peripheral Control functions ***********************************************/
uint32_t HAL_NVIC_GetPriorityGrouping(void);
/* Disable the MPU */ void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
MPU->CTRL &= ~MPU_CTRL_ENABLE_Msk; uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn);
} void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn);
/** uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
* @brief Enable the MPU. void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource);
* @param MPU_Control: Specifies the control mode of the MPU during hard fault, void HAL_SYSTICK_IRQHandler(void);
* NMI, FAULTMASK and privileged accessto the default memory void HAL_SYSTICK_Callback(void);
* This parameter can be one of the following values:
* @arg MPU_HFNMI_PRIVDEF_NONE #if (__MPU_PRESENT == 1)
* @arg MPU_HARDFAULT_NMI void HAL_MPU_Enable(uint32_t MPU_Control);
* @arg MPU_PRIVILEGED_DEFAULT void HAL_MPU_Disable(void);
* @arg MPU_HFNMI_PRIVDEF void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init);
* @retval None #endif /* __MPU_PRESENT */
*/ /**
__STATIC_INLINE void HAL_MPU_Enable(uint32_t MPU_Control) * @}
{ */
/* Enable the MPU */
MPU->CTRL = MPU_Control | MPU_CTRL_ENABLE_Msk; /**
* @}
/* Enable fault exceptions */ */
SCB->SHCSR |= SCB_SHCSR_MEMFAULTENA_Msk;
} /* Private types -------------------------------------------------------------*/
#endif /* __MPU_PRESENT */ /* Private variables ---------------------------------------------------------*/
/** /* Private constants ---------------------------------------------------------*/
* @} /* Private macros ------------------------------------------------------------*/
*/ /** @defgroup CORTEX_Private_Macros CORTEX Private Macros
* @{
/** @defgroup CORTEX_Exported_Functions_Group2 Peripheral Control functions */
* @brief Cortex control functions #define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \
* @{ ((GROUP) == NVIC_PRIORITYGROUP_1) || \
*/ ((GROUP) == NVIC_PRIORITYGROUP_2) || \
/* Peripheral Control functions ***********************************************/ ((GROUP) == NVIC_PRIORITYGROUP_3) || \
uint32_t HAL_NVIC_GetPriorityGrouping(void); ((GROUP) == NVIC_PRIORITYGROUP_4))
void HAL_NVIC_GetPriority(IRQn_Type IRQn, uint32_t PriorityGroup, uint32_t* pPreemptPriority, uint32_t* pSubPriority);
uint32_t HAL_NVIC_GetPendingIRQ(IRQn_Type IRQn); #define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
void HAL_NVIC_SetPendingIRQ(IRQn_Type IRQn);
void HAL_NVIC_ClearPendingIRQ(IRQn_Type IRQn); #define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10)
uint32_t HAL_NVIC_GetActive(IRQn_Type IRQn);
void HAL_SYSTICK_CLKSourceConfig(uint32_t CLKSource); #define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00)
void HAL_SYSTICK_IRQHandler(void);
void HAL_SYSTICK_Callback(void); #define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8))
#if (__MPU_PRESENT == 1)
void HAL_MPU_ConfigRegion(MPU_Region_InitTypeDef *MPU_Init); #if (__MPU_PRESENT == 1)
#endif /* __MPU_PRESENT */ #define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \
/** ((STATE) == MPU_REGION_DISABLE))
* @}
*/ #define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE))
/**
* @} #define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \
*/ ((STATE) == MPU_ACCESS_NOT_SHAREABLE))
/* Private types -------------------------------------------------------------*/ #define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \
/* Private variables ---------------------------------------------------------*/ ((STATE) == MPU_ACCESS_NOT_CACHEABLE))
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ #define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \
/** @defgroup CORTEX_Private_Macros CORTEX Private Macros ((STATE) == MPU_ACCESS_NOT_BUFFERABLE))
* @{
*/ #define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \
#define IS_NVIC_PRIORITY_GROUP(GROUP) (((GROUP) == NVIC_PRIORITYGROUP_0) || \ ((TYPE) == MPU_TEX_LEVEL1) || \
((GROUP) == NVIC_PRIORITYGROUP_1) || \ ((TYPE) == MPU_TEX_LEVEL2))
((GROUP) == NVIC_PRIORITYGROUP_2) || \
((GROUP) == NVIC_PRIORITYGROUP_3) || \ #define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \
((GROUP) == NVIC_PRIORITYGROUP_4)) ((TYPE) == MPU_REGION_PRIV_RW) || \
((TYPE) == MPU_REGION_PRIV_RW_URO) || \
#define IS_NVIC_PREEMPTION_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) ((TYPE) == MPU_REGION_FULL_ACCESS) || \
((TYPE) == MPU_REGION_PRIV_RO) || \
#define IS_NVIC_SUB_PRIORITY(PRIORITY) ((PRIORITY) < 0x10) ((TYPE) == MPU_REGION_PRIV_RO_URO))
#define IS_NVIC_DEVICE_IRQ(IRQ) ((IRQ) >= 0x00) #define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \
((NUMBER) == MPU_REGION_NUMBER1) || \
#define IS_SYSTICK_CLK_SOURCE(SOURCE) (((SOURCE) == SYSTICK_CLKSOURCE_HCLK) || \ ((NUMBER) == MPU_REGION_NUMBER2) || \
((SOURCE) == SYSTICK_CLKSOURCE_HCLK_DIV8)) ((NUMBER) == MPU_REGION_NUMBER3) || \
((NUMBER) == MPU_REGION_NUMBER4) || \
#if (__MPU_PRESENT == 1) ((NUMBER) == MPU_REGION_NUMBER5) || \
#define IS_MPU_REGION_ENABLE(STATE) (((STATE) == MPU_REGION_ENABLE) || \ ((NUMBER) == MPU_REGION_NUMBER6) || \
((STATE) == MPU_REGION_DISABLE)) ((NUMBER) == MPU_REGION_NUMBER7))
#define IS_MPU_INSTRUCTION_ACCESS(STATE) (((STATE) == MPU_INSTRUCTION_ACCESS_ENABLE) || \ #define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \
((STATE) == MPU_INSTRUCTION_ACCESS_DISABLE)) ((SIZE) == MPU_REGION_SIZE_64B) || \
((SIZE) == MPU_REGION_SIZE_128B) || \
#define IS_MPU_ACCESS_SHAREABLE(STATE) (((STATE) == MPU_ACCESS_SHAREABLE) || \ ((SIZE) == MPU_REGION_SIZE_256B) || \
((STATE) == MPU_ACCESS_NOT_SHAREABLE)) ((SIZE) == MPU_REGION_SIZE_512B) || \
((SIZE) == MPU_REGION_SIZE_1KB) || \
#define IS_MPU_ACCESS_CACHEABLE(STATE) (((STATE) == MPU_ACCESS_CACHEABLE) || \ ((SIZE) == MPU_REGION_SIZE_2KB) || \
((STATE) == MPU_ACCESS_NOT_CACHEABLE)) ((SIZE) == MPU_REGION_SIZE_4KB) || \
((SIZE) == MPU_REGION_SIZE_8KB) || \
#define IS_MPU_ACCESS_BUFFERABLE(STATE) (((STATE) == MPU_ACCESS_BUFFERABLE) || \ ((SIZE) == MPU_REGION_SIZE_16KB) || \
((STATE) == MPU_ACCESS_NOT_BUFFERABLE)) ((SIZE) == MPU_REGION_SIZE_32KB) || \
((SIZE) == MPU_REGION_SIZE_64KB) || \
#define IS_MPU_TEX_LEVEL(TYPE) (((TYPE) == MPU_TEX_LEVEL0) || \ ((SIZE) == MPU_REGION_SIZE_128KB) || \
((TYPE) == MPU_TEX_LEVEL1) || \ ((SIZE) == MPU_REGION_SIZE_256KB) || \
((TYPE) == MPU_TEX_LEVEL2)) ((SIZE) == MPU_REGION_SIZE_512KB) || \
((SIZE) == MPU_REGION_SIZE_1MB) || \
#define IS_MPU_REGION_PERMISSION_ATTRIBUTE(TYPE) (((TYPE) == MPU_REGION_NO_ACCESS) || \ ((SIZE) == MPU_REGION_SIZE_2MB) || \
((TYPE) == MPU_REGION_PRIV_RW) || \ ((SIZE) == MPU_REGION_SIZE_4MB) || \
((TYPE) == MPU_REGION_PRIV_RW_URO) || \ ((SIZE) == MPU_REGION_SIZE_8MB) || \
((TYPE) == MPU_REGION_FULL_ACCESS) || \ ((SIZE) == MPU_REGION_SIZE_16MB) || \
((TYPE) == MPU_REGION_PRIV_RO) || \ ((SIZE) == MPU_REGION_SIZE_32MB) || \
((TYPE) == MPU_REGION_PRIV_RO_URO)) ((SIZE) == MPU_REGION_SIZE_64MB) || \
((SIZE) == MPU_REGION_SIZE_128MB) || \
#define IS_MPU_REGION_NUMBER(NUMBER) (((NUMBER) == MPU_REGION_NUMBER0) || \ ((SIZE) == MPU_REGION_SIZE_256MB) || \
((NUMBER) == MPU_REGION_NUMBER1) || \ ((SIZE) == MPU_REGION_SIZE_512MB) || \
((NUMBER) == MPU_REGION_NUMBER2) || \ ((SIZE) == MPU_REGION_SIZE_1GB) || \
((NUMBER) == MPU_REGION_NUMBER3) || \ ((SIZE) == MPU_REGION_SIZE_2GB) || \
((NUMBER) == MPU_REGION_NUMBER4) || \ ((SIZE) == MPU_REGION_SIZE_4GB))
((NUMBER) == MPU_REGION_NUMBER5) || \
((NUMBER) == MPU_REGION_NUMBER6) || \ #define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
((NUMBER) == MPU_REGION_NUMBER7)) #endif /* __MPU_PRESENT */
#define IS_MPU_REGION_SIZE(SIZE) (((SIZE) == MPU_REGION_SIZE_32B) || \ /**
((SIZE) == MPU_REGION_SIZE_64B) || \ * @}
((SIZE) == MPU_REGION_SIZE_128B) || \ */
((SIZE) == MPU_REGION_SIZE_256B) || \
((SIZE) == MPU_REGION_SIZE_512B) || \ /* Private functions ---------------------------------------------------------*/
((SIZE) == MPU_REGION_SIZE_1KB) || \
((SIZE) == MPU_REGION_SIZE_2KB) || \ /**
((SIZE) == MPU_REGION_SIZE_4KB) || \ * @}
((SIZE) == MPU_REGION_SIZE_8KB) || \ */
((SIZE) == MPU_REGION_SIZE_16KB) || \
((SIZE) == MPU_REGION_SIZE_32KB) || \ /**
((SIZE) == MPU_REGION_SIZE_64KB) || \ * @}
((SIZE) == MPU_REGION_SIZE_128KB) || \ */
((SIZE) == MPU_REGION_SIZE_256KB) || \
((SIZE) == MPU_REGION_SIZE_512KB) || \ #ifdef __cplusplus
((SIZE) == MPU_REGION_SIZE_1MB) || \ }
((SIZE) == MPU_REGION_SIZE_2MB) || \ #endif
((SIZE) == MPU_REGION_SIZE_4MB) || \
((SIZE) == MPU_REGION_SIZE_8MB) || \ #endif /* __STM32L4xx_HAL_CORTEX_H */
((SIZE) == MPU_REGION_SIZE_16MB) || \
((SIZE) == MPU_REGION_SIZE_32MB) || \
((SIZE) == MPU_REGION_SIZE_64MB) || \ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
((SIZE) == MPU_REGION_SIZE_128MB) || \
((SIZE) == MPU_REGION_SIZE_256MB) || \
((SIZE) == MPU_REGION_SIZE_512MB) || \
((SIZE) == MPU_REGION_SIZE_1GB) || \
((SIZE) == MPU_REGION_SIZE_2GB) || \
((SIZE) == MPU_REGION_SIZE_4GB))
#define IS_MPU_SUB_REGION_DISABLE(SUBREGION) ((SUBREGION) < (uint16_t)0x00FF)
#endif /* __MPU_PRESENT */
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_CORTEX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_crc.h
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@ -1,366 +1,360 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_crc.h * @file stm32l4xx_hal_crc.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CRC HAL module. * @brief Header file of CRC HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_CRC_H #ifndef __STM32L4xx_HAL_CRC_H
#define __STM32L4xx_HAL_CRC_H #define __STM32L4xx_HAL_CRC_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup CRC /** @addtogroup CRC
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup CRC_Exported_Types CRC Exported Types
/** @defgroup CRC_Exported_Types CRC Exported Types * @{
* @{ */
*/
/**
/** * @brief CRC HAL State Structure definition
* @brief CRC HAL State Structure definition */
*/ typedef enum
typedef enum {
{ HAL_CRC_STATE_RESET = 0x00U, /*!< CRC not yet initialized or disabled */
HAL_CRC_STATE_RESET = 0x00, /*!< CRC not yet initialized or disabled */ HAL_CRC_STATE_READY = 0x01U, /*!< CRC initialized and ready for use */
HAL_CRC_STATE_READY = 0x01, /*!< CRC initialized and ready for use */ HAL_CRC_STATE_BUSY = 0x02U, /*!< CRC internal process is ongoing */
HAL_CRC_STATE_BUSY = 0x02, /*!< CRC internal process is ongoing */ HAL_CRC_STATE_TIMEOUT = 0x03U, /*!< CRC timeout state */
HAL_CRC_STATE_TIMEOUT = 0x03, /*!< CRC timeout state */ HAL_CRC_STATE_ERROR = 0x04U /*!< CRC error state */
HAL_CRC_STATE_ERROR = 0x04 /*!< CRC error state */ } HAL_CRC_StateTypeDef;
}HAL_CRC_StateTypeDef;
/**
* @brief CRC Init Structure definition
*/
/** typedef struct
* @brief CRC Init Structure definition {
*/ uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used.
typedef struct If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default
{ X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
uint8_t DefaultPolynomialUse; /*!< This parameter is a value of @ref CRC_Default_Polynomial and indicates if default polynomial is used. In that case, there is no need to set GeneratingPolynomial field.
If set to DEFAULT_POLYNOMIAL_ENABLE, resort to default If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set. */
X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1.
In that case, there is no need to set GeneratingPolynomial field. uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used.
If otherwise set to DEFAULT_POLYNOMIAL_DISABLE, GeneratingPolynomial and CRCLength fields must be set. */ If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
0xFFFFFFFF value. In that case, there is no need to set InitValue field.
uint8_t DefaultInitValueUse; /*!< This parameter is a value of @ref CRC_Default_InitValue_Use and indicates if default init value is used. If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */
If set to DEFAULT_INIT_VALUE_ENABLE, resort to default
0xFFFFFFFF value. In that case, there is no need to set InitValue field. uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree
If otherwise set to DEFAULT_INIT_VALUE_DISABLE, InitValue field must be set. */ respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65.
uint32_t GeneratingPolynomial; /*!< Set CRC generating polynomial as a 7, 8, 16 or 32-bit long value for a polynomial degree No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE. */
respectively equal to 7, 8, 16 or 32. This field is written in normal representation,
e.g., for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65. uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length.
No need to specify it if DefaultPolynomialUse is set to DEFAULT_POLYNOMIAL_ENABLE. */ Value can be either one of
@arg @ref CRC_POLYLENGTH_32B (32-bit CRC),
uint32_t CRCLength; /*!< This parameter is a value of @ref CRC_Polynomial_Sizes and indicates CRC length. @arg @ref CRC_POLYLENGTH_16B (16-bit CRC),
Value can be either one of @arg @ref CRC_POLYLENGTH_8B (8-bit CRC),
@arg @ref CRC_POLYLENGTH_32B (32-bit CRC), @arg @ref CRC_POLYLENGTH_7B (7-bit CRC). */
@arg @ref CRC_POLYLENGTH_16B (16-bit CRC),
@arg @ref CRC_POLYLENGTH_8B (8-bit CRC), uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse
@arg @ref CRC_POLYLENGTH_7B (7-bit CRC). */ is set to DEFAULT_INIT_VALUE_ENABLE. */
uint32_t InitValue; /*!< Init value to initiate CRC computation. No need to specify it if DefaultInitValueUse uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode.
is set to DEFAULT_INIT_VALUE_ENABLE. */ Can be either one of the following values
@arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion
uint32_t InputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Input_Data_Inversion and specifies input data inversion mode. @arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
Can be either one of the following values @arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C
@arg @ref CRC_INPUTDATA_INVERSION_NONE no input data inversion @arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */
@arg @ref CRC_INPUTDATA_INVERSION_BYTE byte-wise inversion, 0x1A2B3C4D becomes 0x58D43CB2
@arg @ref CRC_INPUTDATA_INVERSION_HALFWORD halfword-wise inversion, 0x1A2B3C4D becomes 0xD458B23C uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode.
@arg @ref CRC_INPUTDATA_INVERSION_WORD word-wise inversion, 0x1A2B3C4D becomes 0xB23CD458 */ Can be either
@arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion,
uint32_t OutputDataInversionMode; /*!< This parameter is a value of @ref CRCEx_Output_Data_Inversion and specifies output data (i.e. CRC) inversion mode. @arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */
Can be either } CRC_InitTypeDef;
@arg @ref CRC_OUTPUTDATA_INVERSION_DISABLE no CRC inversion,
@arg @ref CRC_OUTPUTDATA_INVERSION_ENABLE CRC 0x11223344 is converted into 0x22CC4488 */ /**
}CRC_InitTypeDef; * @brief CRC Handle Structure definition
*/
typedef struct
{
/** CRC_TypeDef *Instance; /*!< Register base address */
* @brief CRC Handle Structure definition
*/ CRC_InitTypeDef Init; /*!< CRC configuration parameters */
typedef struct
{ HAL_LockTypeDef Lock; /*!< CRC Locking object */
CRC_TypeDef *Instance; /*!< Register base address */
__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */
CRC_InitTypeDef Init; /*!< CRC configuration parameters */
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
HAL_LockTypeDef Lock; /*!< CRC Locking object */ Can be either
@arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data)
__IO HAL_CRC_StateTypeDef State; /*!< CRC communication state */ @arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data)
@arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bit data)
uint32_t InputDataFormat; /*!< This parameter is a value of @ref CRC_Input_Buffer_Format and specifies input data format.
Can be either Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error
@arg @ref CRC_INPUTDATA_FORMAT_BYTES input data is a stream of bytes (8-bit data) must occur if InputBufferFormat is not one of the three values listed above */
@arg @ref CRC_INPUTDATA_FORMAT_HALFWORDS input data is a stream of half-words (16-bit data) } CRC_HandleTypeDef;
@arg @ref CRC_INPUTDATA_FORMAT_WORDS input data is a stream of words (32-bit data) /**
* @}
Note that constant CRC_INPUT_FORMAT_UNDEFINED is defined but an initialization error */
must occur if InputBufferFormat is not one of the three values listed above */
}CRC_HandleTypeDef; /* Exported constants --------------------------------------------------------*/
/** @defgroup CRC_Exported_Constants CRC Exported Constants
* @{
/** */
* @}
*/ /** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
* @{
/* Exported constants --------------------------------------------------------*/ */
/** @defgroup CRC_Exported_Constants CRC Exported Constants #define DEFAULT_CRC32_POLY 0x04C11DB7U /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */
* @{ /**
*/ * @}
*/
/** @defgroup CRC_Default_Polynomial_Value Default CRC generating polynomial
* @{ /** @defgroup CRC_Default_InitValue Default CRC computation initialization value
*/ * @{
#define DEFAULT_CRC32_POLY 0x04C11DB7U /*!< X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2+ X +1 */ */
/** #define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Initial CRC default value */
* @} /**
*/ * @}
*/
/** @defgroup CRC_Default_InitValue Default CRC computation initialization value
* @{ /** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used
*/ * @{
#define DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Initial CRC default value */ */
/** #define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) /*!< Enable default generating polynomial 0x04C11DB7 */
* @} #define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) /*!< Disable default generating polynomial 0x04C11DB7 */
*/ /**
* @}
/** @defgroup CRC_Default_Polynomial Indicates whether or not default polynomial is used */
* @{
*/ /** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used
#define DEFAULT_POLYNOMIAL_ENABLE ((uint8_t)0x00U) /*!< Enable default generating polynomial 0x04C11DB7 */ * @{
#define DEFAULT_POLYNOMIAL_DISABLE ((uint8_t)0x01U) /*!< Disable default generating polynomial 0x04C11DB7 */ */
/** #define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) /*!< Enable initial CRC default value */
* @} #define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) /*!< Disable initial CRC default value */
*/ /**
* @}
/** @defgroup CRC_Default_InitValue_Use Indicates whether or not default init value is used */
* @{
*/ /** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP
#define DEFAULT_INIT_VALUE_ENABLE ((uint8_t)0x00U) /*!< Enable initial CRC default value */ * @{
#define DEFAULT_INIT_VALUE_DISABLE ((uint8_t)0x01U) /*!< Disable initial CRC default value */ */
/** #define CRC_POLYLENGTH_32B 0x00000000U /*!< Resort to a 32-bit long generating polynomial */
* @} #define CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< Resort to a 16-bit long generating polynomial */
*/ #define CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< Resort to a 8-bit long generating polynomial */
#define CRC_POLYLENGTH_7B CRC_CR_POLYSIZE /*!< Resort to a 7-bit long generating polynomial */
/** @defgroup CRC_Polynomial_Sizes Polynomial sizes to configure the IP /**
* @{ * @}
*/ */
#define CRC_POLYLENGTH_32B (0x00000000U) /*!< Resort to a 32-bit long generating polynomial */
#define CRC_POLYLENGTH_16B (CRC_CR_POLYSIZE_0) /*!< Resort to a 16-bit long generating polynomial */ /** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions
#define CRC_POLYLENGTH_8B (CRC_CR_POLYSIZE_1) /*!< Resort to a 8-bit long generating polynomial */ * @{
#define CRC_POLYLENGTH_7B (CRC_CR_POLYSIZE) /*!< Resort to a 7-bit long generating polynomial */ */
/** #define HAL_CRC_LENGTH_32B 32U /*!< 32-bit long CRC */
* @} #define HAL_CRC_LENGTH_16B 16U /*!< 16-bit long CRC */
*/ #define HAL_CRC_LENGTH_8B 8U /*!< 8-bit long CRC */
#define HAL_CRC_LENGTH_7B 7U /*!< 7-bit long CRC */
/** @defgroup CRC_Polynomial_Size_Definitions CRC polynomial possible sizes actual definitions /**
* @{ * @}
*/ */
#define HAL_CRC_LENGTH_32B 32U /*!< 32-bit long CRC */
#define HAL_CRC_LENGTH_16B 16U /*!< 16-bit long CRC */ /** @defgroup CRC_Input_Buffer_Format Input Buffer Format
#define HAL_CRC_LENGTH_8B 8U /*!< 8-bit long CRC */ * @{
#define HAL_CRC_LENGTH_7B 7U /*!< 7-bit long CRC */ */
/** /* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but
* @} * an error is triggered in HAL_CRC_Init() if InputDataFormat field is set
*/ * to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for
* the CRC APIs to provide a correct result */
/** @defgroup CRC_Input_Buffer_Format Input Buffer Format #define CRC_INPUTDATA_FORMAT_UNDEFINED 0x00000000U /*!< Undefined input data format */
* @{ #define CRC_INPUTDATA_FORMAT_BYTES 0x00000001U /*!< Input data in byte format */
*/ #define CRC_INPUTDATA_FORMAT_HALFWORDS 0x00000002U /*!< Input data in half-word format */
/* WARNING: CRC_INPUT_FORMAT_UNDEFINED is created for reference purposes but #define CRC_INPUTDATA_FORMAT_WORDS 0x00000003U /*!< Input data in word format */
* an error is triggered in HAL_CRC_Init() if InputDataFormat field is set /**
* to CRC_INPUT_FORMAT_UNDEFINED: the format MUST be defined by the user for * @}
* the CRC APIs to provide a correct result */ */
#define CRC_INPUTDATA_FORMAT_UNDEFINED 0x00000000U /*!< Undefined input data format */
#define CRC_INPUTDATA_FORMAT_BYTES 0x00000001U /*!< Input data in byte format */ /** @defgroup CRC_Aliases CRC API aliases
#define CRC_INPUTDATA_FORMAT_HALFWORDS 0x00000002U /*!< Input data in half-word format */ * @{
#define CRC_INPUTDATA_FORMAT_WORDS 0x00000003U /*!< Input data in word format */ */
/** #define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */
* @} #define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */
*/ /**
* @}
/** @defgroup CRC_Aliases CRC API aliases */
* @{
*/ /**
#define HAL_CRC_Input_Data_Reverse HAL_CRCEx_Input_Data_Reverse /*!< Aliased to HAL_CRCEx_Input_Data_Reverse for inter STM32 series compatibility */ * @}
#define HAL_CRC_Output_Data_Reverse HAL_CRCEx_Output_Data_Reverse /*!< Aliased to HAL_CRCEx_Output_Data_Reverse for inter STM32 series compatibility */ */
/**
* @} /* Exported macros -----------------------------------------------------------*/
*/ /** @defgroup CRC_Exported_Macros CRC Exported Macros
* @{
/** */
* @}
*/ /** @brief Reset CRC handle state.
* @param __HANDLE__ CRC handle.
* @retval None
/* Exported macros -----------------------------------------------------------*/ */
/** @defgroup CRC_Exported_Macros CRC Exported Macros #define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
* @{
*/ /**
* @brief Reset CRC Data Register.
/** @brief Reset CRC handle state. * @param __HANDLE__ CRC handle
* @param __HANDLE__: CRC handle. * @retval None
* @retval None */
*/ #define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET)
#define __HAL_CRC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_CRC_STATE_RESET)
/**
/** * @brief Set CRC INIT non-default value
* @brief Reset CRC Data Register. * @param __HANDLE__ CRC handle
* @param __HANDLE__: CRC handle * @param __INIT__ 32-bit initial value
* @retval None * @retval None
*/ */
#define __HAL_CRC_DR_RESET(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_RESET) #define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__))
/** /**
* @brief Set CRC INIT non-default value * @brief Store data in the Independent Data (ID) register.
* @param __HANDLE__: CRC handle * @param __HANDLE__ CRC handle
* @param __INIT__: 32-bit initial value * @param __VALUE__ Value to be stored in the ID register
* @retval None * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
*/ * @retval None
#define __HAL_CRC_INITIALCRCVALUE_CONFIG(__HANDLE__, __INIT__) ((__HANDLE__)->Instance->INIT = (__INIT__)) */
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__)))
/**
* @brief Store a 8-bit data in the Independent Data(ID) register. /**
* @param __HANDLE__: CRC handle * @brief Return the data stored in the Independent Data (ID) register.
* @param __VALUE__: 8-bit value to be stored in the ID register * @param __HANDLE__ CRC handle
* @retval None * @note Refer to the Reference Manual to get the authorized __VALUE__ length in bits
*/ * @retval Value of the ID register
#define __HAL_CRC_SET_IDR(__HANDLE__, __VALUE__) (WRITE_REG((__HANDLE__)->Instance->IDR, (__VALUE__))) */
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR)
/** /**
* @brief Return the 8-bit data stored in the Independent Data(ID) register. * @}
* @param __HANDLE__: CRC handle */
* @retval 8-bit value of the ID register
*/
#define __HAL_CRC_GET_IDR(__HANDLE__) (((__HANDLE__)->Instance->IDR) & CRC_IDR_IDR) /* Private macros --------------------------------------------------------*/
/** /** @defgroup CRC_Private_Macros CRC Private Macros
* @} * @{
*/ */
#define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
/* Private macros --------------------------------------------------------*/ ((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE))
/** @addtogroup CRC_Private_Macros CRC Private Macros
* @{
*/ #define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \
((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
#define IS_DEFAULT_POLYNOMIAL(DEFAULT) (((DEFAULT) == DEFAULT_POLYNOMIAL_ENABLE) || \
((DEFAULT) == DEFAULT_POLYNOMIAL_DISABLE)) #define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \
((LENGTH) == CRC_POLYLENGTH_16B) || \
((LENGTH) == CRC_POLYLENGTH_8B) || \
#define IS_DEFAULT_INIT_VALUE(VALUE) (((VALUE) == DEFAULT_INIT_VALUE_ENABLE) || \ ((LENGTH) == CRC_POLYLENGTH_7B))
((VALUE) == DEFAULT_INIT_VALUE_DISABLE))
#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \
#define IS_CRC_POL_LENGTH(LENGTH) (((LENGTH) == CRC_POLYLENGTH_32B) || \ ((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
((LENGTH) == CRC_POLYLENGTH_16B) || \ ((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS))
((LENGTH) == CRC_POLYLENGTH_8B) || \
((LENGTH) == CRC_POLYLENGTH_7B)) /**
* @}
#define IS_CRC_INPUTDATA_FORMAT(FORMAT) (((FORMAT) == CRC_INPUTDATA_FORMAT_BYTES) || \ */
((FORMAT) == CRC_INPUTDATA_FORMAT_HALFWORDS) || \
((FORMAT) == CRC_INPUTDATA_FORMAT_WORDS)) /* Include CRC HAL Extended module */
#include "stm32l4xx_hal_crc_ex.h"
/**
* @} /* Exported functions --------------------------------------------------------*/
*/ /** @defgroup CRC_Exported_Functions CRC Exported Functions
* @{
/* Include CRC HAL Extended module */ */
#include "stm32l4xx_hal_crc_ex.h"
/* Initialization and de-initialization functions ****************************/
/* Exported functions --------------------------------------------------------*/ /** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions
/** @defgroup CRC_Exported_Functions CRC Exported Functions * @{
* @{ */
*/ HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc);
HAL_StatusTypeDef HAL_CRC_DeInit(CRC_HandleTypeDef *hcrc);
/* Initialization and de-initialization functions ****************************/ void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc);
/** @defgroup CRC_Exported_Functions_Group1 Initialization and de-initialization functions void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc);
* @{ /**
*/ * @}
HAL_StatusTypeDef HAL_CRC_Init(CRC_HandleTypeDef *hcrc); */
HAL_StatusTypeDef HAL_CRC_DeInit (CRC_HandleTypeDef *hcrc);
void HAL_CRC_MspInit(CRC_HandleTypeDef *hcrc); /* Peripheral Control functions ***********************************************/
void HAL_CRC_MspDeInit(CRC_HandleTypeDef *hcrc); /** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions
/** * @{
* @} */
*/ uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength);
/* Peripheral Control functions ***********************************************/ /**
/** @defgroup CRC_Exported_Functions_Group2 Peripheral Control functions * @}
* @{ */
*/
uint32_t HAL_CRC_Accumulate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); /* Peripheral State and Error functions ***************************************/
uint32_t HAL_CRC_Calculate(CRC_HandleTypeDef *hcrc, uint32_t pBuffer[], uint32_t BufferLength); /** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions
/** * @{
* @} */
*/ HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc);
/**
/* Peripheral State and Error functions ***************************************/ * @}
/** @defgroup CRC_Exported_Functions_Group3 Peripheral State functions */
* @{
*/ /**
HAL_CRC_StateTypeDef HAL_CRC_GetState(CRC_HandleTypeDef *hcrc); * @}
/** */
* @}
*/ /**
* @}
/** */
* @}
*/ /**
* @}
/** */
* @}
*/ #ifdef __cplusplus
}
/** #endif
* @}
*/ #endif /* __STM32L4xx_HAL_CRC_H */
#ifdef __cplusplus /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
}
#endif
#endif /* __STM32L4xx_HAL_CRC_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -1,171 +1,169 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_crc_ex.h * @file stm32l4xx_hal_crc_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CRC HAL extended module. * @brief Header file of CRC HAL extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_CRC_EX_H #ifndef __STM32L4xx_HAL_CRC_EX_H
#define __STM32L4xx_HAL_CRC_EX_H #define __STM32L4xx_HAL_CRC_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup CRCEx /** @addtogroup CRCEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup CRCEx_Exported_Constants CRCEx Exported Constants /** @defgroup CRCEx_Exported_Constants CRC Extended Exported Constants
* @{ * @{
*/ */
/** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes /** @defgroup CRCEx_Input_Data_Inversion Input Data Inversion Modes
* @{ * @{
*/ */
#define CRC_INPUTDATA_INVERSION_NONE (0x00000000U) /*!< No input data inversion */ #define CRC_INPUTDATA_INVERSION_NONE 0x00000000U /*!< No input data inversion */
#define CRC_INPUTDATA_INVERSION_BYTE (CRC_CR_REV_IN_0) /*!< Byte-wise input data inversion */ #define CRC_INPUTDATA_INVERSION_BYTE CRC_CR_REV_IN_0 /*!< Byte-wise input data inversion */
#define CRC_INPUTDATA_INVERSION_HALFWORD (CRC_CR_REV_IN_1) /*!< HalfWord-wise input data inversion */ #define CRC_INPUTDATA_INVERSION_HALFWORD CRC_CR_REV_IN_1 /*!< HalfWord-wise input data inversion */
#define CRC_INPUTDATA_INVERSION_WORD (CRC_CR_REV_IN) /*!< Word-wise input data inversion */ #define CRC_INPUTDATA_INVERSION_WORD CRC_CR_REV_IN /*!< Word-wise input data inversion */
/** /**
* @} * @}
*/ */
/** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes /** @defgroup CRCEx_Output_Data_Inversion Output Data Inversion Modes
* @{ * @{
*/ */
#define CRC_OUTPUTDATA_INVERSION_DISABLE (0x00000000U) /*!< No output data inversion */ #define CRC_OUTPUTDATA_INVERSION_DISABLE 0x00000000U /*!< No output data inversion */
#define CRC_OUTPUTDATA_INVERSION_ENABLE (CRC_CR_REV_OUT) /*!< Bit-wise output data inversion */ #define CRC_OUTPUTDATA_INVERSION_ENABLE CRC_CR_REV_OUT /*!< Bit-wise output data inversion */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup CRCEx_Exported_Macros CRCEx Exported Macros /** @defgroup CRCEx_Exported_Macros CRC Extended Exported Macros
* @{ * @{
*/ */
/** /**
* @brief Set CRC output reversal * @brief Set CRC output reversal
* @param __HANDLE__: CRC handle * @param __HANDLE__ CRC handle
* @retval None * @retval None
*/ */
#define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT) #define __HAL_CRC_OUTPUTREVERSAL_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= CRC_CR_REV_OUT)
/** /**
* @brief Unset CRC output reversal * @brief Unset CRC output reversal
* @param __HANDLE__: CRC handle * @param __HANDLE__ CRC handle
* @retval None * @retval None
*/ */
#define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT)) #define __HAL_CRC_OUTPUTREVERSAL_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~(CRC_CR_REV_OUT))
/** /**
* @brief Set CRC non-default polynomial * @brief Set CRC non-default polynomial
* @param __HANDLE__: CRC handle * @param __HANDLE__ CRC handle
* @param __POLYNOMIAL__: 7, 8, 16 or 32-bit polynomial * @param __POLYNOMIAL__ 7, 8, 16 or 32-bit polynomial
* @retval None * @retval None
*/ */
#define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__)) #define __HAL_CRC_POLYNOMIAL_CONFIG(__HANDLE__, __POLYNOMIAL__) ((__HANDLE__)->Instance->POL = (__POLYNOMIAL__))
/** /**
* @} * @}
*/ */
/* Private macros --------------------------------------------------------*/ /* Private macros --------------------------------------------------------*/
/** @addtogroup CRCEx_Private_Macros CRCEx Private Macros /** @defgroup CRCEx_Private_Macros CRC Extended Private Macros
* @{ * @{
*/ */
#define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \ #define IS_CRC_INPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_INPUTDATA_INVERSION_NONE) || \
((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \ ((MODE) == CRC_INPUTDATA_INVERSION_BYTE) || \
((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \ ((MODE) == CRC_INPUTDATA_INVERSION_HALFWORD) || \
((MODE) == CRC_INPUTDATA_INVERSION_WORD)) ((MODE) == CRC_INPUTDATA_INVERSION_WORD))
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \
#define IS_CRC_OUTPUTDATA_INVERSION_MODE(MODE) (((MODE) == CRC_OUTPUTDATA_INVERSION_DISABLE) || \ ((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE))
((MODE) == CRC_OUTPUTDATA_INVERSION_ENABLE))
/**
/** * @}
* @} */
*/
/* Exported functions --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup CRCEx_Exported_Functions
/** @addtogroup CRCEx_Exported_Functions CRC Extended Exported Functions * @{
* @{ */
*/
/** @addtogroup CRCEx_Exported_Functions_Group1
/** @addtogroup CRCEx_Exported_Functions_Group1 Extended Initialization/de-initialization functions * @{
* @{ */
*/ /* Initialization and de-initialization functions ****************************/
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength);
/* Initialization and de-initialization functions ****************************/ HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
HAL_StatusTypeDef HAL_CRCEx_Polynomial_Set(CRC_HandleTypeDef *hcrc, uint32_t Pol, uint32_t PolyLength); HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode);
HAL_StatusTypeDef HAL_CRCEx_Input_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t InputReverseMode);
HAL_StatusTypeDef HAL_CRCEx_Output_Data_Reverse(CRC_HandleTypeDef *hcrc, uint32_t OutputReverseMode); /**
* @}
/** */
* @}
*/ /**
* @}
/** */
* @}
*/ /**
* @}
/** */
* @}
*/ /**
* @}
/** */
* @}
*/ #ifdef __cplusplus
}
#ifdef __cplusplus #endif
}
#endif #endif /* __STM32L4xx_HAL_CRC_EX_H */
#endif /* __STM32L4xx_HAL_CRC_EX_H */ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -1,146 +1,145 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_cryp_ex.h * @file stm32l4xx_hal_cryp_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CRYPEx HAL module. * @brief Header file of CRYPEx HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_CRYP_EX_H #ifndef __STM32L4xx_HAL_CRYP_EX_H
#define __STM32L4xx_HAL_CRYP_EX_H #define __STM32L4xx_HAL_CRYP_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L462xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L4A6xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) #if defined(AES)
/* Includes ------------------------------------------------------------------*/
/* Includes ------------------------------------------------------------------*/ #include "stm32l4xx_hal_def.h"
#include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver
/** @addtogroup STM32L4xx_HAL_Driver * @{
* @{ */
*/
/** @addtogroup CRYPEx
/** @addtogroup CRYPEx * @{
* @{ */
*/
/* Exported types ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup CRYPEx_Exported_Functions
/** @addtogroup CRYPEx_Exported_Functions * @{
* @{ */
*/
/** @addtogroup CRYPEx_Exported_Functions_Group1
/** @addtogroup CRYPEx_Exported_Functions_Group1 * @{
* @{ */
*/
/* CallBack functions ********************************************************/
/* CallBack functions ********************************************************/ void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp);
void HAL_CRYPEx_ComputationCpltCallback(CRYP_HandleTypeDef *hcryp);
/**
/** * @}
* @} */
*/
/** @addtogroup CRYPEx_Exported_Functions_Group2
/** @addtogroup CRYPEx_Exported_Functions_Group2 * @{
* @{ */
*/
/* AES encryption/decryption processing functions ****************************/
/* AES encryption/decryption processing functions ****************************/ HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout);
HAL_StatusTypeDef HAL_CRYPEx_AES(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData, uint32_t Timeout); HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData);
HAL_StatusTypeDef HAL_CRYPEx_AES_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData); HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData);
HAL_StatusTypeDef HAL_CRYPEx_AES_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint16_t Size, uint8_t *pOutputData);
/* AES encryption/decryption/authentication processing functions *************/
/* AES encryption/decryption/authentication processing functions *************/ HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData, uint32_t Timeout);
HAL_StatusTypeDef HAL_CRYPEx_AES_Auth(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData, uint32_t Timeout); HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData);
HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData); HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData);
HAL_StatusTypeDef HAL_CRYPEx_AES_Auth_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pInputData, uint64_t Size, uint8_t *pOutputData);
/**
/** * @}
* @} */
*/
/** @addtogroup CRYPEx_Exported_Functions_Group3
/** @addtogroup CRYPEx_Exported_Functions_Group3 * @{
* @{ */
*/
/* AES suspension/resumption functions ***************************************/
/* AES suspension/resumption functions ***************************************/ void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output);
void HAL_CRYPEx_Read_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output); void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input);
void HAL_CRYPEx_Write_IVRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input); void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output);
void HAL_CRYPEx_Read_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output); void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input);
void HAL_CRYPEx_Write_SuspendRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input); void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t KeySize);
void HAL_CRYPEx_Read_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Output, uint32_t KeySize); void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize);
void HAL_CRYPEx_Write_KeyRegisters(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint32_t KeySize); void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output);
void HAL_CRYPEx_Read_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Output); void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input);
void HAL_CRYPEx_Write_ControlRegister(CRYP_HandleTypeDef *hcryp, uint8_t* Input); void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp);
void HAL_CRYPEx_ProcessSuspend(CRYP_HandleTypeDef *hcryp);
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/* Private functions -----------------------------------------------------------*/
/* Private functions -----------------------------------------------------------*/ /** @addtogroup CRYPEx_Private_Functions CRYPEx Private Functions
/** @addtogroup CRYPEx_Private_Functions CRYPEx Private Functions * @{
* @{ */
*/ HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp);
HAL_StatusTypeDef CRYP_AES_Auth_IT(CRYP_HandleTypeDef *hcryp);
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
#endif /* AES */
#endif /* defined (STM32L442xx) || defined (STM32L443xx) || defined (STM32L462xx) || defined(STM32L485xx) || defined(STM32L486xx) || defined(STM32L4A6xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) */
#ifdef __cplusplus
#ifdef __cplusplus }
} #endif
#endif
#endif /* __STM32L4xx_HAL_CRYP_EX_H */
#endif /* __STM32L4xx_HAL_CRYP_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_dac_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_dac_ex.h * @file stm32l4xx_hal_dac_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of DAC HAL Extended module. * @brief Header file of DAC HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_DAC_EX_H #ifndef __STM32L4xx_HAL_DAC_EX_H
#define __STM32L4xx_HAL_DAC_EX_H #define __STM32L4xx_HAL_DAC_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup DACEx /** @addtogroup DACEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** /**
* @brief HAL State structures definition * @brief HAL State structures definition
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup DACEx_Exported_Constants DACEx Exported Constants /** @defgroup DACEx_Exported_Constants DACEx Exported Constants
* @{ * @{
*/ */
/** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangle amplitude /** @defgroup DACEx_lfsrunmask_triangleamplitude DACEx lfsrunmask triangle amplitude
* @{ * @{
*/ */
#define DAC_LFSRUNMASK_BIT0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */ #define DAC_LFSRUNMASK_BIT0 ((uint32_t)0x00000000) /*!< Unmask DAC channel LFSR bit0 for noise wave generation */
#define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS1_0 ((uint32_t)DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[1:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS2_0 ((uint32_t)DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[2:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS3_0 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0)/*!< Unmask DAC channel LFSR bit[3:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS4_0 ((uint32_t)DAC_CR_MAMP1_2) /*!< Unmask DAC channel LFSR bit[4:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS5_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[5:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS6_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[6:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS7_0 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[7:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS8_0 ((uint32_t)DAC_CR_MAMP1_3) /*!< Unmask DAC channel LFSR bit[8:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS9_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[9:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS10_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Unmask DAC channel LFSR bit[10:0] for noise wave generation */
#define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */ #define DAC_LFSRUNMASK_BITS11_0 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Unmask DAC channel LFSR bit[11:0] for noise wave generation */
#define DAC_TRIANGLEAMPLITUDE_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */ #define DAC_TRIANGLEAMPLITUDE_1 ((uint32_t)0x00000000) /*!< Select max triangle amplitude of 1 */
#define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */ #define DAC_TRIANGLEAMPLITUDE_3 ((uint32_t)DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 3 */
#define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */ #define DAC_TRIANGLEAMPLITUDE_7 ((uint32_t)DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 7 */
#define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */ #define DAC_TRIANGLEAMPLITUDE_15 ((uint32_t)DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 15 */
#define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */ #define DAC_TRIANGLEAMPLITUDE_31 ((uint32_t)DAC_CR_MAMP1_2) /*!< Select max triangle amplitude of 31 */
#define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */ #define DAC_TRIANGLEAMPLITUDE_63 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 63 */
#define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */ #define DAC_TRIANGLEAMPLITUDE_127 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 127 */
#define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */ #define DAC_TRIANGLEAMPLITUDE_255 ((uint32_t)DAC_CR_MAMP1_2 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 255 */
#define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */ #define DAC_TRIANGLEAMPLITUDE_511 ((uint32_t)DAC_CR_MAMP1_3) /*!< Select max triangle amplitude of 511 */
#define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */ #define DAC_TRIANGLEAMPLITUDE_1023 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 1023 */
#define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */ #define DAC_TRIANGLEAMPLITUDE_2047 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1) /*!< Select max triangle amplitude of 2047 */
#define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */ #define DAC_TRIANGLEAMPLITUDE_4095 ((uint32_t)DAC_CR_MAMP1_3 | DAC_CR_MAMP1_1 | DAC_CR_MAMP1_0) /*!< Select max triangle amplitude of 4095 */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Private macro -------------------------------------------------------------*/ /* Private macro -------------------------------------------------------------*/
/** @defgroup DACEx_Private_Macros DACEx Private Macros /** @defgroup DACEx_Private_Macros DACEx Private Macros
* @{ * @{
*/ */
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx)
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) #if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
#endif /* STM32L451xx STM32L452xx STM32L462xx */ #endif /* STM32L451xx STM32L452xx STM32L462xx */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx)
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
#endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
#define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \ #define IS_DAC_TRIGGER(TRIGGER) (((TRIGGER) == DAC_TRIGGER_NONE) || \
((TRIGGER) == DAC_TRIGGER_T1_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T1_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T2_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T4_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T5_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T6_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T7_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T8_TRGO) || \
((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \ ((TRIGGER) == DAC_TRIGGER_T15_TRGO) || \
((TRIGGER) == DAC_TRIGGER_LPTIM1_OUT) || \ ((TRIGGER) == DAC_TRIGGER_LPTIM1_OUT) || \
((TRIGGER) == DAC_TRIGGER_LPTIM2_OUT) || \ ((TRIGGER) == DAC_TRIGGER_LPTIM2_OUT) || \
((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \ ((TRIGGER) == DAC_TRIGGER_EXT_IT9) || \
((TRIGGER) == DAC_TRIGGER_SOFTWARE)) ((TRIGGER) == DAC_TRIGGER_SOFTWARE))
#define IS_DAC_HIGH_FREQUENCY_MODE(MODE) (((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE) || \ #define IS_DAC_HIGH_FREQUENCY_MODE(MODE) (((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE) || \
((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ) || \ ((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ) || \
((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC)) ((MODE) == DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC))
#endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ #endif /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
#define IS_DAC_SAMPLETIME(TIME) ((TIME) <= 0x000003FF) #define IS_DAC_SAMPLETIME(TIME) ((TIME) <= 0x000003FF)
#define IS_DAC_HOLDTIME(TIME) ((TIME) <= 0x000003FF) #define IS_DAC_HOLDTIME(TIME) ((TIME) <= 0x000003FF)
#define IS_DAC_SAMPLEANDHOLD(MODE) (((MODE) == DAC_SAMPLEANDHOLD_DISABLE) || \ #define IS_DAC_SAMPLEANDHOLD(MODE) (((MODE) == DAC_SAMPLEANDHOLD_DISABLE) || \
((MODE) == DAC_SAMPLEANDHOLD_ENABLE)) ((MODE) == DAC_SAMPLEANDHOLD_ENABLE))
#define IS_DAC_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F) #define IS_DAC_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F)
#define IS_DAC_NEWTRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F) #define IS_DAC_NEWTRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F)
#define IS_DAC_CHIP_CONNECTION(CONNECT) (((CONNECT) == DAC_CHIPCONNECT_DISABLE) || \ #define IS_DAC_CHIP_CONNECTION(CONNECT) (((CONNECT) == DAC_CHIPCONNECT_DISABLE) || \
((CONNECT) == DAC_CHIPCONNECT_ENABLE)) ((CONNECT) == DAC_CHIPCONNECT_ENABLE))
#define IS_DAC_TRIMMING(TRIMMING) (((TRIMMING) == DAC_TRIMMING_FACTORY) || \ #define IS_DAC_TRIMMING(TRIMMING) (((TRIMMING) == DAC_TRIMMING_FACTORY) || \
((TRIMMING) == DAC_TRIMMING_USER)) ((TRIMMING) == DAC_TRIMMING_USER))
#define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \ #define IS_DAC_LFSR_UNMASK_TRIANGLE_AMPLITUDE(VALUE) (((VALUE) == DAC_LFSRUNMASK_BIT0) || \
((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS1_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS2_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS3_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS4_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS5_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS6_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS7_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS8_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS9_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS10_0) || \
((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \ ((VALUE) == DAC_LFSRUNMASK_BITS11_0) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_1) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_3) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_7) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_15) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_31) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_63) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_127) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_255) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_511) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_1023) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \ ((VALUE) == DAC_TRIANGLEAMPLITUDE_2047) || \
((VALUE) == DAC_TRIANGLEAMPLITUDE_4095)) ((VALUE) == DAC_TRIANGLEAMPLITUDE_4095))
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/* Extended features functions ***********************************************/ /* Extended features functions ***********************************************/
/** @addtogroup DACEx_Exported_Functions /** @addtogroup DACEx_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup DACEx_Exported_Functions_Group2 /** @addtogroup DACEx_Exported_Functions_Group2
* @{ * @{
*/ */
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); HAL_StatusTypeDef HAL_DACEx_TriangleWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude);
HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude); HAL_StatusTypeDef HAL_DACEx_NoiseWaveGenerate(DAC_HandleTypeDef* hdac, uint32_t Channel, uint32_t Amplitude);
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2); HAL_StatusTypeDef HAL_DACEx_DualSetValue(DAC_HandleTypeDef* hdac, uint32_t Alignment, uint32_t Data1, uint32_t Data2);
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
/* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
/* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac); void HAL_DACEx_ConvCpltCallbackCh2(DAC_HandleTypeDef* hdac);
void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac); void HAL_DACEx_ConvHalfCpltCallbackCh2(DAC_HandleTypeDef* hdac);
void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac); void HAL_DACEx_ErrorCallbackCh2(DAC_HandleTypeDef* hdac);
void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac); void HAL_DACEx_DMAUnderrunCallbackCh2(DAC_HandleTypeDef* hdac);
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
/* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
/* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
HAL_StatusTypeDef HAL_DACEx_SelfCalibrate (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel); HAL_StatusTypeDef HAL_DACEx_SelfCalibrate (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel);
HAL_StatusTypeDef HAL_DACEx_SetUserTrimming (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel, uint32_t NewTrimmingValue); HAL_StatusTypeDef HAL_DACEx_SetUserTrimming (DAC_HandleTypeDef* hdac, DAC_ChannelConfTypeDef* sConfig, uint32_t Channel, uint32_t NewTrimmingValue);
/** /**
* @} * @}
*/ */
/** @addtogroup DACEx_Exported_Functions_Group3 /** @addtogroup DACEx_Exported_Functions_Group3
* @{ * @{
*/ */
/* Peripheral Control functions ***********************************************/ /* Peripheral Control functions ***********************************************/
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac); uint32_t HAL_DACEx_DualGetValue(DAC_HandleTypeDef* hdac);
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
/* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
/* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
uint32_t HAL_DACEx_GetTrimOffset (DAC_HandleTypeDef *hdac, uint32_t Channel); uint32_t HAL_DACEx_GetTrimOffset (DAC_HandleTypeDef *hdac, uint32_t Channel);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ #if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \ defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
/** @addtogroup DACEx_Private_Functions /** @addtogroup DACEx_Private_Functions
* @{ * @{
*/ */
/* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */ /* DAC_DMAConvCpltCh2 / DAC_DMAErrorCh2 / DAC_DMAHalfConvCpltCh2 */
/* are called by HAL_DAC_Start_DMA */ /* are called by HAL_DAC_Start_DMA */
void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma); void DAC_DMAConvCpltCh2(DMA_HandleTypeDef *hdma);
void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma); void DAC_DMAErrorCh2(DMA_HandleTypeDef *hdma);
void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma); void DAC_DMAHalfConvCpltCh2(DMA_HandleTypeDef *hdma);
/** /**
* @} * @}
*/ */
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
/* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */ /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx STM32L496xx STM32L4A6xx */
/* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /*__STM32L4xx_HAL_DAC_EX_H */ #endif /*__STM32L4xx_HAL_DAC_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -1,213 +1,213 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_def.h * @file stm32l4xx_hal_def.h
* @author MCD Application Team * @author MCD Application Team
* @brief This file contains HAL common defines, enumeration, macros and * @brief This file contains HAL common defines, enumeration, macros and
* structures definitions. * structures definitions.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_DEF #ifndef __STM32L4xx_HAL_DEF
#define __STM32L4xx_HAL_DEF #define __STM32L4xx_HAL_DEF
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h" #include "stm32l4xx.h"
#include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */ #include "Legacy/stm32_hal_legacy.h" /* Aliases file for old names compatibility */
#include <stdio.h> #include <stdio.h>
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** /**
* @brief HAL Status structures definition * @brief HAL Status structures definition
*/ */
typedef enum typedef enum
{ {
HAL_OK = 0x00, HAL_OK = 0x00,
HAL_ERROR = 0x01, HAL_ERROR = 0x01,
HAL_BUSY = 0x02, HAL_BUSY = 0x02,
HAL_TIMEOUT = 0x03 HAL_TIMEOUT = 0x03
} HAL_StatusTypeDef; } HAL_StatusTypeDef;
/** /**
* @brief HAL Lock structures definition * @brief HAL Lock structures definition
*/ */
typedef enum typedef enum
{ {
HAL_UNLOCKED = 0x00, HAL_UNLOCKED = 0x00,
HAL_LOCKED = 0x01 HAL_LOCKED = 0x01
} HAL_LockTypeDef; } HAL_LockTypeDef;
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
#define HAL_MAX_DELAY 0xFFFFFFFFU #define UNUSED(X) (void)X /* To avoid gcc/g++ warnings */
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT)) #define HAL_MAX_DELAY 0xFFFFFFFFU
#define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == RESET)
#define HAL_IS_BIT_SET(REG, BIT) (((REG) & (BIT)) == (BIT))
#define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \ #define HAL_IS_BIT_CLR(REG, BIT) (((REG) & (BIT)) == 0U)
do{ \
(__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \ #define __HAL_LINKDMA(__HANDLE__, __PPP_DMA_FIELD__, __DMA_HANDLE__) \
(__DMA_HANDLE__).Parent = (__HANDLE__); \ do{ \
} while(0) (__HANDLE__)->__PPP_DMA_FIELD__ = &(__DMA_HANDLE__); \
(__DMA_HANDLE__).Parent = (__HANDLE__); \
#define UNUSED(x) ((void)(x)) } while(0)
/** @brief Reset the Handle's State field. /** @brief Reset the Handle's State field.
* @param __HANDLE__: specifies the Peripheral Handle. * @param __HANDLE__: specifies the Peripheral Handle.
* @note This macro can be used for the following purpose: * @note This macro can be used for the following purpose:
* - When the Handle is declared as local variable; before passing it as parameter * - When the Handle is declared as local variable; before passing it as parameter
* to HAL_PPP_Init() for the first time, it is mandatory to use this macro * to HAL_PPP_Init() for the first time, it is mandatory to use this macro
* to set to 0 the Handle's "State" field. * to set to 0 the Handle's "State" field.
* Otherwise, "State" field may have any random value and the first time the function * Otherwise, "State" field may have any random value and the first time the function
* HAL_PPP_Init() is called, the low level hardware initialization will be missed * HAL_PPP_Init() is called, the low level hardware initialization will be missed
* (i.e. HAL_PPP_MspInit() will not be executed). * (i.e. HAL_PPP_MspInit() will not be executed).
* - When there is a need to reconfigure the low level hardware: instead of calling * - When there is a need to reconfigure the low level hardware: instead of calling
* HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init(). * HAL_PPP_DeInit() then HAL_PPP_Init(), user can make a call to this macro then HAL_PPP_Init().
* In this later function, when the Handle's "State" field is set to 0, it will execute the function * In this later function, when the Handle's "State" field is set to 0, it will execute the function
* HAL_PPP_MspInit() which will reconfigure the low level hardware. * HAL_PPP_MspInit() which will reconfigure the low level hardware.
* @retval None * @retval None
*/ */
#define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0) #define __HAL_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = 0)
#if (USE_RTOS == 1) #if (USE_RTOS == 1)
/* Reserved for future use */ /* Reserved for future use */
#error " USE_RTOS should be 0 in the current HAL release " #error " USE_RTOS should be 0 in the current HAL release "
#else #else
#define __HAL_LOCK(__HANDLE__) \ #define __HAL_LOCK(__HANDLE__) \
do{ \ do{ \
if((__HANDLE__)->Lock == HAL_LOCKED) \ if((__HANDLE__)->Lock == HAL_LOCKED) \
{ \ { \
return HAL_BUSY; \ return HAL_BUSY; \
} \ } \
else \ else \
{ \ { \
(__HANDLE__)->Lock = HAL_LOCKED; \ (__HANDLE__)->Lock = HAL_LOCKED; \
} \ } \
}while (0) }while (0)
#define __HAL_UNLOCK(__HANDLE__) \ #define __HAL_UNLOCK(__HANDLE__) \
do{ \ do{ \
(__HANDLE__)->Lock = HAL_UNLOCKED; \ (__HANDLE__)->Lock = HAL_UNLOCKED; \
}while (0) }while (0)
#endif /* USE_RTOS */ #endif /* USE_RTOS */
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __weak #ifndef __weak
#define __weak __attribute__((weak)) #define __weak __attribute__((weak))
#endif /* __weak */ #endif /* __weak */
#ifndef __packed #ifndef __packed
#define __packed __attribute__((__packed__)) #define __packed __attribute__((__packed__))
#endif /* __packed */ #endif /* __packed */
#endif /* __GNUC__ */ #endif /* __GNUC__ */
/* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */ /* Macro to get variable aligned on 4-bytes, for __ICCARM__ the directive "#pragma data_alignment=4" must be used instead */
#if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */ #if defined ( __GNUC__ ) && !defined (__CC_ARM) /* GNU Compiler */
#ifndef __ALIGN_END #ifndef __ALIGN_END
#define __ALIGN_END __attribute__ ((aligned (4))) #define __ALIGN_END __attribute__ ((aligned (4)))
#endif /* __ALIGN_END */ #endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN #ifndef __ALIGN_BEGIN
#define __ALIGN_BEGIN #define __ALIGN_BEGIN
#endif /* __ALIGN_BEGIN */ #endif /* __ALIGN_BEGIN */
#else #else
#ifndef __ALIGN_END #ifndef __ALIGN_END
#define __ALIGN_END #define __ALIGN_END
#endif /* __ALIGN_END */ #endif /* __ALIGN_END */
#ifndef __ALIGN_BEGIN #ifndef __ALIGN_BEGIN
#if defined (__CC_ARM) /* ARM Compiler */ #if defined (__CC_ARM) /* ARM Compiler */
#define __ALIGN_BEGIN __align(4) #define __ALIGN_BEGIN __align(4)
#elif defined (__ICCARM__) /* IAR Compiler */ #elif defined (__ICCARM__) /* IAR Compiler */
#define __ALIGN_BEGIN #define __ALIGN_BEGIN
#endif /* __CC_ARM */ #endif /* __CC_ARM */
#endif /* __ALIGN_BEGIN */ #endif /* __ALIGN_BEGIN */
#endif /* __GNUC__ */ #endif /* __GNUC__ */
/** /**
* @brief __RAM_FUNC definition * @brief __RAM_FUNC definition
*/ */
#if defined ( __CC_ARM ) #if defined ( __CC_ARM )
/* ARM Compiler /* ARM Compiler
------------ ------------
RAM functions are defined using the toolchain options. RAM functions are defined using the toolchain options.
Functions that are executed in RAM should reside in a separate source module. Functions that are executed in RAM should reside in a separate source module.
Using the 'Options for File' dialog you can simply change the 'Code / Const' Using the 'Options for File' dialog you can simply change the 'Code / Const'
area of a module to a memory space in physical RAM. area of a module to a memory space in physical RAM.
Available memory areas are declared in the 'Target' tab of the 'Options for Target' Available memory areas are declared in the 'Target' tab of the 'Options for Target'
dialog. dialog.
*/ */
#define __RAM_FUNC HAL_StatusTypeDef #define __RAM_FUNC HAL_StatusTypeDef
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
/* ICCARM Compiler /* ICCARM Compiler
--------------- ---------------
RAM functions are defined using a specific toolchain keyword "__ramfunc". RAM functions are defined using a specific toolchain keyword "__ramfunc".
*/ */
#define __RAM_FUNC __ramfunc HAL_StatusTypeDef #define __RAM_FUNC __ramfunc HAL_StatusTypeDef
#elif defined ( __GNUC__ ) #elif defined ( __GNUC__ )
/* GNU Compiler /* GNU Compiler
------------ ------------
RAM functions are defined using a specific toolchain attribute RAM functions are defined using a specific toolchain attribute
"__attribute__((section(".RamFunc")))". "__attribute__((section(".RamFunc")))".
*/ */
#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) #define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc")))
#endif #endif
/** /**
* @brief __NOINLINE definition * @brief __NOINLINE definition
*/ */
#if defined ( __CC_ARM ) || defined ( __GNUC__ ) #if defined ( __CC_ARM ) || defined ( __GNUC__ )
/* ARM & GNUCompiler /* ARM & GNUCompiler
---------------- ----------------
*/ */
#define __NOINLINE __attribute__ ( (noinline) ) #define __NOINLINE __attribute__ ( (noinline) )
#elif defined ( __ICCARM__ ) #elif defined ( __ICCARM__ )
/* ICCARM Compiler /* ICCARM Compiler
--------------- ---------------
*/ */
#define __NOINLINE _Pragma("optimize = no_inline") #define __NOINLINE _Pragma("optimize = no_inline")
#endif #endif
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* ___STM32L4xx_HAL_DEF */ #endif /* ___STM32L4xx_HAL_DEF */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_dfsdm_ex.h * @file stm32l4xx_hal_dfsdm_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of DFSDM HAL extended module. * @brief Header file of DFSDM HAL extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_DFSDM_EX_H #ifndef STM32L4xx_HAL_DFSDM_EX_H
#define __STM32L4xx_HAL_DFSDM_EX_H #define STM32L4xx_HAL_DFSDM_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup DFSDMEx /** @addtogroup DFSDMEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup DFSDMEx_Exported_Functions DFSDM Extended Exported Functions /** @addtogroup DFSDMEx_Exported_Functions DFSDM Extended Exported Functions
* @{ * @{
*/ */
/** @addtogroup DFSDMEx_Exported_Functions_Group1_Channel Extended channel operation functions /** @addtogroup DFSDMEx_Exported_Functions_Group1_Channel Extended channel operation functions
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_DFDSMEx_ChannelSetPulsesSkipping(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t PulsesValue); HAL_StatusTypeDef HAL_DFDSMEx_ChannelSetPulsesSkipping(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t PulsesValue);
HAL_StatusTypeDef HAL_DFDSMEx_ChannelGetPulsesSkipping(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t* PulsesValue); HAL_StatusTypeDef HAL_DFDSMEx_ChannelGetPulsesSkipping(DFSDM_Channel_HandleTypeDef *hdfsdm_channel, uint32_t *PulsesValue);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @addtogroup DFSDMEx_Private_Macros DFSDM Extended Private Macros /** @addtogroup DFSDMEx_Private_Macros DFSDM Extended Private Macros
* @{ * @{
*/ */
#define IS_DFSDM_CHANNEL_SKIPPING_VALUE(VALUE) ((VALUE) < 64U) #define IS_DFSDM_CHANNEL_SKIPPING_VALUE(VALUE) ((VALUE) < 64U)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_DFSDM_EX_H */ #endif /* STM32L4xx_HAL_DFSDM_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_dma_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_dma_ex.h * @file stm32l4xx_hal_dma_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of DMA HAL extension module. * @brief Header file of DMA HAL extension module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_DMA_EX_H #ifndef __STM32L4xx_HAL_DMA_EX_H
#define __STM32L4xx_HAL_DMA_EX_H #define __STM32L4xx_HAL_DMA_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(DMAMUX1) #if defined(DMAMUX1)
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup DMAEx /** @addtogroup DMAEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup DMAEx_Exported_Types DMAEx Exported Types /** @defgroup DMAEx_Exported_Types DMAEx Exported Types
* @{ * @{
*/ */
/** /**
* @brief HAL DMA Synchro definition * @brief HAL DMA Synchro definition
*/ */
/** /**
* @brief HAL DMAMUX Synchronization configuration structure definition * @brief HAL DMAMUX Synchronization configuration structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode. uint32_t SyncSignalID; /*!< Specifies the synchronization signal gating the DMA request in periodic mode.
This parameter can be a value of @ref DMAEx_DMAMUX_SyncSignalID_selection */ This parameter can be a value of @ref DMAEx_DMAMUX_SyncSignalID_selection */
uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized. uint32_t SyncPolarity; /*!< Specifies the polarity of the signal on which the DMA request is synchronized.
This parameter can be a value of @ref DMAEx_DMAMUX_SyncPolarity_selection */ This parameter can be a value of @ref DMAEx_DMAMUX_SyncPolarity_selection */
FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled FunctionalState SyncEnable; /*!< Specifies if the synchronization shall be enabled or disabled
This parameter can take the value ENABLE or DISABLE*/ This parameter can take the value ENABLE or DISABLE*/
FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached. FunctionalState EventEnable; /*!< Specifies if an event shall be generated once the RequestNumber is reached.
This parameter can take the value ENABLE or DISABLE */ This parameter can take the value ENABLE or DISABLE */
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be authorized after a sync event
This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
}HAL_DMA_MuxSyncConfigTypeDef; }HAL_DMA_MuxSyncConfigTypeDef;
/** /**
* @brief HAL DMAMUX request generator parameters structure definition * @brief HAL DMAMUX request generator parameters structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator uint32_t SignalID; /*!< Specifies the ID of the signal used for DMAMUX request generator
This parameter can be a value of @ref DMAEx_DMAMUX_SignalGeneratorID_selection */ This parameter can be a value of @ref DMAEx_DMAMUX_SignalGeneratorID_selection */
uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated. uint32_t Polarity; /*!< Specifies the polarity of the signal on which the request is generated.
This parameter can be a value of @ref DMAEx_DMAMUX_RequestGeneneratorPolarity_selection */ This parameter can be a value of @ref DMAEx_DMAMUX_RequestGeneneratorPolarity_selection */
uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event uint32_t RequestNumber; /*!< Specifies the number of DMA request that will be generated after a signal event
This parameter must be a number between Min_Data = 1 and Max_Data = 32 */ This parameter must be a number between Min_Data = 1 and Max_Data = 32 */
}HAL_DMA_MuxRequestGeneratorConfigTypeDef; }HAL_DMA_MuxRequestGeneratorConfigTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup DMAEx_Exported_Constants DMAEx Exported Constants /** @defgroup DMAEx_Exported_Constants DMAEx Exported Constants
* @{ * @{
*/ */
/** @defgroup DMAEx_DMAMUX_SyncSignalID_selection DMAMUX SyncSignalID selection /** @defgroup DMAEx_DMAMUX_SyncSignalID_selection DMAMUX SyncSignalID selection
* @{ * @{
*/ */
#define HAL_DMAMUX1_SYNC_EXTI0 0U /*!< Synchronization Signal is EXTI0 IT */ #define HAL_DMAMUX1_SYNC_EXTI0 0U /*!< Synchronization Signal is EXTI0 IT */
#define HAL_DMAMUX1_SYNC_EXTI1 1U /*!< Synchronization Signal is EXTI1 IT */ #define HAL_DMAMUX1_SYNC_EXTI1 1U /*!< Synchronization Signal is EXTI1 IT */
#define HAL_DMAMUX1_SYNC_EXTI2 2U /*!< Synchronization Signal is EXTI2 IT */ #define HAL_DMAMUX1_SYNC_EXTI2 2U /*!< Synchronization Signal is EXTI2 IT */
#define HAL_DMAMUX1_SYNC_EXTI3 3U /*!< Synchronization Signal is EXTI3 IT */ #define HAL_DMAMUX1_SYNC_EXTI3 3U /*!< Synchronization Signal is EXTI3 IT */
#define HAL_DMAMUX1_SYNC_EXTI4 4U /*!< Synchronization Signal is EXTI4 IT */ #define HAL_DMAMUX1_SYNC_EXTI4 4U /*!< Synchronization Signal is EXTI4 IT */
#define HAL_DMAMUX1_SYNC_EXTI5 5U /*!< Synchronization Signal is EXTI5 IT */ #define HAL_DMAMUX1_SYNC_EXTI5 5U /*!< Synchronization Signal is EXTI5 IT */
#define HAL_DMAMUX1_SYNC_EXTI6 6U /*!< Synchronization Signal is EXTI6 IT */ #define HAL_DMAMUX1_SYNC_EXTI6 6U /*!< Synchronization Signal is EXTI6 IT */
#define HAL_DMAMUX1_SYNC_EXTI7 7U /*!< Synchronization Signal is EXTI7 IT */ #define HAL_DMAMUX1_SYNC_EXTI7 7U /*!< Synchronization Signal is EXTI7 IT */
#define HAL_DMAMUX1_SYNC_EXTI8 8U /*!< Synchronization Signal is EXTI8 IT */ #define HAL_DMAMUX1_SYNC_EXTI8 8U /*!< Synchronization Signal is EXTI8 IT */
#define HAL_DMAMUX1_SYNC_EXTI9 9U /*!< Synchronization Signal is EXTI9 IT */ #define HAL_DMAMUX1_SYNC_EXTI9 9U /*!< Synchronization Signal is EXTI9 IT */
#define HAL_DMAMUX1_SYNC_EXTI10 10U /*!< Synchronization Signal is EXTI10 IT */ #define HAL_DMAMUX1_SYNC_EXTI10 10U /*!< Synchronization Signal is EXTI10 IT */
#define HAL_DMAMUX1_SYNC_EXTI11 11U /*!< Synchronization Signal is EXTI11 IT */ #define HAL_DMAMUX1_SYNC_EXTI11 11U /*!< Synchronization Signal is EXTI11 IT */
#define HAL_DMAMUX1_SYNC_EXTI12 12U /*!< Synchronization Signal is EXTI12 IT */ #define HAL_DMAMUX1_SYNC_EXTI12 12U /*!< Synchronization Signal is EXTI12 IT */
#define HAL_DMAMUX1_SYNC_EXTI13 13U /*!< Synchronization Signal is EXTI13 IT */ #define HAL_DMAMUX1_SYNC_EXTI13 13U /*!< Synchronization Signal is EXTI13 IT */
#define HAL_DMAMUX1_SYNC_EXTI14 14U /*!< Synchronization Signal is EXTI14 IT */ #define HAL_DMAMUX1_SYNC_EXTI14 14U /*!< Synchronization Signal is EXTI14 IT */
#define HAL_DMAMUX1_SYNC_EXTI15 15U /*!< Synchronization Signal is EXTI15 IT */ #define HAL_DMAMUX1_SYNC_EXTI15 15U /*!< Synchronization Signal is EXTI15 IT */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 16U /*!< Synchronization Signal is DMAMUX1 Channel0 Event */ #define HAL_DMAMUX1_SYNC_DMAMUX1_CH0_EVT 16U /*!< Synchronization Signal is DMAMUX1 Channel0 Event */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 17U /*!< Synchronization Signal is DMAMUX1 Channel1 Event */ #define HAL_DMAMUX1_SYNC_DMAMUX1_CH1_EVT 17U /*!< Synchronization Signal is DMAMUX1 Channel1 Event */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 18U /*!< Synchronization Signal is DMAMUX1 Channel2 Event */ #define HAL_DMAMUX1_SYNC_DMAMUX1_CH2_EVT 18U /*!< Synchronization Signal is DMAMUX1 Channel2 Event */
#define HAL_DMAMUX1_SYNC_DMAMUX1_CH3_EVT 19U /*!< Synchronization Signal is DMAMUX1 Channel3 Event */ #define HAL_DMAMUX1_SYNC_DMAMUX1_CH3_EVT 19U /*!< Synchronization Signal is DMAMUX1 Channel3 Event */
#define HAL_DMAMUX1_SYNC_LPTIM1_OUT 20U /*!< Synchronization Signal is LPTIM1 OUT */ #define HAL_DMAMUX1_SYNC_LPTIM1_OUT 20U /*!< Synchronization Signal is LPTIM1 OUT */
#define HAL_DMAMUX1_SYNC_LPTIM2_OUT 21U /*!< Synchronization Signal is LPTIM2 OUT */ #define HAL_DMAMUX1_SYNC_LPTIM2_OUT 21U /*!< Synchronization Signal is LPTIM2 OUT */
#define HAL_DMAMUX1_SYNC_DSI_TE 22U /*!< Synchronization Signal is DSI Tearing Effect */ #define HAL_DMAMUX1_SYNC_DSI_TE 22U /*!< Synchronization Signal is DSI Tearing Effect */
#define HAL_DMAMUX1_SYNC_DSI_EOT 23U /*!< Synchronization Signal is DSI End of refresh */ #define HAL_DMAMUX1_SYNC_DSI_EOT 23U /*!< Synchronization Signal is DSI End of refresh */
#define HAL_DMAMUX1_SYNC_DMA2D_EOT 24U /*!< Synchronization Signal is DMA2D End of Transfer */ #define HAL_DMAMUX1_SYNC_DMA2D_EOT 24U /*!< Synchronization Signal is DMA2D End of Transfer */
#define HAL_DMAMUX1_SYNC_LDTC_IT 25U /*!< Synchronization Signal is LDTC IT */ #define HAL_DMAMUX1_SYNC_LDTC_IT 25U /*!< Synchronization Signal is LDTC IT */
/** /**
* @} * @}
*/ */
/** @defgroup DMAEx_DMAMUX_SyncPolarity_selection DMAMUX SyncPolarity selection /** @defgroup DMAEx_DMAMUX_SyncPolarity_selection DMAMUX SyncPolarity selection
* @{ * @{
*/ */
#define HAL_DMAMUX_SYNC_NO_EVENT 0U /*!< block synchronization events */ #define HAL_DMAMUX_SYNC_NO_EVENT 0U /*!< block synchronization events */
#define HAL_DMAMUX_SYNC_RISING ((uint32_t)DMAMUX_CxCR_SPOL_0) /*!< synchronize with rising edge events */ #define HAL_DMAMUX_SYNC_RISING ((uint32_t)DMAMUX_CxCR_SPOL_0) /*!< synchronize with rising edge events */
#define HAL_DMAMUX_SYNC_FALLING ((uint32_t)DMAMUX_CxCR_SPOL_1) /*!< synchronize with falling edge events */ #define HAL_DMAMUX_SYNC_FALLING ((uint32_t)DMAMUX_CxCR_SPOL_1) /*!< synchronize with falling edge events */
#define HAL_DMAMUX_SYNC_RISING_FALLING ((uint32_t)DMAMUX_CxCR_SPOL) /*!< synchronize with rising and falling edge events */ #define HAL_DMAMUX_SYNC_RISING_FALLING ((uint32_t)DMAMUX_CxCR_SPOL) /*!< synchronize with rising and falling edge events */
/** /**
* @} * @}
*/ */
/** @defgroup DMAEx_DMAMUX_SignalGeneratorID_selection DMAMUX SignalGeneratorID selection /** @defgroup DMAEx_DMAMUX_SignalGeneratorID_selection DMAMUX SignalGeneratorID selection
* @{ * @{
*/ */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI0 0U /*!< Request generator Signal is EXTI0 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI0 0U /*!< Request generator Signal is EXTI0 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI1 1U /*!< Request generator Signal is EXTI1 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI1 1U /*!< Request generator Signal is EXTI1 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI2 2U /*!< Request generator Signal is EXTI2 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI2 2U /*!< Request generator Signal is EXTI2 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI3 3U /*!< Request generator Signal is EXTI3 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI3 3U /*!< Request generator Signal is EXTI3 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI4 4U /*!< Request generator Signal is EXTI4 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI4 4U /*!< Request generator Signal is EXTI4 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI5 5U /*!< Request generator Signal is EXTI5 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI5 5U /*!< Request generator Signal is EXTI5 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI6 6U /*!< Request generator Signal is EXTI6 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI6 6U /*!< Request generator Signal is EXTI6 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI7 7U /*!< Request generator Signal is EXTI7 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI7 7U /*!< Request generator Signal is EXTI7 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI8 8U /*!< Request generator Signal is EXTI8 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI8 8U /*!< Request generator Signal is EXTI8 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI9 9U /*!< Request generator Signal is EXTI9 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI9 9U /*!< Request generator Signal is EXTI9 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI10 10U /*!< Request generator Signal is EXTI10 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI10 10U /*!< Request generator Signal is EXTI10 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI11 11U /*!< Request generator Signal is EXTI11 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI11 11U /*!< Request generator Signal is EXTI11 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI12 12U /*!< Request generator Signal is EXTI12 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI12 12U /*!< Request generator Signal is EXTI12 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI13 13U /*!< Request generator Signal is EXTI13 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI13 13U /*!< Request generator Signal is EXTI13 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI14 14U /*!< Request generator Signal is EXTI14 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI14 14U /*!< Request generator Signal is EXTI14 IT */
#define HAL_DMAMUX1_REQUEST_GEN_EXTI15 15U /*!< Request generator Signal is EXTI15 IT */ #define HAL_DMAMUX1_REQ_GEN_EXTI15 15U /*!< Request generator Signal is EXTI15 IT */
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH0_EVT 16U /*!< Request generator Signal is DMAMUX1 Channel0 Event */ #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH0_EVT 16U /*!< Request generator Signal is DMAMUX1 Channel0 Event */
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH1_EVT 17U /*!< Request generator Signal is DMAMUX1 Channel1 Event */ #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH1_EVT 17U /*!< Request generator Signal is DMAMUX1 Channel1 Event */
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH2_EVT 18U /*!< Request generator Signal is DMAMUX1 Channel2 Event */ #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH2_EVT 18U /*!< Request generator Signal is DMAMUX1 Channel2 Event */
#define HAL_DMAMUX1_REQUEST_GEN_DMAMUX1_CH3_EVT 19U /*!< Request generator Signal is DMAMUX1 Channel3 Event */ #define HAL_DMAMUX1_REQ_GEN_DMAMUX1_CH3_EVT 19U /*!< Request generator Signal is DMAMUX1 Channel3 Event */
#define HAL_DMAMUX1_REQUEST_GEN_LPTIM1_OUT 20U /*!< Request generator Signal is LPTIM1 OUT */ #define HAL_DMAMUX1_REQ_GEN_LPTIM1_OUT 20U /*!< Request generator Signal is LPTIM1 OUT */
#define HAL_DMAMUX1_REQUEST_GEN_LPTIM2_OUT 21U /*!< Request generator Signal is LPTIM2 OUT */ #define HAL_DMAMUX1_REQ_GEN_LPTIM2_OUT 21U /*!< Request generator Signal is LPTIM2 OUT */
#define HAL_DMAMUX1_REQUEST_GEN_DSI_TE 22U /*!< Request generator Signal is DSI Tearing Effect */ #define HAL_DMAMUX1_REQ_GEN_DSI_TE 22U /*!< Request generator Signal is DSI Tearing Effect */
#define HAL_DMAMUX1_REQUEST_GEN_DSI_EOT 23U /*!< Request generator Signal is DSI End of refresh */ #define HAL_DMAMUX1_REQ_GEN_DSI_EOT 23U /*!< Request generator Signal is DSI End of refresh */
#define HAL_DMAMUX1_REQUEST_GEN_DMA2D_EOT 24U /*!< Request generator Signal is DMA2D End of Transfer */ #define HAL_DMAMUX1_REQ_GEN_DMA2D_EOT 24U /*!< Request generator Signal is DMA2D End of Transfer */
#define HAL_DMAMUX1_REQUEST_GEN_LTDC_IT 25U /*!< Request generator Signal is LTDC IT */ #define HAL_DMAMUX1_REQ_GEN_LTDC_IT 25U /*!< Request generator Signal is LTDC IT */
/** /**
* @} * @}
*/ */
/** @defgroup DMAEx_DMAMUX_RequestGeneneratorPolarity_selection DMAMUX RequestGeneneratorPolarity selection /** @defgroup DMAEx_DMAMUX_RequestGeneneratorPolarity_selection DMAMUX RequestGeneneratorPolarity selection
* @{ * @{
*/ */
#define HAL_DMAMUX_REQUEST_GEN_NO_EVENT 0U /*!< block request generator events */ #define HAL_DMAMUX_REQ_GEN_NO_EVENT 0U /*!< block request generator events */
#define HAL_DMAMUX_REQUEST_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */ #define HAL_DMAMUX_REQ_GEN_RISING DMAMUX_RGxCR_GPOL_0 /*!< generate request on rising edge events */
#define HAL_DMAMUX_REQUEST_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */ #define HAL_DMAMUX_REQ_GEN_FALLING DMAMUX_RGxCR_GPOL_1 /*!< generate request on falling edge events */
#define HAL_DMAMUX_REQUEST_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */ #define HAL_DMAMUX_REQ_GEN_RISING_FALLING DMAMUX_RGxCR_GPOL /*!< generate request on rising and falling edge events */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup DMAEx_Exported_Functions /** @addtogroup DMAEx_Exported_Functions
* @{ * @{
*/ */
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
/** @addtogroup DMAEx_Exported_Functions_Group1 /** @addtogroup DMAEx_Exported_Functions_Group1
* @{ * @{
*/ */
/* ------------------------- REQUEST -----------------------------------------*/ /* ------------------------- REQUEST -----------------------------------------*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma, HAL_StatusTypeDef HAL_DMAEx_ConfigMuxRequestGenerator (DMA_HandleTypeDef *hdma,
HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig); HAL_DMA_MuxRequestGeneratorConfigTypeDef *pRequestGeneratorConfig);
HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMAEx_EnableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma); HAL_StatusTypeDef HAL_DMAEx_DisableMuxRequestGenerator (DMA_HandleTypeDef *hdma);
/* -------------------------------------------------------------------------- */ /* -------------------------------------------------------------------------- */
/* ------------------------- SYNCHRO -----------------------------------------*/ /* ------------------------- SYNCHRO -----------------------------------------*/
HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig); HAL_StatusTypeDef HAL_DMAEx_ConfigMuxSync(DMA_HandleTypeDef *hdma, HAL_DMA_MuxSyncConfigTypeDef *pSyncConfig);
/* -------------------------------------------------------------------------- */ /* -------------------------------------------------------------------------- */
void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma); void HAL_DMAEx_MUX_IRQHandler(DMA_HandleTypeDef *hdma);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup DMAEx_Private_Macros DMAEx Private Macros /** @defgroup DMAEx_Private_Macros DMAEx Private Macros
* @brief DMAEx private macros * @brief DMAEx private macros
* @{ * @{
*/ */
#define IS_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_LDTC_IT) #define IS_DMAMUX_SYNC_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_SYNC_LDTC_IT)
#define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32)) #define IS_DMAMUX_SYNC_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32))
#define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \ #define IS_DMAMUX_SYNC_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_SYNC_NO_EVENT) || \
((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \ ((POLARITY) == HAL_DMAMUX_SYNC_RISING) || \
((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \ ((POLARITY) == HAL_DMAMUX_SYNC_FALLING) || \
((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING)) ((POLARITY) == HAL_DMAMUX_SYNC_RISING_FALLING))
#define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE)) #define IS_DMAMUX_SYNC_STATE(SYNC) (((SYNC) == DISABLE) || ((SYNC) == ENABLE))
#define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \ #define IS_DMAMUX_SYNC_EVENT(EVENT) (((EVENT) == DISABLE) || \
((EVENT) == ENABLE)) ((EVENT) == ENABLE))
#define IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQUEST_GEN_LTDC_IT) #define IS_DMAMUX_REQUEST_GEN_SIGNAL_ID(SIGNAL_ID) ((SIGNAL_ID) <= HAL_DMAMUX1_REQ_GEN_LTDC_IT)
#define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32)) #define IS_DMAMUX_REQUEST_GEN_REQUEST_NUMBER(REQUEST_NUMBER) (((REQUEST_NUMBER) > 0) && ((REQUEST_NUMBER) <= 32))
#define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQUEST_GEN_NO_EVENT) || \ #define IS_DMAMUX_REQUEST_GEN_POLARITY(POLARITY) (((POLARITY) == HAL_DMAMUX_REQUEST_GEN_NO_EVENT) || \
((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING) || \ ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING) || \
((POLARITY) == HAL_DMAMUX_REQUEST_GEN_FALLING) || \ ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_FALLING) || \
((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING_FALLING)) ((POLARITY) == HAL_DMAMUX_REQUEST_GEN_RISING_FALLING))
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* DMAMUX1 */ #endif /* DMAMUX1 */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_DMA_H */ #endif /* __STM32L4xx_HAL_DMA_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_firewall.h * @file stm32l4xx_hal_firewall.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of FIREWALL HAL module. * @brief Header file of FIREWALL HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_FIREWALL_H #ifndef __STM32L4xx_HAL_FIREWALL_H
#define __STM32L4xx_HAL_FIREWALL_H #define __STM32L4xx_HAL_FIREWALL_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup FIREWALL FIREWALL /** @addtogroup FIREWALL FIREWALL
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup FIREWALL_Exported_Types FIREWALL Exported Types /** @defgroup FIREWALL_Exported_Types FIREWALL Exported Types
* @{ * @{
*/ */
/** /**
* @brief FIREWALL Initialization Structure definition * @brief FIREWALL Initialization Structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t CodeSegmentStartAddress; /*!< Protected code segment start address. This value is 24-bit long, the 8 LSB bits are uint32_t CodeSegmentStartAddress; /*!< Protected code segment start address. This value is 24-bit long, the 8 LSB bits are
reserved and forced to 0 in order to allow a 256-byte granularity. */ reserved and forced to 0 in order to allow a 256-byte granularity. */
uint32_t CodeSegmentLength; /*!< Protected code segment length in bytes. This value is 22-bit long, the 8 LSB bits are uint32_t CodeSegmentLength; /*!< Protected code segment length in bytes. This value is 22-bit long, the 8 LSB bits are
reserved and forced to 0 for the length to be a multiple of 256 bytes. */ reserved and forced to 0 for the length to be a multiple of 256 bytes. */
uint32_t NonVDataSegmentStartAddress; /*!< Protected non-volatile data segment start address. This value is 24-bit long, the 8 LSB uint32_t NonVDataSegmentStartAddress; /*!< Protected non-volatile data segment start address. This value is 24-bit long, the 8 LSB
bits are reserved and forced to 0 in order to allow a 256-byte granularity. */ bits are reserved and forced to 0 in order to allow a 256-byte granularity. */
uint32_t NonVDataSegmentLength; /*!< Protected non-volatile data segment length in bytes. This value is 22-bit long, the 8 LSB uint32_t NonVDataSegmentLength; /*!< Protected non-volatile data segment length in bytes. This value is 22-bit long, the 8 LSB
bits are reserved and forced to 0 for the length to be a multiple of 256 bytes. */ bits are reserved and forced to 0 for the length to be a multiple of 256 bytes. */
uint32_t VDataSegmentStartAddress; /*!< Protected volatile data segment start address. This value is 17-bit long, the 6 LSB bits uint32_t VDataSegmentStartAddress; /*!< Protected volatile data segment start address. This value is 17-bit long, the 6 LSB bits
are reserved and forced to 0 in order to allow a 64-byte granularity. */ are reserved and forced to 0 in order to allow a 64-byte granularity. */
uint32_t VDataSegmentLength; /*!< Protected volatile data segment length in bytes. This value is 17-bit long, the 6 LSB uint32_t VDataSegmentLength; /*!< Protected volatile data segment length in bytes. This value is 17-bit long, the 6 LSB
bits are reserved and forced to 0 for the length to be a multiple of 64 bytes. */ bits are reserved and forced to 0 for the length to be a multiple of 64 bytes. */
uint32_t VolatileDataExecution; /*!< Set VDE bit specifying whether or not the volatile data segment can be executed. uint32_t VolatileDataExecution; /*!< Set VDE bit specifying whether or not the volatile data segment can be executed.
When VDS = 1 (set by parameter VolatileDataShared), VDE bit has no meaning. When VDS = 1 (set by parameter VolatileDataShared), VDE bit has no meaning.
This parameter can be a value of @ref FIREWALL_VolatileData_Executable */ This parameter can be a value of @ref FIREWALL_VolatileData_Executable */
uint32_t VolatileDataShared; /*!< Set VDS bit in specifying whether or not the volatile data segment can be shared with a uint32_t VolatileDataShared; /*!< Set VDS bit in specifying whether or not the volatile data segment can be shared with a
non-protected application code. non-protected application code.
This parameter can be a value of @ref FIREWALL_VolatileData_Shared */ This parameter can be a value of @ref FIREWALL_VolatileData_Shared */
}FIREWALL_InitTypeDef; }FIREWALL_InitTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup FIREWALL_Exported_Constants FIREWALL Exported Constants /** @defgroup FIREWALL_Exported_Constants FIREWALL Exported Constants
* @{ * @{
*/ */
/** @defgroup FIREWALL_VolatileData_Executable FIREWALL volatile data segment execution status /** @defgroup FIREWALL_VolatileData_Executable FIREWALL volatile data segment execution status
* @{ * @{
*/ */
#define FIREWALL_VOLATILEDATA_NOT_EXECUTABLE ((uint32_t)0x0000) #define FIREWALL_VOLATILEDATA_NOT_EXECUTABLE ((uint32_t)0x0000)
#define FIREWALL_VOLATILEDATA_EXECUTABLE ((uint32_t)FW_CR_VDE) #define FIREWALL_VOLATILEDATA_EXECUTABLE ((uint32_t)FW_CR_VDE)
/** /**
* @} * @}
*/ */
/** @defgroup FIREWALL_VolatileData_Shared FIREWALL volatile data segment share status /** @defgroup FIREWALL_VolatileData_Shared FIREWALL volatile data segment share status
* @{ * @{
*/ */
#define FIREWALL_VOLATILEDATA_NOT_SHARED ((uint32_t)0x0000) #define FIREWALL_VOLATILEDATA_NOT_SHARED ((uint32_t)0x0000)
#define FIREWALL_VOLATILEDATA_SHARED ((uint32_t)FW_CR_VDS) #define FIREWALL_VOLATILEDATA_SHARED ((uint32_t)FW_CR_VDS)
/** /**
* @} * @}
*/ */
/** @defgroup FIREWALL_Pre_Arm FIREWALL pre arm status /** @defgroup FIREWALL_Pre_Arm FIREWALL pre arm status
* @{ * @{
*/ */
#define FIREWALL_PRE_ARM_RESET ((uint32_t)0x0000) #define FIREWALL_PRE_ARM_RESET ((uint32_t)0x0000)
#define FIREWALL_PRE_ARM_SET ((uint32_t)FW_CR_FPA) #define FIREWALL_PRE_ARM_SET ((uint32_t)FW_CR_FPA)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private macros --------------------------------------------------------*/ /* Private macros --------------------------------------------------------*/
/** @defgroup FIREWALL_Private_Macros FIREWALL Private Macros /** @defgroup FIREWALL_Private_Macros FIREWALL Private Macros
* @{ * @{
*/ */
#define IS_FIREWALL_CODE_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) #define IS_FIREWALL_CODE_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE)))
#define IS_FIREWALL_CODE_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) #define IS_FIREWALL_CODE_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE))
#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE))) #define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= FLASH_BASE) && ((ADDRESS) < (FLASH_BASE + FLASH_SIZE)))
#define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE)) #define IS_FIREWALL_NONVOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (FLASH_BASE + FLASH_SIZE))
#define IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM1_BASE) && ((ADDRESS) < (SRAM1_BASE + SRAM1_SIZE_MAX))) #define IS_FIREWALL_VOLATILEDATA_SEGMENT_ADDRESS(ADDRESS) (((ADDRESS) >= SRAM1_BASE) && ((ADDRESS) < (SRAM1_BASE + SRAM1_SIZE_MAX)))
#define IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM1_BASE + SRAM1_SIZE_MAX)) #define IS_FIREWALL_VOLATILEDATA_SEGMENT_LENGTH(ADDRESS, LENGTH) (((ADDRESS) + (LENGTH)) <= (SRAM1_BASE + SRAM1_SIZE_MAX))
#define IS_FIREWALL_VOLATILEDATA_SHARE(SHARE) (((SHARE) == FIREWALL_VOLATILEDATA_NOT_SHARED) || \ #define IS_FIREWALL_VOLATILEDATA_SHARE(SHARE) (((SHARE) == FIREWALL_VOLATILEDATA_NOT_SHARED) || \
((SHARE) == FIREWALL_VOLATILEDATA_SHARED)) ((SHARE) == FIREWALL_VOLATILEDATA_SHARED))
#define IS_FIREWALL_VOLATILEDATA_EXECUTE(EXECUTE) (((EXECUTE) == FIREWALL_VOLATILEDATA_NOT_EXECUTABLE) || \ #define IS_FIREWALL_VOLATILEDATA_EXECUTE(EXECUTE) (((EXECUTE) == FIREWALL_VOLATILEDATA_NOT_EXECUTABLE) || \
((EXECUTE) == FIREWALL_VOLATILEDATA_EXECUTABLE)) ((EXECUTE) == FIREWALL_VOLATILEDATA_EXECUTABLE))
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/** @defgroup FIREWALL_Exported_Macros FIREWALL Exported Macros /** @defgroup FIREWALL_Exported_Macros FIREWALL Exported Macros
* @{ * @{
*/ */
/** @brief Check whether the FIREWALL is enabled or not. /** @brief Check whether the FIREWALL is enabled or not.
* @retval FIREWALL enabling status (TRUE or FALSE). * @retval FIREWALL enabling status (TRUE or FALSE).
*/ */
#define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS) #define __HAL_FIREWALL_IS_ENABLED() HAL_IS_BIT_CLR(SYSCFG->CFGR1, SYSCFG_CFGR1_FWDIS)
/** @brief Enable FIREWALL pre arm. /** @brief Enable FIREWALL pre arm.
* @note When FPA bit is set, any code executed outside the protected segment * @note When FPA bit is set, any code executed outside the protected segment
* closes the Firewall, otherwise it generates a system reset. * closes the Firewall, otherwise it generates a system reset.
* @note This macro provides the same service as HAL_FIREWALL_EnablePreArmFlag() API * @note This macro provides the same service as HAL_FIREWALL_EnablePreArmFlag() API
* but can be executed inside a code area protected by the Firewall. * but can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
*/ */
#define __HAL_FIREWALL_PREARM_ENABLE() \ #define __HAL_FIREWALL_PREARM_ENABLE() \
do { \ do { \
__IO uint32_t tmpreg; \ __IO uint32_t tmpreg; \
SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \ SET_BIT(FIREWALL->CR, FW_CR_FPA) ; \
/* Read bit back to ensure it is taken into account by IP */ \ /* Read bit back to ensure it is taken into account by IP */ \
/* (introduce proper delay inside macro execution) */ \ /* (introduce proper delay inside macro execution) */ \
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \ tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
UNUSED(tmpreg); \ UNUSED(tmpreg); \
} while(0) } while(0)
/** @brief Disable FIREWALL pre arm. /** @brief Disable FIREWALL pre arm.
* @note When FPA bit is set, any code executed outside the protected segment * @note When FPA bit is set, any code executed outside the protected segment
* closes the Firewall, otherwise, it generates a system reset. * closes the Firewall, otherwise, it generates a system reset.
* @note This macro provides the same service as HAL_FIREWALL_DisablePreArmFlag() API * @note This macro provides the same service as HAL_FIREWALL_DisablePreArmFlag() API
* but can be executed inside a code area protected by the Firewall. * but can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
*/ */
#define __HAL_FIREWALL_PREARM_DISABLE() \ #define __HAL_FIREWALL_PREARM_DISABLE() \
do { \ do { \
__IO uint32_t tmpreg; \ __IO uint32_t tmpreg; \
CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \ CLEAR_BIT(FIREWALL->CR, FW_CR_FPA) ; \
/* Read bit back to ensure it is taken into account by IP */ \ /* Read bit back to ensure it is taken into account by IP */ \
/* (introduce proper delay inside macro execution) */ \ /* (introduce proper delay inside macro execution) */ \
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \ tmpreg = READ_BIT(FIREWALL->CR, FW_CR_FPA) ; \
UNUSED(tmpreg); \ UNUSED(tmpreg); \
} while(0) } while(0)
/** @brief Enable volatile data sharing in setting VDS bit. /** @brief Enable volatile data sharing in setting VDS bit.
* @note When VDS bit is set, the volatile data segment is shared with non-protected * @note When VDS bit is set, the volatile data segment is shared with non-protected
* application code. It can be accessed whatever the Firewall state (opened or closed). * application code. It can be accessed whatever the Firewall state (opened or closed).
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
*/ */
#define __HAL_FIREWALL_VOLATILEDATA_SHARED_ENABLE() \ #define __HAL_FIREWALL_VOLATILEDATA_SHARED_ENABLE() \
do { \ do { \
__IO uint32_t tmpreg; \ __IO uint32_t tmpreg; \
SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \ SET_BIT(FIREWALL->CR, FW_CR_VDS) ; \
/* Read bit back to ensure it is taken into account by IP */ \ /* Read bit back to ensure it is taken into account by IP */ \
/* (introduce proper delay inside macro execution) */ \ /* (introduce proper delay inside macro execution) */ \
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \ tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
UNUSED(tmpreg); \ UNUSED(tmpreg); \
} while(0) } while(0)
/** @brief Disable volatile data sharing in resetting VDS bit. /** @brief Disable volatile data sharing in resetting VDS bit.
* @note When VDS bit is reset, the volatile data segment is not shared and cannot be * @note When VDS bit is reset, the volatile data segment is not shared and cannot be
* hit by a non protected executable code when the Firewall is closed. If it is * hit by a non protected executable code when the Firewall is closed. If it is
* accessed in such a condition, a system reset is generated by the Firewall. * accessed in such a condition, a system reset is generated by the Firewall.
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
*/ */
#define __HAL_FIREWALL_VOLATILEDATA_SHARED_DISABLE() \ #define __HAL_FIREWALL_VOLATILEDATA_SHARED_DISABLE() \
do { \ do { \
__IO uint32_t tmpreg; \ __IO uint32_t tmpreg; \
CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \ CLEAR_BIT(FIREWALL->CR, FW_CR_VDS) ; \
/* Read bit back to ensure it is taken into account by IP */ \ /* Read bit back to ensure it is taken into account by IP */ \
/* (introduce proper delay inside macro execution) */ \ /* (introduce proper delay inside macro execution) */ \
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \ tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDS) ; \
UNUSED(tmpreg); \ UNUSED(tmpreg); \
} while(0) } while(0)
/** @brief Enable volatile data execution in setting VDE bit. /** @brief Enable volatile data execution in setting VDE bit.
* @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be * @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be
* executed whatever the VDE bit value. * executed whatever the VDE bit value.
* @note When VDE bit is set (with VDS = 0), the volatile data segment is executable. When * @note When VDE bit is set (with VDS = 0), the volatile data segment is executable. When
* the Firewall call is closed, a "call gate" entry procedure is required to open * the Firewall call is closed, a "call gate" entry procedure is required to open
* first the Firewall. * first the Firewall.
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
*/ */
#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_ENABLE() \ #define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_ENABLE() \
do { \ do { \
__IO uint32_t tmpreg; \ __IO uint32_t tmpreg; \
SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \ SET_BIT(FIREWALL->CR, FW_CR_VDE) ; \
/* Read bit back to ensure it is taken into account by IP */ \ /* Read bit back to ensure it is taken into account by IP */ \
/* (introduce proper delay inside macro execution) */ \ /* (introduce proper delay inside macro execution) */ \
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \ tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
UNUSED(tmpreg); \ UNUSED(tmpreg); \
} while(0) } while(0)
/** @brief Disable volatile data execution in resetting VDE bit. /** @brief Disable volatile data execution in resetting VDE bit.
* @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be * @note VDE bit is ignored when VDS is set. IF VDS = 1, the Volatile data segment can be
* executed whatever the VDE bit value. * executed whatever the VDE bit value.
* @note When VDE bit is reset (with VDS = 0), the volatile data segment cannot be executed. * @note When VDE bit is reset (with VDS = 0), the volatile data segment cannot be executed.
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
*/ */
#define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_DISABLE() \ #define __HAL_FIREWALL_VOLATILEDATA_EXECUTION_DISABLE() \
do { \ do { \
__IO uint32_t tmpreg; \ __IO uint32_t tmpreg; \
CLEAR_BIT(FIREWALL->CR, FW_CR_VDE) ; \ CLEAR_BIT(FIREWALL->CR, FW_CR_VDE) ; \
/* Read bit back to ensure it is taken into account by IP */ \ /* Read bit back to ensure it is taken into account by IP */ \
/* (introduce proper delay inside macro execution) */ \ /* (introduce proper delay inside macro execution) */ \
tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \ tmpreg = READ_BIT(FIREWALL->CR, FW_CR_VDE) ; \
UNUSED(tmpreg); \ UNUSED(tmpreg); \
} while(0) } while(0)
/** @brief Check whether or not the volatile data segment is shared. /** @brief Check whether or not the volatile data segment is shared.
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
* @retval VDS bit setting status (TRUE or FALSE). * @retval VDS bit setting status (TRUE or FALSE).
*/ */
#define __HAL_FIREWALL_GET_VOLATILEDATA_SHARED() ((FIREWALL->CR & FW_CR_VDS) == FW_CR_VDS) #define __HAL_FIREWALL_GET_VOLATILEDATA_SHARED() ((FIREWALL->CR & FW_CR_VDS) == FW_CR_VDS)
/** @brief Check whether or not the volatile data segment is declared executable. /** @brief Check whether or not the volatile data segment is declared executable.
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
* @retval VDE bit setting status (TRUE or FALSE). * @retval VDE bit setting status (TRUE or FALSE).
*/ */
#define __HAL_FIREWALL_GET_VOLATILEDATA_EXECUTION() ((FIREWALL->CR & FW_CR_VDE) == FW_CR_VDE) #define __HAL_FIREWALL_GET_VOLATILEDATA_EXECUTION() ((FIREWALL->CR & FW_CR_VDE) == FW_CR_VDE)
/** @brief Check whether or not the Firewall pre arm bit is set. /** @brief Check whether or not the Firewall pre arm bit is set.
* @note This macro can be executed inside a code area protected by the Firewall. * @note This macro can be executed inside a code area protected by the Firewall.
* @note This macro can be executed whatever the Firewall state (opened or closed) when * @note This macro can be executed whatever the Firewall state (opened or closed) when
* NVDSL register is equal to 0. Otherwise (when NVDSL register is different from * NVDSL register is equal to 0. Otherwise (when NVDSL register is different from
* 0, that is, when the non volatile data segment is defined), the macro can be * 0, that is, when the non volatile data segment is defined), the macro can be
* executed only when the Firewall is opened. * executed only when the Firewall is opened.
* @retval FPA bit setting status (TRUE or FALSE). * @retval FPA bit setting status (TRUE or FALSE).
*/ */
#define __HAL_FIREWALL_GET_PREARM() ((FIREWALL->CR & FW_CR_FPA) == FW_CR_FPA) #define __HAL_FIREWALL_GET_PREARM() ((FIREWALL->CR & FW_CR_FPA) == FW_CR_FPA)
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup FIREWALL_Exported_Functions FIREWALL Exported Functions /** @addtogroup FIREWALL_Exported_Functions FIREWALL Exported Functions
* @{ * @{
*/ */
/** @addtogroup FIREWALL_Exported_Functions_Group1 Initialization Functions /** @addtogroup FIREWALL_Exported_Functions_Group1 Initialization Functions
* @brief Initialization and Configuration Functions * @brief Initialization and Configuration Functions
* @{ * @{
*/ */
/* Initialization functions ********************************/ /* Initialization functions ********************************/
HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init); HAL_StatusTypeDef HAL_FIREWALL_Config(FIREWALL_InitTypeDef * fw_init);
void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config); void HAL_FIREWALL_GetConfig(FIREWALL_InitTypeDef * fw_config);
void HAL_FIREWALL_EnableFirewall(void); void HAL_FIREWALL_EnableFirewall(void);
void HAL_FIREWALL_EnablePreArmFlag(void); void HAL_FIREWALL_EnablePreArmFlag(void);
void HAL_FIREWALL_DisablePreArmFlag(void); void HAL_FIREWALL_DisablePreArmFlag(void);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_FIREWALL_H */ #endif /* __STM32L4xx_HAL_FIREWALL_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_flash.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_flash_ex.h
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@ -1,134 +1,134 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_flash_ex.h * @file stm32l4xx_hal_flash_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of FLASH HAL Extended module. * @brief Header file of FLASH HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_FLASH_EX_H #ifndef __STM32L4xx_HAL_FLASH_EX_H
#define __STM32L4xx_HAL_FLASH_EX_H #define __STM32L4xx_HAL_FLASH_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup FLASHEx /** @addtogroup FLASHEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
#if defined (FLASH_CFGR_LVEN) #if defined (FLASH_CFGR_LVEN)
/** @addtogroup FLASHEx_Exported_Constants /** @addtogroup FLASHEx_Exported_Constants
* @{ * @{
*/ */
/** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration /** @defgroup FLASHEx_LVE_PIN_CFG FLASHEx LVE pin configuration
* @{ * @{
*/ */
#define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */ #define FLASH_LVE_PIN_CTRL 0x00000000U /*!< LVE FLASH pin controlled by power controller */
#define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */ #define FLASH_LVE_PIN_FORCED FLASH_CFGR_LVEN /*!< LVE FLASH pin enforced to low (external SMPS used) */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* FLASH_CFGR_LVEN */ #endif /* FLASH_CFGR_LVEN */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup FLASHEx_Exported_Functions /** @addtogroup FLASHEx_Exported_Functions
* @{ * @{
*/ */
/* Extended Program operation functions *************************************/ /* Extended Program operation functions *************************************/
/** @addtogroup FLASHEx_Exported_Functions_Group1 /** @addtogroup FLASHEx_Exported_Functions_Group1
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError); HAL_StatusTypeDef HAL_FLASHEx_Erase(FLASH_EraseInitTypeDef *pEraseInit, uint32_t *PageError);
HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit); HAL_StatusTypeDef HAL_FLASHEx_Erase_IT(FLASH_EraseInitTypeDef *pEraseInit);
HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit); HAL_StatusTypeDef HAL_FLASHEx_OBProgram(FLASH_OBProgramInitTypeDef *pOBInit);
void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit); void HAL_FLASHEx_OBGetConfig(FLASH_OBProgramInitTypeDef *pOBInit);
/** /**
* @} * @}
*/ */
#if defined (FLASH_CFGR_LVEN) #if defined (FLASH_CFGR_LVEN)
/** @addtogroup FLASHEx_Exported_Functions_Group2 /** @addtogroup FLASHEx_Exported_Functions_Group2
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE); HAL_StatusTypeDef HAL_FLASHEx_ConfigLVEPin(uint32_t ConfigLVE);
/** /**
* @} * @}
*/ */
#endif /* FLASH_CFGR_LVEN */ #endif /* FLASH_CFGR_LVEN */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** /**
@cond 0 @cond 0
*/ */
#if defined (FLASH_CFGR_LVEN) #if defined (FLASH_CFGR_LVEN)
#define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED)) #define IS_FLASH_LVE_PIN(CFG) (((CFG) == FLASH_LVE_PIN_CTRL) || ((CFG) == FLASH_LVE_PIN_FORCED))
#endif /* FLASH_CFGR_LVEN */ #endif /* FLASH_CFGR_LVEN */
/** /**
@endcond @endcond
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_FLASH_EX_H */ #endif /* __STM32L4xx_HAL_FLASH_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_flash_ramfunc.h
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@ -1,126 +1,93 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_flash_ramfunc.h * @file stm32l4xx_hal_flash_ramfunc.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of FLASH RAMFUNC driver. * @brief Header file of FLASH RAMFUNC driver.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_FLASH_RAMFUNC_H #ifndef __STM32L4xx_FLASH_RAMFUNC_H
#define __STM32L4xx_FLASH_RAMFUNC_H #define __STM32L4xx_FLASH_RAMFUNC_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup FLASH_RAMFUNC /** @addtogroup FLASH_RAMFUNC
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** /* Exported functions --------------------------------------------------------*/
* @brief __RAM_FUNC definition /** @addtogroup FLASH_RAMFUNC_Exported_Functions
*/ * @{
#if defined ( __CC_ARM ) */
/* ARM Compiler
------------ /** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
RAM functions are defined using the toolchain options. * @{
Functions that are executed in RAM should reside in a separate source module. */
Using the 'Options for File' dialog you can simply change the 'Code / Const' /* Peripheral Control functions ************************************************/
area of a module to a memory space in physical RAM. __RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void);
Available memory areas are declared in the 'Target' tab of the 'Options for Target' __RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void);
dialog. #if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
*/ __RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig);
#define __RAM_FUNC HAL_StatusTypeDef #endif
/**
#elif defined ( __ICCARM__ ) * @}
/* ICCARM Compiler */
---------------
RAM functions are defined using a specific toolchain keyword "__ramfunc". /**
*/ * @}
#define __RAM_FUNC __ramfunc HAL_StatusTypeDef */
#elif defined ( __GNUC__ ) /**
/* GNU Compiler * @}
------------ */
RAM functions are defined using a specific toolchain attribute
"__attribute__((section(".RamFunc")))". /**
*/ * @}
#define __RAM_FUNC HAL_StatusTypeDef __attribute__((section(".RamFunc"))) */
#endif #ifdef __cplusplus
}
#endif
/* Exported functions --------------------------------------------------------*/
/** @addtogroup FLASH_RAMFUNC_Exported_Functions #endif /* __STM32L4xx_FLASH_RAMFUNC_H */
* @{
*/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/** @addtogroup FLASH_RAMFUNC_Exported_Functions_Group1
* @{
*/
/* Peripheral Control functions ************************************************/
__RAM_FUNC HAL_FLASHEx_EnableRunPowerDown(void);
__RAM_FUNC HAL_FLASHEx_DisableRunPowerDown(void);
#if defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
__RAM_FUNC HAL_FLASHEx_OB_DBankConfig(uint32_t DBankConfig);
#endif
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_FLASH_RAMFUNC_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_gfxmmu.h
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@ -1,306 +1,347 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_gfxmmu.h * @file stm32l4xx_hal_gfxmmu.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of GFXMMU HAL module. * @brief Header file of GFXMMU HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_GFXMMU_H #ifndef STM32L4xx_HAL_GFXMMU_H
#define __STM32L4xx_HAL_GFXMMU_H #define STM32L4xx_HAL_GFXMMU_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
#if defined(GFXMMU) #if defined(GFXMMU)
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup GFXMMU /** @addtogroup GFXMMU
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types /** @defgroup GFXMMU_Exported_Types GFXMMU Exported Types
* @{ * @{
*/ */
/** /**
* @brief HAL GFXMMU states definition * @brief HAL GFXMMU states definition
*/ */
typedef enum typedef enum
{ {
HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized */ HAL_GFXMMU_STATE_RESET = 0x00U, /*!< GFXMMU not initialized */
HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use */ HAL_GFXMMU_STATE_READY = 0x01U, /*!< GFXMMU initialized and ready for use */
}HAL_GFXMMU_StateTypeDef; }HAL_GFXMMU_StateTypeDef;
/** /**
* @brief GFXMMU buffers structure definition * @brief GFXMMU buffers structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Buf0Address; /*!< Physical address of buffer 0. */ uint32_t Buf0Address; /*!< Physical address of buffer 0. */
uint32_t Buf1Address; /*!< Physical address of buffer 1. */ uint32_t Buf1Address; /*!< Physical address of buffer 1. */
uint32_t Buf2Address; /*!< Physical address of buffer 2. */ uint32_t Buf2Address; /*!< Physical address of buffer 2. */
uint32_t Buf3Address; /*!< Physical address of buffer 3. */ uint32_t Buf3Address; /*!< Physical address of buffer 3. */
}GFXMMU_BuffersTypeDef; }GFXMMU_BuffersTypeDef;
/** /**
* @brief GFXMMU interrupts structure definition * @brief GFXMMU interrupts structure definition
*/ */
typedef struct typedef struct
{ {
FunctionalState Activation; /*!< Interrupts enable/disable */ FunctionalState Activation; /*!< Interrupts enable/disable */
uint32_t UsedInterrupts; /*!< Interrupts used. uint32_t UsedInterrupts; /*!< Interrupts used.
This parameter can be a values combination of @ref GFXMMU_Interrupts. This parameter can be a values combination of @ref GFXMMU_Interrupts.
@note: Usefull only when interrupts are enabled. */ @note: Usefull only when interrupts are enabled. */
}GFXMMU_InterruptsTypeDef; }GFXMMU_InterruptsTypeDef;
/** /**
* @brief GFXMMU init structure definition * @brief GFXMMU init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line. uint32_t BlocksPerLine; /*!< Number of blocks of 16 bytes per line.
This parameter can be a value of @ref GFXMMU_BlocksPerLine. */ This parameter can be a value of @ref GFXMMU_BlocksPerLine. */
uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */ uint32_t DefaultValue; /*!< Value returned when virtual memory location not physically mapped. */
GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */ GFXMMU_BuffersTypeDef Buffers; /*!< Physical buffers addresses. */
GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */ GFXMMU_InterruptsTypeDef Interrupts; /*!< Interrupts parameters. */
}GFXMMU_InitTypeDef; }GFXMMU_InitTypeDef;
/** /**
* @brief GFXMMU handle structure definition * @brief GFXMMU handle structure definition
*/ */
typedef struct typedef struct __GFXMMU_HandleTypeDef
{ {
GFXMMU_TypeDef *Instance; /*!< GFXMMU instance */ GFXMMU_TypeDef *Instance; /*!< GFXMMU instance */
GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters */ GFXMMU_InitTypeDef Init; /*!< GFXMMU init parameters */
HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state */ HAL_GFXMMU_StateTypeDef State; /*!< GFXMMU state */
__IO uint32_t ErrorCode; /*!< GFXMMU error code */ __IO uint32_t ErrorCode; /*!< GFXMMU error code */
}GFXMMU_HandleTypeDef; #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
void (*ErrorCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU error callback */
/** void (*MspInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP init callback */
* @brief GFXMMU LUT line structure definition void (*MspDeInitCallback) (struct __GFXMMU_HandleTypeDef *hgfxmmu); /*!< GFXMMU MSP de-init callback */
*/ #endif
typedef struct }GFXMMU_HandleTypeDef;
{
uint32_t LineNumber; /*!< LUT line number. /**
This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */ * @brief GFXMMU LUT line structure definition
uint32_t LineStatus; /*!< LUT line enable/disable. */
This parameter can be a value of @ref GFXMMU_LutLineStatus. */ typedef struct
uint32_t FirstVisibleBlock; /*!< First visible block on this line. {
This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ uint32_t LineNumber; /*!< LUT line number.
uint32_t LastVisibleBlock; /*!< Last visible block on this line. This parameter must be a number between Min_Data = 0 and Max_Data = 1023. */
This parameter must be a number between Min_Data = 0 and Max_Data = 255. */ uint32_t LineStatus; /*!< LUT line enable/disable.
int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer. This parameter can be a value of @ref GFXMMU_LutLineStatus. */
This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208. uint32_t FirstVisibleBlock; /*!< First visible block on this line.
@note: Line offset has to be computed with the following formula: This parameter must be a number between Min_Data = 0 and Max_Data = 255. */
LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */ uint32_t LastVisibleBlock; /*!< Last visible block on this line.
}GFXMMU_LutLineTypeDef; This parameter must be a number between Min_Data = 0 and Max_Data = 255. */
int32_t LineOffset; /*!< Offset of block 0 of the current line in physical buffer.
/** This parameter must be a number between Min_Data = -4080 and Max_Data = 4190208.
* @} @note: Line offset has to be computed with the following formula:
*/ LineOffset = [(Blocks already used) - (1st visible block)]*BlockSize. */
/* End of exported types -----------------------------------------------------*/ }GFXMMU_LutLineTypeDef;
/* Exported constants --------------------------------------------------------*/ #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
/** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants /**
* @{ * @brief GFXMMU callback ID enumeration definition
*/ */
typedef enum
/** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line {
* @{ HAL_GFXMMU_ERROR_CB_ID = 0x00U, /*!< GFXMMU error callback ID */
*/ HAL_GFXMMU_MSPINIT_CB_ID = 0x01U, /*!< GFXMMU MSP init callback ID */
#define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */ HAL_GFXMMU_MSPDEINIT_CB_ID = 0x02U /*!< GFXMMU MSP de-init callback ID */
#define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */ }HAL_GFXMMU_CallbackIDTypeDef;
/**
* @} /**
*/ * @brief GFXMMU callback pointer definition
*/
/** @defgroup GFXMMU_Interrupts GFXMMU interrupts typedef void (*pGFXMMU_CallbackTypeDef)(GFXMMU_HandleTypeDef *hgfxmmu);
* @{ #endif
*/
#define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt */ /**
#define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt */ * @}
#define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt */ */
#define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt */ /* End of exported types -----------------------------------------------------*/
#define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt */
/** /* Exported constants --------------------------------------------------------*/
* @} /** @defgroup GFXMMU_Exported_Constants GFXMMU Exported Constants
*/ * @{
*/
/** @defgroup GFXMMU_Error_Code GFXMMU Error Code
* @{ /** @defgroup GFXMMU_BlocksPerLine GFXMMU blocks per line
*/ * @{
#define GFXMMU_ERROR_NONE 0x00000000U /*!< No error */ */
#define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow */ #define GFXMMU_256BLOCKS 0x00000000U /*!< 256 blocks of 16 bytes per line */
#define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow */ #define GFXMMU_192BLOCKS GFXMMU_CR_192BM /*!< 192 blocks of 16 bytes per line */
#define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow */ /**
#define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow */ * @}
#define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error */ */
/**
* @} /** @defgroup GFXMMU_Interrupts GFXMMU interrupts
*/ * @{
*/
/** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status #define GFXMMU_AHB_MASTER_ERROR_IT GFXMMU_CR_AMEIE /*!< AHB master error interrupt */
* @{ #define GFXMMU_BUFFER0_OVERFLOW_IT GFXMMU_CR_B0OIE /*!< Buffer 0 overflow interrupt */
*/ #define GFXMMU_BUFFER1_OVERFLOW_IT GFXMMU_CR_B1OIE /*!< Buffer 1 overflow interrupt */
#define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled */ #define GFXMMU_BUFFER2_OVERFLOW_IT GFXMMU_CR_B2OIE /*!< Buffer 2 overflow interrupt */
#define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled */ #define GFXMMU_BUFFER3_OVERFLOW_IT GFXMMU_CR_B3OIE /*!< Buffer 3 overflow interrupt */
/** /**
* @} * @}
*/ */
/** /** @defgroup GFXMMU_Error_Code GFXMMU Error Code
* @} * @{
*/ */
/* End of exported constants -------------------------------------------------*/ #define GFXMMU_ERROR_NONE 0x00000000U /*!< No error */
#define GFXMMU_ERROR_BUFFER0_OVERFLOW GFXMMU_SR_B0OF /*!< Buffer 0 overflow */
/* Exported macros -----------------------------------------------------------*/ #define GFXMMU_ERROR_BUFFER1_OVERFLOW GFXMMU_SR_B1OF /*!< Buffer 1 overflow */
/** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros #define GFXMMU_ERROR_BUFFER2_OVERFLOW GFXMMU_SR_B2OF /*!< Buffer 2 overflow */
* @{ #define GFXMMU_ERROR_BUFFER3_OVERFLOW GFXMMU_SR_B3OF /*!< Buffer 3 overflow */
*/ #define GFXMMU_ERROR_AHB_MASTER GFXMMU_SR_AMEF /*!< AHB master error */
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
/** @brief Reset GFXMMU handle state. #define GFXMMU_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */
* @param __HANDLE__ GFXMMU handle. #endif
* @retval None /**
*/ * @}
#define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET) */
/** /** @defgroup GFXMMU_LutLineStatus GFXMMU LUT line status
* @} * @{
*/ */
/* End of exported macros ----------------------------------------------------*/ #define GFXMMU_LUT_LINE_DISABLE 0x00000000U /*!< LUT line disabled */
#define GFXMMU_LUT_LINE_ENABLE GFXMMU_LUTxL_EN /*!< LUT line enabled */
/* Exported functions --------------------------------------------------------*/ /**
/** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions * @}
* @{ */
*/
/**
/** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions * @}
* @{ */
*/ /* End of exported constants -------------------------------------------------*/
/* Initialization and de-initialization functions *****************************/
HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu); /* Exported macros -----------------------------------------------------------*/
HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu); /** @defgroup GFXMMU_Exported_Macros GFXMMU Exported Macros
void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu); * @{
void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu); */
/**
* @} /** @brief Reset GFXMMU handle state.
*/ * @param __HANDLE__ GFXMMU handle.
* @retval None
/** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions */
* @{ #if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
*/ #define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) do{ \
/* Operation functions ********************************************************/ (__HANDLE__)->State = HAL_GFXMMU_STATE_RESET; \
HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu, (__HANDLE__)->MspInitCallback = NULL; \
uint32_t FirstLine, (__HANDLE__)->MspDeInitCallback = NULL; \
uint32_t LinesNumber, } while(0)
uint32_t Address); #else
#define __HAL_GFXMMU_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_GFXMMU_STATE_RESET)
HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu, #endif
uint32_t FirstLine,
uint32_t LinesNumber); /**
* @}
HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine); */
/* End of exported macros ----------------------------------------------------*/
HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers);
/* Exported functions --------------------------------------------------------*/
void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu); /** @addtogroup GFXMMU_Exported_Functions GFXMMU Exported Functions
* @{
void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu); */
/**
* @} /** @addtogroup GFXMMU_Exported_Functions_Group1 Initialization and de-initialization functions
*/ * @{
*/
/** @defgroup GFXMMU_Exported_Functions_Group3 State functions /* Initialization and de-initialization functions *****************************/
* @{ HAL_StatusTypeDef HAL_GFXMMU_Init(GFXMMU_HandleTypeDef *hgfxmmu);
*/ HAL_StatusTypeDef HAL_GFXMMU_DeInit(GFXMMU_HandleTypeDef *hgfxmmu);
/* State function *************************************************************/ void HAL_GFXMMU_MspInit(GFXMMU_HandleTypeDef *hgfxmmu);
HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu); void HAL_GFXMMU_MspDeInit(GFXMMU_HandleTypeDef *hgfxmmu);
#if (USE_HAL_GFXMMU_REGISTER_CALLBACKS == 1)
uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu); /* GFXMMU callbacks register/unregister functions *****************************/
/** HAL_StatusTypeDef HAL_GFXMMU_RegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
* @} HAL_GFXMMU_CallbackIDTypeDef CallbackID,
*/ pGFXMMU_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_GFXMMU_UnRegisterCallback(GFXMMU_HandleTypeDef *hgfxmmu,
/** HAL_GFXMMU_CallbackIDTypeDef CallbackID);
* @} #endif
*/ /**
/* End of exported functions -------------------------------------------------*/ * @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros /** @addtogroup GFXMMU_Exported_Functions_Group2 Operations functions
* @{ * @{
*/ */
#define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \ /* Operation functions ********************************************************/
((VALUE) == GFXMMU_192BLOCKS)) HAL_StatusTypeDef HAL_GFXMMU_ConfigLut(GFXMMU_HandleTypeDef *hgfxmmu,
uint32_t FirstLine,
#define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U) uint32_t LinesNumber,
uint32_t Address);
#define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U)
HAL_StatusTypeDef HAL_GFXMMU_DisableLutLines(GFXMMU_HandleTypeDef *hgfxmmu,
#define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U) uint32_t FirstLine,
uint32_t LinesNumber);
#define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U))
HAL_StatusTypeDef HAL_GFXMMU_ConfigLutLine(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_LutLineTypeDef *lutLine);
#define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \
((VALUE) == GFXMMU_LUT_LINE_ENABLE)) HAL_StatusTypeDef HAL_GFXMMU_ModifyBuffers(GFXMMU_HandleTypeDef *hgfxmmu, GFXMMU_BuffersTypeDef *Buffers);
#define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U) void HAL_GFXMMU_IRQHandler(GFXMMU_HandleTypeDef *hgfxmmu);
#define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208)) void HAL_GFXMMU_ErrorCallback(GFXMMU_HandleTypeDef *hgfxmmu);
/** /**
* @} * @}
*/ */
/* End of private macros -----------------------------------------------------*/
/** @defgroup GFXMMU_Exported_Functions_Group3 State functions
/** * @{
* @} */
*/ /* State function *************************************************************/
HAL_GFXMMU_StateTypeDef HAL_GFXMMU_GetState(GFXMMU_HandleTypeDef *hgfxmmu);
/**
* @} uint32_t HAL_GFXMMU_GetError(GFXMMU_HandleTypeDef *hgfxmmu);
*/ /**
#endif /* GFXMMU */ * @}
#ifdef __cplusplus */
}
#endif /**
* @}
#endif /* __STM32L4xx_HAL_GFXMMU_H */ */
/* End of exported functions -------------------------------------------------*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/* Private macros ------------------------------------------------------------*/
/** @defgroup GFXMMU_Private_Macros GFXMMU Private Macros
* @{
*/
#define IS_GFXMMU_BLOCKS_PER_LINE(VALUE) (((VALUE) == GFXMMU_256BLOCKS) || \
((VALUE) == GFXMMU_192BLOCKS))
#define IS_GFXMMU_BUFFER_ADDRESS(VALUE) (((VALUE) & 0xFU) == 0U)
#define IS_GFXMMU_INTERRUPTS(VALUE) (((VALUE) & 0x1FU) != 0U)
#define IS_GFXMMU_LUT_LINE(VALUE) ((VALUE) < 1024U)
#define IS_GFXMMU_LUT_LINES_NUMBER(VALUE) (((VALUE) > 0U) && ((VALUE) <= 1024U))
#define IS_GFXMMU_LUT_LINE_STATUS(VALUE) (((VALUE) == GFXMMU_LUT_LINE_DISABLE) || \
((VALUE) == GFXMMU_LUT_LINE_ENABLE))
#define IS_GFXMMU_LUT_BLOCK(VALUE) ((VALUE) < 256U)
#define IS_GFXMMU_LUT_LINE_OFFSET(VALUE) (((VALUE) >= -4080) && ((VALUE) <= 4190208))
/**
* @}
*/
/* End of private macros -----------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
#endif /* GFXMMU */
#ifdef __cplusplus
}
#endif
#endif /* STM32L4xx_HAL_GFXMMU_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

632
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_gpio.h
View file

@ -1,316 +1,316 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_gpio.h * @file stm32l4xx_hal_gpio.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of GPIO HAL module. * @brief Header file of GPIO HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_GPIO_H #ifndef __STM32L4xx_HAL_GPIO_H
#define __STM32L4xx_HAL_GPIO_H #define __STM32L4xx_HAL_GPIO_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup GPIO /** @addtogroup GPIO
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup GPIO_Exported_Types GPIO Exported Types /** @defgroup GPIO_Exported_Types GPIO Exported Types
* @{ * @{
*/ */
/** /**
* @brief GPIO Init structure definition * @brief GPIO Init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Pin; /*!< Specifies the GPIO pins to be configured. uint32_t Pin; /*!< Specifies the GPIO pins to be configured.
This parameter can be any value of @ref GPIO_pins */ This parameter can be any value of @ref GPIO_pins */
uint32_t Mode; /*!< Specifies the operating mode for the selected pins. uint32_t Mode; /*!< Specifies the operating mode for the selected pins.
This parameter can be a value of @ref GPIO_mode */ This parameter can be a value of @ref GPIO_mode */
uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins. uint32_t Pull; /*!< Specifies the Pull-up or Pull-Down activation for the selected pins.
This parameter can be a value of @ref GPIO_pull */ This parameter can be a value of @ref GPIO_pull */
uint32_t Speed; /*!< Specifies the speed for the selected pins. uint32_t Speed; /*!< Specifies the speed for the selected pins.
This parameter can be a value of @ref GPIO_speed */ This parameter can be a value of @ref GPIO_speed */
uint32_t Alternate; /*!< Peripheral to be connected to the selected pins uint32_t Alternate; /*!< Peripheral to be connected to the selected pins
This parameter can be a value of @ref GPIOEx_Alternate_function_selection */ This parameter can be a value of @ref GPIOEx_Alternate_function_selection */
}GPIO_InitTypeDef; }GPIO_InitTypeDef;
/** /**
* @brief GPIO Bit SET and Bit RESET enumeration * @brief GPIO Bit SET and Bit RESET enumeration
*/ */
typedef enum typedef enum
{ {
GPIO_PIN_RESET = 0, GPIO_PIN_RESET = 0,
GPIO_PIN_SET GPIO_PIN_SET
}GPIO_PinState; }GPIO_PinState;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup GPIO_Exported_Constants GPIO Exported Constants /** @defgroup GPIO_Exported_Constants GPIO Exported Constants
* @{ * @{
*/ */
/** @defgroup GPIO_pins GPIO pins /** @defgroup GPIO_pins GPIO pins
* @{ * @{
*/ */
#define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */ #define GPIO_PIN_0 ((uint16_t)0x0001) /* Pin 0 selected */
#define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */ #define GPIO_PIN_1 ((uint16_t)0x0002) /* Pin 1 selected */
#define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */ #define GPIO_PIN_2 ((uint16_t)0x0004) /* Pin 2 selected */
#define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */ #define GPIO_PIN_3 ((uint16_t)0x0008) /* Pin 3 selected */
#define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */ #define GPIO_PIN_4 ((uint16_t)0x0010) /* Pin 4 selected */
#define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */ #define GPIO_PIN_5 ((uint16_t)0x0020) /* Pin 5 selected */
#define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */ #define GPIO_PIN_6 ((uint16_t)0x0040) /* Pin 6 selected */
#define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */ #define GPIO_PIN_7 ((uint16_t)0x0080) /* Pin 7 selected */
#define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */ #define GPIO_PIN_8 ((uint16_t)0x0100) /* Pin 8 selected */
#define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */ #define GPIO_PIN_9 ((uint16_t)0x0200) /* Pin 9 selected */
#define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */ #define GPIO_PIN_10 ((uint16_t)0x0400) /* Pin 10 selected */
#define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */ #define GPIO_PIN_11 ((uint16_t)0x0800) /* Pin 11 selected */
#define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */ #define GPIO_PIN_12 ((uint16_t)0x1000) /* Pin 12 selected */
#define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */ #define GPIO_PIN_13 ((uint16_t)0x2000) /* Pin 13 selected */
#define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */ #define GPIO_PIN_14 ((uint16_t)0x4000) /* Pin 14 selected */
#define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */ #define GPIO_PIN_15 ((uint16_t)0x8000) /* Pin 15 selected */
#define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */ #define GPIO_PIN_All ((uint16_t)0xFFFF) /* All pins selected */
#define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */ #define GPIO_PIN_MASK ((uint32_t)0x0000FFFF) /* PIN mask for assert test */
/** /**
* @} * @}
*/ */
/** @defgroup GPIO_mode GPIO mode /** @defgroup GPIO_mode GPIO mode
* @brief GPIO Configuration Mode * @brief GPIO Configuration Mode
* Elements values convention: 0xX0yz00YZ * Elements values convention: 0xX0yz00YZ
* - X : GPIO mode or EXTI Mode * - X : GPIO mode or EXTI Mode
* - y : External IT or Event trigger detection * - y : External IT or Event trigger detection
* - z : IO configuration on External IT or Event * - z : IO configuration on External IT or Event
* - Y : Output type (Push Pull or Open Drain) * - Y : Output type (Push Pull or Open Drain)
* - Z : IO Direction mode (Input, Output, Alternate or Analog) * - Z : IO Direction mode (Input, Output, Alternate or Analog)
* @{ * @{
*/ */
#define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */ #define GPIO_MODE_INPUT ((uint32_t)0x00000000) /*!< Input Floating Mode */
#define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */ #define GPIO_MODE_OUTPUT_PP ((uint32_t)0x00000001) /*!< Output Push Pull Mode */
#define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */ #define GPIO_MODE_OUTPUT_OD ((uint32_t)0x00000011) /*!< Output Open Drain Mode */
#define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */ #define GPIO_MODE_AF_PP ((uint32_t)0x00000002) /*!< Alternate Function Push Pull Mode */
#define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */ #define GPIO_MODE_AF_OD ((uint32_t)0x00000012) /*!< Alternate Function Open Drain Mode */
#define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */ #define GPIO_MODE_ANALOG ((uint32_t)0x00000003) /*!< Analog Mode */
#define GPIO_MODE_ANALOG_ADC_CONTROL ((uint32_t)0x0000000B) /*!< Analog Mode for ADC conversion */ #define GPIO_MODE_ANALOG_ADC_CONTROL ((uint32_t)0x0000000B) /*!< Analog Mode for ADC conversion */
#define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */ #define GPIO_MODE_IT_RISING ((uint32_t)0x10110000) /*!< External Interrupt Mode with Rising edge trigger detection */
#define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */ #define GPIO_MODE_IT_FALLING ((uint32_t)0x10210000) /*!< External Interrupt Mode with Falling edge trigger detection */
#define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ #define GPIO_MODE_IT_RISING_FALLING ((uint32_t)0x10310000) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
#define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */ #define GPIO_MODE_EVT_RISING ((uint32_t)0x10120000) /*!< External Event Mode with Rising edge trigger detection */
#define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */ #define GPIO_MODE_EVT_FALLING ((uint32_t)0x10220000) /*!< External Event Mode with Falling edge trigger detection */
#define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */ #define GPIO_MODE_EVT_RISING_FALLING ((uint32_t)0x10320000) /*!< External Event Mode with Rising/Falling edge trigger detection */
/** /**
* @} * @}
*/ */
/** @defgroup GPIO_speed GPIO speed /** @defgroup GPIO_speed GPIO speed
* @brief GPIO Output Maximum frequency * @brief GPIO Output Maximum frequency
* @{ * @{
*/ */
#define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000) /*!< range up to 5 MHz, please refer to the product datasheet */ #define GPIO_SPEED_FREQ_LOW ((uint32_t)0x00000000) /*!< range up to 5 MHz, please refer to the product datasheet */
#define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001) /*!< range 5 MHz to 25 MHz, please refer to the product datasheet */ #define GPIO_SPEED_FREQ_MEDIUM ((uint32_t)0x00000001) /*!< range 5 MHz to 25 MHz, please refer to the product datasheet */
#define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002) /*!< range 25 MHz to 50 MHz, please refer to the product datasheet */ #define GPIO_SPEED_FREQ_HIGH ((uint32_t)0x00000002) /*!< range 25 MHz to 50 MHz, please refer to the product datasheet */
#define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003) /*!< range 50 MHz to 80 MHz, please refer to the product datasheet */ #define GPIO_SPEED_FREQ_VERY_HIGH ((uint32_t)0x00000003) /*!< range 50 MHz to 80 MHz, please refer to the product datasheet */
/** /**
* @} * @}
*/ */
/** @defgroup GPIO_pull GPIO pull /** @defgroup GPIO_pull GPIO pull
* @brief GPIO Pull-Up or Pull-Down Activation * @brief GPIO Pull-Up or Pull-Down Activation
* @{ * @{
*/ */
#define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */ #define GPIO_NOPULL ((uint32_t)0x00000000) /*!< No Pull-up or Pull-down activation */
#define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */ #define GPIO_PULLUP ((uint32_t)0x00000001) /*!< Pull-up activation */
#define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */ #define GPIO_PULLDOWN ((uint32_t)0x00000002) /*!< Pull-down activation */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup GPIO_Exported_Macros GPIO Exported Macros /** @defgroup GPIO_Exported_Macros GPIO Exported Macros
* @{ * @{
*/ */
/** /**
* @brief Check whether the specified EXTI line flag is set or not. * @brief Check whether the specified EXTI line flag is set or not.
* @param __EXTI_LINE__: specifies the EXTI line flag to check. * @param __EXTI_LINE__: specifies the EXTI line flag to check.
* This parameter can be GPIO_PIN_x where x can be(0..15) * This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET). * @retval The new state of __EXTI_LINE__ (SET or RESET).
*/ */
#define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_GET_FLAG(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__))
/** /**
* @brief Clear the EXTI's line pending flags. * @brief Clear the EXTI's line pending flags.
* @param __EXTI_LINE__: specifies the EXTI lines flags to clear. * @param __EXTI_LINE__: specifies the EXTI lines flags to clear.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15) * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None * @retval None
*/ */
#define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_CLEAR_FLAG(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__))
/** /**
* @brief Check whether the specified EXTI line is asserted or not. * @brief Check whether the specified EXTI line is asserted or not.
* @param __EXTI_LINE__: specifies the EXTI line to check. * @param __EXTI_LINE__: specifies the EXTI line to check.
* This parameter can be GPIO_PIN_x where x can be(0..15) * This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval The new state of __EXTI_LINE__ (SET or RESET). * @retval The new state of __EXTI_LINE__ (SET or RESET).
*/ */
#define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_GET_IT(__EXTI_LINE__) (EXTI->PR1 & (__EXTI_LINE__))
/** /**
* @brief Clear the EXTI's line pending bits. * @brief Clear the EXTI's line pending bits.
* @param __EXTI_LINE__: specifies the EXTI lines to clear. * @param __EXTI_LINE__: specifies the EXTI lines to clear.
* This parameter can be any combination of GPIO_PIN_x where x can be (0..15) * This parameter can be any combination of GPIO_PIN_x where x can be (0..15)
* @retval None * @retval None
*/ */
#define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_CLEAR_IT(__EXTI_LINE__) (EXTI->PR1 = (__EXTI_LINE__))
/** /**
* @brief Generate a Software interrupt on selected EXTI line. * @brief Generate a Software interrupt on selected EXTI line.
* @param __EXTI_LINE__: specifies the EXTI line to check. * @param __EXTI_LINE__: specifies the EXTI line to check.
* This parameter can be GPIO_PIN_x where x can be(0..15) * This parameter can be GPIO_PIN_x where x can be(0..15)
* @retval None * @retval None
*/ */
#define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER1 |= (__EXTI_LINE__)) #define __HAL_GPIO_EXTI_GENERATE_SWIT(__EXTI_LINE__) (EXTI->SWIER1 |= (__EXTI_LINE__))
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @addtogroup GPIO_Private_Macros GPIO Private Macros /** @addtogroup GPIO_Private_Macros GPIO Private Macros
* @{ * @{
*/ */
#define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET)) #define IS_GPIO_PIN_ACTION(ACTION) (((ACTION) == GPIO_PIN_RESET) || ((ACTION) == GPIO_PIN_SET))
#define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00) &&\ #define IS_GPIO_PIN(__PIN__) ((((__PIN__) & GPIO_PIN_MASK) != (uint32_t)0x00) &&\
(((__PIN__) & ~GPIO_PIN_MASK) == (uint32_t)0x00)) (((__PIN__) & ~GPIO_PIN_MASK) == (uint32_t)0x00))
#define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\ #define IS_GPIO_MODE(__MODE__) (((__MODE__) == GPIO_MODE_INPUT) ||\
((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\ ((__MODE__) == GPIO_MODE_OUTPUT_PP) ||\
((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\ ((__MODE__) == GPIO_MODE_OUTPUT_OD) ||\
((__MODE__) == GPIO_MODE_AF_PP) ||\ ((__MODE__) == GPIO_MODE_AF_PP) ||\
((__MODE__) == GPIO_MODE_AF_OD) ||\ ((__MODE__) == GPIO_MODE_AF_OD) ||\
((__MODE__) == GPIO_MODE_IT_RISING) ||\ ((__MODE__) == GPIO_MODE_IT_RISING) ||\
((__MODE__) == GPIO_MODE_IT_FALLING) ||\ ((__MODE__) == GPIO_MODE_IT_FALLING) ||\
((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\ ((__MODE__) == GPIO_MODE_IT_RISING_FALLING) ||\
((__MODE__) == GPIO_MODE_EVT_RISING) ||\ ((__MODE__) == GPIO_MODE_EVT_RISING) ||\
((__MODE__) == GPIO_MODE_EVT_FALLING) ||\ ((__MODE__) == GPIO_MODE_EVT_FALLING) ||\
((__MODE__) == GPIO_MODE_EVT_RISING_FALLING) ||\ ((__MODE__) == GPIO_MODE_EVT_RISING_FALLING) ||\
((__MODE__) == GPIO_MODE_ANALOG) ||\ ((__MODE__) == GPIO_MODE_ANALOG) ||\
((__MODE__) == GPIO_MODE_ANALOG_ADC_CONTROL)) ((__MODE__) == GPIO_MODE_ANALOG_ADC_CONTROL))
#define IS_GPIO_SPEED(__SPEED__) (((__SPEED__) == GPIO_SPEED_FREQ_LOW) ||\ #define IS_GPIO_SPEED(__SPEED__) (((__SPEED__) == GPIO_SPEED_FREQ_LOW) ||\
((__SPEED__) == GPIO_SPEED_FREQ_MEDIUM) ||\ ((__SPEED__) == GPIO_SPEED_FREQ_MEDIUM) ||\
((__SPEED__) == GPIO_SPEED_FREQ_HIGH) ||\ ((__SPEED__) == GPIO_SPEED_FREQ_HIGH) ||\
((__SPEED__) == GPIO_SPEED_FREQ_VERY_HIGH)) ((__SPEED__) == GPIO_SPEED_FREQ_VERY_HIGH))
#define IS_GPIO_PULL(__PULL__) (((__PULL__) == GPIO_NOPULL) ||\ #define IS_GPIO_PULL(__PULL__) (((__PULL__) == GPIO_NOPULL) ||\
((__PULL__) == GPIO_PULLUP) || \ ((__PULL__) == GPIO_PULLUP) || \
((__PULL__) == GPIO_PULLDOWN)) ((__PULL__) == GPIO_PULLDOWN))
/** /**
* @} * @}
*/ */
/* Include GPIO HAL Extended module */ /* Include GPIO HAL Extended module */
#include "stm32l4xx_hal_gpio_ex.h" #include "stm32l4xx_hal_gpio_ex.h"
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup GPIO_Exported_Functions GPIO Exported Functions /** @addtogroup GPIO_Exported_Functions GPIO Exported Functions
* @{ * @{
*/ */
/** @addtogroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions /** @addtogroup GPIO_Exported_Functions_Group1 Initialization/de-initialization functions
* @brief Initialization and Configuration functions * @brief Initialization and Configuration functions
* @{ * @{
*/ */
/* Initialization and de-initialization functions *****************************/ /* Initialization and de-initialization functions *****************************/
void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init); void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init);
void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin); void HAL_GPIO_DeInit(GPIO_TypeDef *GPIOx, uint32_t GPIO_Pin);
/** /**
* @} * @}
*/ */
/** @addtogroup GPIO_Exported_Functions_Group2 IO operation functions /** @addtogroup GPIO_Exported_Functions_Group2 IO operation functions
* @{ * @{
*/ */
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); GPIO_PinState HAL_GPIO_ReadPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState); void HAL_GPIO_WritePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState);
void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); void HAL_GPIO_TogglePin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin); HAL_StatusTypeDef HAL_GPIO_LockPin(GPIO_TypeDef* GPIOx, uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin); void HAL_GPIO_EXTI_IRQHandler(uint16_t GPIO_Pin);
void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin); void HAL_GPIO_EXTI_Callback(uint16_t GPIO_Pin);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_GPIO_H */ #endif /* __STM32L4xx_HAL_GPIO_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_hash_ex.h * @file stm32l4xx_hal_hash_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of HASH HAL module. * @brief Header file of HASH HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_HASH_EX_H #ifndef __STM32L4xx_HAL_HASH_EX_H
#define __STM32L4xx_HAL_HASH_EX_H #define __STM32L4xx_HAL_HASH_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined (STM32L4A6xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) #if defined (STM32L4A6xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup HASHEx /** @addtogroup HASHEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup HASHEx_Exported_Functions HASH Extended Exported Functions /** @addtogroup HASHEx_Exported_Functions HASH Extended Exported Functions
* @{ * @{
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group1 HASH extended processing functions in polling mode /** @addtogroup HASHEx_Exported_Functions_Group1 HASH extended processing functions in polling mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout); HAL_StatusTypeDef HAL_HASHEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA224_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout); HAL_StatusTypeDef HAL_HASHEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA256_Accumulate(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
/** /**
* @} * @}
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group2 HASH extended processing functions in interrupt mode /** @addtogroup HASHEx_Exported_Functions_Group2 HASH extended processing functions in interrupt mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer); HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer); HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
/** /**
* @} * @}
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group3 HASH extended processing functions in DMA mode /** @addtogroup HASHEx_Exported_Functions_Group3 HASH extended processing functions in DMA mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout); HAL_StatusTypeDef HAL_HASHEx_SHA224_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HASHEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout); HAL_StatusTypeDef HAL_HASHEx_SHA256_Finish(HASH_HandleTypeDef *hhash, uint8_t* pOutBuffer, uint32_t Timeout);
/** /**
* @} * @}
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group4 HMAC extended processing functions in polling mode /** @addtogroup HASHEx_Exported_Functions_Group4 HMAC extended processing functions in polling mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout); HAL_StatusTypeDef HAL_HMACEx_SHA224_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout); HAL_StatusTypeDef HAL_HMACEx_SHA256_Start(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer, uint32_t Timeout);
/** /**
* @} * @}
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group5 HMAC extended processing functions in interrupt mode /** @addtogroup HASHEx_Exported_Functions_Group5 HMAC extended processing functions in interrupt mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer); HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer); HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_IT(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size, uint8_t* pOutBuffer);
/** /**
* @} * @}
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group6 HMAC extended processing functions in DMA mode /** @addtogroup HASHEx_Exported_Functions_Group6 HMAC extended processing functions in DMA mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA224_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA256_Start_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
/** /**
* @} * @}
*/ */
/** @addtogroup HASHEx_Exported_Functions_Group7 Multi-buffer HMAC extended processing functions in DMA mode /** @addtogroup HASHEx_Exported_Functions_Group7 Multi-buffer HMAC extended processing functions in DMA mode
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_MD5_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_MD5_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA1_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA1_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA224_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA224_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA256_Step1_2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size); HAL_StatusTypeDef HAL_HMACEx_SHA256_Step2_3_DMA(HASH_HandleTypeDef *hhash, uint8_t *pInBuffer, uint32_t Size);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* defined (STM32L4A6xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) */ #endif /* defined (STM32L4A6xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_HASH_EX_H */ #endif /* __STM32L4xx_HAL_HASH_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

605
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_hcd.h
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@ -1,263 +1,342 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_hcd.h * @file stm32l4xx_hal_hcd.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of HCD HAL module. * @brief Header file of HCD HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_HCD_H #ifndef __STM32L4xx_HAL_HCD_H
#define __STM32L4xx_HAL_HCD_H #define __STM32L4xx_HAL_HCD_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ /* Includes ------------------------------------------------------------------*/
defined(STM32L496xx) || defined(STM32L4A6xx) || \ #include "stm32l4xx_ll_usb.h"
defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
#if defined (USB_OTG_FS) || defined (USB_OTG_HS)
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_usb.h" /** @addtogroup STM32L4xx_HAL_Driver
* @{
/** @addtogroup STM32L4xx_HAL_Driver */
* @{
*/ /** @addtogroup HCD
* @{
/** @addtogroup HCD */
* @{
*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup HCD_Exported_Types HCD Exported Types
/* Exported types ------------------------------------------------------------*/ * @{
/** @defgroup HCD_Exported_Types HCD Exported Types */
* @{
*/ /** @defgroup HCD_Exported_Types_Group1 HCD State Structure definition
* @{
/** @defgroup HCD_Exported_Types_Group1 HCD State Structure definition */
* @{ typedef enum
*/ {
typedef enum HAL_HCD_STATE_RESET = 0x00,
{ HAL_HCD_STATE_READY = 0x01,
HAL_HCD_STATE_RESET = 0x00, HAL_HCD_STATE_ERROR = 0x02,
HAL_HCD_STATE_READY = 0x01, HAL_HCD_STATE_BUSY = 0x03,
HAL_HCD_STATE_ERROR = 0x02, HAL_HCD_STATE_TIMEOUT = 0x04
HAL_HCD_STATE_BUSY = 0x03, } HCD_StateTypeDef;
HAL_HCD_STATE_TIMEOUT = 0x04
} HCD_StateTypeDef; typedef USB_OTG_GlobalTypeDef HCD_TypeDef;
typedef USB_OTG_CfgTypeDef HCD_InitTypeDef;
typedef USB_OTG_GlobalTypeDef HCD_TypeDef; typedef USB_OTG_HCTypeDef HCD_HCTypeDef;
typedef USB_OTG_CfgTypeDef HCD_InitTypeDef; typedef USB_OTG_URBStateTypeDef HCD_URBStateTypeDef;
typedef USB_OTG_HCTypeDef HCD_HCTypeDef ; typedef USB_OTG_HCStateTypeDef HCD_HCStateTypeDef;
typedef USB_OTG_URBStateTypeDef HCD_URBStateTypeDef ; /**
typedef USB_OTG_HCStateTypeDef HCD_HCStateTypeDef ; * @}
/** */
* @}
*/ /** @defgroup HCD_Exported_Types_Group2 HCD Handle Structure definition
* @{
/** @defgroup HCD_Exported_Types_Group2 HCD Handle Structure definition */
* @{ typedef struct __HCD_HandleTypeDef
*/ {
typedef struct HCD_TypeDef *Instance; /*!< Register base address */
{ HCD_InitTypeDef Init; /*!< HCD required parameters */
HCD_TypeDef *Instance; /*!< Register base address */ HCD_HCTypeDef hc[16]; /*!< Host channels parameters */
HCD_InitTypeDef Init; /*!< HCD required parameters */ HAL_LockTypeDef Lock; /*!< HCD peripheral status */
HCD_HCTypeDef hc[15]; /*!< Host channels parameters */ __IO HCD_StateTypeDef State; /*!< HCD communication state */
HAL_LockTypeDef Lock; /*!< HCD peripheral status */ __IO uint32_t ErrorCode; /*!< HCD Error code */
__IO HCD_StateTypeDef State; /*!< HCD communication state */ void *pData; /*!< Pointer Stack Handler */
void *pData; /*!< Pointer Stack Handler */ #if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
void (* SOFCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD SOF callback */
} HCD_HandleTypeDef; void (* ConnectCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Connect callback */
/** void (* DisconnectCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Disconnect callback */
* @} void (* PortEnabledCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Port Enable callback */
*/ void (* PortDisabledCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Port Disable callback */
void (* HC_NotifyURBChangeCallback)(struct __HCD_HandleTypeDef *hhcd, uint8_t chnum,
/** HCD_URBStateTypeDef urb_state); /*!< USB OTG HCD Host Channel Notify URB Change callback */
* @}
*/ void (* MspInitCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Msp Init callback */
void (* MspDeInitCallback)(struct __HCD_HandleTypeDef *hhcd); /*!< USB OTG HCD Msp DeInit callback */
/* Exported constants --------------------------------------------------------*/ #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
/** @defgroup HCD_Exported_Constants HCD Exported Constants } HCD_HandleTypeDef;
* @{ /**
*/ * @}
*/
/** @defgroup HCD_Speed HCD Speed
* @{ /**
*/ * @}
#define HCD_SPEED_HIGH 0 */
#define HCD_SPEED_LOW 2
#define HCD_SPEED_FULL 3 /* Exported constants --------------------------------------------------------*/
/** /** @defgroup HCD_Exported_Constants HCD Exported Constants
* @} * @{
*/ */
/** @defgroup HCD_PHY_Module HCD PHY Module /** @defgroup HCD_Speed HCD Speed
* @{ * @{
*/ */
#define HCD_PHY_EMBEDDED 1 #define HCD_SPEED_HIGH 0U
/** #define HCD_SPEED_LOW 2U
* @} #define HCD_SPEED_FULL 3U
*/ /**
* @}
/** */
* @}
*/ /** @defgroup HCD_PHY_Module HCD PHY Module
* @{
/* Exported macro ------------------------------------------------------------*/ */
/** @defgroup HCD_Exported_Macros HCD Exported Macros #define HCD_PHY_ULPI 1U
* @brief macros to handle interrupts and specific clock configurations #define HCD_PHY_EMBEDDED 2U
* @{ /**
*/ * @}
#define __HAL_HCD_ENABLE(__HANDLE__) USB_EnableGlobalInt ((__HANDLE__)->Instance) */
#define __HAL_HCD_DISABLE(__HANDLE__) USB_DisableGlobalInt ((__HANDLE__)->Instance)
/** @defgroup HCD_Error_Code_definition HCD Error Code definition
#define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__)) * @brief HCD Error Code definition
#define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__)) * @{
#define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0) */
#if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
#define __HAL_HCD_CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__)) #define HAL_HCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
#define __HAL_HCD_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM) #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
#define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
#define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM) /**
#define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM) * @}
/** */
* @}
*/ /**
* @}
/* Exported functions --------------------------------------------------------*/ */
/** @addtogroup HCD_Exported_Functions HCD Exported Functions
* @{ /* Exported macro ------------------------------------------------------------*/
*/ /** @defgroup HCD_Exported_Macros HCD Exported Macros
* @brief macros to handle interrupts and specific clock configurations
/* Initialization/de-initialization functions ********************************/ * @{
/** @addtogroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions */
* @{ #define __HAL_HCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
*/ #define __HAL_HCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_DeInit (HCD_HandleTypeDef *hhcd); #define __HAL_HCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd, #define __HAL_HCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->GINTSTS) = (__INTERRUPT__))
uint8_t ch_num, #define __HAL_HCD_IS_INVALID_INTERRUPT(__HANDLE__) (USB_ReadInterrupts((__HANDLE__)->Instance) == 0U)
uint8_t epnum,
uint8_t dev_address, #define __HAL_HCD_CLEAR_HC_INT(chnum, __INTERRUPT__) (USBx_HC(chnum)->HCINT = (__INTERRUPT__))
uint8_t speed, #define __HAL_HCD_MASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_CHHM)
uint8_t ep_type, #define __HAL_HCD_UNMASK_HALT_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_CHHM)
uint16_t mps); #define __HAL_HCD_MASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK &= ~USB_OTG_HCINTMSK_ACKM)
#define __HAL_HCD_UNMASK_ACK_HC_INT(chnum) (USBx_HC(chnum)->HCINTMSK |= USB_OTG_HCINTMSK_ACKM)
HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, /**
uint8_t ch_num); * @}
*/
void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd); /* Exported functions --------------------------------------------------------*/
/** /** @addtogroup HCD_Exported_Functions HCD Exported Functions
* @} * @{
*/ */
/* I/O operation functions ***************************************************/ /** @defgroup HCD_Exported_Functions_Group1 Initialization and de-initialization functions
/** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions * @{
* @{ */
*/ HAL_StatusTypeDef HAL_HCD_Init(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd, HAL_StatusTypeDef HAL_HCD_DeInit(HCD_HandleTypeDef *hhcd);
uint8_t pipe, HAL_StatusTypeDef HAL_HCD_HC_Init(HCD_HandleTypeDef *hhcd,
uint8_t direction , uint8_t ch_num,
uint8_t ep_type, uint8_t epnum,
uint8_t token, uint8_t dev_address,
uint8_t* pbuff, uint8_t speed,
uint16_t length, uint8_t ep_type,
uint8_t do_ping); uint16_t mps);
/* Non-Blocking mode: Interrupt */ HAL_StatusTypeDef HAL_HCD_HC_Halt(HCD_HandleTypeDef *hhcd, uint8_t ch_num);
void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd); void HAL_HCD_MspInit(HCD_HandleTypeDef *hhcd);
void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd); void HAL_HCD_MspDeInit(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd); #if (USE_HAL_HCD_REGISTER_CALLBACKS == 1U)
void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd, /** @defgroup HAL_HCD_Callback_ID_enumeration_definition HAL USB OTG HCD Callback ID enumeration definition
uint8_t chnum, * @brief HAL USB OTG HCD Callback ID enumeration definition
HCD_URBStateTypeDef urb_state); * @{
/** */
* @} typedef enum
*/ {
HAL_HCD_SOF_CB_ID = 0x01, /*!< USB HCD SOF callback ID */
/* Peripheral Control functions **********************************************/ HAL_HCD_CONNECT_CB_ID = 0x02, /*!< USB HCD Connect callback ID */
/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions HAL_HCD_DISCONNECT_CB_ID = 0x03, /*!< USB HCD Disconnect callback ID */
* @{ HAL_HCD_PORT_ENABLED_CB_ID = 0x04, /*!< USB HCD Port Enable callback ID */
*/ HAL_HCD_PORT_DISABLED_CB_ID = 0x05, /*!< USB HCD Port Disable callback ID */
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd); HAL_HCD_MSPINIT_CB_ID = 0x06, /*!< USB HCD MspInit callback ID */
HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd); HAL_HCD_MSPDEINIT_CB_ID = 0x07 /*!< USB HCD MspDeInit callback ID */
/**
* @} } HAL_HCD_CallbackIDTypeDef;
*/ /**
* @}
/* Peripheral State functions ************************************************/ */
/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
* @{ /** @defgroup HAL_HCD_Callback_pointer_definition HAL USB OTG HCD Callback pointer definition
*/ * @brief HAL USB OTG HCD Callback pointer definition
HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd); * @{
HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum); */
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum); typedef void (*pHCD_CallbackTypeDef)(HCD_HandleTypeDef *hhcd); /*!< pointer to a common USB OTG HCD callback function */
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd); typedef void (*pHCD_HC_NotifyURBChangeCallbackTypeDef)(HCD_HandleTypeDef *hhcd,
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd); uint8_t epnum,
/** HCD_URBStateTypeDef urb_state); /*!< pointer to USB OTG HCD host channel callback */
* @} /**
*/ * @}
*/
/**
* @} HAL_StatusTypeDef HAL_HCD_RegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID, pHCD_CallbackTypeDef pCallback);
*/ HAL_StatusTypeDef HAL_HCD_UnRegisterCallback(HCD_HandleTypeDef *hhcd, HAL_HCD_CallbackIDTypeDef CallbackID);
/* Private macros ------------------------------------------------------------*/ HAL_StatusTypeDef HAL_HCD_RegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd, pHCD_HC_NotifyURBChangeCallbackTypeDef pCallback);
/** @defgroup HCD_Private_Macros HCD Private Macros HAL_StatusTypeDef HAL_HCD_UnRegisterHC_NotifyURBChangeCallback(HCD_HandleTypeDef *hhcd);
* @{ #endif /* USE_HAL_HCD_REGISTER_CALLBACKS */
*/ /**
* @}
/** */
* @}
*/ /* I/O operation functions ***************************************************/
/** @addtogroup HCD_Exported_Functions_Group2 Input and Output operation functions
/** * @{
* @} */
*/ HAL_StatusTypeDef HAL_HCD_HC_SubmitRequest(HCD_HandleTypeDef *hhcd,
uint8_t pipe,
/** uint8_t direction,
* @} uint8_t ep_type,
*/ uint8_t token,
uint8_t *pbuff,
#endif /* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ uint16_t length,
/* STM32L496xx || STM32L4A6xx || */ uint8_t do_ping);
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
/* Non-Blocking mode: Interrupt */
#ifdef __cplusplus void HAL_HCD_IRQHandler(HCD_HandleTypeDef *hhcd);
} void HAL_HCD_SOF_Callback(HCD_HandleTypeDef *hhcd);
#endif void HAL_HCD_Connect_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_Disconnect_Callback(HCD_HandleTypeDef *hhcd);
#endif /* __STM32L4xx_HAL_HCD_H */ void HAL_HCD_PortEnabled_Callback(HCD_HandleTypeDef *hhcd);
void HAL_HCD_PortDisabled_Callback(HCD_HandleTypeDef *hhcd);
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ void HAL_HCD_HC_NotifyURBChange_Callback(HCD_HandleTypeDef *hhcd,
uint8_t chnum,
HCD_URBStateTypeDef urb_state);
/**
* @}
*/
/* Peripheral Control functions **********************************************/
/** @addtogroup HCD_Exported_Functions_Group3 Peripheral Control functions
* @{
*/
HAL_StatusTypeDef HAL_HCD_ResetPort(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Start(HCD_HandleTypeDef *hhcd);
HAL_StatusTypeDef HAL_HCD_Stop(HCD_HandleTypeDef *hhcd);
/**
* @}
*/
/* Peripheral State functions ************************************************/
/** @addtogroup HCD_Exported_Functions_Group4 Peripheral State functions
* @{
*/
HCD_StateTypeDef HAL_HCD_GetState(HCD_HandleTypeDef *hhcd);
HCD_URBStateTypeDef HAL_HCD_HC_GetURBState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_HC_GetXferCount(HCD_HandleTypeDef *hhcd, uint8_t chnum);
HCD_HCStateTypeDef HAL_HCD_HC_GetState(HCD_HandleTypeDef *hhcd, uint8_t chnum);
uint32_t HAL_HCD_GetCurrentFrame(HCD_HandleTypeDef *hhcd);
uint32_t HAL_HCD_GetCurrentSpeed(HCD_HandleTypeDef *hhcd);
/**
* @}
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup HCD_Private_Macros HCD Private Macros
* @{
*/
/**
* @}
*/
/* Private functions prototypes ----------------------------------------------*/
/** @defgroup HCD_Private_Functions_Prototypes HCD Private Functions Prototypes
* @{
*/
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/** @defgroup HCD_Private_Functions HCD Private Functions
* @{
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* defined (USB_OTG_FS) || defined (USB_OTG_HS) */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_HCD_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

1502
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_i2c.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_i2c_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_i2c_ex.h * @file stm32l4xx_hal_i2c_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of I2C HAL Extended module. * @brief Header file of I2C HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_I2C_EX_H #ifndef STM32L4xx_HAL_I2C_EX_H
#define __STM32L4xx_HAL_I2C_EX_H #define STM32L4xx_HAL_I2C_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup I2CEx /** @addtogroup I2CEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants /** @defgroup I2CEx_Exported_Constants I2C Extended Exported Constants
* @{ * @{
*/ */
/** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter /** @defgroup I2CEx_Analog_Filter I2C Extended Analog Filter
* @{ * @{
*/ */
#define I2C_ANALOGFILTER_ENABLE 0x00000000U #define I2C_ANALOGFILTER_ENABLE 0x00000000U
#define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF #define I2C_ANALOGFILTER_DISABLE I2C_CR1_ANFOFF
/** /**
* @} * @}
*/ */
/** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus /** @defgroup I2CEx_FastModePlus I2C Extended Fast Mode Plus
* @{ * @{
*/ */
#define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */ #define I2C_FMP_NOT_SUPPORTED 0xAAAA0000U /*!< Fast Mode Plus not supported */
#define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */ #define I2C_FASTMODEPLUS_PB6 SYSCFG_CFGR1_I2C_PB6_FMP /*!< Enable Fast Mode Plus on PB6 */
#define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */ #define I2C_FASTMODEPLUS_PB7 SYSCFG_CFGR1_I2C_PB7_FMP /*!< Enable Fast Mode Plus on PB7 */
#if defined(SYSCFG_CFGR1_I2C_PB8_FMP) #if defined(SYSCFG_CFGR1_I2C_PB8_FMP)
#define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */ #define I2C_FASTMODEPLUS_PB8 SYSCFG_CFGR1_I2C_PB8_FMP /*!< Enable Fast Mode Plus on PB8 */
#define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */ #define I2C_FASTMODEPLUS_PB9 SYSCFG_CFGR1_I2C_PB9_FMP /*!< Enable Fast Mode Plus on PB9 */
#else #else
#define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */ #define I2C_FASTMODEPLUS_PB8 (uint32_t)(0x00000010U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB8 not supported */
#define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */ #define I2C_FASTMODEPLUS_PB9 (uint32_t)(0x00000012U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus PB9 not supported */
#endif #endif
#define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */ #define I2C_FASTMODEPLUS_I2C1 SYSCFG_CFGR1_I2C1_FMP /*!< Enable Fast Mode Plus on I2C1 pins */
#if defined(SYSCFG_CFGR1_I2C2_FMP) #if defined(SYSCFG_CFGR1_I2C2_FMP)
#define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */ #define I2C_FASTMODEPLUS_I2C2 SYSCFG_CFGR1_I2C2_FMP /*!< Enable Fast Mode Plus on I2C2 pins */
#else #else
#define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */ #define I2C_FASTMODEPLUS_I2C2 (uint32_t)(0x00000200U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C2 not supported */
#endif #endif
#define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */ #define I2C_FASTMODEPLUS_I2C3 SYSCFG_CFGR1_I2C3_FMP /*!< Enable Fast Mode Plus on I2C3 pins */
#if defined(SYSCFG_CFGR1_I2C4_FMP) #if defined(SYSCFG_CFGR1_I2C4_FMP)
#define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */ #define I2C_FASTMODEPLUS_I2C4 SYSCFG_CFGR1_I2C4_FMP /*!< Enable Fast Mode Plus on I2C4 pins */
#else #else
#define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */ #define I2C_FASTMODEPLUS_I2C4 (uint32_t)(0x00000800U | I2C_FMP_NOT_SUPPORTED) /*!< Fast Mode Plus I2C4 not supported */
#endif #endif
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions /** @addtogroup I2CEx_Exported_Functions I2C Extended Exported Functions
* @{ * @{
*/ */
/** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions /** @addtogroup I2CEx_Exported_Functions_Group1 Extended features functions
* @brief Extended features functions * @brief Extended features functions
* @{ * @{
*/ */
/* Peripheral Control functions ************************************************/ /* Peripheral Control functions ************************************************/
HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter); HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter);
HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter); HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter);
HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c); HAL_StatusTypeDef HAL_I2CEx_EnableWakeUp(I2C_HandleTypeDef *hi2c);
HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c); HAL_StatusTypeDef HAL_I2CEx_DisableWakeUp(I2C_HandleTypeDef *hi2c);
void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus); void HAL_I2CEx_EnableFastModePlus(uint32_t ConfigFastModePlus);
void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus); void HAL_I2CEx_DisableFastModePlus(uint32_t ConfigFastModePlus);
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup I2CEx_Private_Constants I2C Extended Private Constants /** @defgroup I2CEx_Private_Constants I2C Extended Private Constants
* @{ * @{
*/ */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup I2CEx_Private_Macro I2C Extended Private Macros /** @defgroup I2CEx_Private_Macro I2C Extended Private Macros
* @{ * @{
*/ */
#define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \ #define IS_I2C_ANALOG_FILTER(FILTER) (((FILTER) == I2C_ANALOGFILTER_ENABLE) || \
((FILTER) == I2C_ANALOGFILTER_DISABLE)) ((FILTER) == I2C_ANALOGFILTER_DISABLE))
#define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU) #define IS_I2C_DIGITAL_FILTER(FILTER) ((FILTER) <= 0x0000000FU)
#define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \ #define IS_I2C_FASTMODEPLUS(__CONFIG__) ((((__CONFIG__) & I2C_FMP_NOT_SUPPORTED) != I2C_FMP_NOT_SUPPORTED) && \
((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \ ((((__CONFIG__) & (I2C_FASTMODEPLUS_PB6)) == I2C_FASTMODEPLUS_PB6) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_PB7)) == I2C_FASTMODEPLUS_PB7) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_PB8)) == I2C_FASTMODEPLUS_PB8) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_PB9)) == I2C_FASTMODEPLUS_PB9) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C1)) == I2C_FASTMODEPLUS_I2C1) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C2)) == I2C_FASTMODEPLUS_I2C2) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \ (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C3)) == I2C_FASTMODEPLUS_I2C3) || \
(((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4))) (((__CONFIG__) & (I2C_FASTMODEPLUS_I2C4)) == I2C_FASTMODEPLUS_I2C4)))
/** /**
* @} * @}
*/ */
/* Private Functions ---------------------------------------------------------*/ /* Private Functions ---------------------------------------------------------*/
/** @defgroup I2CEx_Private_Functions I2C Extended Private Functions /** @defgroup I2CEx_Private_Functions I2C Extended Private Functions
* @{ * @{
*/ */
/* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */ /* Private functions are defined in stm32l4xx_hal_i2c_ex.c file */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_I2C_EX_H */ #endif /* STM32L4xx_HAL_I2C_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_irda.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_irda_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_irda_ex.h * @file stm32l4xx_hal_irda_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of IRDA HAL Extended module. * @brief Header file of IRDA HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_IRDA_EX_H #ifndef __STM32L4xx_HAL_IRDA_EX_H
#define __STM32L4xx_HAL_IRDA_EX_H #define __STM32L4xx_HAL_IRDA_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup IRDAEx /** @defgroup IRDAEx IRDAEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros /** @defgroup IRDAEx_Private_Macros IRDAEx Private Macros
* @{ * @{
*/ */
/** @brief Report the IRDA clock source. /** @brief Report the IRDA clock source.
* @param __HANDLE__ specifies the IRDA Handle. * @param __HANDLE__ specifies the IRDA Handle.
* @param __CLOCKSOURCE__ output variable. * @param __CLOCKSOURCE__ output variable.
* @retval IRDA clocking source, written in __CLOCKSOURCE__. * @retval IRDA clocking source, written in __CLOCKSOURCE__.
*/ */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) \
defined (STM32L496xx) || defined (STM32L4A6xx) || \ || defined (STM32L496xx) || defined (STM32L4A6xx) \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) || defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
do { \ do { \
if((__HANDLE__)->Instance == USART1) \ if((__HANDLE__)->Instance == USART1) \
{ \ { \
switch(__HAL_RCC_GET_USART1_SOURCE()) \ switch(__HAL_RCC_GET_USART1_SOURCE()) \
{ \ { \
case RCC_USART1CLKSOURCE_PCLK2: \ case RCC_USART1CLKSOURCE_PCLK2: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
break; \ break; \
case RCC_USART1CLKSOURCE_HSI: \ case RCC_USART1CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART1CLKSOURCE_SYSCLK: \ case RCC_USART1CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART1CLKSOURCE_LSE: \ case RCC_USART1CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART2) \ else if((__HANDLE__)->Instance == USART2) \
{ \ { \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ switch(__HAL_RCC_GET_USART2_SOURCE()) \
{ \ { \
case RCC_USART2CLKSOURCE_PCLK1: \ case RCC_USART2CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART2CLKSOURCE_HSI: \ case RCC_USART2CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART2CLKSOURCE_SYSCLK: \ case RCC_USART2CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART2CLKSOURCE_LSE: \ case RCC_USART2CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART3) \ else if((__HANDLE__)->Instance == USART3) \
{ \ { \
switch(__HAL_RCC_GET_USART3_SOURCE()) \ switch(__HAL_RCC_GET_USART3_SOURCE()) \
{ \ { \
case RCC_USART3CLKSOURCE_PCLK1: \ case RCC_USART3CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART3CLKSOURCE_HSI: \ case RCC_USART3CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART3CLKSOURCE_SYSCLK: \ case RCC_USART3CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART3CLKSOURCE_LSE: \ case RCC_USART3CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == UART4) \ else if((__HANDLE__)->Instance == UART4) \
{ \ { \
switch(__HAL_RCC_GET_UART4_SOURCE()) \ switch(__HAL_RCC_GET_UART4_SOURCE()) \
{ \ { \
case RCC_UART4CLKSOURCE_PCLK1: \ case RCC_UART4CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_UART4CLKSOURCE_HSI: \ case RCC_UART4CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_UART4CLKSOURCE_SYSCLK: \ case RCC_UART4CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_UART4CLKSOURCE_LSE: \ case RCC_UART4CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if ((__HANDLE__)->Instance == UART5) \ else if ((__HANDLE__)->Instance == UART5) \
{ \ { \
switch(__HAL_RCC_GET_UART5_SOURCE()) \ switch(__HAL_RCC_GET_UART5_SOURCE()) \
{ \ { \
case RCC_UART5CLKSOURCE_PCLK1: \ case RCC_UART5CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_UART5CLKSOURCE_HSI: \ case RCC_UART5CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_UART5CLKSOURCE_SYSCLK: \ case RCC_UART5CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_UART5CLKSOURCE_LSE: \ case RCC_UART5CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
} while(0) } while(0)
#elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx) #elif defined (STM32L431xx) || defined (STM32L433xx) || defined (STM32L443xx)
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
do { \ do { \
if((__HANDLE__)->Instance == USART1) \ if((__HANDLE__)->Instance == USART1) \
{ \ { \
switch(__HAL_RCC_GET_USART1_SOURCE()) \ switch(__HAL_RCC_GET_USART1_SOURCE()) \
{ \ { \
case RCC_USART1CLKSOURCE_PCLK2: \ case RCC_USART1CLKSOURCE_PCLK2: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
break; \ break; \
case RCC_USART1CLKSOURCE_HSI: \ case RCC_USART1CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART1CLKSOURCE_SYSCLK: \ case RCC_USART1CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART1CLKSOURCE_LSE: \ case RCC_USART1CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART2) \ else if((__HANDLE__)->Instance == USART2) \
{ \ { \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ switch(__HAL_RCC_GET_USART2_SOURCE()) \
{ \ { \
case RCC_USART2CLKSOURCE_PCLK1: \ case RCC_USART2CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART2CLKSOURCE_HSI: \ case RCC_USART2CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART2CLKSOURCE_SYSCLK: \ case RCC_USART2CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART2CLKSOURCE_LSE: \ case RCC_USART2CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART3) \ else if((__HANDLE__)->Instance == USART3) \
{ \ { \
switch(__HAL_RCC_GET_USART3_SOURCE()) \ switch(__HAL_RCC_GET_USART3_SOURCE()) \
{ \ { \
case RCC_USART3CLKSOURCE_PCLK1: \ case RCC_USART3CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART3CLKSOURCE_HSI: \ case RCC_USART3CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART3CLKSOURCE_SYSCLK: \ case RCC_USART3CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART3CLKSOURCE_LSE: \ case RCC_USART3CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
} while(0) } while(0)
#elif defined (STM32L432xx) || defined (STM32L442xx) #elif defined (STM32L432xx) || defined (STM32L442xx)
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
do { \ do { \
if((__HANDLE__)->Instance == USART1) \ if((__HANDLE__)->Instance == USART1) \
{ \ { \
switch(__HAL_RCC_GET_USART1_SOURCE()) \ switch(__HAL_RCC_GET_USART1_SOURCE()) \
{ \ { \
case RCC_USART1CLKSOURCE_PCLK2: \ case RCC_USART1CLKSOURCE_PCLK2: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
break; \ break; \
case RCC_USART1CLKSOURCE_HSI: \ case RCC_USART1CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART1CLKSOURCE_SYSCLK: \ case RCC_USART1CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART1CLKSOURCE_LSE: \ case RCC_USART1CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART2) \ else if((__HANDLE__)->Instance == USART2) \
{ \ { \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ switch(__HAL_RCC_GET_USART2_SOURCE()) \
{ \ { \
case RCC_USART2CLKSOURCE_PCLK1: \ case RCC_USART2CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART2CLKSOURCE_HSI: \ case RCC_USART2CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART2CLKSOURCE_SYSCLK: \ case RCC_USART2CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART2CLKSOURCE_LSE: \ case RCC_USART2CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
} while(0) } while(0)
#elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) #elif defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
#define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ #define IRDA_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
do { \ do { \
if((__HANDLE__)->Instance == USART1) \ if((__HANDLE__)->Instance == USART1) \
{ \ { \
switch(__HAL_RCC_GET_USART1_SOURCE()) \ switch(__HAL_RCC_GET_USART1_SOURCE()) \
{ \ { \
case RCC_USART1CLKSOURCE_PCLK2: \ case RCC_USART1CLKSOURCE_PCLK2: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK2; \
break; \ break; \
case RCC_USART1CLKSOURCE_HSI: \ case RCC_USART1CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART1CLKSOURCE_SYSCLK: \ case RCC_USART1CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART1CLKSOURCE_LSE: \ case RCC_USART1CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART2) \ else if((__HANDLE__)->Instance == USART2) \
{ \ { \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ switch(__HAL_RCC_GET_USART2_SOURCE()) \
{ \ { \
case RCC_USART2CLKSOURCE_PCLK1: \ case RCC_USART2CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART2CLKSOURCE_HSI: \ case RCC_USART2CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART2CLKSOURCE_SYSCLK: \ case RCC_USART2CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART2CLKSOURCE_LSE: \ case RCC_USART2CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == USART3) \ else if((__HANDLE__)->Instance == USART3) \
{ \ { \
switch(__HAL_RCC_GET_USART3_SOURCE()) \ switch(__HAL_RCC_GET_USART3_SOURCE()) \
{ \ { \
case RCC_USART3CLKSOURCE_PCLK1: \ case RCC_USART3CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_USART3CLKSOURCE_HSI: \ case RCC_USART3CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_USART3CLKSOURCE_SYSCLK: \ case RCC_USART3CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_USART3CLKSOURCE_LSE: \ case RCC_USART3CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
else if((__HANDLE__)->Instance == UART4) \ else if((__HANDLE__)->Instance == UART4) \
{ \ { \
switch(__HAL_RCC_GET_UART4_SOURCE()) \ switch(__HAL_RCC_GET_UART4_SOURCE()) \
{ \ { \
case RCC_UART4CLKSOURCE_PCLK1: \ case RCC_UART4CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_PCLK1; \
break; \ break; \
case RCC_UART4CLKSOURCE_HSI: \ case RCC_UART4CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_HSI; \
break; \ break; \
case RCC_UART4CLKSOURCE_SYSCLK: \ case RCC_UART4CLKSOURCE_SYSCLK: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_SYSCLK; \
break; \ break; \
case RCC_UART4CLKSOURCE_LSE: \ case RCC_UART4CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_LSE; \
break; \ break; \
default: \ default: \
(__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \ (__CLOCKSOURCE__) = IRDA_CLOCKSOURCE_UNDEFINED; \
break; \ break; \
} \ } \
} \ } \
} while(0) } while(0)
#endif #endif
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_IRDA_EX_H */ #endif /* __STM32L4xx_HAL_IRDA_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

510
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_iwdg.h
View file

@ -1,255 +1,255 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_iwdg.h * @file stm32l4xx_hal_iwdg.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of IWDG HAL module. * @brief Header file of IWDG HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_IWDG_H #ifndef __STM32L4xx_HAL_IWDG_H
#define __STM32L4xx_HAL_IWDG_H #define __STM32L4xx_HAL_IWDG_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @defgroup IWDG IWDG /** @defgroup IWDG IWDG
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup IWDG_Exported_Types IWDG Exported Types /** @defgroup IWDG_Exported_Types IWDG Exported Types
* @{ * @{
*/ */
/** /**
* @brief IWDG Init structure definition * @brief IWDG Init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Prescaler; /*!< Select the prescaler of the IWDG. uint32_t Prescaler; /*!< Select the prescaler of the IWDG.
This parameter can be a value of @ref IWDG_Prescaler */ This parameter can be a value of @ref IWDG_Prescaler */
uint32_t Reload; /*!< Specifies the IWDG down-counter reload value. uint32_t Reload; /*!< Specifies the IWDG down-counter reload value.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
uint32_t Window; /*!< Specifies the window value to be compared to the down-counter. uint32_t Window; /*!< Specifies the window value to be compared to the down-counter.
This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */ This parameter must be a number between Min_Data = 0 and Max_Data = 0x0FFF */
} IWDG_InitTypeDef; } IWDG_InitTypeDef;
/** /**
* @brief IWDG Handle Structure definition * @brief IWDG Handle Structure definition
*/ */
typedef struct typedef struct
{ {
IWDG_TypeDef *Instance; /*!< Register base address */ IWDG_TypeDef *Instance; /*!< Register base address */
IWDG_InitTypeDef Init; /*!< IWDG required parameters */ IWDG_InitTypeDef Init; /*!< IWDG required parameters */
}IWDG_HandleTypeDef; }IWDG_HandleTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Constants IWDG Exported Constants /** @defgroup IWDG_Exported_Constants IWDG Exported Constants
* @{ * @{
*/ */
/** @defgroup IWDG_Prescaler IWDG Prescaler /** @defgroup IWDG_Prescaler IWDG Prescaler
* @{ * @{
*/ */
#define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */ #define IWDG_PRESCALER_4 0x00000000u /*!< IWDG prescaler set to 4 */
#define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */ #define IWDG_PRESCALER_8 IWDG_PR_PR_0 /*!< IWDG prescaler set to 8 */
#define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */ #define IWDG_PRESCALER_16 IWDG_PR_PR_1 /*!< IWDG prescaler set to 16 */
#define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */ #define IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 32 */
#define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */ #define IWDG_PRESCALER_64 IWDG_PR_PR_2 /*!< IWDG prescaler set to 64 */
#define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */ #define IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< IWDG prescaler set to 128 */
#define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */ #define IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< IWDG prescaler set to 256 */
/** /**
* @} * @}
*/ */
/** @defgroup IWDG_Window_option IWDG Window option /** @defgroup IWDG_Window_option IWDG Window option
* @{ * @{
*/ */
#define IWDG_WINDOW_DISABLE IWDG_WINR_WIN #define IWDG_WINDOW_DISABLE IWDG_WINR_WIN
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/** @defgroup IWDG_Exported_Macros IWDG Exported Macros /** @defgroup IWDG_Exported_Macros IWDG Exported Macros
* @{ * @{
*/ */
/** /**
* @brief Enable the IWDG peripheral. * @brief Enable the IWDG peripheral.
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE) #define __HAL_IWDG_START(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_ENABLE)
/** /**
* @brief Reload IWDG counter with value defined in the reload register * @brief Reload IWDG counter with value defined in the reload register
* (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled). * (write access to IWDG_PR, IWDG_RLR & IWDG_WINR registers disabled).
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD) #define __HAL_IWDG_RELOAD_COUNTER(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_RELOAD)
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_Exported_Functions IWDG Exported Functions /** @defgroup IWDG_Exported_Functions IWDG Exported Functions
* @{ * @{
*/ */
/** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions /** @defgroup IWDG_Exported_Functions_Group1 Initialization and Start functions
* @{ * @{
*/ */
/* Initialization/Start functions ********************************************/ /* Initialization/Start functions ********************************************/
HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg); HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg);
/** /**
* @} * @}
*/ */
/** @defgroup IWDG_Exported_Functions_Group2 IO operation functions /** @defgroup IWDG_Exported_Functions_Group2 IO operation functions
* @{ * @{
*/ */
/* I/O operation functions ****************************************************/ /* I/O operation functions ****************************************************/
HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg); HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_Private_Constants IWDG Private Constants /** @defgroup IWDG_Private_Constants IWDG Private Constants
* @{ * @{
*/ */
/** /**
* @brief IWDG Key Register BitMask * @brief IWDG Key Register BitMask
*/ */
#define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */ #define IWDG_KEY_RELOAD 0x0000AAAAu /*!< IWDG Reload Counter Enable */
#define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */ #define IWDG_KEY_ENABLE 0x0000CCCCu /*!< IWDG Peripheral Enable */
#define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */ #define IWDG_KEY_WRITE_ACCESS_ENABLE 0x00005555u /*!< IWDG KR Write Access Enable */
#define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */ #define IWDG_KEY_WRITE_ACCESS_DISABLE 0x00000000u /*!< IWDG KR Write Access Disable */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/** @defgroup IWDG_Private_Macros IWDG Private Macros /** @defgroup IWDG_Private_Macros IWDG Private Macros
* @{ * @{
*/ */
/** /**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE) #define IWDG_ENABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_ENABLE)
/** /**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers. * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers.
* @param __HANDLE__ IWDG handle * @param __HANDLE__ IWDG handle
* @retval None * @retval None
*/ */
#define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE) #define IWDG_DISABLE_WRITE_ACCESS(__HANDLE__) WRITE_REG((__HANDLE__)->Instance->KR, IWDG_KEY_WRITE_ACCESS_DISABLE)
/** /**
* @brief Check IWDG prescaler value. * @brief Check IWDG prescaler value.
* @param __PRESCALER__ IWDG prescaler value * @param __PRESCALER__ IWDG prescaler value
* @retval None * @retval None
*/ */
#define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \ #define IS_IWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == IWDG_PRESCALER_4) || \
((__PRESCALER__) == IWDG_PRESCALER_8) || \ ((__PRESCALER__) == IWDG_PRESCALER_8) || \
((__PRESCALER__) == IWDG_PRESCALER_16) || \ ((__PRESCALER__) == IWDG_PRESCALER_16) || \
((__PRESCALER__) == IWDG_PRESCALER_32) || \ ((__PRESCALER__) == IWDG_PRESCALER_32) || \
((__PRESCALER__) == IWDG_PRESCALER_64) || \ ((__PRESCALER__) == IWDG_PRESCALER_64) || \
((__PRESCALER__) == IWDG_PRESCALER_128)|| \ ((__PRESCALER__) == IWDG_PRESCALER_128)|| \
((__PRESCALER__) == IWDG_PRESCALER_256)) ((__PRESCALER__) == IWDG_PRESCALER_256))
/** /**
* @brief Check IWDG reload value. * @brief Check IWDG reload value.
* @param __RELOAD__ IWDG reload value * @param __RELOAD__ IWDG reload value
* @retval None * @retval None
*/ */
#define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL) #define IS_IWDG_RELOAD(__RELOAD__) ((__RELOAD__) <= IWDG_RLR_RL)
/** /**
* @brief Check IWDG window value. * @brief Check IWDG window value.
* @param __WINDOW__ IWDG window value * @param __WINDOW__ IWDG window value
* @retval None * @retval None
*/ */
#define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN) #define IS_IWDG_WINDOW(__WINDOW__) ((__WINDOW__) <= IWDG_WINR_WIN)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_IWDG_H */ #endif /* __STM32L4xx_HAL_IWDG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_ltdc_ex.h * @file stm32l4xx_hal_ltdc_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of LTDC HAL Extension module. * @brief Header file of LTDC HAL Extension module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_LTDC_EX_H #ifndef STM32L4xx_HAL_LTDC_EX_H
#define __STM32L4xx_HAL_LTDC_EX_H #define STM32L4xx_HAL_LTDC_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined (STM32L4R9xx) || defined (STM32L4S9xx) #if defined (LTDC) && defined (DSI)
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
#include "stm32l4xx_hal_dsi.h" #include "stm32l4xx_hal_dsi.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup LTDCEx /** @addtogroup LTDCEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup LTDCEx_Exported_Functions /** @addtogroup LTDCEx_Exported_Functions
* @{ * @{
*/ */
/** @addtogroup LTDCEx_Exported_Functions_Group1 /** @addtogroup LTDCEx_Exported_Functions_Group1
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_LTDCEx_StructInitFromVideoConfig(LTDC_HandleTypeDef* hltdc, DSI_VidCfgTypeDef *VidCfg); HAL_StatusTypeDef HAL_LTDCEx_StructInitFromVideoConfig(LTDC_HandleTypeDef* hltdc, DSI_VidCfgTypeDef *VidCfg);
HAL_StatusTypeDef HAL_LTDCEx_StructInitFromAdaptedCommandConfig(LTDC_HandleTypeDef* hltdc, DSI_CmdCfgTypeDef *CmdCfg); HAL_StatusTypeDef HAL_LTDCEx_StructInitFromAdaptedCommandConfig(LTDC_HandleTypeDef* hltdc, DSI_CmdCfgTypeDef *CmdCfg);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* STM32L4R9xx || STM32L4S9xx */ #endif /* LTDC && DSI */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_LTDC_EX_H */ #endif /* STM32L4xx_HAL_LTDC_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -1,307 +1,337 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_nand.h * @file stm32l4xx_hal_nand.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of NAND HAL module. * @brief Header file of NAND HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_NAND_H #ifndef __STM32L4xx_HAL_NAND_H
#define __STM32L4xx_HAL_NAND_H #define __STM32L4xx_HAL_NAND_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ #if defined(FMC_BANK3)
defined(STM32L496xx) || defined(STM32L4A6xx) || \
defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h"
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h" /** @addtogroup STM32L4xx_HAL_Driver
* @{
/** @addtogroup STM32L4xx_HAL_Driver */
* @{
*/ /** @addtogroup NAND
* @{
/** @addtogroup NAND */
* @{
*/ /* Exported typedef ----------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/
/** @addtogroup NAND_Private_Constants /** @defgroup NAND_Exported_Types NAND Exported Types
* @{ * @{
*/ */
#define NAND_DEVICE FMC_BANK3 /**
#define NAND_WRITE_TIMEOUT ((uint32_t)1000) * @brief HAL NAND State structures definition
*/
#define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */ typedef enum
#define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */ {
HAL_NAND_STATE_RESET = 0x00U, /*!< NAND not yet initialized or disabled */
#define NAND_CMD_AREA_A ((uint8_t)0x00) HAL_NAND_STATE_READY = 0x01U, /*!< NAND initialized and ready for use */
#define NAND_CMD_AREA_B ((uint8_t)0x01) HAL_NAND_STATE_BUSY = 0x02U, /*!< NAND internal process is ongoing */
#define NAND_CMD_AREA_C ((uint8_t)0x50) HAL_NAND_STATE_ERROR = 0x03U /*!< NAND error state */
#define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30) }HAL_NAND_StateTypeDef;
#define NAND_CMD_WRITE0 ((uint8_t)0x80) /**
#define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10) * @brief NAND Memory electronic signature Structure definition
#define NAND_CMD_ERASE0 ((uint8_t)0x60) */
#define NAND_CMD_ERASE1 ((uint8_t)0xD0) typedef struct
#define NAND_CMD_READID ((uint8_t)0x90) {
#define NAND_CMD_STATUS ((uint8_t)0x70) /*<! NAND memory electronic signature maker and device IDs */
#define NAND_CMD_LOCK_STATUS ((uint8_t)0x7A) uint8_t Maker_Id;
#define NAND_CMD_RESET ((uint8_t)0xFF)
uint8_t Device_Id;
/* NAND memory status */
#define NAND_VALID_ADDRESS ((uint32_t)0x00000100) uint8_t Third_Id;
#define NAND_INVALID_ADDRESS ((uint32_t)0x00000200)
#define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400) uint8_t Fourth_Id;
#define NAND_BUSY ((uint32_t)0x00000000) }NAND_IDTypeDef;
#define NAND_ERROR ((uint32_t)0x00000001)
#define NAND_READY ((uint32_t)0x00000040) /**
* @brief NAND Memory address Structure definition
/** */
* @} typedef struct
*/ {
uint16_t Page; /*!< NAND memory Page address */
/** @addtogroup NAND_Private_Macros
* @{ uint16_t Plane; /*!< NAND memory Zone address */
*/
uint16_t Block; /*!< NAND memory Block address */
/** }NAND_AddressTypeDef;
* @brief NAND memory address computation.
* @param __ADDRESS__: NAND memory address. /**
* @param __HANDLE__: NAND handle. * @brief NAND Memory info Structure definition
* @retval NAND Raw address value */
*/ typedef struct
#define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \ {
(((__ADDRESS__)->Block + (((__ADDRESS__)->Zone) * ((__HANDLE__)->Info.ZoneSize)))* ((__HANDLE__)->Info.BlockSize * ((__HANDLE__)->Info.PageSize + (__HANDLE__)->Info.SpareAreaSize)))) uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in bytes
for 8 bits adressing or words for 16 bits addressing */
/**
* @brief NAND memory address cycling. uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in bytes
* @param __ADDRESS__: NAND memory address. for 8 bits adressing or words for 16 bits addressing */
* @retval NAND address cycling value.
*/ uint32_t BlockSize; /*!< NAND memory block size measured in number of pages */
#define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
#define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */ uint32_t BlockNbr; /*!< NAND memory number of total blocks */
#define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
#define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */ uint32_t PlaneNbr; /*!< NAND memory number of planes */
/** uint32_t PlaneSize; /*!< NAND memory zone size measured in number of blocks */
* @}
*/ FunctionalState ExtraCommandEnable; /*!< NAND extra command needed for Page reading mode. This
parameter is mandatory for some NAND parts after the read
/* Exported typedef ----------------------------------------------------------*/ command (NAND_CMD_AREA_TRUE1) and before DATA reading sequence.
/* Exported types ------------------------------------------------------------*/ Example: Toshiba THTH58BYG3S0HBAI6.
/** @defgroup NAND_Exported_Types NAND Exported Types This parameter could be ENABLE or DISABLE
* @{ Please check the Read Mode sequnece in the NAND device datasheet */
*/ } NAND_DeviceConfigTypeDef;
/** /**
* @brief HAL NAND State structures definition * @brief NAND handle Structure definition
*/ */
typedef enum typedef struct
{ {
HAL_NAND_STATE_RESET = 0x00, /*!< NAND not yet initialized or disabled */ FMC_NAND_TypeDef *Instance; /*!< Register base address */
HAL_NAND_STATE_READY = 0x01, /*!< NAND initialized and ready for use */
HAL_NAND_STATE_BUSY = 0x02, /*!< NAND internal process is ongoing */ FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */
HAL_NAND_STATE_ERROR = 0x03 /*!< NAND error state */
}HAL_NAND_StateTypeDef; HAL_LockTypeDef Lock; /*!< NAND locking object */
/** __IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
* @brief NAND Memory electronic signature Structure definition
*/ NAND_DeviceConfigTypeDef Config; /*!< NAND phusical characteristic information structure */
typedef struct
{ } NAND_HandleTypeDef;
/*<! NAND memory electronic signature maker and device IDs */ /**
* @}
uint8_t Maker_Id; */
uint8_t Device_Id; /* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/
uint8_t Third_Id; /** @defgroup NAND_Exported_Macros NAND Exported Macros
* @{
uint8_t Fourth_Id; */
}NAND_IDTypeDef;
/** @brief Reset NAND handle state
/** * @param __HANDLE__ specifies the NAND handle.
* @brief NAND Memory address Structure definition * @retval None
*/ */
typedef struct #define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET)
{
uint16_t Page; /*!< NAND memory Page address */ /**
* @}
uint16_t Zone; /*!< NAND memory Zone address */ */
uint16_t Block; /*!< NAND memory Block address */ /* Exported functions --------------------------------------------------------*/
/** @addtogroup NAND_Exported_Functions NAND Exported Functions
}NAND_AddressTypeDef; * @{
*/
/**
* @brief NAND Memory info Structure definition /** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions
*/ * @{
typedef struct */
{
uint32_t PageSize; /*!< NAND memory page (without spare area) size measured in K. bytes */ /* Initialization/de-initialization functions ********************************/
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing);
uint32_t SpareAreaSize; /*!< NAND memory spare area size measured in K. bytes */ HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand);
uint32_t BlockSize; /*!< NAND memory block size number of pages */ HAL_StatusTypeDef HAL_NAND_ConfigDevice(NAND_HandleTypeDef *hnand, NAND_DeviceConfigTypeDef *pDeviceConfig);
uint32_t BlockNbr; /*!< NAND memory number of blocks */ HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID);
uint32_t ZoneSize; /*!< NAND memory zone size measured in number of blocks */ void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand);
}NAND_InfoTypeDef; void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand);
void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand);
/** void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand);
* @brief NAND handle Structure definition
*/ /**
typedef struct * @}
{ */
FMC_NAND_TypeDef *Instance; /*!< Register base address */
/** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions
FMC_NAND_InitTypeDef Init; /*!< NAND device control configuration parameters */ * @{
*/
HAL_LockTypeDef Lock; /*!< NAND locking object */
/* IO operation functions ****************************************************/
__IO HAL_NAND_StateTypeDef State; /*!< NAND device access state */
HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand);
NAND_InfoTypeDef Info; /*!< NAND characteristic information structure */
}NAND_HandleTypeDef; HAL_StatusTypeDef HAL_NAND_Read_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead);
HAL_StatusTypeDef HAL_NAND_Write_Page_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite);
/** HAL_StatusTypeDef HAL_NAND_Read_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
* @} HAL_StatusTypeDef HAL_NAND_Write_SpareArea_8b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite);
*/
HAL_StatusTypeDef HAL_NAND_Read_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToRead);
/* Exported constants --------------------------------------------------------*/ HAL_StatusTypeDef HAL_NAND_Write_Page_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumPageToWrite);
/* Exported macro ------------------------------------------------------------*/ HAL_StatusTypeDef HAL_NAND_Read_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaToRead);
/** @defgroup NAND_Exported_Macros NAND Exported Macros HAL_StatusTypeDef HAL_NAND_Write_SpareArea_16b(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint16_t *pBuffer, uint32_t NumSpareAreaTowrite);
* @{
*/ HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
/** @brief Reset NAND handle state. uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress);
* @param __HANDLE__: specifies the NAND handle.
* @retval None /**
*/ * @}
#define __HAL_NAND_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NAND_STATE_RESET) */
/** /** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions
* @} * @{
*/ */
/* Exported functions --------------------------------------------------------*/ /* NAND Control functions ****************************************************/
/** @addtogroup NAND_Exported_Functions NAND Exported Functions HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand);
* @{ HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand);
*/ HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
/** @addtogroup NAND_Exported_Functions_Group1 Initialization and de-initialization functions /**
* @{ * @}
*/ */
/* Initialization/de-initialization functions ********************************/ /** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions
HAL_StatusTypeDef HAL_NAND_Init(NAND_HandleTypeDef *hnand, FMC_NAND_PCC_TimingTypeDef *ComSpace_Timing, FMC_NAND_PCC_TimingTypeDef *AttSpace_Timing); * @{
HAL_StatusTypeDef HAL_NAND_DeInit(NAND_HandleTypeDef *hnand); */
void HAL_NAND_MspInit(NAND_HandleTypeDef *hnand); /* NAND State functions *******************************************************/
void HAL_NAND_MspDeInit(NAND_HandleTypeDef *hnand); HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
void HAL_NAND_IRQHandler(NAND_HandleTypeDef *hnand); uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
void HAL_NAND_ITCallback(NAND_HandleTypeDef *hnand); /**
* @}
/** */
* @}
*/ /**
* @}
/** @addtogroup NAND_Exported_Functions_Group2 Input and Output functions */
* @{ /* Private types -------------------------------------------------------------*/
*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* IO operation functions ****************************************************/ /** @defgroup NAND_Private_Constants NAND Private Constants
HAL_StatusTypeDef HAL_NAND_Read_ID(NAND_HandleTypeDef *hnand, NAND_IDTypeDef *pNAND_ID); * @{
HAL_StatusTypeDef HAL_NAND_Reset(NAND_HandleTypeDef *hnand); */
HAL_StatusTypeDef HAL_NAND_Read_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToRead); #define NAND_DEVICE FMC_BANK3
HAL_StatusTypeDef HAL_NAND_Write_Page(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumPageToWrite); #define NAND_WRITE_TIMEOUT ((uint32_t)0x01000000U)
HAL_StatusTypeDef HAL_NAND_Read_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaToRead);
HAL_StatusTypeDef HAL_NAND_Write_SpareArea(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress, uint8_t *pBuffer, uint32_t NumSpareAreaTowrite); #define CMD_AREA ((uint32_t)(1<<16)) /* A16 = CLE high */
HAL_StatusTypeDef HAL_NAND_Erase_Block(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); #define ADDR_AREA ((uint32_t)(1<<17)) /* A17 = ALE high */
uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand);
uint32_t HAL_NAND_Address_Inc(NAND_HandleTypeDef *hnand, NAND_AddressTypeDef *pAddress); #define NAND_CMD_AREA_A ((uint8_t)0x00U)
#define NAND_CMD_AREA_B ((uint8_t)0x01U)
/** #define NAND_CMD_AREA_C ((uint8_t)0x50U)
* @} #define NAND_CMD_AREA_TRUE1 ((uint8_t)0x30U)
*/
#define NAND_CMD_WRITE0 ((uint8_t)0x80U)
/** @addtogroup NAND_Exported_Functions_Group3 Peripheral Control functions #define NAND_CMD_WRITE_TRUE1 ((uint8_t)0x10U)
* @{ #define NAND_CMD_ERASE0 ((uint8_t)0x60U)
*/ #define NAND_CMD_ERASE1 ((uint8_t)0xD0U)
#define NAND_CMD_READID ((uint8_t)0x90U)
/* NAND Control functions ****************************************************/ #define NAND_CMD_STATUS ((uint8_t)0x70U)
HAL_StatusTypeDef HAL_NAND_ECC_Enable(NAND_HandleTypeDef *hnand); #define NAND_CMD_LOCK_STATUS ((uint8_t)0x7AU)
HAL_StatusTypeDef HAL_NAND_ECC_Disable(NAND_HandleTypeDef *hnand); #define NAND_CMD_RESET ((uint8_t)0xFFU)
HAL_StatusTypeDef HAL_NAND_GetECC(NAND_HandleTypeDef *hnand, uint32_t *ECCval, uint32_t Timeout);
/* NAND memory status */
/** #define NAND_VALID_ADDRESS ((uint32_t)0x00000100U)
* @} #define NAND_INVALID_ADDRESS ((uint32_t)0x00000200U)
*/ #define NAND_TIMEOUT_ERROR ((uint32_t)0x00000400U)
#define NAND_BUSY ((uint32_t)0x00000000U)
/** @addtogroup NAND_Exported_Functions_Group4 Peripheral State functions #define NAND_ERROR ((uint32_t)0x00000001U)
* @{ #define NAND_READY ((uint32_t)0x00000040U)
*/ /**
* @}
/* NAND State functions *******************************************************/ */
HAL_NAND_StateTypeDef HAL_NAND_GetState(NAND_HandleTypeDef *hnand);
uint32_t HAL_NAND_Read_Status(NAND_HandleTypeDef *hnand); /* Private macros ------------------------------------------------------------*/
/** @defgroup NAND_Private_Macros NAND Private Macros
/** * @{
* @} */
*/
/**
/** * @brief NAND memory address computation.
* @} * @param __ADDRESS__ NAND memory address.
*/ * @param __HANDLE__ NAND handle.
* @retval NAND Raw address value
/** */
* @} #define ARRAY_ADDRESS(__ADDRESS__ , __HANDLE__) (((__ADDRESS__)->Page) + \
*/ (((__ADDRESS__)->Block + (((__ADDRESS__)->Plane) * ((__HANDLE__)->Config.PlaneSize)))* ((__HANDLE__)->Config.BlockSize)))
/** #define COLUMN_ADDRESS( __HANDLE__) ((__HANDLE__)->Config.PageSize)
* @}
*/ /**
* @brief NAND memory address cycling.
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ * @param __ADDRESS__ NAND memory address.
/* STM32L496xx || STM32L4A6xx || */ * @retval NAND address cycling value.
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ */
#define ADDR_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st addressing cycle */
#ifdef __cplusplus #define ADDR_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd addressing cycle */
} #define ADDR_3RD_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 16) /* 3rd addressing cycle */
#endif #define ADDR_4TH_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 24) /* 4th addressing cycle */
#endif /* __STM32L4xx_HAL_NAND_H */ /**
* @brief NAND memory Columns cycling.
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ * @param __ADDRESS__ NAND memory address.
* @retval NAND Column address cycling value.
*/
#define COLUMN_1ST_CYCLE(__ADDRESS__) (uint8_t)(__ADDRESS__) /* 1st Column addressing cycle */
#define COLUMN_2ND_CYCLE(__ADDRESS__) (uint8_t)((__ADDRESS__) >> 8) /* 2nd Column addressing cycle */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* FMC_BANK3 */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_NAND_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

603
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_nor.h
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@ -1,303 +1,300 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_nor.h * @file stm32l4xx_hal_nor.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of NOR HAL module. * @brief Header file of NOR HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_NOR_H #ifndef __STM32L4xx_HAL_NOR_H
#define __STM32L4xx_HAL_NOR_H #define __STM32L4xx_HAL_NOR_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ #if defined(FMC_BANK1)
defined(STM32L496xx) || defined(STM32L4A6xx) || \
defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h"
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h"
/** @addtogroup STM32L4xx_HAL_Driver
* @{
/** @addtogroup STM32L4xx_HAL_Driver */
* @{
*/ /** @addtogroup NOR
* @{
/** @addtogroup NOR */
* @{
*/ /* Exported typedef ----------------------------------------------------------*/
/** @defgroup NOR_Exported_Types NOR Exported Types
/** @addtogroup NOR_Private_Constants * @{
* @{ */
*/
/**
/* NOR device IDs addresses */ * @brief HAL SRAM State structures definition
#define MC_ADDRESS ((uint16_t)0x0000) */
#define DEVICE_CODE1_ADDR ((uint16_t)0x0001) typedef enum
#define DEVICE_CODE2_ADDR ((uint16_t)0x000E) {
#define DEVICE_CODE3_ADDR ((uint16_t)0x000F) HAL_NOR_STATE_RESET = 0x00U, /*!< NOR not yet initialized or disabled */
HAL_NOR_STATE_READY = 0x01U, /*!< NOR initialized and ready for use */
/* NOR CFI IDs addresses */ HAL_NOR_STATE_BUSY = 0x02U, /*!< NOR internal processing is ongoing */
#define CFI1_ADDRESS ((uint16_t)0x10) HAL_NOR_STATE_ERROR = 0x03U, /*!< NOR error state */
#define CFI2_ADDRESS ((uint16_t)0x11) HAL_NOR_STATE_PROTECTED = 0x04U /*!< NOR NORSRAM device write protected */
#define CFI3_ADDRESS ((uint16_t)0x12) }HAL_NOR_StateTypeDef;
#define CFI4_ADDRESS ((uint16_t)0x13)
/**
/* NOR memory data width */ * @brief FMC NOR Status typedef
#define NOR_MEMORY_8B ((uint8_t)0x0) */
#define NOR_MEMORY_16B ((uint8_t)0x1) typedef enum
{
/* NOR memory device read/write start address */ HAL_NOR_STATUS_SUCCESS = 0U,
#define NOR_MEMORY_ADRESS1 FMC_BANK1_1 HAL_NOR_STATUS_ONGOING,
#define NOR_MEMORY_ADRESS2 FMC_BANK1_2 HAL_NOR_STATUS_ERROR,
#define NOR_MEMORY_ADRESS3 FMC_BANK1_3 HAL_NOR_STATUS_TIMEOUT
#define NOR_MEMORY_ADRESS4 FMC_BANK1_4 }HAL_NOR_StatusTypeDef;
/** /**
* @} * @brief FMC NOR ID typedef
*/ */
typedef struct
/** @addtogroup NOR_Private_Macros {
* @{ uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */
*/
uint16_t Device_Code1;
/**
* @brief NOR memory address shifting. uint16_t Device_Code2;
* @param __NOR_ADDRESS: NOR base address
* @param __NOR_MEMORY_WIDTH_: NOR memory width uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory.
* @param __ADDRESS__: NOR memory address These codes can be accessed by performing read operations with specific
* @retval NOR shifted address value control signals and addresses set.They can also be accessed by issuing
*/ an Auto Select command. */
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \ }NOR_IDTypeDef;
((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \ /**
((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__))))) * @brief FMC NOR CFI typedef
*/
/** typedef struct
* @brief NOR memory write data to specified address. {
* @param __ADDRESS__: NOR memory address /*!< Defines the information stored in the memory's Common flash interface
* @param __DATA__: Data to write which contains a description of various electrical and timing parameters,
* @retval None density information and functions supported by the memory */
*/
#define NOR_WRITE(__ADDRESS__, __DATA__) (*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)) uint16_t CFI_1;
/** uint16_t CFI_2;
* @}
*/ uint16_t CFI_3;
/* Exported typedef ----------------------------------------------------------*/ uint16_t CFI_4;
/** @defgroup NOR_Exported_Types NOR Exported Types }NOR_CFITypeDef;
* @{
*/ /**
* @brief NOR handle Structure definition
/** */
* @brief HAL SRAM State structures definition typedef struct
*/ {
typedef enum FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
{
HAL_NOR_STATE_RESET = 0x00, /*!< NOR not yet initialized or disabled */ FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
HAL_NOR_STATE_READY = 0x01, /*!< NOR initialized and ready for use */
HAL_NOR_STATE_BUSY = 0x02, /*!< NOR internal processing is ongoing */ FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */
HAL_NOR_STATE_ERROR = 0x03, /*!< NOR error state */
HAL_NOR_STATE_PROTECTED = 0x04 /*!< NOR NORSRAM device write protected */ HAL_LockTypeDef Lock; /*!< NOR locking object */
}HAL_NOR_StateTypeDef;
__IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
/** }NOR_HandleTypeDef;
* @brief FMC NOR Status typedef /**
*/ * @}
typedef enum */
{
HAL_NOR_STATUS_SUCCESS = 0, /* Exported constants --------------------------------------------------------*/
HAL_NOR_STATUS_ONGOING, /* Exported macro ------------------------------------------------------------*/
HAL_NOR_STATUS_ERROR, /** @defgroup NOR_Exported_Macros NOR Exported Macros
HAL_NOR_STATUS_TIMEOUT * @{
}HAL_NOR_StatusTypeDef; */
/** @brief Reset NOR handle state
/** * @param __HANDLE__ specifies the NOR handle.
* @brief FMC NOR ID typedef * @retval None
*/ */
typedef struct #define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET)
{ /**
uint16_t Manufacturer_Code; /*!< Defines the device's manufacturer code used to identify the memory */ * @}
*/
uint16_t Device_Code1;
/* Exported functions --------------------------------------------------------*/
uint16_t Device_Code2; /** @addtogroup NOR_Exported_Functions NOR Exported Functions
* @{
uint16_t Device_Code3; /*!< Defines the device's codes used to identify the memory. */
These codes can be accessed by performing read operations with specific
control signals and addresses set.They can also be accessed by issuing /** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions
an Auto Select command. */ * @{
}NOR_IDTypeDef; */
/** /* Initialization/de-initialization functions ********************************/
* @brief FMC NOR CFI typedef HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
*/ HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor);
typedef struct void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor);
{ void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor);
uint16_t CFI_1; void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
/**
uint16_t CFI_2; * @}
*/
uint16_t CFI_3;
/** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
uint16_t CFI_4; /*!< Defines the information stored in the memory's Common flash interface * @{
which contains a description of various electrical and timing parameters, */
density information and functions supported by the memory. */
}NOR_CFITypeDef; /* I/O operation functions ***************************************************/
HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID);
/** HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor);
* @brief NOR handle Structure definition HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
*/ HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
typedef struct
{ HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize);
FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address);
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address);
FMC_NORSRAM_InitTypeDef Init; /*!< NOR device control configuration parameters */ HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI);
/**
HAL_LockTypeDef Lock; /*!< NOR locking object */ * @}
*/
__IO HAL_NOR_StateTypeDef State; /*!< NOR device access state */
/** @addtogroup NOR_Exported_Functions_Group3 NOR Control functions
}NOR_HandleTypeDef; * @{
*/
/**
* @} /* NOR Control functions *****************************************************/
*/ HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor);
HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor);
/* Exported constants --------------------------------------------------------*/ /**
/* Exported macro ------------------------------------------------------------*/ * @}
/** @defgroup NOR_Exported_Macros NOR Exported Macros */
* @{
*/ /** @addtogroup NOR_Exported_Functions_Group4 NOR State functions
* @{
/** @brief Reset NOR handle state. */
* @param __HANDLE__: NOR handle
* @retval None /* NOR State functions ********************************************************/
*/ HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor);
#define __HAL_NOR_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_NOR_STATE_RESET) HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout);
/**
/** * @}
* @} */
*/
/**
/* Exported functions --------------------------------------------------------*/ * @}
/** @addtogroup NOR_Exported_Functions NOR Exported Functions */
* @{
*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/** @addtogroup NOR_Exported_Functions_Group1 Initialization and de-initialization functions /* Private constants ---------------------------------------------------------*/
* @{ /** @defgroup NOR_Private_Constants NOR Private Constants
*/ * @{
*/
/* Initialization/de-initialization functions ********************************/ /* NOR device IDs addresses */
HAL_StatusTypeDef HAL_NOR_Init(NOR_HandleTypeDef *hnor, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); #define MC_ADDRESS ((uint16_t)0x0000U)
HAL_StatusTypeDef HAL_NOR_DeInit(NOR_HandleTypeDef *hnor); #define DEVICE_CODE1_ADDR ((uint16_t)0x0001U)
void HAL_NOR_MspInit(NOR_HandleTypeDef *hnor); #define DEVICE_CODE2_ADDR ((uint16_t)0x000EU)
void HAL_NOR_MspDeInit(NOR_HandleTypeDef *hnor); #define DEVICE_CODE3_ADDR ((uint16_t)0x000FU)
void HAL_NOR_MspWait(NOR_HandleTypeDef *hnor, uint32_t Timeout);
/* NOR CFI IDs addresses */
/** #define CFI1_ADDRESS ((uint16_t)0x61U)
* @} #define CFI2_ADDRESS ((uint16_t)0x62U)
*/ #define CFI3_ADDRESS ((uint16_t)0x63U)
#define CFI4_ADDRESS ((uint16_t)0x64U)
/** @addtogroup NOR_Exported_Functions_Group2 Input and Output functions
* @{ /* NOR operation wait timeout */
*/ #define NOR_TMEOUT ((uint16_t)0xFFFFU)
/* I/O operation functions ***************************************************/ /* NOR memory data width */
HAL_StatusTypeDef HAL_NOR_Read_ID(NOR_HandleTypeDef *hnor, NOR_IDTypeDef *pNOR_ID); #define NOR_MEMORY_8B ((uint8_t)0x0U)
HAL_StatusTypeDef HAL_NOR_ReturnToReadMode(NOR_HandleTypeDef *hnor); #define NOR_MEMORY_16B ((uint8_t)0x1U)
HAL_StatusTypeDef HAL_NOR_Read(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData);
HAL_StatusTypeDef HAL_NOR_Program(NOR_HandleTypeDef *hnor, uint32_t *pAddress, uint16_t *pData); /* NOR memory device read/write start address */
#define NOR_MEMORY_ADRESS1 ((uint32_t)0x60000000U)
HAL_StatusTypeDef HAL_NOR_ReadBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); #define NOR_MEMORY_ADRESS2 ((uint32_t)0x64000000U)
HAL_StatusTypeDef HAL_NOR_ProgramBuffer(NOR_HandleTypeDef *hnor, uint32_t uwAddress, uint16_t *pData, uint32_t uwBufferSize); #define NOR_MEMORY_ADRESS3 ((uint32_t)0x68000000U)
#define NOR_MEMORY_ADRESS4 ((uint32_t)0x6C000000U)
HAL_StatusTypeDef HAL_NOR_Erase_Block(NOR_HandleTypeDef *hnor, uint32_t BlockAddress, uint32_t Address); /**
HAL_StatusTypeDef HAL_NOR_Erase_Chip(NOR_HandleTypeDef *hnor, uint32_t Address); * @}
HAL_StatusTypeDef HAL_NOR_Read_CFI(NOR_HandleTypeDef *hnor, NOR_CFITypeDef *pNOR_CFI); */
/** /* Private macros ------------------------------------------------------------*/
* @} /** @defgroup NOR_Private_Macros NOR Private Macros
*/ * @{
*/
/** @addtogroup NOR_Exported_Functions_Group3 Peripheral Control functions /**
* @{ * @brief NOR memory address shifting.
*/ * @param __NOR_ADDRESS NOR base address
* @param __NOR_MEMORY_WIDTH_ NOR memory width
/* NOR Control functions *****************************************************/ * @param __ADDRESS__ NOR memory address
HAL_StatusTypeDef HAL_NOR_WriteOperation_Enable(NOR_HandleTypeDef *hnor); * @retval NOR shifted address value
HAL_StatusTypeDef HAL_NOR_WriteOperation_Disable(NOR_HandleTypeDef *hnor); */
#define NOR_ADDR_SHIFT(__NOR_ADDRESS, __NOR_MEMORY_WIDTH_, __ADDRESS__) \
/** ((uint32_t)(((__NOR_MEMORY_WIDTH_) == NOR_MEMORY_16B)? \
* @} ((uint32_t)((__NOR_ADDRESS) + (2 * (__ADDRESS__)))): \
*/ ((uint32_t)((__NOR_ADDRESS) + (__ADDRESS__)))))
/** @addtogroup NOR_Exported_Functions_Group4 Peripheral State functions /**
* @{ * @brief NOR memory write data to specified address.
*/ * @param __ADDRESS__ NOR memory address
* @param __DATA__ Data to write
/* NOR State functions ********************************************************/ * @retval None
HAL_NOR_StateTypeDef HAL_NOR_GetState(NOR_HandleTypeDef *hnor); */
HAL_NOR_StatusTypeDef HAL_NOR_GetStatus(NOR_HandleTypeDef *hnor, uint32_t Address, uint32_t Timeout); #define NOR_WRITE(__ADDRESS__, __DATA__) do{ \
(*(__IO uint16_t *)((uint32_t)(__ADDRESS__)) = (__DATA__)); \
/** __DSB(); \
* @} } while(0)
*/
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
#endif /* FMC_BANK1 */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
/* STM32L496xx || STM32L4A6xx || */ #ifdef __cplusplus
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ }
#endif
#ifdef __cplusplus
} #endif /* __STM32L4xx_HAL_NOR_H */
#endif
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#endif /* __STM32L4xx_HAL_NOR_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

907
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_opamp.h
View file

@ -1,434 +1,473 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_opamp.h * @file stm32l4xx_hal_opamp.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of OPAMP HAL module. * @brief Header file of OPAMP HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_OPAMP_H #ifndef __STM32L4xx_HAL_OPAMP_H
#define __STM32L4xx_HAL_OPAMP_H #define __STM32L4xx_HAL_OPAMP_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup OPAMP /** @addtogroup OPAMP
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup OPAMP_Exported_Types OPAMP Exported Types /** @defgroup OPAMP_Exported_Types OPAMP Exported Types
* @{ * @{
*/ */
/** /**
* @brief OPAMP Init structure definition * @brief OPAMP Init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t PowerSupplyRange; /*!< Specifies the power supply range: above or under 2.4V. uint32_t PowerSupplyRange; /*!< Specifies the power supply range: above or under 2.4V.
This parameter must be a value of @ref OPAMP_PowerSupplyRange This parameter must be a value of @ref OPAMP_PowerSupplyRange
Caution: This parameter is common to all OPAMP instances: a modification of this parameter for the selected OPAMP impacts the other OPAMP instances. */ Caution: This parameter is common to all OPAMP instances: a modification of this parameter for the selected OPAMP impacts the other OPAMP instances. */
uint32_t PowerMode; /*!< Specifies the power mode Normal or Low-Power. uint32_t PowerMode; /*!< Specifies the power mode Normal or Low-Power.
This parameter must be a value of @ref OPAMP_PowerMode */ This parameter must be a value of @ref OPAMP_PowerMode */
uint32_t Mode; /*!< Specifies the OPAMP mode uint32_t Mode; /*!< Specifies the OPAMP mode
This parameter must be a value of @ref OPAMP_Mode This parameter must be a value of @ref OPAMP_Mode
mode is either Standalone, - Follower or PGA */ mode is either Standalone, - Follower or PGA */
uint32_t InvertingInput; /*!< Specifies the inverting input in Standalone & PGA modes uint32_t InvertingInput; /*!< Specifies the inverting input in Standalone & PGA modes
- In Standalone mode: i.e. when mode is OPAMP_STANDALONE_MODE - In Standalone mode: i.e. when mode is OPAMP_STANDALONE_MODE
& PGA mode: i.e. when mode is OPAMP_PGA_MODE & PGA mode: i.e. when mode is OPAMP_PGA_MODE
This parameter must be a value of @ref OPAMP_InvertingInput This parameter must be a value of @ref OPAMP_InvertingInput
- In Follower mode i.e. when mode is OPAMP_FOLLOWER_MODE - In Follower mode i.e. when mode is OPAMP_FOLLOWER_MODE
This parameter is Not Applicable */ This parameter is Not Applicable */
uint32_t NonInvertingInput; /*!< Specifies the non inverting input of the opamp: uint32_t NonInvertingInput; /*!< Specifies the non inverting input of the opamp:
This parameter must be a value of @ref OPAMP_NonInvertingInput */ This parameter must be a value of @ref OPAMP_NonInvertingInput */
uint32_t PgaGain; /*!< Specifies the gain in PGA mode uint32_t PgaGain; /*!< Specifies the gain in PGA mode
i.e. when mode is OPAMP_PGA_MODE. i.e. when mode is OPAMP_PGA_MODE.
This parameter must be a value of @ref OPAMP_PgaGain (2, 4, 8 or 16 ) */ This parameter must be a value of @ref OPAMP_PgaGain (2, 4, 8 or 16 ) */
uint32_t UserTrimming; /*!< Specifies the trimming mode uint32_t UserTrimming; /*!< Specifies the trimming mode
This parameter must be a value of @ref OPAMP_UserTrimming This parameter must be a value of @ref OPAMP_UserTrimming
UserTrimming is either factory or user trimming.*/ UserTrimming is either factory or user trimming.*/
uint32_t TrimmingValueP; /*!< Specifies the offset trimming value (PMOS) uint32_t TrimmingValueP; /*!< Specifies the offset trimming value (PMOS)
i.e. when UserTrimming is OPAMP_TRIMMING_USER. i.e. when UserTrimming is OPAMP_TRIMMING_USER.
This parameter must be a number between Min_Data = 0 and Max_Data = 31 This parameter must be a number between Min_Data = 0 and Max_Data = 31
16 is typical default value */ 16 is typical default value */
uint32_t TrimmingValueN; /*!< Specifies the offset trimming value (NMOS) uint32_t TrimmingValueN; /*!< Specifies the offset trimming value (NMOS)
i.e. when UserTrimming is OPAMP_TRIMMING_USER. i.e. when UserTrimming is OPAMP_TRIMMING_USER.
This parameter must be a number between Min_Data = 0 and Max_Data = 31 This parameter must be a number between Min_Data = 0 and Max_Data = 31
16 is typical default value */ 16 is typical default value */
uint32_t TrimmingValuePLowPower; /*!< Specifies the offset trimming value (PMOS) uint32_t TrimmingValuePLowPower; /*!< Specifies the offset trimming value (PMOS)
i.e. when UserTrimming is OPAMP_TRIMMING_USER. i.e. when UserTrimming is OPAMP_TRIMMING_USER.
This parameter must be a number between Min_Data = 0 and Max_Data = 31 This parameter must be a number between Min_Data = 0 and Max_Data = 31
16 is typical default value */ 16 is typical default value */
uint32_t TrimmingValueNLowPower; /*!< Specifies the offset trimming value (NMOS) uint32_t TrimmingValueNLowPower; /*!< Specifies the offset trimming value (NMOS)
i.e. when UserTrimming is OPAMP_TRIMMING_USER. i.e. when UserTrimming is OPAMP_TRIMMING_USER.
This parameter must be a number between Min_Data = 0 and Max_Data = 31 This parameter must be a number between Min_Data = 0 and Max_Data = 31
16 is typical default value */ 16 is typical default value */
}OPAMP_InitTypeDef; }OPAMP_InitTypeDef;
/** /**
* @brief HAL State structures definition * @brief HAL State structures definition
*/ */
typedef enum typedef enum
{ {
HAL_OPAMP_STATE_RESET = 0x00000000, /*!< OPAMP is not yet Initialized */ HAL_OPAMP_STATE_RESET = 0x00000000, /*!< OPAMP is not yet Initialized */
HAL_OPAMP_STATE_READY = 0x00000001, /*!< OPAMP is initialized and ready for use */ HAL_OPAMP_STATE_READY = 0x00000001, /*!< OPAMP is initialized and ready for use */
HAL_OPAMP_STATE_CALIBBUSY = 0x00000002, /*!< OPAMP is enabled in auto calibration mode */ HAL_OPAMP_STATE_CALIBBUSY = 0x00000002, /*!< OPAMP is enabled in auto calibration mode */
HAL_OPAMP_STATE_BUSY = 0x00000004, /*!< OPAMP is enabled and running in normal mode */ HAL_OPAMP_STATE_BUSY = 0x00000004, /*!< OPAMP is enabled and running in normal mode */
HAL_OPAMP_STATE_BUSYLOCKED = 0x00000005 /*!< OPAMP is locked HAL_OPAMP_STATE_BUSYLOCKED = 0x00000005 /*!< OPAMP is locked
only system reset allows reconfiguring the opamp. */ only system reset allows reconfiguring the opamp. */
}HAL_OPAMP_StateTypeDef; }HAL_OPAMP_StateTypeDef;
/** /**
* @brief OPAMP Handle Structure definition * @brief OPAMP Handle Structure definition
*/ */
typedef struct typedef struct __OPAMP_HandleTypeDef
{ {
OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */ OPAMP_TypeDef *Instance; /*!< OPAMP instance's registers base address */
OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */ OPAMP_InitTypeDef Init; /*!< OPAMP required parameters */
HAL_StatusTypeDef Status; /*!< OPAMP peripheral status */ HAL_StatusTypeDef Status; /*!< OPAMP peripheral status */
HAL_LockTypeDef Lock; /*!< Locking object */ HAL_LockTypeDef Lock; /*!< Locking object */
__IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */ __IO HAL_OPAMP_StateTypeDef State; /*!< OPAMP communication state */
} OPAMP_HandleTypeDef; #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
void (* MspInitCallback) (struct __OPAMP_HandleTypeDef *hopamp);
/** void (* MspDeInitCallback) (struct __OPAMP_HandleTypeDef *hopamp);
* @brief HAl_OPAMP_TrimmingValueTypeDef definition #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
*/
} OPAMP_HandleTypeDef;
typedef uint32_t HAL_OPAMP_TrimmingValueTypeDef;
/**
/** * @brief HAl_OPAMP_TrimmingValueTypeDef definition
* @} */
*/
typedef uint32_t HAL_OPAMP_TrimmingValueTypeDef;
/* Exported constants --------------------------------------------------------*/
/**
/** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants * @}
* @{ */
*/
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
/** @defgroup OPAMP_Mode OPAMP Mode /**
* @{ * @brief HAL OPAMP Callback ID enumeration definition
*/ */
#define OPAMP_STANDALONE_MODE ((uint32_t)0x00000000) /*!< standalone mode */ typedef enum
#define OPAMP_PGA_MODE OPAMP_CSR_OPAMODE_1 /*!< PGA mode */ {
#define OPAMP_FOLLOWER_MODE OPAMP_CSR_OPAMODE /*!< follower mode */ HAL_OPAMP_MSP_INIT_CB_ID = 0x01U, /*!< OPAMP MspInit Callback ID */
HAL_OPAMP_MSP_DEINIT_CB_ID = 0x02U, /*!< OPAMP MspDeInit Callback ID */
/** HAL_OPAMP_ALL_CB_ID = 0x03U /*!< OPAMP All ID */
* @} }HAL_OPAMP_CallbackIDTypeDef;
*/
/**
/** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input * @brief HAL OPAMP Callback pointer definition
* @{ */
*/ typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp);
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
#define OPAMP_NONINVERTINGINPUT_IO0 ((uint32_t)0x00000000) /*!< OPAMP non-inverting input connected to dedicated IO pin */
#define OPAMP_NONINVERTINGINPUT_DAC_CH OPAMP_CSR_VPSEL /*!< OPAMP non-inverting input connected internally to DAC channel */
/* Exported constants --------------------------------------------------------*/
/**
* @} /** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants
*/ * @{
*/
/** @defgroup OPAMP_InvertingInput OPAMP Inverting Input
* @{ /** @defgroup OPAMP_Mode OPAMP Mode
*/ * @{
*/
#define OPAMP_INVERTINGINPUT_IO0 ((uint32_t)0x00000000) /*!< OPAMP inverting input connected to dedicated IO pin low-leakage */ #define OPAMP_STANDALONE_MODE ((uint32_t)0x00000000) /*!< standalone mode */
#define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< OPAMP inverting input connected to alternative IO pin available on some device packages */ #define OPAMP_PGA_MODE OPAMP_CSR_OPAMODE_1 /*!< PGA mode */
#define OPAMP_INVERTINGINPUT_CONNECT_NO OPAMP_CSR_VMSEL_1 /*!< OPAMP inverting input not connected externally (PGA mode only) */ #define OPAMP_FOLLOWER_MODE OPAMP_CSR_OPAMODE /*!< follower mode */
/** /**
* @} * @}
*/ */
/** @defgroup OPAMP_PgaGain OPAMP Pga Gain /** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input
* @{ * @{
*/ */
#define OPAMP_PGA_GAIN_2 ((uint32_t)0x00000000) /*!< PGA gain = 2 */ #define OPAMP_NONINVERTINGINPUT_IO0 ((uint32_t)0x00000000) /*!< OPAMP non-inverting input connected to dedicated IO pin */
#define OPAMP_PGA_GAIN_4 OPAMP_CSR_PGGAIN_0 /*!< PGA gain = 4 */ #define OPAMP_NONINVERTINGINPUT_DAC_CH OPAMP_CSR_VPSEL /*!< OPAMP non-inverting input connected internally to DAC channel */
#define OPAMP_PGA_GAIN_8 OPAMP_CSR_PGGAIN_1 /*!< PGA gain = 8 */
#define OPAMP_PGA_GAIN_16 (OPAMP_CSR_PGGAIN_0 | OPAMP_CSR_PGGAIN_1) /*!< PGA gain = 16 */ /**
* @}
/** */
* @}
*/ /** @defgroup OPAMP_InvertingInput OPAMP Inverting Input
* @{
/** @defgroup OPAMP_PowerMode OPAMP PowerMode */
* @{
*/ #define OPAMP_INVERTINGINPUT_IO0 ((uint32_t)0x00000000) /*!< OPAMP inverting input connected to dedicated IO pin low-leakage */
#define OPAMP_POWERMODE_NORMAL ((uint32_t)0x00000000) #define OPAMP_INVERTINGINPUT_IO1 OPAMP_CSR_VMSEL_0 /*!< OPAMP inverting input connected to alternative IO pin available on some device packages */
#define OPAMP_POWERMODE_LOWPOWER OPAMP_CSR_OPALPM #define OPAMP_INVERTINGINPUT_CONNECT_NO OPAMP_CSR_VMSEL_1 /*!< OPAMP inverting input not connected externally (PGA mode only) */
/** /**
* @} * @}
*/ */
/** @defgroup OPAMP_PowerSupplyRange OPAMP PowerSupplyRange /** @defgroup OPAMP_PgaGain OPAMP Pga Gain
* @{ * @{
*/ */
#define OPAMP_POWERSUPPLY_LOW ((uint32_t)0x00000000) /*!< Power supply range low (VDDA lower than 2.4V) */
#define OPAMP_POWERSUPPLY_HIGH OPAMP1_CSR_OPARANGE /*!< Power supply range high (VDDA higher than 2.4V) */ #define OPAMP_PGA_GAIN_2 ((uint32_t)0x00000000) /*!< PGA gain = 2 */
#define OPAMP_PGA_GAIN_4 OPAMP_CSR_PGGAIN_0 /*!< PGA gain = 4 */
/** #define OPAMP_PGA_GAIN_8 OPAMP_CSR_PGGAIN_1 /*!< PGA gain = 8 */
* @} #define OPAMP_PGA_GAIN_16 (OPAMP_CSR_PGGAIN_0 | OPAMP_CSR_PGGAIN_1) /*!< PGA gain = 16 */
*/
/**
/** @defgroup OPAMP_UserTrimming OPAMP User Trimming * @}
* @{ */
*/
#define OPAMP_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */ /** @defgroup OPAMP_PowerMode OPAMP PowerMode
#define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */ * @{
*/
/** #define OPAMP_POWERMODE_NORMAL ((uint32_t)0x00000000)
* @} #define OPAMP_POWERMODE_LOWPOWER OPAMP_CSR_OPALPM
*/
/**
/** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming * @}
* @{ */
*/
#define OPAMP_FACTORYTRIMMING_DUMMY ((uint32_t)0xFFFFFFFF) /*!< Dummy value if trimming value could not be retrieved */ /** @defgroup OPAMP_PowerSupplyRange OPAMP PowerSupplyRange
* @{
#define OPAMP_FACTORYTRIMMING_N ((uint32_t)0x00000000) /*!< Offset trimming N */ */
#define OPAMP_FACTORYTRIMMING_P ((uint32_t)0x00000001) /*!< Offset trimming P */ #define OPAMP_POWERSUPPLY_LOW ((uint32_t)0x00000000) /*!< Power supply range low (VDDA lower than 2.4V) */
#define OPAMP_POWERSUPPLY_HIGH OPAMP1_CSR_OPARANGE /*!< Power supply range high (VDDA higher than 2.4V) */
/**
* @} /**
*/ * @}
*/
/**
* @} /** @defgroup OPAMP_UserTrimming OPAMP User Trimming
*/ * @{
*/
/* Private constants ---------------------------------------------------------*/ #define OPAMP_TRIMMING_FACTORY ((uint32_t)0x00000000) /*!< Factory trimming */
/** @defgroup OPAMP_Private_Constants OPAMP Private Constants #define OPAMP_TRIMMING_USER OPAMP_CSR_USERTRIM /*!< User trimming */
* @brief OPAMP Private constants and defines
* @{ /**
*/ * @}
*/
/* NONINVERTING bit position in OTR & LPOTR */
#define OPAMP_INPUT_NONINVERTING ((uint32_t) 8) /*!< Non inverting input */ /** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming
* @{
/* Offset trimming time: during calibration, minimum time needed between two */ */
/* steps to have 1 mV accuracy. */ #define OPAMP_FACTORYTRIMMING_DUMMY ((uint32_t)0xFFFFFFFF) /*!< Dummy value if trimming value could not be retrieved */
/* Refer to datasheet, electrical characteristics: parameter tOFFTRIM Typ=1ms.*/
/* Unit: ms. */ #define OPAMP_FACTORYTRIMMING_N ((uint32_t)0x00000000) /*!< Offset trimming N */
#define OPAMP_TRIMMING_DELAY ((uint32_t) 1) #define OPAMP_FACTORYTRIMMING_P ((uint32_t)0x00000001) /*!< Offset trimming P */
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /**
/** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros * @}
* @{ */
*/
/* Private constants ---------------------------------------------------------*/
/** @brief Reset OPAMP handle state. /** @defgroup OPAMP_Private_Constants OPAMP Private Constants
* @param __HANDLE__: OPAMP handle. * @brief OPAMP Private constants and defines
* @retval None * @{
*/ */
#define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET)
/* NONINVERTING bit position in OTR & LPOTR */
/** #define OPAMP_INPUT_NONINVERTING ((uint32_t) 8) /*!< Non inverting input */
* @}
*/ /* Offset trimming time: during calibration, minimum time needed between two */
/* steps to have 1 mV accuracy. */
/* Private macro -------------------------------------------------------------*/ /* Refer to datasheet, electrical characteristics: parameter tOFFTRIM Typ=1ms.*/
/* Unit: ms. */
/** @defgroup OPAMP_Private_Macros OPAMP Private Macros #define OPAMP_TRIMMING_DELAY ((uint32_t) 1)
* @{
*/ /**
* @}
#define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \ */
((INPUT) == OPAMP_PGA_MODE) || \
((INPUT) == OPAMP_FOLLOWER_MODE)) /* Exported macros -----------------------------------------------------------*/
/** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ * @{
defined (STM32L496xx) || defined (STM32L4A6xx) || \ */
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
#define IS_OPAMP_INVERTING_INPUT_STANDALONE(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ /** @brief Reset OPAMP handle state.
((INPUT) == OPAMP_INVERTINGINPUT_IO1)) * @param __HANDLE__: OPAMP handle.
#endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx */ * @retval None
/* STM32L496xx STM32L4A6xx */ */
/* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
#define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) do { \
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ (__HANDLE__)->State = HAL_OPAMP_STATE_RESET; \
defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) (__HANDLE__)->MspInitCallback = NULL; \
#define IS_OPAMP_INVERTING_INPUT_STANDALONE(INPUT) ((INPUT) == OPAMP_INVERTINGINPUT_IO0) (__HANDLE__)->MspDeInitCallback = NULL; \
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */ } while(0)
/* STM32L451xx STM32L452xx STM32L462xx */ #else
#define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET)
#define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \ #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
((INPUT) == OPAMP_NONINVERTINGINPUT_DAC_CH))
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
defined (STM32L496xx) || defined (STM32L4A6xx) || \ /**
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx) * @}
#define IS_OPAMP_INVERTING_INPUT_PGA(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ */
((INPUT) == OPAMP_INVERTINGINPUT_IO1) || \
((INPUT) == OPAMP_INVERTINGINPUT_CONNECT_NO)) /* Private macro -------------------------------------------------------------*/
#endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx */
/* STM32L496xx STM32L4A6xx */ /** @defgroup OPAMP_Private_Macros OPAMP Private Macros
/* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */ * @{
*/
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) #define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \
#define IS_OPAMP_INVERTING_INPUT_PGA(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \ ((INPUT) == OPAMP_PGA_MODE) || \
((INPUT) == OPAMP_INVERTINGINPUT_CONNECT_NO)) ((INPUT) == OPAMP_FOLLOWER_MODE))
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
/* STM32L451xx STM32L452xx STM32L462xx */ #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
defined (STM32L496xx) || defined (STM32L4A6xx) || \
#define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2) || \ defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
((GAIN) == OPAMP_PGA_GAIN_4) || \ #define IS_OPAMP_INVERTING_INPUT_STANDALONE(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \
((GAIN) == OPAMP_PGA_GAIN_8) || \ ((INPUT) == OPAMP_INVERTINGINPUT_IO1))
((GAIN) == OPAMP_PGA_GAIN_16)) #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx */
/* STM32L496xx STM32L4A6xx */
#define IS_OPAMP_POWERMODE(TRIMMING) (((TRIMMING) == OPAMP_POWERMODE_NORMAL) || \ /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
((TRIMMING) == OPAMP_POWERMODE_LOWPOWER) )
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
#define IS_OPAMP_POWER_SUPPLY_RANGE(RANGE) (((RANGE) == OPAMP_POWERSUPPLY_LOW) || \ defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
((RANGE) == OPAMP_POWERSUPPLY_HIGH) ) #define IS_OPAMP_INVERTING_INPUT_STANDALONE(INPUT) ((INPUT) == OPAMP_INVERTINGINPUT_IO0)
#endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
#define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \ /* STM32L451xx STM32L452xx STM32L462xx */
((TRIMMING) == OPAMP_TRIMMING_USER))
#define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \
((INPUT) == OPAMP_NONINVERTINGINPUT_DAC_CH))
#define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F)
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
#define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \ defined (STM32L496xx) || defined (STM32L4A6xx) || \
((TRIMMING) == OPAMP_FACTORYTRIMMING_P)) defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined(STM32L4S9xx)
#define IS_OPAMP_INVERTING_INPUT_PGA(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \
/** ((INPUT) == OPAMP_INVERTINGINPUT_IO1) || \
* @} ((INPUT) == OPAMP_INVERTINGINPUT_CONNECT_NO))
*/ #endif /* STM32L471xx STM32L475xx STM32L476xx STM32L485xx STM32L486xx */
/* STM32L496xx STM32L4A6xx */
/* Include OPAMP HAL Extended module */ /* STM32L4R5xx STM32L4R7xx STM32L4R9xx STM32L4S5xx STM32L4S7xx STM32L4S9xx */
#include "stm32l4xx_hal_opamp_ex.h"
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
/* Exported functions --------------------------------------------------------*/ defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx)
/** @addtogroup OPAMP_Exported_Functions #define IS_OPAMP_INVERTING_INPUT_PGA(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \
* @{ ((INPUT) == OPAMP_INVERTINGINPUT_CONNECT_NO))
*/ #endif /* STM32L431xx STM32L432xx STM32L433xx STM32L442xx STM32L443xx */
/* STM32L451xx STM32L452xx STM32L462xx */
/** @addtogroup OPAMP_Exported_Functions_Group1
* @{ #define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2) || \
*/ ((GAIN) == OPAMP_PGA_GAIN_4) || \
/* Initialization/de-initialization functions **********************************/ ((GAIN) == OPAMP_PGA_GAIN_8) || \
HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp); ((GAIN) == OPAMP_PGA_GAIN_16))
HAL_StatusTypeDef HAL_OPAMP_DeInit (OPAMP_HandleTypeDef *hopamp);
void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp); #define IS_OPAMP_POWERMODE(TRIMMING) (((TRIMMING) == OPAMP_POWERMODE_NORMAL) || \
void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp); ((TRIMMING) == OPAMP_POWERMODE_LOWPOWER) )
/**
* @} #define IS_OPAMP_POWER_SUPPLY_RANGE(RANGE) (((RANGE) == OPAMP_POWERSUPPLY_LOW) || \
*/ ((RANGE) == OPAMP_POWERSUPPLY_HIGH) )
/** @addtogroup OPAMP_Exported_Functions_Group2 #define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \
* @{ ((TRIMMING) == OPAMP_TRIMMING_USER))
*/
/* I/O operation functions *****************************************************/ #define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1F)
HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp);
HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp); #define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \
HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp); ((TRIMMING) == OPAMP_FACTORYTRIMMING_P))
/** /**
* @} * @}
*/ */
/** @addtogroup OPAMP_Exported_Functions_Group3 /* Include OPAMP HAL Extended module */
* @{ #include "stm32l4xx_hal_opamp_ex.h"
*/
/* Exported functions --------------------------------------------------------*/
/* Peripheral Control functions ************************************************/ /** @addtogroup OPAMP_Exported_Functions
HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp); * @{
HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset); */
/** /** @addtogroup OPAMP_Exported_Functions_Group1
* @} * @{
*/ */
/* Initialization/de-initialization functions **********************************/
/** @addtogroup OPAMP_Exported_Functions_Group4 HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp);
* @{ HAL_StatusTypeDef HAL_OPAMP_DeInit (OPAMP_HandleTypeDef *hopamp);
*/ void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp);
void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp);
/* Peripheral State functions **************************************************/ /**
HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp); * @}
*/
/**
* @} /** @addtogroup OPAMP_Exported_Functions_Group2
*/ * @{
*/
/**
* @} /* I/O operation functions *****************************************************/
*/ HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp);
HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp);
/** HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp);
* @}
*/ /**
* @}
/** */
* @}
*/ /** @addtogroup OPAMP_Exported_Functions_Group3
* @{
#ifdef __cplusplus */
}
#endif /* Peripheral Control functions ************************************************/
#if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
#endif /* __STM32L4xx_HAL_OPAMP_H */ /* OPAMP callback registering/unregistering */
HAL_StatusTypeDef HAL_OPAMP_RegisterCallback (OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackID, pOPAMP_CallbackTypeDef pCallback);
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback (OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackID);
#endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp);
HAL_OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset (OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset);
/**
* @}
*/
/** @addtogroup OPAMP_Exported_Functions_Group4
* @{
*/
/* Peripheral State functions **************************************************/
HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_OPAMP_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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@ -1,107 +1,107 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_opamp_ex.h * @file stm32l4xx_hal_opamp_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of OPAMP HAL Extended module. * @brief Header file of OPAMP HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_OPAMP_EX_H #ifndef __STM32L4xx_HAL_OPAMP_EX_H
#define __STM32L4xx_HAL_OPAMP_EX_H #define __STM32L4xx_HAL_OPAMP_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup OPAMPEx /** @addtogroup OPAMPEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup OPAMPEx_Exported_Functions OPAMPEx Exported Functions /** @addtogroup OPAMPEx_Exported_Functions OPAMPEx Exported Functions
* @{ * @{
*/ */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \
defined (STM32L496xx) || defined (STM32L4A6xx) || \ defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx)
/* I/O operation functions *****************************************************/ /* I/O operation functions *****************************************************/
/** @addtogroup OPAMPEx_Exported_Functions_Group1 Extended Input and Output operation functions /** @addtogroup OPAMPEx_Exported_Functions_Group1 Extended Input and Output operation functions
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2); HAL_StatusTypeDef HAL_OPAMPEx_SelfCalibrateAll(OPAMP_HandleTypeDef *hopamp1, OPAMP_HandleTypeDef *hopamp2);
/** /**
* @} * @}
*/ */
#endif #endif
/* Peripheral Control functions ************************************************/ /* Peripheral Control functions ************************************************/
/** @addtogroup OPAMPEx_Exported_Functions_Group2 /** @addtogroup OPAMPEx_Exported_Functions_Group2
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef *hopamp); HAL_StatusTypeDef HAL_OPAMPEx_Unlock(OPAMP_HandleTypeDef *hopamp);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_OPAMP_EX_H */ #endif /* __STM32L4xx_HAL_OPAMP_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_pcd_ex.h * @file stm32l4xx_hal_pcd_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of PCD HAL module. * @brief Header file of PCD HAL Extension module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_PCD_EX_H #ifndef __STM32L4xx_HAL_PCD_EX_H
#define __STM32L4xx_HAL_PCD_EX_H #define __STM32L4xx_HAL_PCD_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ /* Includes ------------------------------------------------------------------*/
defined(STM32L452xx) || defined(STM32L462xx) || \ #include "stm32l4xx_hal_def.h"
defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \
defined(STM32L496xx) || defined(STM32L4A6xx) || \ #if defined (USB) || defined (USB_OTG_FS) || defined (USB_OTG_HS)
defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
/** @addtogroup STM32L4xx_HAL_Driver
/* Includes ------------------------------------------------------------------*/ * @{
#include "stm32l4xx_hal_def.h" */
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup PCDEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/
/** @addtogroup PCDEx /* Exported constants --------------------------------------------------------*/
* @{ /* Exported macros -----------------------------------------------------------*/
*/ /* Exported functions --------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions
typedef enum * @{
{ */
PCD_LPM_L0_ACTIVE = 0x00, /* on */ /** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions
PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */ * @{
}PCD_LPM_MsgTypeDef; */
typedef enum #if defined (USB_OTG_FS) || defined (USB_OTG_HS)
{ HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size);
PCD_BCD_ERROR = 0xFF, HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size);
PCD_BCD_CONTACT_DETECTION = 0xFE, #endif /* USB_OTG_FS || USB_OTG_HS */
PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC, #if defined (USB)
PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB, HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd,
PCD_BCD_DISCOVERY_COMPLETED = 0x00, uint16_t ep_addr,
uint16_t ep_kind,
}PCD_BCD_MsgTypeDef; uint32_t pmaadress);
#endif /* USB */
/* Exported constants --------------------------------------------------------*/ HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd);
/* Exported macros -----------------------------------------------------------*/ HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd);
/* Exported functions --------------------------------------------------------*/ HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd);
/** @addtogroup PCDEx_Exported_Functions PCDEx Exported Functions HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd);
* @{ void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd);
*/ void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg);
/** @addtogroup PCDEx_Exported_Functions_Group1 Peripheral Control functions void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg);
* @{
*/ /**
* @}
#if defined(USB_OTG_FS) */
HAL_StatusTypeDef HAL_PCDEx_SetTxFiFo(PCD_HandleTypeDef *hpcd, uint8_t fifo, uint16_t size);
HAL_StatusTypeDef HAL_PCDEx_SetRxFiFo(PCD_HandleTypeDef *hpcd, uint16_t size); /**
#endif /* USB_OTG_FS */ * @}
*/
#if defined (USB)
HAL_StatusTypeDef HAL_PCDEx_PMAConfig(PCD_HandleTypeDef *hpcd, /**
uint16_t ep_addr, * @}
uint16_t ep_kind, */
uint32_t pmaadress);
#endif /* USB */ /**
HAL_StatusTypeDef HAL_PCDEx_ActivateLPM(PCD_HandleTypeDef *hpcd); * @}
HAL_StatusTypeDef HAL_PCDEx_DeActivateLPM(PCD_HandleTypeDef *hpcd); */
HAL_StatusTypeDef HAL_PCDEx_ActivateBCD(PCD_HandleTypeDef *hpcd);
HAL_StatusTypeDef HAL_PCDEx_DeActivateBCD(PCD_HandleTypeDef *hpcd); #endif /* defined (USB) || defined (USB_OTG_FS) || defined (USB_OTG_HS) */
void HAL_PCDEx_BCD_VBUSDetect(PCD_HandleTypeDef *hpcd);
void HAL_PCDEx_LPM_Callback(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); #ifdef __cplusplus
void HAL_PCDEx_BCD_Callback(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); }
#endif
/**
* @}
*/ #endif /* __STM32L4xx_HAL_PCD_EX_H */
/** /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
* @}
*/
/**
* @}
*/
/**
* @}
*/
#endif /* STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */
/* STM32L452xx || STM32L462xx || */
/* STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
/* STM32L496xx || STM32L4A6xx || */
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_PCD_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_pwr.h * @file stm32l4xx_hal_pwr.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of PWR HAL module. * @brief Header file of PWR HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_PWR_H #ifndef __STM32L4xx_HAL_PWR_H
#define __STM32L4xx_HAL_PWR_H #define __STM32L4xx_HAL_PWR_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup PWR /** @addtogroup PWR
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup PWR_Exported_Types PWR Exported Types /** @defgroup PWR_Exported_Types PWR Exported Types
* @{ * @{
*/ */
/** /**
* @brief PWR PVD configuration structure definition * @brief PWR PVD configuration structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level. uint32_t PVDLevel; /*!< PVDLevel: Specifies the PVD detection level.
This parameter can be a value of @ref PWR_PVD_detection_level. */ This parameter can be a value of @ref PWR_PVD_detection_level. */
uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins. uint32_t Mode; /*!< Mode: Specifies the operating mode for the selected pins.
This parameter can be a value of @ref PWR_PVD_Mode. */ This parameter can be a value of @ref PWR_PVD_Mode. */
}PWR_PVDTypeDef; }PWR_PVDTypeDef;
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup PWR_Exported_Constants PWR Exported Constants /** @defgroup PWR_Exported_Constants PWR Exported Constants
* @{ * @{
*/ */
/** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels /** @defgroup PWR_PVD_detection_level Programmable Voltage Detection levels
* @{ * @{
*/ */
#define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */ #define PWR_PVDLEVEL_0 PWR_CR2_PLS_LEV0 /*!< PVD threshold around 2.0 V */
#define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */ #define PWR_PVDLEVEL_1 PWR_CR2_PLS_LEV1 /*!< PVD threshold around 2.2 V */
#define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */ #define PWR_PVDLEVEL_2 PWR_CR2_PLS_LEV2 /*!< PVD threshold around 2.4 V */
#define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */ #define PWR_PVDLEVEL_3 PWR_CR2_PLS_LEV3 /*!< PVD threshold around 2.5 V */
#define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */ #define PWR_PVDLEVEL_4 PWR_CR2_PLS_LEV4 /*!< PVD threshold around 2.6 V */
#define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */ #define PWR_PVDLEVEL_5 PWR_CR2_PLS_LEV5 /*!< PVD threshold around 2.8 V */
#define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */ #define PWR_PVDLEVEL_6 PWR_CR2_PLS_LEV6 /*!< PVD threshold around 2.9 V */
#define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */ #define PWR_PVDLEVEL_7 PWR_CR2_PLS_LEV7 /*!< External input analog voltage (compared internally to VREFINT) */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode /** @defgroup PWR_PVD_Mode PWR PVD interrupt and event mode
* @{ * @{
*/ */
#define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */ #define PWR_PVD_MODE_NORMAL ((uint32_t)0x00000000) /*!< Basic mode is used */
#define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */ #define PWR_PVD_MODE_IT_RISING ((uint32_t)0x00010001) /*!< External Interrupt Mode with Rising edge trigger detection */
#define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */ #define PWR_PVD_MODE_IT_FALLING ((uint32_t)0x00010002) /*!< External Interrupt Mode with Falling edge trigger detection */
#define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */ #define PWR_PVD_MODE_IT_RISING_FALLING ((uint32_t)0x00010003) /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
#define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */ #define PWR_PVD_MODE_EVENT_RISING ((uint32_t)0x00020001) /*!< Event Mode with Rising edge trigger detection */
#define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */ #define PWR_PVD_MODE_EVENT_FALLING ((uint32_t)0x00020002) /*!< Event Mode with Falling edge trigger detection */
#define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */ #define PWR_PVD_MODE_EVENT_RISING_FALLING ((uint32_t)0x00020003) /*!< Event Mode with Rising/Falling edge trigger detection */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode /** @defgroup PWR_Regulator_state_in_SLEEP_STOP_mode PWR regulator mode
* @{ * @{
*/ */
#define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */ #define PWR_MAINREGULATOR_ON ((uint32_t)0x00000000) /*!< Regulator in main mode */
#define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */ #define PWR_LOWPOWERREGULATOR_ON PWR_CR1_LPR /*!< Regulator in low-power mode */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
* @{ * @{
*/ */
#define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */ #define PWR_SLEEPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Sleep mode */
#define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */ #define PWR_SLEEPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Sleep mode */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_STOP_mode_entry PWR STOP mode entry /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
* @{ * @{
*/ */
#define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */ #define PWR_STOPENTRY_WFI ((uint8_t)0x01) /*!< Wait For Interruption instruction to enter Stop mode */
#define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */ #define PWR_STOPENTRY_WFE ((uint8_t)0x02) /*!< Wait For Event instruction to enter Stop mode */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line /** @defgroup PWR_PVD_EXTI_LINE PWR PVD external interrupt line
* @{ * @{
*/ */
#define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */ #define PWR_EXTI_LINE_PVD ((uint32_t)0x00010000) /*!< External interrupt line 16 Connected to the PVD EXTI Line */
/** /**
* @} * @}
*/ */
/** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line /** @defgroup PWR_PVD_EVENT_LINE PWR PVD event line
* @{ * @{
*/ */
#define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */ #define PWR_EVENT_LINE_PVD ((uint32_t)0x00010000) /*!< Event line 16 Connected to the PVD Event Line */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/** @defgroup PWR_Exported_Macros PWR Exported Macros /** @defgroup PWR_Exported_Macros PWR Exported Macros
* @{ * @{
*/ */
/** @brief Check whether or not a specific PWR flag is set. /** @brief Check whether or not a specific PWR flag is set.
* @param __FLAG__: specifies the flag to check. * @param __FLAG__: specifies the flag to check.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
* was received from the WKUP pin 1. * was received from the WKUP pin 1.
* @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
* was received from the WKUP pin 2. * was received from the WKUP pin 2.
* @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
* was received from the WKUP pin 3. * was received from the WKUP pin 3.
* @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
* was received from the WKUP pin 4. * was received from the WKUP pin 4.
* @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
* was received from the WKUP pin 5. * was received from the WKUP pin 5.
* @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system * @arg @ref PWR_FLAG_SB StandBy Flag. Indicates that the system
* entered StandBy mode. * entered StandBy mode.
* @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on * @arg @ref PWR_FLAG_WUFI Wake-Up Flag Internal. Set when a wakeup is detected on
* the internal wakeup line. * the internal wakeup line.
* @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the * @arg @ref PWR_FLAG_REGLPS Low Power Regulator Started. Indicates whether or not the
* low-power regulator is ready. * low-power regulator is ready.
* @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the * @arg @ref PWR_FLAG_REGLPF Low Power Regulator Flag. Indicates whether the
* regulator is ready in main mode or is in low-power mode. * regulator is ready in main mode or is in low-power mode.
* @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready * @arg @ref PWR_FLAG_VOSF Voltage Scaling Flag. Indicates whether the regulator is ready
* in the selected voltage range or is still changing to the required voltage level. * in the selected voltage range or is still changing to the required voltage level.
* @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is * @arg @ref PWR_FLAG_PVDO Power Voltage Detector Output. Indicates whether VDD voltage is
* below or above the selected PVD threshold. * below or above the selected PVD threshold.
* @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is * @arg @ref PWR_FLAG_PVMO1 Peripheral Voltage Monitoring Output 1. Indicates whether VDDUSB voltage is
* is below or above PVM1 threshold (applicable when USB feature is supported). * is below or above PVM1 threshold (applicable when USB feature is supported).
@if STM32L486xx @if STM32L486xx
* @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is * @arg @ref PWR_FLAG_PVMO2 Peripheral Voltage Monitoring Output 2. Indicates whether VDDIO2 voltage is
* is below or above PVM2 threshold (applicable when VDDIO2 is present on device). * is below or above PVM2 threshold (applicable when VDDIO2 is present on device).
@endif @endif
* @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is * @arg @ref PWR_FLAG_PVMO3 Peripheral Voltage Monitoring Output 3. Indicates whether VDDA voltage is
* is below or above PVM3 threshold. * is below or above PVM3 threshold.
* @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is * @arg @ref PWR_FLAG_PVMO4 Peripheral Voltage Monitoring Output 4. Indicates whether VDDA voltage is
* is below or above PVM4 threshold. * is below or above PVM4 threshold.
* *
* @retval The new state of __FLAG__ (TRUE or FALSE). * @retval The new state of __FLAG__ (TRUE or FALSE).
*/ */
#define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\ #define __HAL_PWR_GET_FLAG(__FLAG__) ( ((((uint8_t)(__FLAG__)) >> 5U) == 1) ?\
(PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\ (PWR->SR1 & (1U << ((__FLAG__) & 31U))) :\
(PWR->SR2 & (1U << ((__FLAG__) & 31U))) ) (PWR->SR2 & (1U << ((__FLAG__) & 31U))) )
/** @brief Clear a specific PWR flag. /** @brief Clear a specific PWR flag.
* @param __FLAG__: specifies the flag to clear. * @param __FLAG__: specifies the flag to clear.
* This parameter can be one of the following values: * This parameter can be one of the following values:
* @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF1 Wake Up Flag 1. Indicates that a wakeup event
* was received from the WKUP pin 1. * was received from the WKUP pin 1.
* @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF2 Wake Up Flag 2. Indicates that a wakeup event
* was received from the WKUP pin 2. * was received from the WKUP pin 2.
* @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF3 Wake Up Flag 3. Indicates that a wakeup event
* was received from the WKUP pin 3. * was received from the WKUP pin 3.
* @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF4 Wake Up Flag 4. Indicates that a wakeup event
* was received from the WKUP pin 4. * was received from the WKUP pin 4.
* @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event * @arg @ref PWR_FLAG_WUF5 Wake Up Flag 5. Indicates that a wakeup event
* was received from the WKUP pin 5. * was received from the WKUP pin 5.
* @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags. * @arg @ref PWR_FLAG_WU Encompasses all five Wake Up Flags.
* @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system * @arg @ref PWR_FLAG_SB Standby Flag. Indicates that the system
* entered Standby mode. * entered Standby mode.
* @retval None * @retval None
*/ */
#define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\ #define __HAL_PWR_CLEAR_FLAG(__FLAG__) ( (((uint8_t)(__FLAG__)) == PWR_FLAG_WU) ?\
(PWR->SCR = (__FLAG__)) :\ (PWR->SCR = (__FLAG__)) :\
(PWR->SCR = (1U << ((__FLAG__) & 31U))) ) (PWR->SCR = (1U << ((__FLAG__) & 31U))) )
/** /**
* @brief Enable the PVD Extended Interrupt Line. * @brief Enable the PVD Extended Interrupt Line.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_IT() SET_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable the PVD Extended Interrupt Line. * @brief Disable the PVD Extended Interrupt Line.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_IT() CLEAR_BIT(EXTI->IMR1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Enable the PVD Event Line. * @brief Enable the PVD Event Line.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT() SET_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD)
/** /**
* @brief Disable the PVD Event Line. * @brief Disable the PVD Event Line.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT() CLEAR_BIT(EXTI->EMR1, PWR_EVENT_LINE_PVD)
/** /**
* @brief Enable the PVD Extended Interrupt Rising Trigger. * @brief Enable the PVD Extended Interrupt Rising Trigger.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE() SET_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable the PVD Extended Interrupt Rising Trigger. * @brief Disable the PVD Extended Interrupt Rising Trigger.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE() CLEAR_BIT(EXTI->RTSR1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Enable the PVD Extended Interrupt Falling Trigger. * @brief Enable the PVD Extended Interrupt Falling Trigger.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE() SET_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Disable the PVD Extended Interrupt Falling Trigger. * @brief Disable the PVD Extended Interrupt Falling Trigger.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE() CLEAR_BIT(EXTI->FTSR1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Enable the PVD Extended Interrupt Rising & Falling Trigger. * @brief Enable the PVD Extended Interrupt Rising & Falling Trigger.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \ #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE() \
do { \ do { \
__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \ __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE(); \
__HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \ __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE(); \
} while(0) } while(0)
/** /**
* @brief Disable the PVD Extended Interrupt Rising & Falling Trigger. * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \ #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE() \
do { \ do { \
__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \ __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE(); \
__HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \ __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE(); \
} while(0) } while(0)
/** /**
* @brief Generate a Software interrupt on selected EXTI line. * @brief Generate a Software interrupt on selected EXTI line.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() SET_BIT(EXTI->SWIER1, PWR_EXTI_LINE_PVD)
/** /**
* @brief Check whether or not the PVD EXTI interrupt flag is set. * @brief Check whether or not the PVD EXTI interrupt flag is set.
* @retval EXTI PVD Line Status. * @retval EXTI PVD Line Status.
*/ */
#define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR1 & PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_GET_FLAG() (EXTI->PR1 & PWR_EXTI_LINE_PVD)
/** /**
* @brief Clear the PVD EXTI interrupt flag. * @brief Clear the PVD EXTI interrupt flag.
* @retval None * @retval None
*/ */
#define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, PWR_EXTI_LINE_PVD) #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG() WRITE_REG(EXTI->PR1, PWR_EXTI_LINE_PVD)
/** /**
* @} * @}
*/ */
/* Private macros --------------------------------------------------------*/ /* Private macros --------------------------------------------------------*/
/** @addtogroup PWR_Private_Macros PWR Private Macros /** @addtogroup PWR_Private_Macros PWR Private Macros
* @{ * @{
*/ */
#define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \ #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \ ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \ ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7)) ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
#define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\ #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_NORMAL) ||\
((MODE) == PWR_PVD_MODE_IT_RISING) ||\ ((MODE) == PWR_PVD_MODE_IT_RISING) ||\
((MODE) == PWR_PVD_MODE_IT_FALLING) ||\ ((MODE) == PWR_PVD_MODE_IT_FALLING) ||\
((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\ ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) ||\
((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\ ((MODE) == PWR_PVD_MODE_EVENT_RISING) ||\
((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\ ((MODE) == PWR_PVD_MODE_EVENT_FALLING) ||\
((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING)) ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING))
#define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \ #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
((REGULATOR) == PWR_LOWPOWERREGULATOR_ON)) ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
#define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE)) #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
#define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) ) #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE) )
/** /**
* @} * @}
*/ */
/* Include PWR HAL Extended module */ /* Include PWR HAL Extended module */
#include "stm32l4xx_hal_pwr_ex.h" #include "stm32l4xx_hal_pwr_ex.h"
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup PWR_Exported_Functions PWR Exported Functions /** @addtogroup PWR_Exported_Functions PWR Exported Functions
* @{ * @{
*/ */
/** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
* @{ * @{
*/ */
/* Initialization and de-initialization functions *******************************/ /* Initialization and de-initialization functions *******************************/
void HAL_PWR_DeInit(void); void HAL_PWR_DeInit(void);
void HAL_PWR_EnableBkUpAccess(void); void HAL_PWR_EnableBkUpAccess(void);
void HAL_PWR_DisableBkUpAccess(void); void HAL_PWR_DisableBkUpAccess(void);
/** /**
* @} * @}
*/ */
/** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
* @{ * @{
*/ */
/* Peripheral Control functions ************************************************/ /* Peripheral Control functions ************************************************/
HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD); HAL_StatusTypeDef HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
void HAL_PWR_EnablePVD(void); void HAL_PWR_EnablePVD(void);
void HAL_PWR_DisablePVD(void); void HAL_PWR_DisablePVD(void);
/* WakeUp pins configuration functions ****************************************/ /* WakeUp pins configuration functions ****************************************/
void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity); void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinPolarity);
void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx); void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
/* Low Power modes configuration functions ************************************/ /* Low Power modes configuration functions ************************************/
void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry); void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry); void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
void HAL_PWR_EnterSTANDBYMode(void); void HAL_PWR_EnterSTANDBYMode(void);
void HAL_PWR_EnableSleepOnExit(void); void HAL_PWR_EnableSleepOnExit(void);
void HAL_PWR_DisableSleepOnExit(void); void HAL_PWR_DisableSleepOnExit(void);
void HAL_PWR_EnableSEVOnPend(void); void HAL_PWR_EnableSEVOnPend(void);
void HAL_PWR_DisableSEVOnPend(void); void HAL_PWR_DisableSEVOnPend(void);
void HAL_PWR_PVDCallback(void); void HAL_PWR_PVDCallback(void);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_PWR_H */ #endif /* __STM32L4xx_HAL_PWR_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_rng.h * @file stm32l4xx_hal_rng.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of RNG HAL module. * @brief Header file of RNG HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_RNG_H #ifndef __STM32L4xx_HAL_RNG_H
#define __STM32L4xx_HAL_RNG_H #define __STM32L4xx_HAL_RNG_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup RNG /** @addtogroup RNG
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup RNG_Exported_Types RNG Exported Types /** @defgroup RNG_Exported_Types RNG Exported Types
* @{ * @{
*/ */
#if defined(RNG_CR_CED) #if defined(RNG_CR_CED)
/** /**
* @brief RNG Configuration Structure definition * @brief RNG Configuration Structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t ClockErrorDetection; /*!< Clock error detection */ uint32_t ClockErrorDetection; /*!< Clock error detection */
}RNG_InitTypeDef; }RNG_InitTypeDef;
#endif /* defined(RNG_CR_CED) */ #endif /* defined(RNG_CR_CED) */
/** /**
* @brief RNG HAL State Structure definition * @brief RNG HAL State Structure definition
*/ */
typedef enum typedef enum
{ {
HAL_RNG_STATE_RESET = 0x00, /*!< RNG not yet initialized or disabled */ HAL_RNG_STATE_RESET = 0x00, /*!< RNG not yet initialized or disabled */
HAL_RNG_STATE_READY = 0x01, /*!< RNG initialized and ready for use */ HAL_RNG_STATE_READY = 0x01, /*!< RNG initialized and ready for use */
HAL_RNG_STATE_BUSY = 0x02, /*!< RNG internal process is ongoing */ HAL_RNG_STATE_BUSY = 0x02, /*!< RNG internal process is ongoing */
HAL_RNG_STATE_TIMEOUT = 0x03, /*!< RNG timeout state */ HAL_RNG_STATE_TIMEOUT = 0x03, /*!< RNG timeout state */
HAL_RNG_STATE_ERROR = 0x04 /*!< RNG error state */ HAL_RNG_STATE_ERROR = 0x04 /*!< RNG error state */
}HAL_RNG_StateTypeDef; }HAL_RNG_StateTypeDef;
/** /**
* @brief RNG Handle Structure definition * @brief RNG Handle Structure definition
*/ */
typedef struct typedef struct __RNG_HandleTypeDef
{ {
RNG_TypeDef *Instance; /*!< Register base address */ RNG_TypeDef *Instance; /*!< Register base address */
#if defined(RNG_CR_CED) #if defined(RNG_CR_CED)
RNG_InitTypeDef Init; /*!< RNG configuration parameters */ RNG_InitTypeDef Init; /*!< RNG configuration parameters */
#endif /* defined(RNG_CR_CED) */ #endif /* defined(RNG_CR_CED) */
HAL_LockTypeDef Lock; /*!< RNG locking object */ HAL_LockTypeDef Lock; /*!< RNG locking object */
__IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */ __IO HAL_RNG_StateTypeDef State; /*!< RNG communication state */
uint32_t RandomNumber; /*!< Last Generated RNG Data */ __IO uint32_t ErrorCode; /*!< RNG Error code */
}RNG_HandleTypeDef; uint32_t RandomNumber; /*!< Last Generated RNG Data */
/** #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
* @} void (* ReadyDataCallback)(struct __RNG_HandleTypeDef *hrng, uint32_t random32bit); /*!< RNG Data Ready Callback */
*/ void (* ErrorCallback)(struct __RNG_HandleTypeDef *hrng); /*!< RNG Error Callback */
/* Exported constants --------------------------------------------------------*/ void (* MspInitCallback)(struct __RNG_HandleTypeDef *hrng); /*!< RNG Msp Init callback */
/** @defgroup RNG_Exported_Constants RNG Exported Constants void (* MspDeInitCallback)(struct __RNG_HandleTypeDef *hrng); /*!< RNG Msp DeInit callback */
* @{ #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
*/
}RNG_HandleTypeDef;
/** @defgroup RNG_Interrupt_definition RNG Interrupts Definition
* @{ #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
*/ /**
#define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */ * @brief HAL RNG Callback ID enumeration definition
#define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */ */
#define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */ typedef enum
/** {
* @} HAL_RNG_ERROR_CB_ID = 0x00U, /*!< RNG Error Callback ID */
*/
HAL_RNG_MSPINIT_CB_ID = 0x01U, /*!< RNG MspInit callback ID */
/** @defgroup RNG_Flag_definition RNG Flags Definition HAL_RNG_MSPDEINIT_CB_ID = 0x02U /*!< RNG MspDeInit callback ID */
* @{
*/ } HAL_RNG_CallbackIDTypeDef;
#define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */
#define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */ /**
#define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */ * @brief HAL RNG Callback pointer definition
/** */
* @} typedef void (*pRNG_CallbackTypeDef)(RNG_HandleTypeDef *hrng); /*!< pointer to a common RNG callback function */
*/ typedef void (*pRNG_ReadyDataCallbackTypeDef)(RNG_HandleTypeDef * hrng, uint32_t random32bit); /*!< pointer to an RNG Data Ready specific callback function */
#if defined(RNG_CR_CED) #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
/** @defgroup RNG_Clock_Error_Detection RNG Clock Error Detection
* @{ /**
*/ * @}
#define RNG_CED_ENABLE ((uint32_t)0x00000000) /*!< Clock error detection enabled */ */
#define RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */
/** /* Exported constants --------------------------------------------------------*/
* @} /** @defgroup RNG_Exported_Constants RNG Exported Constants
*/ * @{
#endif /* defined(RNG_CR_CED) */ */
/** /** @defgroup RNG_Interrupt_definition RNG Interrupts Definition
* @} * @{
*/ */
#define RNG_IT_DRDY RNG_SR_DRDY /*!< Data Ready interrupt */
/* Exported macros -----------------------------------------------------------*/ #define RNG_IT_CEI RNG_SR_CEIS /*!< Clock error interrupt */
/** @defgroup RNG_Exported_Macros RNG Exported Macros #define RNG_IT_SEI RNG_SR_SEIS /*!< Seed error interrupt */
* @{ /**
*/ * @}
*/
/** @brief Reset RNG handle state.
* @param __HANDLE__: RNG Handle /** @defgroup RNG_Flag_definition RNG Flags Definition
* @retval None * @{
*/ */
#define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET) #define RNG_FLAG_DRDY RNG_SR_DRDY /*!< Data ready */
#define RNG_FLAG_CECS RNG_SR_CECS /*!< Clock error current status */
/** #define RNG_FLAG_SECS RNG_SR_SECS /*!< Seed error current status */
* @brief Enable the RNG peripheral. /**
* @param __HANDLE__: RNG Handle * @}
* @retval None */
*/
#define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN) #if defined(RNG_CR_CED)
/** @defgroup RNG_Clock_Error_Detection RNG Clock Error Detection
/** * @{
* @brief Disable the RNG peripheral. */
* @param __HANDLE__: RNG Handle #define RNG_CED_ENABLE ((uint32_t)0x00000000) /*!< Clock error detection enabled */
* @retval None #define RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */
*/ /**
#define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN) * @}
*/
/** #endif /* defined(RNG_CR_CED) */
* @brief Check whether the specified RNG flag is set or not.
* @param __HANDLE__: RNG Handle /** @defgroup RNG_Error_Definition RNG Error Definition
* @param __FLAG__: RNG flag * @{
* This parameter can be one of the following values: */
* @arg RNG_FLAG_DRDY: Data ready #define HAL_RNG_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
* @arg RNG_FLAG_CECS: Clock error current status #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
* @arg RNG_FLAG_SECS: Seed error current status #define HAL_RNG_ERROR_INVALID_CALLBACK ((uint32_t)0x00000001U) /*!< Invalid Callback error */
* @retval The new state of __FLAG__ (SET or RESET). #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
*/ /**
#define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) * @}
*/
/** /**
* @brief Clear the selected RNG flag status. * @}
* @param __HANDLE__: RNG handle */
* @param __FLAG__: RNG flag to clear
* @note WARNING: This is a dummy macro for HAL code alignment, /* Exported macros -----------------------------------------------------------*/
* flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only. /** @defgroup RNG_Exported_Macros RNG Exported Macros
* @retval None * @{
*/ */
#define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */
/** @brief Reset RNG handle state.
* @param __HANDLE__: RNG Handle
* @retval None
/** */
* @brief Enable the RNG interrupt. #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
* @param __HANDLE__: RNG Handle #define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) do{ \
* @retval None (__HANDLE__)->State = HAL_RNG_STATE_RESET; \
*/ (__HANDLE__)->MspInitCallback = NULL; \
#define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE) (__HANDLE__)->MspDeInitCallback = NULL; \
} while(0U)
/** #else
* @brief Disable the RNG interrupt. #define __HAL_RNG_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_RNG_STATE_RESET)
* @param __HANDLE__: RNG Handle #endif /*USE_HAL_RNG_REGISTER_CALLBACKS */
* @retval None
*/ /**
#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE) * @brief Enable the RNG peripheral.
* @param __HANDLE__: RNG Handle
/** * @retval None
* @brief Check whether the specified RNG interrupt has occurred or not. */
* @param __HANDLE__: RNG Handle #define __HAL_RNG_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_RNGEN)
* @param __INTERRUPT__: specifies the RNG interrupt status flag to check.
* This parameter can be one of the following values: /**
* @arg RNG_IT_DRDY: Data ready interrupt * @brief Disable the RNG peripheral.
* @arg RNG_IT_CEI: Clock error interrupt * @param __HANDLE__: RNG Handle
* @arg RNG_IT_SEI: Seed error interrupt * @retval None
* @retval The new state of __INTERRUPT__ (SET or RESET). */
*/ #define __HAL_RNG_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_RNGEN)
#define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__))
/**
/** * @brief Check whether the specified RNG flag is set or not.
* @brief Clear the RNG interrupt status flags. * @param __HANDLE__: RNG Handle
* @param __HANDLE__: RNG Handle * @param __FLAG__: RNG flag
* @param __INTERRUPT__: specifies the RNG interrupt status flag to clear. * This parameter can be one of the following values:
* This parameter can be one of the following values: * @arg RNG_FLAG_DRDY: Data ready
* @arg RNG_IT_CEI: Clock error interrupt * @arg RNG_FLAG_CECS: Clock error current status
* @arg RNG_IT_SEI: Seed error interrupt * @arg RNG_FLAG_SECS: Seed error current status
* @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY. * @retval The new state of __FLAG__ (SET or RESET).
* @retval None */
*/ #define __HAL_RNG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
#define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__))
/**
/** * @brief Clear the selected RNG flag status.
* @} * @param __HANDLE__: RNG handle
*/ * @param __FLAG__: RNG flag to clear
* @note WARNING: This is a dummy macro for HAL code alignment,
* flags RNG_FLAG_DRDY, RNG_FLAG_CECS and RNG_FLAG_SECS are read-only.
/* Exported functions --------------------------------------------------------*/ * @retval None
/** @defgroup RNG_Exported_Functions RNG Exported Functions */
* @{ #define __HAL_RNG_CLEAR_FLAG(__HANDLE__, __FLAG__) /* dummy macro */
*/
/**
/* Initialization and de-initialization functions ******************************/ * @brief Enable the RNG interrupt.
/** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions * @param __HANDLE__: RNG Handle
* @{ * @retval None
*/ */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng); #define __HAL_RNG_ENABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR |= RNG_CR_IE)
HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng);
void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng); /**
void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng); * @brief Disable the RNG interrupt.
/** * @param __HANDLE__: RNG Handle
* @} * @retval None
*/ */
#define __HAL_RNG_DISABLE_IT(__HANDLE__) ((__HANDLE__)->Instance->CR &= ~RNG_CR_IE)
/* Peripheral Control functions ************************************************/
/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions /**
* @{ * @brief Check whether the specified RNG interrupt has occurred or not.
*/ * @param __HANDLE__: RNG Handle
uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */ * @param __INTERRUPT__: specifies the RNG interrupt status flag to check.
uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */ * This parameter can be one of the following values:
* @arg RNG_IT_DRDY: Data ready interrupt
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit); * @arg RNG_IT_CEI: Clock error interrupt
HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng); * @arg RNG_IT_SEI: Seed error interrupt
uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng); * @retval The new state of __INTERRUPT__ (SET or RESET).
*/
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng); #define __HAL_RNG_GET_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR & (__INTERRUPT__)) == (__INTERRUPT__))
void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit); /**
/** * @brief Clear the RNG interrupt status flags.
* @} * @param __HANDLE__: RNG Handle
*/ * @param __INTERRUPT__: specifies the RNG interrupt status flag to clear.
* This parameter can be one of the following values:
/* Peripheral State functions **************************************************/ * @arg RNG_IT_CEI: Clock error interrupt
/** @defgroup RNG_Exported_Functions_Group3 Peripheral State functions * @arg RNG_IT_SEI: Seed error interrupt
* @{ * @note RNG_IT_DRDY flag is read-only, reading RNG_DR register automatically clears RNG_IT_DRDY.
*/ * @retval None
HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng); */
/** #define __HAL_RNG_CLEAR_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->SR) = ~(__INTERRUPT__))
* @}
*/ /**
* @}
/** */
* @}
*/
/* Exported functions --------------------------------------------------------*/
/* Private types -------------------------------------------------------------*/ /** @defgroup RNG_Exported_Functions RNG Exported Functions
/* Private defines -----------------------------------------------------------*/ * @{
/* Private variables ---------------------------------------------------------*/ */
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Initialization and de-initialization functions ******************************/
/** @addtogroup RNG_Private_Macros RNG Private Macros /** @defgroup RNG_Exported_Functions_Group1 Initialization and de-initialization functions
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_RNG_Init(RNG_HandleTypeDef *hrng);
#if defined(RNG_CR_CED) HAL_StatusTypeDef HAL_RNG_DeInit (RNG_HandleTypeDef *hrng);
/** void HAL_RNG_MspInit(RNG_HandleTypeDef *hrng);
* @brief Verify the RNG Clock Error Detection mode. void HAL_RNG_MspDeInit(RNG_HandleTypeDef *hrng);
* @param __MODE__: RNG Clock Error Detection mode
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid) /* Callbacks Register/UnRegister functions ***********************************/
*/ #if (USE_HAL_RNG_REGISTER_CALLBACKS == 1)
#define IS_RNG_CED(__MODE__) (((__MODE__) == RNG_CED_ENABLE) || \ HAL_StatusTypeDef HAL_RNG_RegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID, pRNG_CallbackTypeDef pCallback);
((__MODE__) == RNG_CED_DISABLE)) HAL_StatusTypeDef HAL_RNG_UnRegisterCallback(RNG_HandleTypeDef *hrng, HAL_RNG_CallbackIDTypeDef CallbackID);
#endif /* defined(RNG_CR_CED) */
HAL_StatusTypeDef HAL_RNG_RegisterReadyDataCallback(RNG_HandleTypeDef *hrng, pRNG_ReadyDataCallbackTypeDef pCallback);
/** HAL_StatusTypeDef HAL_RNG_UnRegisterReadyDataCallback(RNG_HandleTypeDef *hrng);
* @} #endif /* USE_HAL_RNG_REGISTER_CALLBACKS */
*/
/* Private functions prototypes ----------------------------------------------*/ /**
* @}
/** */
* @}
*/ /* Peripheral Control functions ************************************************/
/** @defgroup RNG_Exported_Functions_Group2 Peripheral Control functions
/** * @{
* @} */
*/ uint32_t HAL_RNG_GetRandomNumber(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber() instead */
uint32_t HAL_RNG_GetRandomNumber_IT(RNG_HandleTypeDef *hrng); /* Obsolete, use HAL_RNG_GenerateRandomNumber_IT() instead */
#ifdef __cplusplus
} HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber(RNG_HandleTypeDef *hrng, uint32_t *random32bit);
#endif HAL_StatusTypeDef HAL_RNG_GenerateRandomNumber_IT(RNG_HandleTypeDef *hrng);
uint32_t HAL_RNG_ReadLastRandomNumber(RNG_HandleTypeDef *hrng);
#endif /* __STM32L4xx_HAL_RNG_H */
void HAL_RNG_IRQHandler(RNG_HandleTypeDef *hrng);
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ void HAL_RNG_ErrorCallback(RNG_HandleTypeDef *hrng);
void HAL_RNG_ReadyDataCallback(RNG_HandleTypeDef* hrng, uint32_t random32bit);
/**
* @}
*/
/* Peripheral State functions **************************************************/
/** @defgroup RNG_Exported_Functions_Group3 Peripheral State and Error functions
* @{
*/
HAL_RNG_StateTypeDef HAL_RNG_GetState(RNG_HandleTypeDef *hrng);
uint32_t HAL_RNG_GetError(RNG_HandleTypeDef *hrng);
/**
* @}
*/
/**
* @}
*/
/* Private types -------------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @addtogroup RNG_Private_Macros RNG Private Macros
* @{
*/
#if defined(RNG_CR_CED)
/**
* @brief Verify the RNG Clock Error Detection mode.
* @param __MODE__: RNG Clock Error Detection mode
* @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
*/
#define IS_RNG_CED(__MODE__) (((__MODE__) == RNG_CED_ENABLE) || \
((__MODE__) == RNG_CED_DISABLE))
#endif /* defined(RNG_CR_CED) */
/**
* @}
*/
/* Private functions prototypes ----------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_RNG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_sai_ex.h * @file stm32l4xx_hal_sai_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of SAI HAL extended module. * @brief Header file of SAI HAL extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_SAI_EX_H #ifndef STM32L4xx_HAL_SAI_EX_H
#define __STM32L4xx_HAL_SAI_EX_H #define STM32L4xx_HAL_SAI_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup SAIEx /** @addtogroup SAIEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup SAIEx_Exported_Types SAIEx Exported Types
/** @defgroup SAIEx_Exported_Types SAIEx Exported Types * @{
* @{ */
*/
/**
/** * @brief PDM microphone delay structure definition
* @brief PDM microphone delay structure definition */
*/ typedef struct
typedef struct {
{ uint32_t MicPair; /*!< Specifies which pair of microphones is selected.
uint32_t MicPair; /*!< Specifies which pair of microphones is selected. This parameter must be a number between Min_Data = 1 and Max_Data = 3. */
This parameter must be a number between Min_Data = 1 and Max_Data = 3. */
uint32_t LeftDelay; /*!< Specifies the delay in PDM clock unit to apply on left microphone.
uint32_t LeftDelay; /*!< Specifies the delay in PDM clock unit to apply on left microphone. This parameter must be a number between Min_Data = 0 and Max_Data = 7. */
This parameter must be a number between Min_Data = 0 and Max_Data = 7. */
uint32_t RightDelay; /*!< Specifies the delay in PDM clock unit to apply on right microphone.
uint32_t RightDelay; /*!< Specifies the delay in PDM clock unit to apply on right microphone. This parameter must be a number between Min_Data = 0 and Max_Data = 7. */
This parameter must be a number between Min_Data = 0 and Max_Data = 7. */ } SAIEx_PdmMicDelayParamTypeDef;
}SAIEx_PdmMicDelayParamTypeDef;
/**
/** * @}
* @} */
*/
/* Exported constants --------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /** @addtogroup SAIEx_Exported_Functions SAIEx Extended Exported Functions
* @{
/** @addtogroup SAIEx_Exported_Functions SAIEx Extended Exported Functions */
* @{
*/ /** @addtogroup SAIEx_Exported_Functions_Group1 Peripheral Control functions
* @{
/** @addtogroup SAIEx_Exported_Functions_Group1 Peripheral Control functions */
* @{ HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(SAI_HandleTypeDef *hsai, SAIEx_PdmMicDelayParamTypeDef *pdmMicDelay);
*/ /**
* @}
HAL_StatusTypeDef HAL_SAIEx_ConfigPdmMicDelay(SAI_HandleTypeDef *hsai, SAIEx_PdmMicDelayParamTypeDef *pdmMicDelay); */
/** /**
* @} * @}
*/ */
/** /* Private macros ------------------------------------------------------------*/
* @} /** @addtogroup SAIEx_Private_Macros SAIEx Extended Private Macros
*/ * @{
*/
/* Private macros ------------------------------------------------------------*/ #define IS_SAI_PDM_MIC_DELAY(VALUE) ((VALUE) <= 7U)
/**
/** @addtogroup SAIEx_Private_Macros SAIEx Extended Private Macros * @}
* @{ */
*/
/**
#define IS_SAI_PDM_MIC_DELAY(VALUE) ((VALUE) <= 7U) * @}
*/
/**
* @} /**
*/ * @}
*/
/**
* @} #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
*/
#ifdef __cplusplus
/** }
* @} #endif
*/
#endif /* STM32L4xx_HAL_SAI_EX_H */
#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_SAI_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_sd.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_sd_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_sd_ex.h * @file stm32l4xx_hal_sd_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of SD HAL extended module. * @brief Header file of SD HAL extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_SD_EX_H #ifndef STM32L4xx_HAL_SD_EX_H
#define __STM32L4xx_HAL_SD_EX_H #define STM32L4xx_HAL_SD_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) #if defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx)
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup SDEx /** @addtogroup SDEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup SDEx_Exported_Types SDEx Exported Types /** @defgroup SDEx_Exported_Types SDEx Exported Types
* @{ * @{
*/ */
/** @defgroup SDEx_Exported_Types_Group1 SD Card Internal DMA Buffer structure /** @defgroup SDEx_Exported_Types_Group1 SD Card Internal DMA Buffer structure
* @{ * @{
*/ */
typedef enum typedef enum
{ {
SD_DMA_BUFFER0 = 0x00U, /*!< selects SD internal DMA Buffer 0 */ SD_DMA_BUFFER0 = 0x00U, /*!< selects SD internal DMA Buffer 0 */
SD_DMA_BUFFER1 = 0x01U, /*!< selects SD internal DMA Buffer 1 */ SD_DMA_BUFFER1 = 0x01U, /*!< selects SD internal DMA Buffer 1 */
}HAL_SDEx_DMABuffer_MemoryTypeDef; }HAL_SDEx_DMABuffer_MemoryTypeDef;
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup SDEx_Exported_Functions SDEx Exported Functions /** @defgroup SDEx_Exported_Functions SDEx Exported Functions
* @{ * @{
*/ */
/** @defgroup SDEx_Exported_Functions_Group1 HighSpeed functions /** @defgroup SDEx_Exported_Functions_Group1 HighSpeed functions
* @{ * @{
*/ */
uint32_t HAL_SDEx_HighSpeed (SD_HandleTypeDef *hsd); uint32_t HAL_SDEx_HighSpeed (SD_HandleTypeDef *hsd);
void HAL_SDEx_DriveTransceiver_1_8V_Callback(FlagStatus status); void HAL_SDEx_DriveTransceiver_1_8V_Callback(FlagStatus status);
/** /**
* @} * @}
*/ */
/** @defgroup SDEx_Exported_Functions_Group2 MultiBuffer functions /** @defgroup SDEx_Exported_Functions_Group2 MultiBuffer functions
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_SDEx_ConfigDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t * pDataBuffer0, uint32_t * pDataBuffer1, uint32_t BufferSize); HAL_StatusTypeDef HAL_SDEx_ConfigDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t * pDataBuffer0, uint32_t * pDataBuffer1, uint32_t BufferSize);
HAL_StatusTypeDef HAL_SDEx_ReadBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks); HAL_StatusTypeDef HAL_SDEx_ReadBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_SDEx_WriteBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks); HAL_StatusTypeDef HAL_SDEx_WriteBlocksDMAMultiBuffer(SD_HandleTypeDef *hsd, uint32_t BlockAdd, uint32_t NumberOfBlocks);
HAL_StatusTypeDef HAL_SDEx_ChangeDMABuffer(SD_HandleTypeDef *hsd, HAL_SDEx_DMABuffer_MemoryTypeDef Buffer, uint32_t *pDataBuffer); HAL_StatusTypeDef HAL_SDEx_ChangeDMABuffer(SD_HandleTypeDef *hsd, HAL_SDEx_DMABuffer_MemoryTypeDef Buffer, uint32_t *pDataBuffer);
void HAL_SDEx_Read_DMADoubleBuffer0CpltCallback(SD_HandleTypeDef *hsd); void HAL_SDEx_Read_DMADoubleBuffer0CpltCallback(SD_HandleTypeDef *hsd);
void HAL_SDEx_Read_DMADoubleBuffer1CpltCallback(SD_HandleTypeDef *hsd); void HAL_SDEx_Read_DMADoubleBuffer1CpltCallback(SD_HandleTypeDef *hsd);
void HAL_SDEx_Write_DMADoubleBuffer0CpltCallback(SD_HandleTypeDef *hsd); void HAL_SDEx_Write_DMADoubleBuffer0CpltCallback(SD_HandleTypeDef *hsd);
void HAL_SDEx_Write_DMADoubleBuffer1CpltCallback(SD_HandleTypeDef *hsd); void HAL_SDEx_Write_DMADoubleBuffer1CpltCallback(SD_HandleTypeDef *hsd);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private defines -----------------------------------------------------------*/ /* Private defines -----------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/* Private functions prototypes ----------------------------------------------*/ /* Private functions prototypes ----------------------------------------------*/
/* Private functions ---------------------------------------------------------*/ /* Private functions ---------------------------------------------------------*/
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #endif /* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_SDEx_H */ #endif /* STM32L4xx_HAL_SDEx_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_smartcard.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_smartcard_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_smartcard_ex.h * @file stm32l4xx_hal_smartcard_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of SMARTCARD HAL Extended module. * @brief Header file of SMARTCARD HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_SMARTCARD_EX_H #ifndef __STM32L4xx_HAL_SMARTCARD_EX_H
#define __STM32L4xx_HAL_SMARTCARD_EX_H #define __STM32L4xx_HAL_SMARTCARD_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup SMARTCARDEx /** @addtogroup SMARTCARDEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @addtogroup SMARTCARDEx_Exported_Constants SMARTCARD Extended Exported Constants /** @addtogroup SMARTCARDEx_Exported_Constants SMARTCARD Extended Exported Constants
* @{ * @{
*/ */
/** @defgroup SMARTCARDEx_Transmission_Completion_Indication SMARTCARD Transmission Completion Indication /** @defgroup SMARTCARDEx_Transmission_Completion_Indication SMARTCARD Transmission Completion Indication
* @{ * @{
*/ */
#if defined(USART_TCBGT_SUPPORT) #if defined(USART_TCBGT_SUPPORT)
#define SMARTCARD_TCBGT SMARTCARD_IT_TCBGT /*!< SMARTCARD transmission complete before guard time */ #define SMARTCARD_TCBGT SMARTCARD_IT_TCBGT /*!< SMARTCARD transmission complete before guard time */
#endif /* USART_TCBGT_SUPPORT */ #endif /* USART_TCBGT_SUPPORT */
#define SMARTCARD_TC SMARTCARD_IT_TC /*!< SMARTCARD transmission complete (flag raised when guard time has elapsed) */ #define SMARTCARD_TC SMARTCARD_IT_TC /*!< SMARTCARD transmission complete (flag raised when guard time has elapsed) */
/** /**
* @} * @}
*/ */
/** @defgroup SMARTCARDEx_Advanced_Features_Initialization_Type SMARTCARD advanced feature initialization type /** @defgroup SMARTCARDEx_Advanced_Features_Initialization_Type SMARTCARD advanced feature initialization type
* @{ * @{
*/ */
#define SMARTCARD_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */ #define SMARTCARD_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
#define SMARTCARD_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */ #define SMARTCARD_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
#define SMARTCARD_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */ #define SMARTCARD_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
#define SMARTCARD_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */ #define SMARTCARD_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
#define SMARTCARD_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */ #define SMARTCARD_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
#define SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */ #define SMARTCARD_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
#define SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */ #define SMARTCARD_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
#define SMARTCARD_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */ #define SMARTCARD_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
#if defined(USART_TCBGT_SUPPORT) #if defined(USART_TCBGT_SUPPORT)
#define SMARTCARD_ADVFEATURE_TXCOMPLETION 0x00000100U /*!< TX completion indication before of after guard time */ #define SMARTCARD_ADVFEATURE_TXCOMPLETION 0x00000100U /*!< TX completion indication before of after guard time */
#endif /* USART_TCBGT_SUPPORT */ #endif /* USART_TCBGT_SUPPORT */
/** /**
* @} * @}
*/ */
#if defined(USART_CR1_FIFOEN) #if defined(USART_CR1_FIFOEN)
/** @defgroup SMARTCARDEx_TXFIFO_threshold_level SMARTCARDEx TXFIFO threshold level /** @defgroup SMARTCARDEx_FIFO_mode SMARTCARDEx FIFO mode
* @brief SMARTCARD TXFIFO level * @brief SMARTCARD FIFO mode
* @{ * @{
*/ */
#define SMARTCARD_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ #define SMARTCARD_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
#define SMARTCARD_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ #define SMARTCARD_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
#define SMARTCARD_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ /**
#define SMARTCARD_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ * @}
#define SMARTCARD_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ */
#define SMARTCARD_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
/** /** @defgroup SMARTCARDEx_TXFIFO_threshold_level SMARTCARDEx TXFIFO threshold level
* @} * @brief SMARTCARD TXFIFO level
*/ * @{
*/
/** @defgroup SMARTCARDEx_RXFIFO_threshold_level SMARTCARDEx RXFIFO threshold level #define SMARTCARD_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */
* @brief SMARTCARD RXFIFO level #define SMARTCARD_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */
* @{ #define SMARTCARD_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */
*/ #define SMARTCARD_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */
#define SMARTCARD_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ #define SMARTCARD_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */
#define SMARTCARD_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ #define SMARTCARD_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
#define SMARTCARD_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */ /**
#define SMARTCARD_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ * @}
#define SMARTCARD_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ */
#define SMARTCARD_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */
/** /** @defgroup SMARTCARDEx_RXFIFO_threshold_level SMARTCARDEx RXFIFO threshold level
* @} * @brief SMARTCARD RXFIFO level
*/ * @{
#endif */
#define SMARTCARD_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */
/** @defgroup SMARTCARDEx_Flags SMARTCARD Flags #define SMARTCARD_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */
* Elements values convention: 0xXXXX #define SMARTCARD_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */
* - 0xXXXX : Flag mask in the ISR register #define SMARTCARD_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */
* @{ #define SMARTCARD_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */
*/ #define SMARTCARD_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */
#if defined(USART_TCBGT_SUPPORT) /**
#define SMARTCARD_FLAG_TCBGT USART_ISR_TCBGT /*!< SMARTCARD transmission complete before guard time completion */ * @}
#endif /* USART_TCBGT_SUPPORT */ */
#define SMARTCARD_FLAG_REACK USART_ISR_REACK /*!< SMARTCARD receive enable acknowledge flag */ #endif
#define SMARTCARD_FLAG_TEACK USART_ISR_TEACK /*!< SMARTCARD transmit enable acknowledge flag */
#define SMARTCARD_FLAG_BUSY USART_ISR_BUSY /*!< SMARTCARD busy flag */ /** @defgroup SMARTCARDEx_Flags SMARTCARD Flags
#define SMARTCARD_FLAG_EOBF USART_ISR_EOBF /*!< SMARTCARD end of block flag */ * Elements values convention: 0xXXXX
#define SMARTCARD_FLAG_RTOF USART_ISR_RTOF /*!< SMARTCARD receiver timeout flag */ * - 0xXXXX : Flag mask in the ISR register
#if defined(USART_CR1_FIFOEN) * @{
#define SMARTCARD_FLAG_TXE USART_ISR_TXE_TXFNF /*!< SMARTCARD transmit data register empty */ */
#define SMARTCARD_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< SMARTCARD TXFIFO not full */ #if defined(USART_TCBGT_SUPPORT)
#else #define SMARTCARD_FLAG_TCBGT USART_ISR_TCBGT /*!< SMARTCARD transmission complete before guard time completion */
#define SMARTCARD_FLAG_TXE USART_ISR_TXE /*!< SMARTCARD transmit data register empty */ #endif /* USART_TCBGT_SUPPORT */
#endif #define SMARTCARD_FLAG_REACK USART_ISR_REACK /*!< SMARTCARD receive enable acknowledge flag */
#define SMARTCARD_FLAG_TC USART_ISR_TC /*!< SMARTCARD transmission complete */ #define SMARTCARD_FLAG_TEACK USART_ISR_TEACK /*!< SMARTCARD transmit enable acknowledge flag */
#if defined(USART_CR1_FIFOEN) #define SMARTCARD_FLAG_BUSY USART_ISR_BUSY /*!< SMARTCARD busy flag */
#define SMARTCARD_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< SMARTCARD read data register not empty */ #define SMARTCARD_FLAG_EOBF USART_ISR_EOBF /*!< SMARTCARD end of block flag */
#define SMARTCARD_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< SMARTCARD RXFIFO not empty */ #define SMARTCARD_FLAG_RTOF USART_ISR_RTOF /*!< SMARTCARD receiver timeout flag */
#else #if defined(USART_CR1_FIFOEN)
#define SMARTCARD_FLAG_RXNE USART_ISR_RXNE /*!< SMARTCARD read data register not empty */ #define SMARTCARD_FLAG_TXE USART_ISR_TXE_TXFNF /*!< SMARTCARD transmit data register empty */
#endif #define SMARTCARD_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< SMARTCARD TXFIFO not full */
#define SMARTCARD_FLAG_IDLE USART_ISR_IDLE /*!< SMARTCARD idle line detection */ #else
#define SMARTCARD_FLAG_ORE USART_ISR_ORE /*!< SMARTCARD overrun error */ #define SMARTCARD_FLAG_TXE USART_ISR_TXE /*!< SMARTCARD transmit data register empty */
#define SMARTCARD_FLAG_NE USART_ISR_NE /*!< SMARTCARD noise error */ #endif
#define SMARTCARD_FLAG_FE USART_ISR_FE /*!< SMARTCARD frame error */ #define SMARTCARD_FLAG_TC USART_ISR_TC /*!< SMARTCARD transmission complete */
#define SMARTCARD_FLAG_PE USART_ISR_PE /*!< SMARTCARD parity error */ #if defined(USART_CR1_FIFOEN)
#if defined(USART_CR1_FIFOEN) #define SMARTCARD_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< SMARTCARD read data register not empty */
#define SMARTCARD_FLAG_TXFE USART_ISR_TXFE /*!< SMARTCARD TXFIFO Empty flag */ #define SMARTCARD_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< SMARTCARD RXFIFO not empty */
#define SMARTCARD_FLAG_RXFF USART_ISR_RXFF /*!< SMARTCARD RXFIFO Full flag */ #else
#define SMARTCARD_FLAG_RXFT USART_ISR_RXFT /*!< SMARTCARD RXFIFO threshold flag */ #define SMARTCARD_FLAG_RXNE USART_ISR_RXNE /*!< SMARTCARD read data register not empty */
#define SMARTCARD_FLAG_TXFT USART_ISR_TXFT /*!< SMARTCARD TXFIFO threshold flag */ #endif
#endif #define SMARTCARD_FLAG_IDLE USART_ISR_IDLE /*!< SMARTCARD idle line detection */
/** #define SMARTCARD_FLAG_ORE USART_ISR_ORE /*!< SMARTCARD overrun error */
* @} #define SMARTCARD_FLAG_NE USART_ISR_NE /*!< SMARTCARD noise error */
*/ #define SMARTCARD_FLAG_FE USART_ISR_FE /*!< SMARTCARD frame error */
#define SMARTCARD_FLAG_PE USART_ISR_PE /*!< SMARTCARD parity error */
/** @defgroup SMARTCARDEx_Interrupt_definition SMARTCARD Interrupts Definition #if defined(USART_CR1_FIFOEN)
* Elements values convention: 000ZZZZZ0XXYYYYYb #define SMARTCARD_FLAG_TXFE USART_ISR_TXFE /*!< SMARTCARD TXFIFO Empty flag */
* - YYYYY : Interrupt source position in the XX register (5 bits) #define SMARTCARD_FLAG_RXFF USART_ISR_RXFF /*!< SMARTCARD RXFIFO Full flag */
* - XX : Interrupt source register (2 bits) #define SMARTCARD_FLAG_RXFT USART_ISR_RXFT /*!< SMARTCARD RXFIFO threshold flag */
* - 01: CR1 register #define SMARTCARD_FLAG_TXFT USART_ISR_TXFT /*!< SMARTCARD TXFIFO threshold flag */
* - 10: CR2 register #endif
* - 11: CR3 register /**
* - ZZZZZ : Flag position in the ISR register(5 bits) * @}
* @{ */
*/
#define SMARTCARD_IT_PE 0x0028U /*!< SMARTCARD parity error interruption */ /** @defgroup SMARTCARDEx_Interrupt_definition SMARTCARD Interrupts Definition
#define SMARTCARD_IT_TXE 0x0727U /*!< SMARTCARD transmit data register empty interruption */ * Elements values convention: 000ZZZZZ0XXYYYYYb
#if defined(USART_CR1_FIFOEN) * - YYYYY : Interrupt source position in the XX register (5 bits)
#define SMARTCARD_IT_TXFNF 0x0727U /*!< SMARTCARD TX FIFO not full interruption */ * - XX : Interrupt source register (2 bits)
#endif * - 01: CR1 register
#define SMARTCARD_IT_TC 0x0626U /*!< SMARTCARD transmission complete interruption */ * - 10: CR2 register
#define SMARTCARD_IT_RXNE 0x0525U /*!< SMARTCARD read data register not empty interruption */ * - 11: CR3 register
#if defined(USART_CR1_FIFOEN) * - ZZZZZ : Flag position in the ISR register(5 bits)
#define SMARTCARD_IT_RXFNE 0x0525U /*!< SMARTCARD RXFIFO not empty interruption */ * @{
#endif */
#define SMARTCARD_IT_IDLE 0x0424U /*!< SMARTCARD idle line detection interruption */ #define SMARTCARD_IT_PE 0x0028U /*!< SMARTCARD parity error interruption */
#define SMARTCARD_IT_TXE 0x0727U /*!< SMARTCARD transmit data register empty interruption */
#define SMARTCARD_IT_ERR 0x0060U /*!< SMARTCARD error interruption */ #if defined(USART_CR1_FIFOEN)
#define SMARTCARD_IT_ORE 0x0300U /*!< SMARTCARD overrun error interruption */ #define SMARTCARD_IT_TXFNF 0x0727U /*!< SMARTCARD TX FIFO not full interruption */
#define SMARTCARD_IT_NE 0x0200U /*!< SMARTCARD noise error interruption */ #endif
#define SMARTCARD_IT_FE 0x0100U /*!< SMARTCARD frame error interruption */ #define SMARTCARD_IT_TC 0x0626U /*!< SMARTCARD transmission complete interruption */
#define SMARTCARD_IT_RXNE 0x0525U /*!< SMARTCARD read data register not empty interruption */
#define SMARTCARD_IT_EOB 0x0C3BU /*!< SMARTCARD end of block interruption */ #if defined(USART_CR1_FIFOEN)
#define SMARTCARD_IT_RTO 0x0B3AU /*!< SMARTCARD receiver timeout interruption */ #define SMARTCARD_IT_RXFNE 0x0525U /*!< SMARTCARD RXFIFO not empty interruption */
#if defined(USART_TCBGT_SUPPORT) #endif
#define SMARTCARD_IT_TCBGT 0x1978U /*!< SMARTCARD transmission complete before guard time completion interruption */ #define SMARTCARD_IT_IDLE 0x0424U /*!< SMARTCARD idle line detection interruption */
#endif
#define SMARTCARD_IT_ERR 0x0060U /*!< SMARTCARD error interruption */
#if defined(USART_CR1_FIFOEN) #define SMARTCARD_IT_ORE 0x0300U /*!< SMARTCARD overrun error interruption */
#define SMARTCARD_IT_RXFF 0x183FU /*!< SMARTCARD RXFIFO full interruption */ #define SMARTCARD_IT_NE 0x0200U /*!< SMARTCARD noise error interruption */
#define SMARTCARD_IT_TXFE 0x173EU /*!< SMARTCARD TXFIFO empty interruption */ #define SMARTCARD_IT_FE 0x0100U /*!< SMARTCARD frame error interruption */
#define SMARTCARD_IT_RXFT 0x1A7CU /*!< SMARTCARD RXFIFO threshold reached interruption */
#define SMARTCARD_IT_TXFT 0x1B77U /*!< SMARTCARD TXFIFO threshold reached interruption */ #define SMARTCARD_IT_EOB 0x0C3BU /*!< SMARTCARD end of block interruption */
#endif #define SMARTCARD_IT_RTO 0x0B3AU /*!< SMARTCARD receiver timeout interruption */
/** #if defined(USART_TCBGT_SUPPORT)
* @} #define SMARTCARD_IT_TCBGT 0x1978U /*!< SMARTCARD transmission complete before guard time completion interruption */
*/ #endif /* USART_TCBGT_SUPPORT */
/** @defgroup SMARTCARDEx_IT_CLEAR_Flags SMARTCARD Interruption Clear Flags #if defined(USART_CR1_FIFOEN)
* @{ #define SMARTCARD_IT_RXFF 0x183FU /*!< SMARTCARD RXFIFO full interruption */
*/ #define SMARTCARD_IT_TXFE 0x173EU /*!< SMARTCARD TXFIFO empty interruption */
#define SMARTCARD_CLEAR_PEF USART_ICR_PECF /*!< SMARTCARD parity error clear flag */ #define SMARTCARD_IT_RXFT 0x1A7CU /*!< SMARTCARD RXFIFO threshold reached interruption */
#define SMARTCARD_CLEAR_FEF USART_ICR_FECF /*!< SMARTCARD framing error clear flag */ #define SMARTCARD_IT_TXFT 0x1B77U /*!< SMARTCARD TXFIFO threshold reached interruption */
#define SMARTCARD_CLEAR_NEF USART_ICR_NECF /*!< SMARTCARD noise detected clear flag */ #endif
#define SMARTCARD_CLEAR_OREF USART_ICR_ORECF /*!< SMARTCARD overrun error clear flag */ /**
#define SMARTCARD_CLEAR_IDLEF USART_ICR_IDLECF /*!< SMARTCARD idle line detected clear flag */ * @}
#if defined(USART_CR1_FIFOEN) */
#define SMARTCARD_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty Clear Flag */
#endif /** @defgroup SMARTCARDEx_IT_CLEAR_Flags SMARTCARD Interruption Clear Flags
#define SMARTCARD_CLEAR_TCF USART_ICR_TCCF /*!< SMARTCARD transmission complete clear flag */ * @{
#if defined(USART_TCBGT_SUPPORT) */
#define SMARTCARD_CLEAR_TCBGTF USART_ICR_TCBGTCF /*!< SMARTCARD transmission complete before guard time completion clear flag */ #define SMARTCARD_CLEAR_PEF USART_ICR_PECF /*!< SMARTCARD parity error clear flag */
#endif #define SMARTCARD_CLEAR_FEF USART_ICR_FECF /*!< SMARTCARD framing error clear flag */
#define SMARTCARD_CLEAR_RTOF USART_ICR_RTOCF /*!< SMARTCARD receiver time out clear flag */ #define SMARTCARD_CLEAR_NEF USART_ICR_NECF /*!< SMARTCARD noise error detected clear flag */
#define SMARTCARD_CLEAR_EOBF USART_ICR_EOBCF /*!< SMARTCARD end of block clear flag */ #define SMARTCARD_CLEAR_OREF USART_ICR_ORECF /*!< SMARTCARD overrun error clear flag */
/** #define SMARTCARD_CLEAR_IDLEF USART_ICR_IDLECF /*!< SMARTCARD idle line detected clear flag */
* @} #if defined(USART_CR1_FIFOEN)
*/ #define SMARTCARD_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty Clear Flag */
#endif
/** #define SMARTCARD_CLEAR_TCF USART_ICR_TCCF /*!< SMARTCARD transmission complete clear flag */
* @} #if defined(USART_TCBGT_SUPPORT)
*/ #define SMARTCARD_CLEAR_TCBGTF USART_ICR_TCBGTCF /*!< SMARTCARD transmission complete before guard time completion clear flag */
#endif /* USART_TCBGT_SUPPORT */
/* Exported macros -----------------------------------------------------------*/ #define SMARTCARD_CLEAR_RTOF USART_ICR_RTOCF /*!< SMARTCARD receiver time out clear flag */
#define SMARTCARD_CLEAR_EOBF USART_ICR_EOBCF /*!< SMARTCARD end of block clear flag */
/* Private constants ---------------------------------------------------------*/ /**
/** @defgroup SMARTCARDEx_Private_Constants SMARTCARDEx Private Constants * @}
* @{ */
*/
#if defined(USART_CR1_FIFOEN) /**
/** @defgroup SMARTCARDEx_FIFO_mode SMARTCARDEx FIFO mode * @}
* @{ */
*/ /* Exported macros -----------------------------------------------------------*/
#define SMARTCARD_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ /* Private macros ------------------------------------------------------------*/
#define SMARTCARD_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */ /** @defgroup SMARTCARDEx_Private_Macros SMARTCARD Extended Private Macros
/** * @{
* @} */
*/
#endif /** @brief Set the Transmission Completion flag
/** * @param __HANDLE__ specifies the SMARTCARD Handle.
* @} * @note If TCBGT (Transmission Complete Before Guard Time) flag is not available or if
*/ * AdvancedInit.TxCompletionIndication is not already filled, the latter is forced
* to SMARTCARD_TC (transmission completion indication when guard time has elapsed).
/* Private macros ------------------------------------------------------------*/ * @retval None
/** @defgroup SMARTCARDEx_Private_Macros SMARTCARD Extended Private Macros */
* @{ #if defined(USART_TCBGT_SUPPORT)
*/ #define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__) \
do { \
/** @brief Report the SMARTCARD clock source. if (HAL_IS_BIT_CLR((__HANDLE__)->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXCOMPLETION)) \
* @param __HANDLE__: specifies the SMARTCARD Handle. { \
* @param __CLOCKSOURCE__: output variable. (__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC; \
* @retval the SMARTCARD clocking source, written in __CLOCKSOURCE__. } \
*/ else \
#if defined (STM32L432xx) || defined (STM32L442xx) { \
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ assert_param(IS_SMARTCARD_TRANSMISSION_COMPLETION((__HANDLE__)->AdvancedInit.TxCompletionIndication)); \
do { \ } \
if((__HANDLE__)->Instance == USART1) \ } while(0U)
{ \ #else
switch(__HAL_RCC_GET_USART1_SOURCE()) \ #define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__) \
{ \ do { \
case RCC_USART1CLKSOURCE_PCLK2: \ (__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC; \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \ } while(0U)
break; \ #endif /* USART_TCBGT_SUPPORT */
case RCC_USART1CLKSOURCE_HSI: \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \ /** @brief Return the transmission completion flag.
break; \ * @param __HANDLE__ specifies the SMARTCARD Handle.
case RCC_USART1CLKSOURCE_SYSCLK: \ * @note Based on AdvancedInit.TxCompletionIndication setting, return TC or TCBGT flag.
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ * When TCBGT flag (Transmission Complete Before Guard Time) is not available, TC flag is
break; \ * reported.
case RCC_USART1CLKSOURCE_LSE: \ * @retval Transmission completion flag
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ */
break; \ #if defined(USART_TCBGT_SUPPORT)
default: \ #define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__) \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ (((__HANDLE__)->AdvancedInit.TxCompletionIndication == SMARTCARD_TC) ? (SMARTCARD_FLAG_TC) : (SMARTCARD_FLAG_TCBGT))
break; \ #else
} \ #define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__) (SMARTCARD_FLAG_TC)
} \ #endif /* USART_TCBGT_SUPPORT */
else if((__HANDLE__)->Instance == USART2) \
{ \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ /**
{ \ * @brief Ensure that SMARTCARD frame transmission completion used flag is valid.
case RCC_USART2CLKSOURCE_PCLK1: \ * @param __TXCOMPLETE__ SMARTCARD frame transmission completion used flag.
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \ * @retval SET (__TXCOMPLETE__ is valid) or RESET (__TXCOMPLETE__ is invalid)
break; \ */
case RCC_USART2CLKSOURCE_HSI: \ #if defined(USART_TCBGT_SUPPORT)
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \ #define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) (((__TXCOMPLETE__) == SMARTCARD_TCBGT) ||\
break; \ ((__TXCOMPLETE__) == SMARTCARD_TC))
case RCC_USART2CLKSOURCE_SYSCLK: \ #else
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ #define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) ((__TXCOMPLETE__) == SMARTCARD_TC)
break; \ #endif /* USART_TCBGT_SUPPORT */
case RCC_USART2CLKSOURCE_LSE: \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ /**
break; \ * @brief Ensure that SMARTCARD FIFO mode is valid.
default: \ * @param __STATE__ SMARTCARD FIFO mode.
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
break; \ */
} \ #define IS_SMARTCARD_FIFOMODE_STATE(__STATE__) (((__STATE__) == SMARTCARD_FIFOMODE_DISABLE ) || \
} \ ((__STATE__) == SMARTCARD_FIFOMODE_ENABLE))
} while(0)
#else /**
#define SMARTCARD_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ * @brief Ensure that SMARTCARD TXFIFO threshold level is valid.
do { \ * @param __THRESHOLD__ SMARTCARD TXFIFO threshold level.
if((__HANDLE__)->Instance == USART1) \ * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
{ \ */
switch(__HAL_RCC_GET_USART1_SOURCE()) \ #define IS_SMARTCARD_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == SMARTCARD_TXFIFO_THRESHOLD_1_8) || \
{ \ ((__THRESHOLD__) == SMARTCARD_TXFIFO_THRESHOLD_1_4) || \
case RCC_USART1CLKSOURCE_PCLK2: \ ((__THRESHOLD__) == SMARTCARD_TXFIFO_THRESHOLD_1_2) || \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK2; \ ((__THRESHOLD__) == SMARTCARD_TXFIFO_THRESHOLD_3_4) || \
break; \ ((__THRESHOLD__) == SMARTCARD_TXFIFO_THRESHOLD_7_8) || \
case RCC_USART1CLKSOURCE_HSI: \ ((__THRESHOLD__) == SMARTCARD_TXFIFO_THRESHOLD_8_8))
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
break; \ /**
case RCC_USART1CLKSOURCE_SYSCLK: \ * @brief Ensure that SMARTCARD RXFIFO threshold level is valid.
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ * @param __THRESHOLD__ SMARTCARD RXFIFO threshold level.
break; \ * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
case RCC_USART1CLKSOURCE_LSE: \ */
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ #define IS_SMARTCARD_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == SMARTCARD_RXFIFO_THRESHOLD_1_8) || \
break; \ ((__THRESHOLD__) == SMARTCARD_RXFIFO_THRESHOLD_1_4) || \
default: \ ((__THRESHOLD__) == SMARTCARD_RXFIFO_THRESHOLD_1_2) || \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ ((__THRESHOLD__) == SMARTCARD_RXFIFO_THRESHOLD_3_4) || \
break; \ ((__THRESHOLD__) == SMARTCARD_RXFIFO_THRESHOLD_7_8) || \
} \ ((__THRESHOLD__) == SMARTCARD_RXFIFO_THRESHOLD_8_8))
} \
else if((__HANDLE__)->Instance == USART2) \ /**
{ \ * @}
switch(__HAL_RCC_GET_USART2_SOURCE()) \ */
{ \
case RCC_USART2CLKSOURCE_PCLK1: \ /* Exported functions --------------------------------------------------------*/
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \ /** @addtogroup SMARTCARDEx_Exported_Functions
break; \ * @{
case RCC_USART2CLKSOURCE_HSI: \ */
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \
break; \ /* Initialization and de-initialization functions ****************************/
case RCC_USART2CLKSOURCE_SYSCLK: \ /* IO operation methods *******************************************************/
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \
break; \ /** @addtogroup SMARTCARDEx_Exported_Functions_Group1
case RCC_USART2CLKSOURCE_LSE: \ * @{
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ */
break; \
default: \ /* Peripheral Control functions ***********************************************/
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength);
break; \ void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue);
} \ HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard);
} \ HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard);
else if((__HANDLE__)->Instance == USART3) \
{ \ /**
switch(__HAL_RCC_GET_USART3_SOURCE()) \ * @}
{ \ */
case RCC_USART3CLKSOURCE_PCLK1: \
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_PCLK1; \ /* Exported functions --------------------------------------------------------*/
break; \ /** @addtogroup SMARTCARDEx_Exported_Functions_Group2
case RCC_USART3CLKSOURCE_HSI: \ * @{
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_HSI; \ */
break; \
case RCC_USART3CLKSOURCE_SYSCLK: \ /* IO operation functions *****************************************************/
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_SYSCLK; \ #if defined(USART_CR1_FIFOEN)
break; \ void HAL_SMARTCARDEx_RxFifoFullCallback(SMARTCARD_HandleTypeDef *hsmartcard);
case RCC_USART3CLKSOURCE_LSE: \ void HAL_SMARTCARDEx_TxFifoEmptyCallback(SMARTCARD_HandleTypeDef *hsmartcard);
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_LSE; \ #endif
break; \
default: \ /**
(__CLOCKSOURCE__) = SMARTCARD_CLOCKSOURCE_UNDEFINED; \ * @}
break; \ */
} \
} \ /** @addtogroup SMARTCARDEx_Exported_Functions_Group3
} while(0) * @{
#endif /* STM32L432xx || STM32L442xx */ */
/** @brief Set the Transmission Completion flag /* Peripheral Control functions ***********************************************/
* @param __HANDLE__ specifies the SMARTCARD Handle. #if defined(USART_CR1_FIFOEN)
* @note If TCBGT (Transmission Complete Before Guard Time) flag is not available or if HAL_StatusTypeDef HAL_SMARTCARDEx_EnableFifoMode(SMARTCARD_HandleTypeDef *hsmartcard);
* AdvancedInit.TxCompletionIndication is not already filled, the latter is forced HAL_StatusTypeDef HAL_SMARTCARDEx_DisableFifoMode(SMARTCARD_HandleTypeDef *hsmartcard);
* to SMARTCARD_TC (transmission completion indication when guard time has elapsed). HAL_StatusTypeDef HAL_SMARTCARDEx_SetTxFifoThreshold(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Threshold);
* @retval None HAL_StatusTypeDef HAL_SMARTCARDEx_SetRxFifoThreshold(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Threshold);
*/ #endif
#if defined(USART_TCBGT_SUPPORT)
#define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__) \ /**
do { \ * @}
if (HAL_IS_BIT_CLR((__HANDLE__)->AdvancedInit.AdvFeatureInit, SMARTCARD_ADVFEATURE_TXCOMPLETION)) \ */
{ \
(__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC; \ /**
} \ * @}
else \ */
{ \
assert_param(IS_SMARTCARD_TRANSMISSION_COMPLETION((__HANDLE__)->AdvancedInit.TxCompletionIndication)); \
} \ /* Private functions ---------------------------------------------------------*/
} while(0)
#else /**
#define SMARTCARD_TRANSMISSION_COMPLETION_SETTING(__HANDLE__) \ * @}
do { \ */
(__HANDLE__)->AdvancedInit.TxCompletionIndication = SMARTCARD_TC; \
} while(0) /**
#endif * @}
*/
/** @brief Return the transmission completion flag.
* @param __HANDLE__ specifies the SMARTCARD Handle. #ifdef __cplusplus
* @note Based on AdvancedInit.TxCompletionIndication setting, return TC or TCBGT flag. }
* When TCBGT flag (Transmission Complete Before Guard Time) is not available, TC flag is #endif
* reported.
* @retval Transmission completion flag #endif /* __STM32L4xx_HAL_SMARTCARD_EX_H */
*/
#if defined(USART_TCBGT_SUPPORT) /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__) \
(((__HANDLE__)->AdvancedInit.TxCompletionIndication == SMARTCARD_TC) ? (SMARTCARD_FLAG_TC) : (SMARTCARD_FLAG_TCBGT))
#else
#define SMARTCARD_TRANSMISSION_COMPLETION_FLAG(__HANDLE__) (SMARTCARD_FLAG_TC)
#endif
/**
* @brief Ensure that SMARTCARD frame transmission completion used flag is valid.
* @param __TXCOMPLETE__ SMARTCARD frame transmission completion used flag.
* @retval SET (__TXCOMPLETE__ is valid) or RESET (__TXCOMPLETE__ is invalid)
*/
#if defined(USART_TCBGT_SUPPORT)
#define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) (((__TXCOMPLETE__) == SMARTCARD_TCBGT) ||\
((__TXCOMPLETE__) == SMARTCARD_TC))
#else
#define IS_SMARTCARD_TRANSMISSION_COMPLETION(__TXCOMPLETE__) ((__TXCOMPLETE__) == SMARTCARD_TC)
#endif
/**
* @}
*/
/* Exported functions --------------------------------------------------------*/
/** @addtogroup SMARTCARDEx_Exported_Functions
* @{
*/
/* Initialization and de-initialization functions ****************************/
/** @addtogroup SMARTCARDEx_Exported_Functions_Group2
* @{
*/
/* IO operation functions *****************************************************/
#if defined(USART_CR1_FIFOEN)
void HAL_SMARTCARDEx_RxFifoFullCallback(SMARTCARD_HandleTypeDef *hsmartcard);
void HAL_SMARTCARDEx_TxFifoEmptyCallback(SMARTCARD_HandleTypeDef *hsmartcard);
#endif
/**
* @}
*/
/** @addtogroup SMARTCARDEx_Exported_Functions_Group3
* @{
*/
/* Peripheral Control functions ***********************************************/
void HAL_SMARTCARDEx_BlockLength_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint8_t BlockLength);
void HAL_SMARTCARDEx_TimeOut_Config(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t TimeOutValue);
HAL_StatusTypeDef HAL_SMARTCARDEx_EnableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard);
HAL_StatusTypeDef HAL_SMARTCARDEx_DisableReceiverTimeOut(SMARTCARD_HandleTypeDef *hsmartcard);
#if defined(USART_CR1_FIFOEN)
HAL_StatusTypeDef HAL_SMARTCARDEx_EnableFifoMode(SMARTCARD_HandleTypeDef *hsmartcard);
HAL_StatusTypeDef HAL_SMARTCARDEx_DisableFifoMode(SMARTCARD_HandleTypeDef *hsmartcard);
HAL_StatusTypeDef HAL_SMARTCARDEx_SetTxFifoThreshold(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Threshold);
HAL_StatusTypeDef HAL_SMARTCARDEx_SetRxFifoThreshold(SMARTCARD_HandleTypeDef *hsmartcard, uint32_t Threshold);
#endif
/**
* @}
*/
/**
* @}
*/
/* Private functions ---------------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_SMARTCARD_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_smbus.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_spi.h
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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_spi_ex.h
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@ -1,91 +1,91 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_spi_ex.h * @file stm32l4xx_hal_spi_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of SPI HAL Extended module. * @brief Header file of SPI HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_SPI_EX_H #ifndef __STM32L4xx_HAL_SPI_EX_H
#define __STM32L4xx_HAL_SPI_EX_H #define __STM32L4xx_HAL_SPI_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup SPIEx /** @addtogroup SPIEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/* Exported macros -----------------------------------------------------------*/ /* Exported macros -----------------------------------------------------------*/
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup SPIEx_Exported_Functions /** @addtogroup SPIEx_Exported_Functions
* @{ * @{
*/ */
/* Initialization and de-initialization functions ****************************/ /* Initialization and de-initialization functions ****************************/
/* IO operation functions *****************************************************/ /* IO operation functions *****************************************************/
/** @addtogroup SPIEx_Exported_Functions_Group1 /** @addtogroup SPIEx_Exported_Functions_Group1
* @{ * @{
*/ */
HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi); HAL_StatusTypeDef HAL_SPIEx_FlushRxFifo(SPI_HandleTypeDef *hspi);
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_HAL_SPI_EX_H */ #endif /* __STM32L4xx_HAL_SPI_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_sram.h
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@ -1,202 +1,195 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_sram.h * @file stm32l4xx_hal_sram.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of SRAM HAL module. * @brief Header file of SRAM HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_SRAM_H #ifndef __STM32L4xx_HAL_SRAM_H
#define __STM32L4xx_HAL_SRAM_H #define __STM32L4xx_HAL_SRAM_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ #if defined(FMC_BANK1)
defined(STM32L496xx) || defined(STM32L4A6xx) || \
defined(STM32L4R5xx) || defined(STM32L4R7xx) || defined(STM32L4R9xx) || defined(STM32L4S5xx) || defined(STM32L4S7xx) || defined(STM32L4S9xx) /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h"
/* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_ll_fmc.h" /** @addtogroup STM32L4xx_HAL_Driver
* @{
/** @addtogroup STM32L4xx_HAL_Driver */
* @{ /** @addtogroup SRAM
*/ * @{
*/
/** @addtogroup SRAM
* @{ /* Exported typedef ----------------------------------------------------------*/
*/
/** @defgroup SRAM_Exported_Types SRAM Exported Types
/* Exported typedef ----------------------------------------------------------*/ * @{
*/
/** @defgroup SRAM_Exported_Types SRAM Exported Types /**
* @{ * @brief HAL SRAM State structures definition
*/ */
/** typedef enum
* @brief HAL SRAM State structures definition {
*/ HAL_SRAM_STATE_RESET = 0x00U, /*!< SRAM not yet initialized or disabled */
typedef enum HAL_SRAM_STATE_READY = 0x01U, /*!< SRAM initialized and ready for use */
{ HAL_SRAM_STATE_BUSY = 0x02U, /*!< SRAM internal process is ongoing */
HAL_SRAM_STATE_RESET = 0x00, /*!< SRAM not yet initialized or disabled */ HAL_SRAM_STATE_ERROR = 0x03U, /*!< SRAM error state */
HAL_SRAM_STATE_READY = 0x01, /*!< SRAM initialized and ready for use */ HAL_SRAM_STATE_PROTECTED = 0x04U /*!< SRAM peripheral NORSRAM device write protected */
HAL_SRAM_STATE_BUSY = 0x02, /*!< SRAM internal process is ongoing */ }HAL_SRAM_StateTypeDef;
HAL_SRAM_STATE_ERROR = 0x03, /*!< SRAM error state */
HAL_SRAM_STATE_PROTECTED = 0x04 /*!< SRAM peripheral NORSRAM device write protected */ /**
* @brief SRAM handle Structure definition
}HAL_SRAM_StateTypeDef; */
typedef struct
/** {
* @brief SRAM handle Structure definition FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */
*/
typedef struct FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */
{
FMC_NORSRAM_TypeDef *Instance; /*!< Register base address */ FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */
FMC_NORSRAM_EXTENDED_TypeDef *Extended; /*!< Extended mode register base address */ HAL_LockTypeDef Lock; /*!< SRAM locking object */
FMC_NORSRAM_InitTypeDef Init; /*!< SRAM device control configuration parameters */ __IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
HAL_LockTypeDef Lock; /*!< SRAM locking object */ DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */
}SRAM_HandleTypeDef;
__IO HAL_SRAM_StateTypeDef State; /*!< SRAM device access state */
/**
DMA_HandleTypeDef *hdma; /*!< Pointer DMA handler */ * @}
*/
}SRAM_HandleTypeDef;
/* Exported constants --------------------------------------------------------*/
/** /* Exported macro ------------------------------------------------------------*/
* @}
*/ /** @defgroup SRAM_Exported_Macros SRAM Exported Macros
* @{
/* Exported constants --------------------------------------------------------*/ */
/* Exported macro ------------------------------------------------------------*/
/** @brief Reset SRAM handle state
/** @defgroup SRAM_Exported_Macros SRAM Exported Macros * @param __HANDLE__ SRAM handle
* @{ * @retval None
*/ */
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
/** @brief Reset SRAM handle state.
* @param __HANDLE__: SRAM handle /**
* @retval None * @}
*/ */
#define __HAL_SRAM_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SRAM_STATE_RESET)
/* Exported functions --------------------------------------------------------*/
/** /** @addtogroup SRAM_Exported_Functions SRAM Exported Functions
* @} * @{
*/ */
/* Exported functions --------------------------------------------------------*/ /** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions
/** @addtogroup SRAM_Exported_Functions SRAM Exported Functions * @{
* @{ */
*/
/* Initialization/de-initialization functions ********************************/
/** @addtogroup SRAM_Exported_Functions_Group1 Initialization and de-initialization functions HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming);
* @{ HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram);
*/ void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram);
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
/* Initialization/de-initialization functions ********************************/
HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming); /**
HAL_StatusTypeDef HAL_SRAM_DeInit(SRAM_HandleTypeDef *hsram); * @}
void HAL_SRAM_MspInit(SRAM_HandleTypeDef *hsram); */
void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef *hsram);
/** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions
void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma); * @{
void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma); */
/** /* I/O operation functions ***************************************************/
* @} HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
*/ HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize);
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize);
/** @addtogroup SRAM_Exported_Functions_Group2 Input Output and memory control functions HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
* @{ HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
*/ HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize);
/* I/O operation functions ***************************************************/ HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
HAL_StatusTypeDef HAL_SRAM_Read_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pDstBuffer, uint32_t BufferSize);
HAL_StatusTypeDef HAL_SRAM_Write_8b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint8_t *pSrcBuffer, uint32_t BufferSize); void HAL_SRAM_DMA_XferCpltCallback(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_SRAM_Read_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pDstBuffer, uint32_t BufferSize); void HAL_SRAM_DMA_XferErrorCallback(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_SRAM_Write_16b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint16_t *pSrcBuffer, uint32_t BufferSize);
HAL_StatusTypeDef HAL_SRAM_Read_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); /**
HAL_StatusTypeDef HAL_SRAM_Write_32b(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize); * @}
HAL_StatusTypeDef HAL_SRAM_Read_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pDstBuffer, uint32_t BufferSize); */
HAL_StatusTypeDef HAL_SRAM_Write_DMA(SRAM_HandleTypeDef *hsram, uint32_t *pAddress, uint32_t *pSrcBuffer, uint32_t BufferSize);
/** @addtogroup SRAM_Exported_Functions_Group3 Control functions
/** * @{
* @} */
*/
/* SRAM Control functions ****************************************************/
/** @addtogroup SRAM_Exported_Functions_Group3 Control functions HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram);
* @{ HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
*/
/**
/* SRAM Control functions ****************************************************/ * @}
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Enable(SRAM_HandleTypeDef *hsram); */
HAL_StatusTypeDef HAL_SRAM_WriteOperation_Disable(SRAM_HandleTypeDef *hsram);
/** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions
/** * @{
* @} */
*/
/* SRAM State functions ******************************************************/
/** @addtogroup SRAM_Exported_Functions_Group4 Peripheral State functions HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
* @{
*/ /**
* @}
/* SRAM Peripheral State functions ********************************************/ */
HAL_SRAM_StateTypeDef HAL_SRAM_GetState(SRAM_HandleTypeDef *hsram);
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
#endif /* FMC_BANK1 */
/**
* @} #ifdef __cplusplus
*/ }
#endif
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
/* STM32L496xx || STM32L4A6xx || */ #endif /* __STM32L4xx_HAL_SRAM_H */
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_SRAM_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_swpmi.h
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@ -1,462 +1,511 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_swpmi.h * @file stm32l4xx_hal_swpmi.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of SWPMI HAL module. * @brief Header file of SWPMI HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_SWPMI_H #ifndef __STM32L4xx_HAL_SWPMI_H
#define __STM32L4xx_HAL_SWPMI_H #define __STM32L4xx_HAL_SWPMI_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#if defined(STM32L431xx) || defined(STM32L432xx) || defined(STM32L433xx) || defined(STM32L442xx) || defined(STM32L443xx) || \ /* Includes ------------------------------------------------------------------*/
defined(STM32L471xx) || defined(STM32L475xx) || defined(STM32L476xx) || defined(STM32L485xx) || defined(STM32L486xx) || \ #include "stm32l4xx_hal_def.h"
defined(STM32L496xx) || defined(STM32L4A6xx)
/** @addtogroup STM32L4xx_HAL_Driver
/* Includes ------------------------------------------------------------------*/ * @{
#include "stm32l4xx_hal_def.h" */
/** @addtogroup STM32L4xx_HAL_Driver #if defined(SWPMI1)
* @{
*/ /** @addtogroup SWPMI
* @{
/** @addtogroup SWPMI */
* @{
*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup SWPMI_Exported_Types SWPMI Exported Types
/* Exported types ------------------------------------------------------------*/ * @{
/** @defgroup SWPMI_Exported_Types SWPMI Exported Types */
* @{
*/ /**
* @brief SWPMI Init Structure definition
/** */
* @brief SWPMI Init Structure definition typedef struct
*/ {
typedef struct uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class.
{ This parameter can be a value of @ref SWPMI_Voltage_Class */
uint32_t VoltageClass; /*!< Specifies the SWP Voltage Class.
This parameter can be a value of @ref SWPMI_Voltage_Class */ uint32_t BitRate; /*!< Specifies the SWPMI Bitrate.
This parameter must be a number between 0 and 63.
uint32_t BitRate; /*!< Specifies the SWPMI Bitrate. The Bitrate is computed using the following formula:
This parameter must be a number between 0 and 63. SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4)
The Bitrate is computed using the following formula: */
SWPMI_freq = SWPMI_clk / (((BitRate) + 1) * 4)
*/ uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode.
This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */
uint32_t TxBufferingMode; /*!< Specifies the transmission buffering mode.
This parameter can be a value of @ref SWPMI_Tx_Buffering_Mode */ uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode.
This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */
uint32_t RxBufferingMode; /*!< Specifies the reception buffering mode.
This parameter can be a value of @ref SWPMI_Rx_Buffering_Mode */ }SWPMI_InitTypeDef;
}SWPMI_InitTypeDef;
/**
* @brief HAL SWPMI State structures definition
/** */
* @brief HAL SWPMI State structures definition typedef enum
*/ {
typedef enum HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */
{ HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */
HAL_SWPMI_STATE_RESET = 0x00, /*!< Peripheral Reset state */ HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */
HAL_SWPMI_STATE_READY = 0x01, /*!< Peripheral Initialized and ready for use */ HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */
HAL_SWPMI_STATE_BUSY = 0x02, /*!< an internal process is ongoing */ HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */
HAL_SWPMI_STATE_BUSY_TX = 0x12, /*!< Data Transmission process is ongoing */ HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */
HAL_SWPMI_STATE_BUSY_RX = 0x22, /*!< Data Reception process is ongoing */ HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */
HAL_SWPMI_STATE_BUSY_TX_RX = 0x32, /*!< Data Transmission and Reception process is ongoing */ HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */
HAL_SWPMI_STATE_TIMEOUT = 0x03, /*!< Timeout state */ }HAL_SWPMI_StateTypeDef;
HAL_SWPMI_STATE_ERROR = 0x04 /*!< Error */
}HAL_SWPMI_StateTypeDef; /**
* @brief SWPMI handle Structure definition
/** */
* @brief SWPMI handle Structure definition typedef struct __SWPMI_HandleTypeDef
*/ {
typedef struct SWPMI_TypeDef *Instance; /*!< SWPMI registers base address */
{
SWPMI_TypeDef *Instance; /* SWPMI registers base address */ SWPMI_InitTypeDef Init; /*!< SWPMI communication parameters */
SWPMI_InitTypeDef Init; /* SWMPI communication parameters */ uint32_t *pTxBuffPtr; /*!< Pointer to SWPMI Tx transfer Buffer */
uint32_t *pTxBuffPtr; /* Pointer to SWPMI Tx transfer Buffer */ uint32_t TxXferSize; /*!< SWPMI Tx Transfer size */
uint32_t TxXferSize; /* SWPMI Tx Transfer size */ uint32_t TxXferCount; /*!< SWPMI Tx Transfer Counter */
uint32_t TxXferCount; /* SWPMI Tx Transfer Counter */ uint32_t *pRxBuffPtr; /*!< Pointer to SWPMI Rx transfer Buffer */
uint32_t *pRxBuffPtr; /* Pointer to SWPMI Rx transfer Buffer */ uint32_t RxXferSize; /*!< SWPMI Rx Transfer size */
uint32_t RxXferSize; /* SWPMI Rx Transfer size */ uint32_t RxXferCount; /*!< SWPMI Rx Transfer Counter */
uint32_t RxXferCount; /* SWPMI Rx Transfer Counter */ DMA_HandleTypeDef *hdmatx; /*!< SWPMI Tx DMA Handle parameters */
DMA_HandleTypeDef *hdmatx; /* SWPMI Tx DMA Handle parameters */ DMA_HandleTypeDef *hdmarx; /*!< SWPMI Rx DMA Handle parameters */
DMA_HandleTypeDef *hdmarx; /* SWPMI Rx DMA Handle parameters */ HAL_LockTypeDef Lock; /*!< SWPMI object */
HAL_LockTypeDef Lock; /* SWPMI object */ __IO HAL_SWPMI_StateTypeDef State; /*!< SWPMI communication state */
__IO HAL_SWPMI_StateTypeDef State; /* SWPMI communication state */ __IO uint32_t ErrorCode; /*!< SWPMI Error code */
__IO uint32_t ErrorCode; /* SWPMI Error code */ #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1)
void (*RxCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI receive complete callback */
}SWPMI_HandleTypeDef; void (*RxHalfCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI receive half complete callback */
void (*TxCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI transmit complete callback */
/** void (*TxHalfCpltCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI transmit half complete callback */
* @} void (*ErrorCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI error callback */
*/ void (*MspInitCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI MSP init callback */
void (*MspDeInitCallback) (struct __SWPMI_HandleTypeDef *hswpmi); /*!< SWPMI MSP de-init callback */
/* Exported constants --------------------------------------------------------*/ #endif
/** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants
* @{ }SWPMI_HandleTypeDef;
*/
#if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1)
/** /**
* @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap * @brief SWPMI callback ID enumeration definition
* @{ */
*/ typedef enum
#define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */ {
#define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */ HAL_SWPMI_RX_COMPLETE_CB_ID = 0x00U, /*!< SWPMI receive complete callback ID */
#define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */ HAL_SWPMI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SWPMI receive half complete callback ID */
#define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */ HAL_SWPMI_TX_COMPLETE_CB_ID = 0x02U, /*!< SWPMI transmit complete callback ID */
#define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */ HAL_SWPMI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SWPMI transmit half complete callback ID */
/** HAL_SWPMI_ERROR_CB_ID = 0x04U, /*!< SWPMI error callback ID */
* @} HAL_SWPMI_MSPINIT_CB_ID = 0x05U, /*!< SWPMI MSP init callback ID */
*/ HAL_SWPMI_MSPDEINIT_CB_ID = 0x06U /*!< SWPMI MSP de-init callback ID */
}HAL_SWPMI_CallbackIDTypeDef;
/** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class
* @{ /**
*/ * @brief SWPMI callback pointer definition
#define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000) */
#define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS typedef void (*pSWPMI_CallbackTypeDef)(SWPMI_HandleTypeDef *hswpmi);
/** #endif
* @}
*/ /**
* @}
/** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode */
* @{
*/ /* Exported constants --------------------------------------------------------*/
#define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) /** @defgroup SWPMI_Exported_Constants SWPMI Exported Constants
#define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) * @{
#define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE */
/**
* @} /**
*/ * @defgroup SWPMI_Error_Code SWPMI Error Code Bitmap
* @{
/** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode */
* @{ #define HAL_SWPMI_ERROR_NONE ((uint32_t)0x00000000) /*!< No error */
*/ #define HAL_SWPMI_ERROR_CRC ((uint32_t)0x00000004) /*!< frame error */
#define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000) #define HAL_SWPMI_ERROR_OVR ((uint32_t)0x00000008) /*!< Overrun error */
#define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000) #define HAL_SWPMI_ERROR_UDR ((uint32_t)0x0000000C) /*!< Underrun error */
#define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE #define HAL_SWPMI_ERROR_DMA ((uint32_t)0x00000010) /*!< DMA transfer error */
/** #define HAL_SWPMI_ERROR_TIMEOUT ((uint32_t)0x00000020) /*!< Transfer timeout */
* @} #define HAL_SWPMI_ERROR_TXBEF_TIMEOUT ((uint32_t)0x00000040) /*!< End Tx buffer timeout */
*/ #if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1)
#define HAL_SWPMI_ERROR_INVALID_CALLBACK ((uint32_t)0x00000100) /*!< Invalid callback error */
/** @defgroup SWPMI_Flags SWPMI Status Flags #endif
* Elements values convention: 0xXXXXXXXX /**
* - 0xXXXXXXXX : Flag mask in the ISR register * @}
* @{ */
*/
#define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF /** @defgroup SWPMI_Voltage_Class SWPMI Voltage Class
#define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF * @{
#define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF */
#define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF #define SWPMI_VOLTAGE_CLASS_C ((uint32_t)0x00000000)
#define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF #define SWPMI_VOLTAGE_CLASS_B SWPMI_OR_CLASS
#define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE /**
#define SWPMI_FLAG_TXE SWPMI_ISR_TXE * @}
#define SWPMI_FLAG_TCF SWPMI_ISR_TCF */
#define SWPMI_FLAG_SRF SWPMI_ISR_SRF
#define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP /** @defgroup SWPMI_Tx_Buffering_Mode SWPMI Tx Buffering Mode
#define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF * @{
/** */
* @} #define SWPMI_TX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000)
*/ #define SWPMI_TX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000)
#define SWPMI_TX_MULTI_SOFTWAREBUFFER SWPMI_CR_TXMODE
/** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition /**
* Elements values convention: 0xXXXX * @}
* - 0xXXXX : Flag mask in the IER register */
* @{
*/ /** @defgroup SWPMI_Rx_Buffering_Mode SWPMI Rx Buffering Mode
#define SWPMI_IT_SRIE SWPMI_IER_SRIE * @{
#define SWPMI_IT_TCIE SWPMI_IER_TCIE */
#define SWPMI_IT_TIE SWPMI_IER_TIE #define SWPMI_RX_NO_SOFTWAREBUFFER ((uint32_t)0x00000000)
#define SWPMI_IT_RIE SWPMI_IER_RIE #define SWPMI_RX_SINGLE_SOFTWAREBUFFER ((uint32_t)0x00000000)
#define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE #define SWPMI_RX_MULTI_SOFTWAREBUFFER SWPMI_CR_RXMODE
#define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE /**
#define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE * @}
#define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE */
#define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE
/** /** @defgroup SWPMI_Flags SWPMI Status Flags
* @} * Elements values convention: 0xXXXXXXXX
*/ * - 0xXXXXXXXX : Flag mask in the ISR register
* @{
/** */
* @} #define SWPMI_FLAG_RXBFF SWPMI_ISR_RXBFF
*/ #define SWPMI_FLAG_TXBEF SWPMI_ISR_TXBEF
#define SWPMI_FLAG_RXBERF SWPMI_ISR_RXBERF
/* Exported macros -----------------------------------------------------------*/ #define SWPMI_FLAG_RXOVRF SWPMI_ISR_RXOVRF
/** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros #define SWPMI_FLAG_TXUNRF SWPMI_ISR_TXUNRF
* @{ #define SWPMI_FLAG_RXNE SWPMI_ISR_RXNE
*/ #define SWPMI_FLAG_TXE SWPMI_ISR_TXE
#define SWPMI_FLAG_TCF SWPMI_ISR_TCF
/** @brief Reset SWPMI handle state. #define SWPMI_FLAG_SRF SWPMI_ISR_SRF
* @param __HANDLE__: specifies the SWPMI Handle. #define SWPMI_FLAG_SUSP SWPMI_ISR_SUSP
* @retval None #define SWPMI_FLAG_DEACTF SWPMI_ISR_DEACTF
*/ /**
#define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET) * @}
*/
/**
* @brief Enable the SWPMI peripheral. /** @defgroup SWPMI_Interrupt_definition SWPMI Interrupts Definition
* @param __HANDLE__: SWPMI handle * Elements values convention: 0xXXXX
* @retval None * - 0xXXXX : Flag mask in the IER register
*/ * @{
#define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) */
#define SWPMI_IT_SRIE SWPMI_IER_SRIE
/** #define SWPMI_IT_TCIE SWPMI_IER_TCIE
* @brief Disable the SWPMI peripheral. #define SWPMI_IT_TIE SWPMI_IER_TIE
* @param __HANDLE__: SWPMI handle #define SWPMI_IT_RIE SWPMI_IER_RIE
* @retval None #define SWPMI_IT_TXUNRIE SWPMI_IER_TXUNRIE
*/ #define SWPMI_IT_RXOVRIE SWPMI_IER_RXOVRIE
#define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT) #define SWPMI_IT_RXBERIE SWPMI_IER_RXBERIE
#define SWPMI_IT_TXBEIE SWPMI_IER_TXBEIE
/** @brief Check whether the specified SWPMI flag is set or not. #define SWPMI_IT_RXBFIE SWPMI_IER_RXBFIE
* @param __HANDLE__: specifies the SWPMI Handle. /**
* @param __FLAG__: specifies the flag to check. * @}
* This parameter can be one of the following values: */
* @arg SWPMI_FLAG_RXBFF : Receive buffer full flag.
* @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag. /**
* @arg SWPMI_FLAG_RXBERF : Receive CRC error flag. * @}
* @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag. */
* @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag.
* @arg SWPMI_FLAG_RXNE : Receive data register not empty. /* Exported macros -----------------------------------------------------------*/
* @arg SWPMI_FLAG_TXE : Transmit data register empty. /** @defgroup SWPMI_Exported_Macros SWPMI Exported Macros
* @arg SWPMI_FLAG_TCF : Transfer complete flag. * @{
* @arg SWPMI_FLAG_SRF : Slave resume flag. */
* @arg SWPMI_FLAG_SUSP : SUSPEND flag.
* @arg SWPMI_FLAG_DEACTF : DEACTIVATED flag. /** @brief Reset SWPMI handle state.
* @retval The new state of __FLAG__ (TRUE or FALSE). * @param __HANDLE__ specifies the SWPMI Handle.
*/ * @retval None
#define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__)) */
#if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1)
/** @brief Clear the specified SWPMI ISR flag. #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) do{ \
* @param __HANDLE__: specifies the SWPMI Handle. (__HANDLE__)->State = HAL_SWPMI_STATE_RESET; \
* @param __FLAG__: specifies the flag to clear. (__HANDLE__)->MspInitCallback = NULL; \
* This parameter can be one of the following values: (__HANDLE__)->MspDeInitCallback = NULL; \
* @arg SWPMI_FLAG_RXBFF : Receive buffer full flag. } while(0)
* @arg SWPMI_FLAG_TXBEF : Transmit buffer empty flag. #else
* @arg SWPMI_FLAG_RXBERF : Receive CRC error flag. #define __HAL_SWPMI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SWPMI_STATE_RESET)
* @arg SWPMI_FLAG_RXOVRF : Receive overrun error flag. #endif
* @arg SWPMI_FLAG_TXUNRF : Transmit underrun error flag.
* @arg SWPMI_FLAG_TCF : Transfer complete flag. /**
* @arg SWPMI_FLAG_SRF : Slave resume flag. * @brief Enable the SWPMI peripheral.
* @retval None * @param __HANDLE__ SWPMI handle
*/ * @retval None
#define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__)) */
#define __HAL_SWPMI_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT)
/** @brief Enable the specified SWPMI interrupt.
* @param __HANDLE__: specifies the SWPMI Handle. /**
* @param __INTERRUPT__: specifies the SWPMI interrupt source to enable. * @brief Disable the SWPMI peripheral.
* This parameter can be one of the following values: * @param __HANDLE__ SWPMI handle
* @arg SWPMI_IT_SRIE : Slave resume interrupt. * @retval None
* @arg SWPMI_IT_TCIE : Transmit complete interrupt. */
* @arg SWPMI_IT_TIE : Transmit interrupt. #define __HAL_SWPMI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR, SWPMI_CR_SWPACT)
* @arg SWPMI_IT_RIE : Receive interrupt.
* @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. /** @brief Check whether the specified SWPMI flag is set or not.
* @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. * @param __HANDLE__ specifies the SWPMI Handle.
* @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt. * @param __FLAG__: specifies the flag to check.
* @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. * This parameter can be one of the following values:
* @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. * @arg SWPMI_FLAG_RXBFF Receive buffer full flag.
* @retval None * @arg SWPMI_FLAG_TXBEF Transmit buffer empty flag.
*/ * @arg SWPMI_FLAG_RXBERF Receive CRC error flag.
#define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) * @arg SWPMI_FLAG_RXOVRF Receive overrun error flag.
* @arg SWPMI_FLAG_TXUNRF Transmit underrun error flag.
/** @brief Disable the specified SWPMI interrupt. * @arg SWPMI_FLAG_RXNE Receive data register not empty.
* @param __HANDLE__: specifies the SWPMI Handle. * @arg SWPMI_FLAG_TXE Transmit data register empty.
* @param __INTERRUPT__: specifies the SWPMI interrupt source to disable. * @arg SWPMI_FLAG_TCF Transfer complete flag.
* This parameter can be one of the following values: * @arg SWPMI_FLAG_SRF Slave resume flag.
* @arg SWPMI_IT_SRIE : Slave resume interrupt. * @arg SWPMI_FLAG_SUSP SUSPEND flag.
* @arg SWPMI_IT_TCIE : Transmit complete interrupt. * @arg SWPMI_FLAG_DEACTF DEACTIVATED flag.
* @arg SWPMI_IT_TIE : Transmit interrupt. * @retval The new state of __FLAG__ (TRUE or FALSE).
* @arg SWPMI_IT_RIE : Receive interrupt. */
* @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. #define __HAL_SWPMI_GET_FLAG(__HANDLE__, __FLAG__) (READ_BIT((__HANDLE__)->Instance->ISR, (__FLAG__)) == (__FLAG__))
* @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt.
* @arg SWPMI_IT_RXBEIE : Receive CRC error interrupt. /** @brief Clear the specified SWPMI ISR flag.
* @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. * @param __HANDLE__ specifies the SWPMI Handle.
* @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. * @param __FLAG__: specifies the flag to clear.
* @retval None * This parameter can be one of the following values:
*/ * @arg SWPMI_FLAG_RXBFF Receive buffer full flag.
#define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__)) * @arg SWPMI_FLAG_TXBEF Transmit buffer empty flag.
* @arg SWPMI_FLAG_RXBERF Receive CRC error flag.
/** @brief Check whether the specified SWPMI interrupt has occurred or not. * @arg SWPMI_FLAG_RXOVRF Receive overrun error flag.
* @param __HANDLE__: specifies the SWPMI Handle. * @arg SWPMI_FLAG_TXUNRF Transmit underrun error flag.
* @param __IT__: specifies the SWPMI interrupt to check. * @arg SWPMI_FLAG_TCF Transfer complete flag.
* This parameter can be one of the following values: * @arg SWPMI_FLAG_SRF Slave resume flag.
* @arg SWPMI_IT_SRIE : Slave resume interrupt. * @retval None
* @arg SWPMI_IT_TCIE : Transmit complete interrupt. */
* @arg SWPMI_IT_TIE : Transmit interrupt. #define __HAL_SWPMI_CLEAR_FLAG(__HANDLE__, __FLAG__) WRITE_REG((__HANDLE__)->Instance->ICR, (__FLAG__))
* @arg SWPMI_IT_RIE : Receive interrupt.
* @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. /** @brief Enable the specified SWPMI interrupt.
* @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. * @param __HANDLE__ specifies the SWPMI Handle.
* @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt. * @param __INTERRUPT__ specifies the SWPMI interrupt source to enable.
* @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. * This parameter can be one of the following values:
* @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. * @arg SWPMI_IT_SRIE Slave resume interrupt.
* @retval The new state of __IT__ (TRUE or FALSE). * @arg SWPMI_IT_TCIE Transmit complete interrupt.
*/ * @arg SWPMI_IT_TIE Transmit interrupt.
#define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__)) * @arg SWPMI_IT_RIE Receive interrupt.
* @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt.
/** @brief Check whether the specified SWPMI interrupt source is enabled or not. * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt.
* @param __HANDLE__: specifies the SWPMI Handle. * @arg SWPMI_IT_RXBEIE Receive CRC error interrupt.
* @param __IT__: specifies the SWPMI interrupt source to check. * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt.
* This parameter can be one of the following values: * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt.
* @arg SWPMI_IT_SRIE : Slave resume interrupt. * @retval None
* @arg SWPMI_IT_TCIE : Transmit complete interrupt. */
* @arg SWPMI_IT_TIE : Transmit interrupt. #define __HAL_SWPMI_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__))
* @arg SWPMI_IT_RIE : Receive interrupt.
* @arg SWPMI_IT_TXUNRIE : Transmit underrun error interrupt. /** @brief Disable the specified SWPMI interrupt.
* @arg SWPMI_IT_RXOVRIE : Receive overrun error interrupt. * @param __HANDLE__ specifies the SWPMI Handle.
* @arg SWPMI_IT_RXBERIE : Receive CRC error interrupt. * @param __INTERRUPT__ specifies the SWPMI interrupt source to disable.
* @arg SWPMI_IT_TXBEIE : Transmit buffer empty interrupt. * This parameter can be one of the following values:
* @arg SWPMI_IT_RXBFIE : Receive buffer full interrupt. * @arg SWPMI_IT_SRIE Slave resume interrupt.
* @retval The new state of __IT__ (TRUE or FALSE). * @arg SWPMI_IT_TCIE Transmit complete interrupt.
*/ * @arg SWPMI_IT_TIE Transmit interrupt.
#define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET) * @arg SWPMI_IT_RIE Receive interrupt.
* @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt.
/** * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt.
* @} * @arg SWPMI_IT_RXBEIE Receive CRC error interrupt.
*/ * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt.
* @arg SWPMI_IT_RXBFIE Receive buffer full interrupt.
/* Exported functions --------------------------------------------------------*/ * @retval None
/** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions */
* @{ #define __HAL_SWPMI_DISABLE_IT(__HANDLE__, __INTERRUPT__) CLEAR_BIT((__HANDLE__)->Instance->IER, (__INTERRUPT__))
*/
/* Initialization/de-initialization functions ********************************/ /** @brief Check whether the specified SWPMI interrupt has occurred or not.
HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi); * @param __HANDLE__ specifies the SWPMI Handle.
HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi); * @param __IT__ specifies the SWPMI interrupt to check.
void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi); * This parameter can be one of the following values:
void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi); * @arg SWPMI_IT_SRIE Slave resume interrupt.
* @arg SWPMI_IT_TCIE Transmit complete interrupt.
/* IO operation functions *****************************************************/ * @arg SWPMI_IT_TIE Transmit interrupt.
HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); * @arg SWPMI_IT_RIE Receive interrupt.
HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout); * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt.
HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); * @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt.
HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); * @arg SWPMI_IT_RXBERIE Receive CRC error interrupt.
HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt.
HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size); * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt.
HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi); * @retval The new state of __IT__ (TRUE or FALSE).
HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi); */
HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi); #define __HAL_SWPMI_GET_IT(__HANDLE__, __IT__) (READ_BIT((__HANDLE__)->Instance->ISR,(__IT__)) == (__IT__))
void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi);
void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi); /** @brief Check whether the specified SWPMI interrupt source is enabled or not.
void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); * @param __HANDLE__ specifies the SWPMI Handle.
void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi); * @param __IT__ specifies the SWPMI interrupt source to check.
void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi); * This parameter can be one of the following values:
void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi); * @arg SWPMI_IT_SRIE Slave resume interrupt.
* @arg SWPMI_IT_TCIE Transmit complete interrupt.
/* Peripheral Control and State functions ************************************/ * @arg SWPMI_IT_TIE Transmit interrupt.
HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi); * @arg SWPMI_IT_RIE Receive interrupt.
uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi); * @arg SWPMI_IT_TXUNRIE Transmit underrun error interrupt.
* @arg SWPMI_IT_RXOVRIE Receive overrun error interrupt.
/** * @arg SWPMI_IT_RXBERIE Receive CRC error interrupt.
* @} * @arg SWPMI_IT_TXBEIE Transmit buffer empty interrupt.
*/ * @arg SWPMI_IT_RXBFIE Receive buffer full interrupt.
* @retval The new state of __IT__ (TRUE or FALSE).
/* Private types -------------------------------------------------------------*/ */
/** @defgroup SWPMI_Private_Types SWPMI Private Types #define __HAL_SWPMI_GET_IT_SOURCE(__HANDLE__, __IT__) ((READ_BIT((__HANDLE__)->Instance->IER, (__IT__)) == (__IT__)) ? SET : RESET)
* @{
*/ /**
* @}
/** */
* @}
*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup SWPMI_Exported_Functions SWPMI Exported Functions
/* Private variables ---------------------------------------------------------*/ * @{
/** @defgroup SWPMI_Private_Variables SWPMI Private Variables */
* @{ /* Initialization/de-initialization functions ********************************/
*/ HAL_StatusTypeDef HAL_SWPMI_Init(SWPMI_HandleTypeDef *hswpmi);
HAL_StatusTypeDef HAL_SWPMI_DeInit(SWPMI_HandleTypeDef *hswpmi);
/** void HAL_SWPMI_MspInit(SWPMI_HandleTypeDef *hswpmi);
* @} void HAL_SWPMI_MspDeInit(SWPMI_HandleTypeDef *hswpmi);
*/
#if (USE_HAL_SWPMI_REGISTER_CALLBACKS == 1)
/* Private constants ---------------------------------------------------------*/ /* SWPMI callbacks register/unregister functions ********************************/
/** @defgroup SWPMI_Private_Constants SWPMI Private Constants HAL_StatusTypeDef HAL_SWPMI_RegisterCallback(SWPMI_HandleTypeDef *hswpmi,
* @{ HAL_SWPMI_CallbackIDTypeDef CallbackID,
*/ pSWPMI_CallbackTypeDef pCallback);
HAL_StatusTypeDef HAL_SWPMI_UnRegisterCallback(SWPMI_HandleTypeDef *hswpmi,
/** HAL_SWPMI_CallbackIDTypeDef CallbackID);
* @} #endif
*/
/* IO operation functions *****************************************************/
/* Private macros ------------------------------------------------------------*/ HAL_StatusTypeDef HAL_SWPMI_Transmit(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout);
/** @defgroup SWPMI_Private_Macros SWPMI Private Macros HAL_StatusTypeDef HAL_SWPMI_Receive(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size, uint32_t Timeout);
* @{ HAL_StatusTypeDef HAL_SWPMI_Transmit_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
*/ HAL_StatusTypeDef HAL_SWPMI_Receive_IT(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SWPMI_Transmit_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
HAL_StatusTypeDef HAL_SWPMI_Receive_DMA(SWPMI_HandleTypeDef *hswpmi, uint32_t *pData, uint16_t Size);
#define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \ HAL_StatusTypeDef HAL_SWPMI_DMAStop(SWPMI_HandleTypeDef *hswpmi);
((__CLASS__) == SWPMI_VOLTAGE_CLASS_B)) HAL_StatusTypeDef HAL_SWPMI_EnableLoopback(SWPMI_HandleTypeDef *hswpmi);
HAL_StatusTypeDef HAL_SWPMI_DisableLoopback(SWPMI_HandleTypeDef *hswpmi);
#define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63)) void HAL_SWPMI_IRQHandler(SWPMI_HandleTypeDef *hswpmi);
void HAL_SWPMI_TxCpltCallback(SWPMI_HandleTypeDef *hswpmi);
void HAL_SWPMI_TxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi);
#define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \ void HAL_SWPMI_RxCpltCallback(SWPMI_HandleTypeDef *hswpmi);
((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER)) void HAL_SWPMI_RxHalfCpltCallback(SWPMI_HandleTypeDef *hswpmi);
void HAL_SWPMI_ErrorCallback(SWPMI_HandleTypeDef *hswpmi);
#define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \ /* Peripheral Control and State functions ************************************/
((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER)) HAL_SWPMI_StateTypeDef HAL_SWPMI_GetState(SWPMI_HandleTypeDef *hswpmi);
uint32_t HAL_SWPMI_GetError(SWPMI_HandleTypeDef *hswpmi);
/**
* @} /**
*/ * @}
*/
/**
* @} /* Private types -------------------------------------------------------------*/
*/ /** @defgroup SWPMI_Private_Types SWPMI Private Types
* @{
/** */
* @}
*/ /**
* @}
#endif /* STM32L431xx || STM32L432xx || STM32L433xx || STM32L442xx || STM32L443xx || */ */
/* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
/* STM32L496xx || STM32L4A6xx */ /* Private variables ---------------------------------------------------------*/
/** @defgroup SWPMI_Private_Variables SWPMI Private Variables
#ifdef __cplusplus * @{
} */
#endif
/**
#endif /* __STM32L4xx_HAL_SWPMI_H */ * @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/* Private constants ---------------------------------------------------------*/
/** @defgroup SWPMI_Private_Constants SWPMI Private Constants
* @{
*/
/**
* @}
*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup SWPMI_Private_Macros SWPMI Private Macros
* @{
*/
#define IS_SWPMI_VOLTAGE_CLASS(__CLASS__) (((__CLASS__) == SWPMI_VOLTAGE_CLASS_C) || \
((__CLASS__) == SWPMI_VOLTAGE_CLASS_B))
#define IS_SWPMI_BITRATE_VALUE(__VALUE__) (((__VALUE__) <= 63))
#define IS_SWPMI_TX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_TX_NO_SOFTWAREBUFFER) || \
((__MODE__) == SWPMI_TX_MULTI_SOFTWAREBUFFER))
#define IS_SWPMI_RX_BUFFERING_MODE(__MODE__) (((__MODE__) == SWPMI_RX_NO_SOFTWAREBUFFER) || \
((__MODE__) == SWPMI_RX_MULTI_SOFTWAREBUFFER))
/**
* @}
*/
/**
* @}
*/
#endif /* SWPMI1 */
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_SWPMI_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_tim_ex.h
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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_tim_ex.h * @file stm32l4xx_hal_tim_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of TIM HAL Extended module. * @brief Header file of TIM HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_TIM_EX_H #ifndef STM32L4xx_HAL_TIM_EX_H
#define __STM32L4xx_HAL_TIM_EX_H #define STM32L4xx_HAL_TIM_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup TIMEx /** @addtogroup TIMEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup TIMEx_Exported_Types TIM Extended Exported Types /** @defgroup TIMEx_Exported_Types TIM Extended Exported Types
* @{ * @{
*/ */
/** /**
* @brief TIM Hall sensor Configuration Structure definition * @brief TIM Hall sensor Configuration Structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal.
uint32_t IC1Polarity; /*!< Specifies the active edge of the input signal. This parameter can be a value of @ref TIM_Input_Capture_Polarity */
This parameter can be a value of @ref TIM_Input_Capture_Polarity */
uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler.
uint32_t IC1Prescaler; /*!< Specifies the Input Capture Prescaler. This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
This parameter can be a value of @ref TIM_Input_Capture_Prescaler */
uint32_t IC1Filter; /*!< Specifies the input capture filter.
uint32_t IC1Filter; /*!< Specifies the input capture filter. This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
This parameter can be a number between Min_Data = 0x0 and Max_Data = 0xF */
uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register.
uint32_t Commutation_Delay; /*!< Specifies the pulse value to be loaded into the Capture Compare Register. This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */
This parameter can be a number between Min_Data = 0x0000 and Max_Data = 0xFFFF */ } TIM_HallSensor_InitTypeDef;
} TIM_HallSensor_InitTypeDef;
/**
/** * @brief TIM Break/Break2 input configuration
* @brief TIM Break/Break2 input configuration */
*/ typedef struct
typedef struct { {
uint32_t Source; /*!< Specifies the source of the timer break input. uint32_t Source; /*!< Specifies the source of the timer break input.
This parameter can be a value of @ref TIMEx_Break_Input_Source */ This parameter can be a value of @ref TIMEx_Break_Input_Source */
uint32_t Enable; /*!< Specifies whether or not the break input source is enabled. uint32_t Enable; /*!< Specifies whether or not the break input source is enabled.
This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */ This parameter can be a value of @ref TIMEx_Break_Input_Source_Enable */
uint32_t Polarity; /*!< Specifies the break input source polarity. uint32_t Polarity; /*!< Specifies the break input source polarity.
This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity This parameter can be a value of @ref TIMEx_Break_Input_Source_Polarity
Not relevant when analog watchdog output of the DFSDM1 used as break input source */ Not relevant when analog watchdog output of the DFSDM1 used as break input source */
} TIMEx_BreakInputConfigTypeDef; }
TIMEx_BreakInputConfigTypeDef;
/**
* @} /**
*/ * @}
/* End of exported types -----------------------------------------------------*/ */
/* End of exported types -----------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants /* Exported constants --------------------------------------------------------*/
* @{ /** @defgroup TIMEx_Exported_Constants TIM Extended Exported Constants
*/ * @{
*/
/** @defgroup TIMEx_Remap TIM Extended Remapping
* @{ /** @defgroup TIMEx_Remap TIM Extended Remapping
*/ * @{
#define TIM_TIM1_ETR_ADC1_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ */
#define TIM_TIM1_ETR_ADC1_AWD1 (TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD1 */ #define TIM_TIM1_ETR_ADC1_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM1_ETR_ADC1_AWD2 (TIM1_OR1_ETR_ADC1_RMP_1) /* !< TIM1_ETR is connected to ADC1 AWD2 */ #define TIM_TIM1_ETR_ADC1_AWD1 TIM1_OR1_ETR_ADC1_RMP_0 /* !< TIM1_ETR is connected to ADC1 AWD1 */
#define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */ #define TIM_TIM1_ETR_ADC1_AWD2 TIM1_OR1_ETR_ADC1_RMP_1 /* !< TIM1_ETR is connected to ADC1 AWD2 */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #define TIM_TIM1_ETR_ADC1_AWD3 (TIM1_OR1_ETR_ADC1_RMP_1 | TIM1_OR1_ETR_ADC1_RMP_0) /* !< TIM1_ETR is connected to ADC1 AWD3 */
defined (STM32L496xx) || defined (STM32L4A6xx) #if defined (ADC3)
#define TIM_TIM1_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/ #define TIM_TIM1_ETR_ADC3_NONE 0x00000000U /* !< TIM1_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM1_ETR_ADC3_AWD1 (TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD1 */ #define TIM_TIM1_ETR_ADC3_AWD1 TIM1_OR1_ETR_ADC3_RMP_0 /* !< TIM1_ETR is connected to ADC3 AWD1 */
#define TIM_TIM1_ETR_ADC3_AWD2 (TIM1_OR1_ETR_ADC3_RMP_1) /* !< TIM1_ETR is connected to ADC3 AWD2 */ #define TIM_TIM1_ETR_ADC3_AWD2 TIM1_OR1_ETR_ADC3_RMP_1 /* !< TIM1_ETR is connected to ADC3 AWD2 */
#define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */ #define TIM_TIM1_ETR_ADC3_AWD3 (TIM1_OR1_ETR_ADC3_RMP_1 | TIM1_OR1_ETR_ADC3_RMP_0) /* !< TIM1_ETR is connected to ADC3 AWD3 */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ #endif /* ADC3 */
/* STM32L496xx || STM32L4A6xx */ #define TIM_TIM1_TI1_GPIO 0x00000000U /* !< TIM1 TI1 is connected to GPIO */
#define TIM_TIM1_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM1 TI1 is connected to GPIO */ #define TIM_TIM1_TI1_COMP1 TIM1_OR1_TI1_RMP /* !< TIM1 TI1 is connected to COMP1 */
#define TIM_TIM1_TI1_COMP1 (TIM1_OR1_TI1_RMP) /* !< TIM1 TI1 is connected to COMP1 */ #define TIM_TIM1_ETR_GPIO 0x00000000U /* !< TIM1_ETR is connected to GPIO */
#define TIM_TIM1_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM1_ETR is connected to GPIO */ #define TIM_TIM1_ETR_COMP1 TIM1_OR2_ETRSEL_0 /* !< TIM1_ETR is connected to COMP1 output */
#define TIM_TIM1_ETR_COMP1 (TIM1_OR2_ETRSEL_0) /* !< TIM1_ETR is connected to COMP1 output */ #define TIM_TIM1_ETR_COMP2 TIM1_OR2_ETRSEL_1 /* !< TIM1_ETR is connected to COMP2 output */
#define TIM_TIM1_ETR_COMP2 (TIM1_OR2_ETRSEL_1) /* !< TIM1_ETR is connected to COMP2 output */
#if defined (USB_OTG_FS)
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */
defined (STM32L496xx) || defined (STM32L4A6xx) || \ #define TIM_TIM2_ITR1_OTG_FS_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to OTG_FS SOF */
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) #else
#define TIM_TIM2_ITR1_TIM8_TRGO ((uint32_t)(0x00000000)) /* !< TIM2_ITR1 is connected to TIM8_TRGO */ #if defined(STM32L471xx)
#define TIM_TIM2_ITR1_OTG_FS_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to OTG_FS SOF */ #define TIM_TIM2_ITR1_TIM8_TRGO 0x00000000U /* !< TIM2_ITR1 is connected to TIM8_TRGO */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ #define TIM_TIM2_ITR1_NONE TIM2_OR1_ITR1_RMP /* !< No internal trigger on TIM2_ITR1 */
/* STM32L496xx || STM32L4A6xx || */ #else
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #define TIM_TIM2_ITR1_NONE 0x00000000U /* !< No internal trigger on TIM2_ITR1 */
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \ #define TIM_TIM2_ITR1_USB_SOF TIM2_OR1_ITR1_RMP /* !< TIM2_ITR1 is connected to USB SOF */
defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) #endif /* STM32L471xx */
#define TIM_TIM2_ITR1_NONE ((uint32_t)(0x00000000)) /* !< No internal trigger on TIM2_ITR1 */ #endif /* USB_OTG_FS */
#define TIM_TIM2_ITR1_USB_SOF (TIM2_OR1_ITR1_RMP) /* !< TIM2_ITR1 is connected to USB SOF */ #define TIM_TIM2_ETR_GPIO 0x00000000U /* !< TIM2_ETR is connected to GPIO */
#endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */ #define TIM_TIM2_ETR_LSE TIM2_OR1_ETR1_RMP /* !< TIM2_ETR is connected to LSE */
/* STM32L451xx || STM32L452xx || STM32L462xx */ #define TIM_TIM2_ETR_COMP1 TIM2_OR2_ETRSEL_0 /* !< TIM2_ETR is connected to COMP1 output */
#define TIM_TIM2_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM2_ETR is connected to GPIO */ #define TIM_TIM2_ETR_COMP2 TIM2_OR2_ETRSEL_1 /* !< TIM2_ETR is connected to COMP2 output */
#define TIM_TIM2_ETR_LSE (TIM2_OR1_ETR1_RMP) /* !< TIM2_ETR is connected to LSE */ #define TIM_TIM2_TI4_GPIO 0x00000000U /* !< TIM2 TI4 is connected to GPIO */
#define TIM_TIM2_ETR_COMP1 (TIM2_OR2_ETRSEL_0) /* !< TIM2_ETR is connected to COMP1 output */ #define TIM_TIM2_TI4_COMP1 TIM2_OR1_TI4_RMP_0 /* !< TIM2 TI4 is connected to COMP1 output */
#define TIM_TIM2_ETR_COMP2 (TIM2_OR2_ETRSEL_1) /* !< TIM2_ETR is connected to COMP2 output */ #define TIM_TIM2_TI4_COMP2 TIM2_OR1_TI4_RMP_1 /* !< TIM2 TI4 is connected to COMP2 output */
#define TIM_TIM2_TI4_GPIO ((uint32_t)(0x00000000)) /* !< TIM2 TI4 is connected to GPIO */ #define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */
#define TIM_TIM2_TI4_COMP1 (TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to COMP1 output */
#define TIM_TIM2_TI4_COMP2 (TIM2_OR1_TI4_RMP_1) /* !< TIM2 TI4 is connected to COMP2 output */ #if defined (TIM3)
#define TIM_TIM2_TI4_COMP1_COMP2 (TIM2_OR1_TI4_RMP_1| TIM2_OR1_TI4_RMP_0) /* !< TIM2 TI4 is connected to logical OR between COMP1 and COMP2 output2 */ #define TIM_TIM3_TI1_GPIO 0x00000000U /* !< TIM3 TI1 is connected to GPIO */
#define TIM_TIM3_TI1_COMP1 TIM3_OR1_TI1_RMP_0 /* !< TIM3 TI1 is connected to COMP1 output */
#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ #define TIM_TIM3_TI1_COMP2 TIM3_OR1_TI1_RMP_1 /* !< TIM3 TI1 is connected to COMP2 output */
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */
defined (STM32L496xx) || defined (STM32L4A6xx) || \ #define TIM_TIM3_ETR_GPIO 0x00000000U /* !< TIM3_ETR is connected to GPIO */
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) #define TIM_TIM3_ETR_COMP1 TIM3_OR2_ETRSEL_0 /* !< TIM3_ETR is connected to COMP1 output */
#define TIM_TIM3_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM3 TI1 is connected to GPIO */ #endif /* TIM3 */
#define TIM_TIM3_TI1_COMP1 (TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to COMP1 output */
#define TIM_TIM3_TI1_COMP2 (TIM3_OR1_TI1_RMP_1) /* !< TIM3 TI1 is connected to COMP2 output */ #if defined (TIM8)
#define TIM_TIM3_TI1_COMP1_COMP2 (TIM3_OR1_TI1_RMP_1 | TIM3_OR1_TI1_RMP_0) /* !< TIM3 TI1 is connected to logical OR between COMP1 and COMP2 output2 */ #if defined(ADC2) && defined(ADC3)
#define TIM_TIM3_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM3_ETR is connected to GPIO */ #define TIM_TIM8_ETR_ADC2_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM3_ETR_COMP1 (TIM3_OR2_ETRSEL_0) /* !< TIM3_ETR is connected to COMP1 output */ #define TIM_TIM8_ETR_ADC2_AWD1 TIM8_OR1_ETR_ADC2_RMP_0 /* !< TIM8_ETR is connected to ADC2 AWD1 */
#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ #define TIM_TIM8_ETR_ADC2_AWD2 TIM8_OR1_ETR_ADC2_RMP_1 /* !< TIM8_ETR is connected to ADC2 AWD2 */
/* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ #define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */
/* STM32L496xx || STM32L4A6xx || */ #define TIM_TIM8_ETR_ADC3_NONE 0x00000000U /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #define TIM_TIM8_ETR_ADC3_AWD1 TIM8_OR1_ETR_ADC3_RMP_0 /* !< TIM8_ETR is connected to ADC3 AWD1 */
#define TIM_TIM8_ETR_ADC3_AWD2 TIM8_OR1_ETR_ADC3_RMP_1 /* !< TIM8_ETR is connected to ADC3 AWD2 */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
defined (STM32L496xx) || defined (STM32L4A6xx) #endif /* ADC2 && ADC3 */
#define TIM_TIM8_ETR_ADC2_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/
#define TIM_TIM8_ETR_ADC2_AWD1 (TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD1 */ #define TIM_TIM8_TI1_GPIO 0x00000000U /* !< TIM8 TI1 is connected to GPIO */
#define TIM_TIM8_ETR_ADC2_AWD2 (TIM8_OR1_ETR_ADC2_RMP_1) /* !< TIM8_ETR is connected to ADC2 AWD2 */ #define TIM_TIM8_TI1_COMP2 TIM8_OR1_TI1_RMP /* !< TIM8 TI1 is connected to COMP1 */
#define TIM_TIM8_ETR_ADC2_AWD3 (TIM8_OR1_ETR_ADC2_RMP_1 | TIM8_OR1_ETR_ADC2_RMP_0) /* !< TIM8_ETR is connected to ADC2 AWD3 */ #define TIM_TIM8_ETR_GPIO 0x00000000U /* !< TIM8_ETR is connected to GPIO */
#define TIM_TIM8_ETR_ADC3_NONE ((uint32_t)(0x00000000)) /* !< TIM8_ETR is not connected to any AWD (analog watchdog)*/ #define TIM_TIM8_ETR_COMP1 TIM8_OR2_ETRSEL_0 /* !< TIM8_ETR is connected to COMP1 output */
#define TIM_TIM8_ETR_ADC3_AWD1 (TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD1 */ #define TIM_TIM8_ETR_COMP2 TIM8_OR2_ETRSEL_1 /* !< TIM8_ETR is connected to COMP2 output */
#define TIM_TIM8_ETR_ADC3_AWD2 (TIM8_OR1_ETR_ADC3_RMP_1) /* !< TIM8_ETR is connected to ADC3 AWD2 */ #endif /* TIM8 */
#define TIM_TIM8_ETR_ADC3_AWD3 (TIM8_OR1_ETR_ADC3_RMP_1 | TIM8_OR1_ETR_ADC3_RMP_0) /* !< TIM8_ETR is connected to ADC3 AWD3 */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ #define TIM_TIM15_TI1_GPIO 0x00000000U /* !< TIM15 TI1 is connected to GPIO */
/* STM32L496xx || STM32L4A6xx */ #define TIM_TIM15_TI1_LSE TIM15_OR1_TI1_RMP /* !< TIM15 TI1 is connected to LSE */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #define TIM_TIM15_ENCODERMODE_NONE 0x00000000U /* !< No redirection */
defined (STM32L496xx) || defined (STM32L4A6xx) || \ #define TIM_TIM15_ENCODERMODE_TIM2 TIM15_OR1_ENCODER_MODE_0 /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) #if defined (TIM3)
#define TIM_TIM8_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM8 TI1 is connected to GPIO */ #define TIM_TIM15_ENCODERMODE_TIM3 TIM15_OR1_ENCODER_MODE_1 /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#define TIM_TIM8_TI1_COMP2 (TIM8_OR1_TI1_RMP) /* !< TIM8 TI1 is connected to COMP1 */ #endif /* TIM3 */
#define TIM_TIM8_ETR_GPIO ((uint32_t)(0x00000000)) /* !< TIM8_ETR is connected to GPIO */ #if defined (TIM4)
#define TIM_TIM8_ETR_COMP1 (TIM8_OR2_ETRSEL_0) /* !< TIM8_ETR is connected to COMP1 output */ #define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#define TIM_TIM8_ETR_COMP2 (TIM8_OR2_ETRSEL_1) /* !< TIM8_ETR is connected to COMP2 output */ #endif /* TIM4 */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
/* STM32L496xx || STM32L4A6xx || */ #define TIM_TIM16_TI1_GPIO 0x00000000U /* !< TIM16 TI1 is connected to GPIO */
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #define TIM_TIM16_TI1_LSI TIM16_OR1_TI1_RMP_0 /* !< TIM16 TI1 is connected to LSI */
#define TIM_TIM16_TI1_LSE TIM16_OR1_TI1_RMP_1 /* !< TIM16 TI1 is connected to LSE */
#define TIM_TIM15_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM15 TI1 is connected to GPIO */ #define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */
#define TIM_TIM15_TI1_LSE (TIM15_OR1_TI1_RMP) /* !< TIM15 TI1 is connected to LSE */ #if defined (TIM16_OR1_TI1_RMP_2)
#define TIM_TIM15_ENCODERMODE_NONE ((uint32_t)(0x00000000)) /* !< No redirection */ #define TIM_TIM16_TI1_MSI TIM16_OR1_TI1_RMP_2 /* !< TIM16 TI1 is connected to MSI */
#define TIM_TIM15_ENCODERMODE_TIM2 (TIM15_OR1_ENCODER_MODE_0) /* !< TIM2 IC1 and TIM2 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ #define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */
#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ #define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ #endif /* TIM16_OR1_TI1_RMP_2 */
defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) #if defined (TIM17)
#define TIM_TIM15_ENCODERMODE_TIM3 (TIM15_OR1_ENCODER_MODE_1) /* !< TIM3 IC1 and TIM3 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */ #define TIM_TIM17_TI1_GPIO 0x00000000U /* !< TIM17 TI1 is connected to GPIO */
#endif /* STM32L451xx || STM32L452xx || STM32L462xx */ #define TIM_TIM17_TI1_MSI TIM17_OR1_TI1_RMP_0 /* !< TIM17 TI1 is connected to MSI */
/* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ #define TIM_TIM17_TI1_HSE_32 TIM17_OR1_TI1_RMP_1 /* !< TIM17 TI1 is connected to HSE div 32 */
/* STM32L496xx || STM32L4A6xx || */ #define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ #endif /* TIM17 */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ /**
defined (STM32L496xx) || defined (STM32L4A6xx) || \ * @}
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) */
#define TIM_TIM15_ENCODERMODE_TIM4 (TIM15_OR1_ENCODER_MODE_1 | TIM15_OR1_ENCODER_MODE_0) /* !< TIM4 IC1 and TIM4 IC2 are connected to TIM15 IC1 and TIM15 IC2 respectively */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ /** @defgroup TIMEx_Break_Input TIM Extended Break input
/* STM32L496xx || STM32L4A6xx || */ * @{
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ */
#define TIM_BREAKINPUT_BRK 0x00000001U /* !< Timer break input */
#define TIM_TIM16_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM16 TI1 is connected to GPIO */ #define TIM_BREAKINPUT_BRK2 0x00000002U /* !< Timer break2 input */
#define TIM_TIM16_TI1_LSI (TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to LSI */ /**
#define TIM_TIM16_TI1_LSE (TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to LSE */ * @}
#define TIM_TIM16_TI1_RTC (TIM16_OR1_TI1_RMP_1 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to RTC wakeup interrupt */ */
#if defined (STM32L431xx) || defined (STM32L432xx) || defined (STM32L433xx) || defined (STM32L442xx) || defined (STM32L443xx) || \
defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ /** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source
defined (STM32L496xx) || defined (STM32L4A6xx) * @{
#define TIM_TIM16_TI1_MSI (TIM16_OR1_TI1_RMP_2) /* !< TIM16 TI1 is connected to MSI */ */
#define TIM_TIM16_TI1_HSE_32 (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_0) /* !< TIM16 TI1 is connected to HSE div 32 */ #define TIM_BREAKINPUTSOURCE_BKIN 0x00000001U /* !< An external source (GPIO) is connected to the BKIN pin */
#define TIM_TIM16_TI1_MCO (TIM16_OR1_TI1_RMP_2 | TIM16_OR1_TI1_RMP_1) /* !< TIM16 TI1 is connected to MCO */ #define TIM_BREAKINPUTSOURCE_COMP1 0x00000002U /* !< The COMP1 output is connected to the break input */
#endif /* STM32L431xx || STM32L432xx || STM32L442xx || STM32L433xx || STM32L443xx || */ #define TIM_BREAKINPUTSOURCE_COMP2 0x00000004U /* !< The COMP2 output is connected to the break input */
/* STM32L451xx || STM32L452xx || STM32L462xx || */ #if defined (DFSDM1_Channel0)
/* STM32L496xx || STM32L4A6xx */ #define TIM_BREAKINPUTSOURCE_DFSDM1 0x00000008U /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */
#endif /* DFSDM1_Channel0 */
#if defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ /**
defined (STM32L496xx) || defined (STM32L4A6xx) || \ * @}
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) */
#define TIM_TIM17_TI1_GPIO ((uint32_t)(0x00000000)) /* !< TIM17 TI1 is connected to GPIO */
#define TIM_TIM17_TI1_MSI (TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MSI */ /** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
#define TIM_TIM17_TI1_HSE_32 (TIM17_OR1_TI1_RMP_1) /* !< TIM17 TI1 is connected to HSE div 32 */ * @{
#define TIM_TIM17_TI1_MCO (TIM17_OR1_TI1_RMP_1 | TIM17_OR1_TI1_RMP_0) /* !< TIM17 TI1 is connected to MCO */ */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ #define TIM_BREAKINPUTSOURCE_DISABLE 0x00000000U /* !< Break input source is disabled */
/* STM32L496xx || STM32L4A6xx || */ #define TIM_BREAKINPUTSOURCE_ENABLE 0x00000001U /* !< Break input source is enabled */
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ /**
/** * @}
* @} */
*/
/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity
/** @defgroup TIMEx_Break_Input TIM Extended Break input * @{
* @{ */
*/ #define TIM_BREAKINPUTSOURCE_POLARITY_LOW 0x00000001U /* !< Break input source is active low */
#define TIM_BREAKINPUT_BRK ((uint32_t)(0x00000001)) /* !< Timer break input */ #define TIM_BREAKINPUTSOURCE_POLARITY_HIGH 0x00000000U /* !< Break input source is active_high */
#define TIM_BREAKINPUT_BRK2 ((uint32_t)(0x00000002)) /* !< Timer break2 input */ /**
/** * @}
* @} */
*/
/**
/** @defgroup TIMEx_Break_Input_Source TIM Extended Break input source * @}
* @{ */
*/ /* End of exported constants -------------------------------------------------*/
#define TIM_BREAKINPUTSOURCE_BKIN ((uint32_t)(0x00000001)) /* !< An external source (GPIO) is connected to the BKIN pin */
#define TIM_BREAKINPUTSOURCE_COMP1 ((uint32_t)(0x00000002)) /* !< The COMP1 output is connected to the break input */ /* Exported macro ------------------------------------------------------------*/
#define TIM_BREAKINPUTSOURCE_COMP2 ((uint32_t)(0x00000004)) /* !< The COMP2 output is connected to the break input */ /** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros
#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ * @{
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ */
defined (STM32L496xx) || defined (STM32L4A6xx) || \
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) /**
#define TIM_BREAKINPUTSOURCE_DFSDM1 ((uint32_t)(0x00000008)) /* !< The analog watchdog output of the DFSDM1 peripheral is connected to the break input */ * @}
#endif /* STM32L451xx || STM32L452xx || STM32L462xx || */ */
/* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */ /* End of exported macro -----------------------------------------------------*/
/* STM32L496xx || STM32L4A6xx || */
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ /* Private macro -------------------------------------------------------------*/
/** /** @defgroup TIMEx_Private_Macros TIM Extended Private Macros
* @} * @{
*/ */
#define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F))
/** @defgroup TIMEx_Break_Input_Source_Enable TIM Extended Break input source enabling
* @{ #define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \
*/ ((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2))
#define TIM_BREAKINPUTSOURCE_DISABLE ((uint32_t)(0x00000000)) /* !< Break input source is disabled */
#define TIM_BREAKINPUTSOURCE_ENABLE ((uint32_t)(0x00000001)) /* !< Break input source is enabled */ #if defined (DFSDM1_Channel0)
/** #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
* @} ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
*/ ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \
((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1))
/** @defgroup TIMEx_Break_Input_Source_Polarity TIM Extended Break input polarity #else
* @{ #define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \
*/ ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \
#define TIM_BREAKINPUTSOURCE_POLARITY_LOW ((uint32_t)(0x00000001)) /* !< Break input source is active low */ ((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2))
#define TIM_BREAKINPUTSOURCE_POLARITY_HIGH ((uint32_t)(0x00000000)) /* !< Break input source is active_high */ #endif /* DFSDM1_Channel0 */
/**
* @} #define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \
*/ ((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE))
/** #define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \
* @} ((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH))
*/
/* End of exported constants -------------------------------------------------*/ /**
* @}
/* Exported macro ------------------------------------------------------------*/ */
/** @defgroup TIMEx_Exported_Macros TIM Extended Exported Macros /* End of private macro ------------------------------------------------------*/
* @{
*/ /* Exported functions --------------------------------------------------------*/
/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions
/** * @{
* @} */
*/
/* End of exported macro -----------------------------------------------------*/ /** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions
* @brief Timer Hall Sensor functions
/* Private macro -------------------------------------------------------------*/ * @{
/** @defgroup TIMEx_Private_Macros TIM Extended Private Macros */
* @{ /* Timer Hall Sensor functions **********************************************/
*/ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef *sConfig);
#define IS_TIM_REMAP(__REMAP__) (((__REMAP__) <= (uint32_t)0x0001C01F)) HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim);
#define IS_TIM_BREAKINPUT(__BREAKINPUT__) (((__BREAKINPUT__) == TIM_BREAKINPUT_BRK) || \ void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim);
((__BREAKINPUT__) == TIM_BREAKINPUT_BRK2)) void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim);
#if defined (STM32L451xx) || defined (STM32L452xx) || defined (STM32L462xx) || \ /* Blocking mode: Polling */
defined (STM32L471xx) || defined (STM32L475xx) || defined (STM32L476xx) || defined (STM32L485xx) || defined (STM32L486xx) || \ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim);
defined (STM32L496xx) || defined (STM32L4A6xx) || \ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim);
defined (STM32L4R5xx) || defined (STM32L4R7xx) || defined (STM32L4R9xx) || defined (STM32L4S5xx) || defined (STM32L4S7xx) || defined (STM32L4S9xx) /* Non-Blocking mode: Interrupt */
#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim);
((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim);
((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2) || \ /* Non-Blocking mode: DMA */
((__SOURCE__) == TIM_BREAKINPUTSOURCE_DFSDM1)) HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length);
#else HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim);
#define IS_TIM_BREAKINPUTSOURCE(__SOURCE__) (((__SOURCE__) == TIM_BREAKINPUTSOURCE_BKIN) || \ /**
((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP1) || \ * @}
((__SOURCE__) == TIM_BREAKINPUTSOURCE_COMP2)) */
#endif /* STM32L471xx || STM32L475xx || STM32L476xx || STM32L485xx || STM32L486xx || */
/* STM32L496xx || STM32L4A6xx || */ /** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions
/* STM32L4R5xx || STM32L4R7xx || STM32L4R9xx || STM32L4S5xx || STM32L4S7xx || STM32L4S9xx */ * @brief Timer Complementary Output Compare functions
* @{
#define IS_TIM_BREAKINPUTSOURCE_STATE(__STATE__) (((__STATE__) == TIM_BREAKINPUTSOURCE_DISABLE) || \ */
((__STATE__) == TIM_BREAKINPUTSOURCE_ENABLE)) /* Timer Complementary Output Compare functions *****************************/
/* Blocking mode: Polling */
#define IS_TIM_BREAKINPUTSOURCE_POLARITY(__POLARITY__) (((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_LOW) || \ HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
((__POLARITY__) == TIM_BREAKINPUTSOURCE_POLARITY_HIGH)) HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
/**
* @} /* Non-Blocking mode: Interrupt */
*/ HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* End of private macro ------------------------------------------------------*/ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Exported functions --------------------------------------------------------*/ /* Non-Blocking mode: DMA */
/** @addtogroup TIMEx_Exported_Functions TIM Extended Exported Functions HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
* @{ HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
*/ /**
* @}
/** @addtogroup TIMEx_Exported_Functions_Group1 Extended Timer Hall Sensor functions */
* @brief Timer Hall Sensor functions
* @{ /** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions
*/ * @brief Timer Complementary PWM functions
/* Timer Hall Sensor functions **********************************************/ * @{
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Init(TIM_HandleTypeDef *htim, TIM_HallSensor_InitTypeDef* sConfig); */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_DeInit(TIM_HandleTypeDef *htim); /* Timer Complementary PWM functions ****************************************/
/* Blocking mode: Polling */
void HAL_TIMEx_HallSensor_MspInit(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel);
void HAL_TIMEx_HallSensor_MspDeInit(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Blocking mode: Polling */ /* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: Interrupt */ /* Non-Blocking mode: DMA */
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_IT(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length);
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_IT(TIM_HandleTypeDef *htim); HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel);
/* Non-Blocking mode: DMA */ /**
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Start_DMA(TIM_HandleTypeDef *htim, uint32_t *pData, uint16_t Length); * @}
HAL_StatusTypeDef HAL_TIMEx_HallSensor_Stop_DMA(TIM_HandleTypeDef *htim); */
/**
* @} /** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions
*/ * @brief Timer Complementary One Pulse functions
* @{
/** @addtogroup TIMEx_Exported_Functions_Group2 Extended Timer Complementary Output Compare functions */
* @brief Timer Complementary Output Compare functions /* Timer Complementary One Pulse functions **********************************/
* @{ /* Blocking mode: Polling */
*/ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
/* Timer Complementary Output Compare functions *****************************/ HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
/* Blocking mode: Polling */
HAL_StatusTypeDef HAL_TIMEx_OCN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); /* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel);
/* Non-Blocking mode: Interrupt */ /**
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); * @}
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); */
/* Non-Blocking mode: DMA */ /** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions
HAL_StatusTypeDef HAL_TIMEx_OCN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); * @brief Peripheral Control functions
HAL_StatusTypeDef HAL_TIMEx_OCN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); * @{
/** */
* @} /* Extended Control functions ************************************************/
*/ HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
/** @addtogroup TIMEx_Exported_Functions_Group3 Extended Timer Complementary PWM functions HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource);
* @brief Timer Complementary PWM functions HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef *sMasterConfig);
* @{ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig);
*/ HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig);
/* Timer Complementary PWM functions ****************************************/ HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
/* Blocking mode: Polling */ HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap);
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start(TIM_HandleTypeDef *htim, uint32_t Channel); /**
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop(TIM_HandleTypeDef *htim, uint32_t Channel); * @}
*/
/* Non-Blocking mode: Interrupt */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_IT(TIM_HandleTypeDef *htim, uint32_t Channel); /** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t Channel); * @brief Extended Callbacks functions
/* Non-Blocking mode: DMA */ * @{
HAL_StatusTypeDef HAL_TIMEx_PWMN_Start_DMA(TIM_HandleTypeDef *htim, uint32_t Channel, uint32_t *pData, uint16_t Length); */
HAL_StatusTypeDef HAL_TIMEx_PWMN_Stop_DMA(TIM_HandleTypeDef *htim, uint32_t Channel); /* Extended Callback **********************************************************/
/** void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
* @} void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
*/ void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim);
/**
/** @addtogroup TIMEx_Exported_Functions_Group4 Extended Timer Complementary One Pulse functions * @}
* @brief Timer Complementary One Pulse functions */
* @{
*/ /** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
/* Timer Complementary One Pulse functions **********************************/ * @brief Extended Peripheral State functions
/* Blocking mode: Polling */ * @{
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start(TIM_HandleTypeDef *htim, uint32_t OutputChannel); */
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop(TIM_HandleTypeDef *htim, uint32_t OutputChannel); /* Extended Peripheral State functions ***************************************/
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
/* Non-Blocking mode: Interrupt */ /**
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Start_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); * @}
HAL_StatusTypeDef HAL_TIMEx_OnePulseN_Stop_IT(TIM_HandleTypeDef *htim, uint32_t OutputChannel); */
/**
* @} /**
*/ * @}
*/
/** @addtogroup TIMEx_Exported_Functions_Group5 Extended Peripheral Control functions /* End of exported functions -------------------------------------------------*/
* @brief Peripheral Control functions
* @{ /* Private functions----------------------------------------------------------*/
*/ /** @defgroup TIMEx_Private_Functions TIMEx Private Functions
/* Extended Control functions ************************************************/ * @{
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); */
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_IT(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
HAL_StatusTypeDef HAL_TIMEx_ConfigCommutationEvent_DMA(TIM_HandleTypeDef *htim, uint32_t InputTrigger, uint32_t CommutationSource); /**
HAL_StatusTypeDef HAL_TIMEx_MasterConfigSynchronization(TIM_HandleTypeDef *htim, TIM_MasterConfigTypeDef * sMasterConfig); * @}
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakDeadTime(TIM_HandleTypeDef *htim, TIM_BreakDeadTimeConfigTypeDef *sBreakDeadTimeConfig); */
HAL_StatusTypeDef HAL_TIMEx_ConfigBreakInput(TIM_HandleTypeDef *htim, uint32_t BreakInput, TIMEx_BreakInputConfigTypeDef *sBreakInputConfig); /* End of private functions --------------------------------------------------*/
HAL_StatusTypeDef HAL_TIMEx_GroupChannel5(TIM_HandleTypeDef *htim, uint32_t Channels);
HAL_StatusTypeDef HAL_TIMEx_RemapConfig(TIM_HandleTypeDef *htim, uint32_t Remap); /**
* @}
/** */
* @}
*/ /**
* @}
/** @addtogroup TIMEx_Exported_Functions_Group6 Extended Callbacks functions */
* @brief Extended Callbacks functions
* @{ #ifdef __cplusplus
*/ }
/* Extended Callback **********************************************************/ #endif
void HAL_TIMEx_CommutationCallback(TIM_HandleTypeDef *htim);
void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim);
/** #endif /* STM32L4xx_HAL_TIM_EX_H */
* @}
*/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
/** @addtogroup TIMEx_Exported_Functions_Group7 Extended Peripheral State functions
* @brief Extended Peripheral State functions
* @{
*/
/* Extended Peripheral State functions ***************************************/
HAL_TIM_StateTypeDef HAL_TIMEx_HallSensor_GetState(TIM_HandleTypeDef *htim);
/**
* @}
*/
/**
* @}
*/
/* End of exported functions -------------------------------------------------*/
/* Private functions----------------------------------------------------------*/
/** @defgroup TIMEx_Private_Functions TIMEx Private Functions
* @{
*/
void TIMEx_DMACommutationCplt(DMA_HandleTypeDef *hdma);
/**
* @}
*/
/* End of private functions --------------------------------------------------*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_TIM_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_usart_ex.h * @file stm32l4xx_hal_usart_ex.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of USART HAL Extended module. * @brief Header file of USART HAL Extended module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_USART_EX_H #ifndef __STM32L4xx_HAL_USART_EX_H
#define __STM32L4xx_HAL_USART_EX_H #define __STM32L4xx_HAL_USART_EX_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup USARTEx /** @addtogroup USARTEx
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants /** @defgroup USARTEx_Exported_Constants USARTEx Exported Constants
* @{ * @{
*/ */
/** @defgroup USARTEx_Word_Length USARTEx Word Length /** @defgroup USARTEx_Word_Length USARTEx Word Length
* @{ * @{
*/ */
#define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */ #define USART_WORDLENGTH_7B ((uint32_t)USART_CR1_M1) /*!< 7-bit long USART frame */
#define USART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long USART frame */ #define USART_WORDLENGTH_8B 0x00000000U /*!< 8-bit long USART frame */
#define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */ #define USART_WORDLENGTH_9B ((uint32_t)USART_CR1_M0) /*!< 9-bit long USART frame */
/** /**
* @} * @}
*/ */
#if defined(USART_CR2_SLVEN) #if defined(USART_CR2_SLVEN)
/** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management /** @defgroup USARTEx_Slave_Select_management USARTEx Slave Select Management
* @{ * @{
*/ */
#define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */ #define USART_NSS_HARD 0x00000000U /*!< SPI slave selection depends on NSS input pin */
#define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */ #define USART_NSS_SOFT USART_CR2_DIS_NSS /*!< SPI slave is always selected and NSS input pin is ignored */
/** /**
* @} * @}
*/ */
#endif
#if defined(USART_CR1_FIFOEN) /** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode enable
/** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level * @brief USART SLAVE mode
* @brief USART TXFIFO level * @{
* @{ */
*/ #define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */
#define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */ #define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */
#define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */ /**
#define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */ * @}
#define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */ */
#define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */ #endif
#define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
/** #if defined(USART_CR1_FIFOEN)
* @} /** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode
*/ * @brief USART FIFO mode
* @{
/** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level */
* @brief USART RXFIFO level #define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */
* @{ #define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
*/ /**
#define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */ * @}
#define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */ */
#define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */
#define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */ /** @defgroup USARTEx_TXFIFO_threshold_level USARTEx TXFIFO threshold level
#define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */ * @brief USART TXFIFO level
#define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */ * @{
/** */
* @} #define USART_TXFIFO_THRESHOLD_1_8 0x00000000U /*!< TXFIFO reaches 1/8 of its depth */
*/ #define USART_TXFIFO_THRESHOLD_1_4 USART_CR3_TXFTCFG_0 /*!< TXFIFO reaches 1/4 of its depth */
#endif #define USART_TXFIFO_THRESHOLD_1_2 USART_CR3_TXFTCFG_1 /*!< TXFIFO reaches 1/2 of its depth */
#define USART_TXFIFO_THRESHOLD_3_4 (USART_CR3_TXFTCFG_0|USART_CR3_TXFTCFG_1) /*!< TXFIFO reaches 3/4 of its depth */
/** #define USART_TXFIFO_THRESHOLD_7_8 USART_CR3_TXFTCFG_2 /*!< TXFIFO reaches 7/8 of its depth */
* @} #define USART_TXFIFO_THRESHOLD_8_8 (USART_CR3_TXFTCFG_2|USART_CR3_TXFTCFG_0) /*!< TXFIFO becomes empty */
*/ /**
* @}
/* Private constants ---------------------------------------------------------*/ */
/** @defgroup USARTEx_Private_Constants USARTEx Private Constants
* @{ /** @defgroup USARTEx_RXFIFO_threshold_level USARTEx RXFIFO threshold level
*/ * @brief USART RXFIFO level
#if defined(USART_CR2_SLVEN) * @{
/** @defgroup USARTEx_Slave_Mode USARTEx Synchronous Slave mode */
* @{ #define USART_RXFIFO_THRESHOLD_1_8 0x00000000U /*!< RXFIFO FIFO reaches 1/8 of its depth */
*/ #define USART_RXFIFO_THRESHOLD_1_4 USART_CR3_RXFTCFG_0 /*!< RXFIFO FIFO reaches 1/4 of its depth */
#define USART_SLAVEMODE_DISABLE 0x00000000U /*!< USART SPI Slave Mode Enable */ #define USART_RXFIFO_THRESHOLD_1_2 USART_CR3_RXFTCFG_1 /*!< RXFIFO FIFO reaches 1/2 of its depth */
#define USART_SLAVEMODE_ENABLE USART_CR2_SLVEN /*!< USART SPI Slave Mode Disable */ #define USART_RXFIFO_THRESHOLD_3_4 (USART_CR3_RXFTCFG_0|USART_CR3_RXFTCFG_1) /*!< RXFIFO FIFO reaches 3/4 of its depth */
/** #define USART_RXFIFO_THRESHOLD_7_8 USART_CR3_RXFTCFG_2 /*!< RXFIFO FIFO reaches 7/8 of its depth */
* @} #define USART_RXFIFO_THRESHOLD_8_8 (USART_CR3_RXFTCFG_2|USART_CR3_RXFTCFG_0) /*!< RXFIFO FIFO becomes full */
*/ /**
#endif * @}
*/
#if defined(USART_CR1_FIFOEN) #endif
/** @defgroup USARTEx_FIFO_mode USARTEx FIFO mode
* @{ /**
*/ * @}
#define USART_FIFOMODE_DISABLE 0x00000000U /*!< FIFO mode disable */ */
#define USART_FIFOMODE_ENABLE USART_CR1_FIFOEN /*!< FIFO mode enable */
/** /* Private macros ------------------------------------------------------------*/
* @} /** @defgroup USARTEx_Private_Macros USARTEx Private Macros
*/ * @{
#endif */
/**
* @} /** @brief Report the USART clock source.
*/ * @param __HANDLE__ specifies the USART Handle.
* @param __CLOCKSOURCE__ output variable.
/* Private macros ------------------------------------------------------------*/ * @retval the USART clocking source, written in __CLOCKSOURCE__.
/** @defgroup USARTEx_Private_Macros USARTEx Private Macros */
* @{ #if defined (STM32L432xx) || defined (STM32L442xx)
*/ #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
do { \
/** @brief Report the USART clock source. if((__HANDLE__)->Instance == USART1) \
* @param __HANDLE__: specifies the USART Handle. { \
* @param __CLOCKSOURCE__: output variable. switch(__HAL_RCC_GET_USART1_SOURCE()) \
* @retval the USART clocking source, written in __CLOCKSOURCE__. { \
*/ case RCC_USART1CLKSOURCE_PCLK2: \
#if defined (STM32L432xx) || defined (STM32L442xx) (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ break; \
do { \ case RCC_USART1CLKSOURCE_HSI: \
if((__HANDLE__)->Instance == USART1) \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
{ \ break; \
switch(__HAL_RCC_GET_USART1_SOURCE()) \ case RCC_USART1CLKSOURCE_SYSCLK: \
{ \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
case RCC_USART1CLKSOURCE_PCLK2: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ case RCC_USART1CLKSOURCE_LSE: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
case RCC_USART1CLKSOURCE_HSI: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ default: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
case RCC_USART1CLKSOURCE_SYSCLK: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ } \
break; \ } \
case RCC_USART1CLKSOURCE_LSE: \ else if((__HANDLE__)->Instance == USART2) \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ { \
break; \ switch(__HAL_RCC_GET_USART2_SOURCE()) \
default: \ { \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ case RCC_USART2CLKSOURCE_PCLK1: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
} \ break; \
} \ case RCC_USART2CLKSOURCE_HSI: \
else if((__HANDLE__)->Instance == USART2) \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
{ \ break; \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ case RCC_USART2CLKSOURCE_SYSCLK: \
{ \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
case RCC_USART2CLKSOURCE_PCLK1: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ case RCC_USART2CLKSOURCE_LSE: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
case RCC_USART2CLKSOURCE_HSI: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ default: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
case RCC_USART2CLKSOURCE_SYSCLK: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ } \
break; \ } \
case RCC_USART2CLKSOURCE_LSE: \ } while(0)
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ #else
break; \ #define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \
default: \ do { \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ if((__HANDLE__)->Instance == USART1) \
break; \ { \
} \ switch(__HAL_RCC_GET_USART1_SOURCE()) \
} \ { \
} while(0) case RCC_USART1CLKSOURCE_PCLK2: \
#else (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \
#define USART_GETCLOCKSOURCE(__HANDLE__,__CLOCKSOURCE__) \ break; \
do { \ case RCC_USART1CLKSOURCE_HSI: \
if((__HANDLE__)->Instance == USART1) \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
{ \ break; \
switch(__HAL_RCC_GET_USART1_SOURCE()) \ case RCC_USART1CLKSOURCE_SYSCLK: \
{ \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
case RCC_USART1CLKSOURCE_PCLK2: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK2; \ case RCC_USART1CLKSOURCE_LSE: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
case RCC_USART1CLKSOURCE_HSI: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ default: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
case RCC_USART1CLKSOURCE_SYSCLK: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ } \
break; \ } \
case RCC_USART1CLKSOURCE_LSE: \ else if((__HANDLE__)->Instance == USART2) \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ { \
break; \ switch(__HAL_RCC_GET_USART2_SOURCE()) \
default: \ { \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ case RCC_USART2CLKSOURCE_PCLK1: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
} \ break; \
} \ case RCC_USART2CLKSOURCE_HSI: \
else if((__HANDLE__)->Instance == USART2) \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
{ \ break; \
switch(__HAL_RCC_GET_USART2_SOURCE()) \ case RCC_USART2CLKSOURCE_SYSCLK: \
{ \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
case RCC_USART2CLKSOURCE_PCLK1: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ case RCC_USART2CLKSOURCE_LSE: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
case RCC_USART2CLKSOURCE_HSI: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ default: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
case RCC_USART2CLKSOURCE_SYSCLK: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ } \
break; \ } \
case RCC_USART2CLKSOURCE_LSE: \ else if((__HANDLE__)->Instance == USART3) \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ { \
break; \ switch(__HAL_RCC_GET_USART3_SOURCE()) \
default: \ { \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ case RCC_USART3CLKSOURCE_PCLK1: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \
} \ break; \
} \ case RCC_USART3CLKSOURCE_HSI: \
else if((__HANDLE__)->Instance == USART3) \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \
{ \ break; \
switch(__HAL_RCC_GET_USART3_SOURCE()) \ case RCC_USART3CLKSOURCE_SYSCLK: \
{ \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \
case RCC_USART3CLKSOURCE_PCLK1: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_PCLK1; \ case RCC_USART3CLKSOURCE_LSE: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \
case RCC_USART3CLKSOURCE_HSI: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_HSI; \ default: \
break; \ (__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \
case RCC_USART3CLKSOURCE_SYSCLK: \ break; \
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_SYSCLK; \ } \
break; \ } \
case RCC_USART3CLKSOURCE_LSE: \ } while(0)
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_LSE; \ #endif /* STM32L432xx || STM32L442xx */
break; \
default: \ /** @brief Compute the USART mask to apply to retrieve the received data
(__CLOCKSOURCE__) = USART_CLOCKSOURCE_UNDEFINED; \ * according to the word length and to the parity bits activation.
break; \ * @note If PCE = 1, the parity bit is not included in the data extracted
} \ * by the reception API().
} \ * This masking operation is not carried out in the case of
} while(0) * DMA transfers.
#endif /* STM32L432xx || STM32L442xx */ * @param __HANDLE__ specifies the USART Handle.
* @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field.
/** @brief Compute the USART mask to apply to retrieve the received data */
* according to the word length and to the parity bits activation. #define USART_MASK_COMPUTATION(__HANDLE__) \
* @note If PCE = 1, the parity bit is not included in the data extracted do { \
* by the reception API(). if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \
* This masking operation is not carried out in the case of { \
* DMA transfers. if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
* @param __HANDLE__ specifies the USART Handle. { \
* @retval None, the mask to apply to USART RDR register is stored in (__HANDLE__)->Mask field. (__HANDLE__)->Mask = 0x01FFU; \
*/ } \
#define USART_MASK_COMPUTATION(__HANDLE__) \ else \
do { \ { \
if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_9B) \ (__HANDLE__)->Mask = 0x00FFU; \
{ \ } \
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ } \
{ \ else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \
(__HANDLE__)->Mask = 0x01FF ; \ { \
} \ if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
else \ { \
{ \ (__HANDLE__)->Mask = 0x00FFU; \
(__HANDLE__)->Mask = 0x00FF ; \ } \
} \ else \
} \ { \
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_8B) \ (__HANDLE__)->Mask = 0x007FU; \
{ \ } \
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ } \
{ \ else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \
(__HANDLE__)->Mask = 0x00FF ; \ { \
} \ if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \
else \ { \
{ \ (__HANDLE__)->Mask = 0x007FU; \
(__HANDLE__)->Mask = 0x007F ; \ } \
} \ else \
} \ { \
else if ((__HANDLE__)->Init.WordLength == USART_WORDLENGTH_7B) \ (__HANDLE__)->Mask = 0x003FU; \
{ \ } \
if ((__HANDLE__)->Init.Parity == USART_PARITY_NONE) \ } \
{ \ } while(0U)
(__HANDLE__)->Mask = 0x007F ; \
} \
else \ /**
{ \ * @brief Ensure that USART frame length is valid.
(__HANDLE__)->Mask = 0x003F ; \ * @param __LENGTH__ USART frame length.
} \ * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
} \ */
} while(0) #define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \
((__LENGTH__) == USART_WORDLENGTH_8B) || \
((__LENGTH__) == USART_WORDLENGTH_9B))
/**
* @brief Ensure that USART frame length is valid. #if defined(USART_CR2_SLVEN)
* @param __LENGTH__ USART frame length. /**
* @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid) * @brief Ensure that USART Negative Slave Select (NSS) pin management is valid.
*/ * @param __NSS__ USART Negative Slave Select pin management.
#define IS_USART_WORD_LENGTH(__LENGTH__) (((__LENGTH__) == USART_WORDLENGTH_7B) || \ * @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid)
((__LENGTH__) == USART_WORDLENGTH_8B) || \ */
((__LENGTH__) == USART_WORDLENGTH_9B)) #define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \
#if defined(USART_CR2_SLVEN) ((__NSS__) == USART_NSS_SOFT))
/**
* @brief Ensure that USART Negative Slave Select (NSS) pin management is valid. /**
* @param __NSS__ USART Negative Slave Select pin management. * @brief Ensure that USART Slave Mode is valid.
* @retval SET (__NSS__ is valid) or RESET (__NSS__ is invalid) * @param __STATE__ USART Slave Mode.
*/ * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
#define IS_USART_NSS(__NSS__) (((__NSS__) == USART_NSS_HARD) || \ */
((__NSS__) == USART_NSS_SOFT)) #define IS_USART_SLAVEMODE(__STATE__) (((__STATE__) == USART_SLAVEMODE_DISABLE ) || \
#endif ((__STATE__) == USART_SLAVEMODE_ENABLE))
#endif
#if defined(USART_CR1_FIFOEN)
/** #if defined(USART_CR1_FIFOEN)
* @brief Ensure that USART TXFIFO threshold level is valid. /**
* @param __THRESHOLD__ USART TXFIFO threshold level. * @brief Ensure that USART FIFO mode is valid.
* @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) * @param __STATE__ USART FIFO mode.
*/ * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
#define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \ */
((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \ #define IS_USART_FIFO_MODE_STATE(__STATE__) (((__STATE__) == USART_FIFOMODE_DISABLE ) || \
((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \ ((__STATE__) == USART_FIFOMODE_ENABLE))
((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \
((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \ /**
((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8)) * @brief Ensure that USART TXFIFO threshold level is valid.
* @param __THRESHOLD__ USART TXFIFO threshold level.
/** * @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
* @brief Ensure that USART RXFIFO threshold level is valid. */
* @param __THRESHOLD__ USART RXFIFO threshold level. #define IS_USART_TXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_8) || \
* @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid) ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_4) || \
*/ ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_1_2) || \
#define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \ ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_3_4) || \
((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \ ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_7_8) || \
((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \ ((__THRESHOLD__) == USART_TXFIFO_THRESHOLD_8_8))
((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \
((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \ /**
((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8)) * @brief Ensure that USART RXFIFO threshold level is valid.
#endif * @param __THRESHOLD__ USART RXFIFO threshold level.
* @retval SET (__THRESHOLD__ is valid) or RESET (__THRESHOLD__ is invalid)
/** */
* @} #define IS_USART_RXFIFO_THRESHOLD(__THRESHOLD__) (((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_8) || \
*/ ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_4) || \
((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_1_2) || \
/* Exported functions --------------------------------------------------------*/ ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_3_4) || \
/** @addtogroup USARTEx_Exported_Functions ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_7_8) || \
* @{ ((__THRESHOLD__) == USART_RXFIFO_THRESHOLD_8_8))
*/ #endif
/**
/** @addtogroup USARTEx_Exported_Functions_Group2 * @}
* @{ */
*/
/* Exported functions --------------------------------------------------------*/
/* IO operation functions *****************************************************/ /** @addtogroup USARTEx_Exported_Functions
#if defined(USART_CR1_FIFOEN) * @{
void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart); */
void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart);
#endif /** @addtogroup USARTEx_Exported_Functions_Group2
* @{
/** */
* @}
*/ /* IO operation functions *****************************************************/
#if defined(USART_CR1_FIFOEN)
/** @addtogroup USARTEx_Exported_Functions_Group3 void HAL_USARTEx_RxFifoFullCallback(USART_HandleTypeDef *husart);
* @{ void HAL_USARTEx_TxFifoEmptyCallback(USART_HandleTypeDef *husart);
*/ #endif
/* Peripheral Control functions ***********************************************/ /**
#if defined(USART_CR2_SLVEN) * @}
HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart); */
HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart);
HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig); /** @addtogroup USARTEx_Exported_Functions_Group3
#endif * @{
*/
#if defined(USART_CR1_FIFOEN)
HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart); /* Peripheral Control functions ***********************************************/
HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart); #if defined(USART_CR2_SLVEN)
HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); HAL_StatusTypeDef HAL_USARTEx_EnableSlaveMode(USART_HandleTypeDef *husart);
HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold); HAL_StatusTypeDef HAL_USARTEx_DisableSlaveMode(USART_HandleTypeDef *husart);
#endif HAL_StatusTypeDef HAL_USARTEx_ConfigNSS(USART_HandleTypeDef *husart, uint32_t NSSConfig);
#endif
/** #if defined(USART_CR1_FIFOEN)
* @} HAL_StatusTypeDef HAL_USARTEx_EnableFifoMode(USART_HandleTypeDef *husart);
*/ HAL_StatusTypeDef HAL_USARTEx_DisableFifoMode(USART_HandleTypeDef *husart);
HAL_StatusTypeDef HAL_USARTEx_SetTxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold);
/** HAL_StatusTypeDef HAL_USARTEx_SetRxFifoThreshold(USART_HandleTypeDef *husart, uint32_t Threshold);
* @} #endif
*/
/**
/** * @}
* @} */
*/
/**
/** * @}
* @} */
*/
/**
#ifdef __cplusplus * @}
} */
#endif
/**
#endif /* __STM32L4xx_HAL_USART_EX_H */ * @}
*/
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_USART_EX_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

594
ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_hal_wwdg.h
View file

@ -1,283 +1,311 @@
/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_hal_wwdg.h * @file stm32l4xx_hal_wwdg.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of WWDG HAL module. * @brief Header file of WWDG HAL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_HAL_WWDG_H #ifndef __STM32L4xx_HAL_WWDG_H
#define __STM32L4xx_HAL_WWDG_H #define __STM32L4xx_HAL_WWDG_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx_hal_def.h" #include "stm32l4xx_hal_def.h"
/** @addtogroup STM32L4xx_HAL_Driver /** @addtogroup STM32L4xx_HAL_Driver
* @{ * @{
*/ */
/** @addtogroup WWDG /** @addtogroup WWDG
* @{ * @{
*/ */
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/** @defgroup WWDG_Exported_Types WWDG Exported Types /** @defgroup WWDG_Exported_Types WWDG Exported Types
* @{ * @{
*/ */
/** /**
* @brief WWDG Init structure definition * @brief WWDG Init structure definition
*/ */
typedef struct typedef struct
{ {
uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG. uint32_t Prescaler; /*!< Specifies the prescaler value of the WWDG.
This parameter can be a value of @ref WWDG_Prescaler */ This parameter can be a value of @ref WWDG_Prescaler */
uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter. uint32_t Window; /*!< Specifies the WWDG window value to be compared to the downcounter.
This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */ This parameter must be a number Min_Data = 0x40 and Max_Data = 0x7F */
uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value. uint32_t Counter; /*!< Specifies the WWDG free-running downcounter value.
This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */ This parameter must be a number between Min_Data = 0x40 and Max_Data = 0x7F */
uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interupt is enable or not. uint32_t EWIMode ; /*!< Specifies if WWDG Early Wakeup Interupt is enable or not.
This parameter can be a value of @ref WWDG_EWI_Mode */ This parameter can be a value of @ref WWDG_EWI_Mode */
}WWDG_InitTypeDef; } WWDG_InitTypeDef;
/** /**
* @brief WWDG handle Structure definition * @brief WWDG handle Structure definition
*/ */
typedef struct typedef struct __WWDG_HandleTypeDef
{ {
WWDG_TypeDef *Instance; /*!< Register base address */ WWDG_TypeDef *Instance; /*!< Register base address */
WWDG_InitTypeDef Init; /*!< WWDG required parameters */ WWDG_InitTypeDef Init; /*!< WWDG required parameters */
}WWDG_HandleTypeDef; #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
/** void (* EwiCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Early WakeUp Interrupt callback */
* @}
*/ void (* MspInitCallback)(struct __WWDG_HandleTypeDef *hwwdg); /*!< WWDG Msp Init callback */
#endif
/* Exported constants --------------------------------------------------------*/ } WWDG_HandleTypeDef;
/** @defgroup WWDG_Exported_Constants WWDG Exported Constants #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
* @{ /**
*/ * @brief HAL WWDG common Callback ID enumeration definition
*/
/** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition typedef enum
* @{ {
*/ HAL_WWDG_EWI_CB_ID = 0x00u, /*!< WWDG EWI callback ID */
#define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */ HAL_WWDG_MSPINIT_CB_ID = 0x01u, /*!< WWDG MspInit callback ID */
/** }HAL_WWDG_CallbackIDTypeDef;
* @}
*/ /**
* @brief HAL WWDG Callback pointer definition
/** @defgroup WWDG_Flag_definition WWDG Flag definition */
* @brief WWDG Flag definition typedef void (*pWWDG_CallbackTypeDef)(WWDG_HandleTypeDef * hppp); /*!< pointer to a WWDG common callback functions */
* @{
*/ #endif
#define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */ /**
/** * @}
* @} */
*/
/* Exported constants --------------------------------------------------------*/
/** @defgroup WWDG_Prescaler WWDG Prescaler
* @{ /** @defgroup WWDG_Exported_Constants WWDG Exported Constants
*/ * @{
#define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */ */
#define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
#define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */ /** @defgroup WWDG_Interrupt_definition WWDG Interrupt definition
#define WWDG_PRESCALER_8 WWDG_CFR_WDGTB /*!< WWDG counter clock = (PCLK1/4096)/8 */ * @{
/** */
* @} #define WWDG_IT_EWI WWDG_CFR_EWI /*!< Early wakeup interrupt */
*/ /**
* @}
/** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode */
* @{
*/ /** @defgroup WWDG_Flag_definition WWDG Flag definition
#define WWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */ * @brief WWDG Flag definition
#define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */ * @{
/** */
* @} #define WWDG_FLAG_EWIF WWDG_SR_EWIF /*!< Early wakeup interrupt flag */
*/ /**
* @}
/** */
* @}
*/ /** @defgroup WWDG_Prescaler WWDG Prescaler
* @{
/* Private macros ------------------------------------------------------------*/ */
#define WWDG_PRESCALER_1 0x00000000u /*!< WWDG counter clock = (PCLK1/4096)/1 */
/** @defgroup WWDG_Private_Macros WWDG Private Macros #define WWDG_PRESCALER_2 WWDG_CFR_WDGTB_0 /*!< WWDG counter clock = (PCLK1/4096)/2 */
* @{ #define WWDG_PRESCALER_4 WWDG_CFR_WDGTB_1 /*!< WWDG counter clock = (PCLK1/4096)/4 */
*/ #define WWDG_PRESCALER_8 (WWDG_CFR_WDGTB_1 | WWDG_CFR_WDGTB_0) /*!< WWDG counter clock = (PCLK1/4096)/8 */
#define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \ /**
((__PRESCALER__) == WWDG_PRESCALER_2) || \ * @}
((__PRESCALER__) == WWDG_PRESCALER_4) || \ */
((__PRESCALER__) == WWDG_PRESCALER_8))
/** @defgroup WWDG_EWI_Mode WWDG Early Wakeup Interrupt Mode
#define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W)) * @{
*/
#define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T)) #define WWDG_EWI_DISABLE 0x00000000u /*!< EWI Disable */
#define WWDG_EWI_ENABLE WWDG_CFR_EWI /*!< EWI Enable */
#define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \ /**
((__MODE__) == WWDG_EWI_DISABLE)) * @}
/** */
* @}
*/ /**
* @}
*/
/* Exported macros ------------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/
/** @defgroup WWDG_Exported_Macros WWDG Exported Macros
* @{ /** @defgroup WWDG_Private_Macros WWDG Private Macros
*/ * @{
*/
/** #define IS_WWDG_PRESCALER(__PRESCALER__) (((__PRESCALER__) == WWDG_PRESCALER_1) || \
* @brief Enable the WWDG peripheral. ((__PRESCALER__) == WWDG_PRESCALER_2) || \
* @param __HANDLE__ WWDG handle ((__PRESCALER__) == WWDG_PRESCALER_4) || \
* @retval None ((__PRESCALER__) == WWDG_PRESCALER_8))
*/
#define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA) #define IS_WWDG_WINDOW(__WINDOW__) (((__WINDOW__) >= WWDG_CFR_W_6) && ((__WINDOW__) <= WWDG_CFR_W))
/** #define IS_WWDG_COUNTER(__COUNTER__) (((__COUNTER__) >= WWDG_CR_T_6) && ((__COUNTER__) <= WWDG_CR_T))
* @brief Enable the WWDG early wakeup interrupt.
* @param __HANDLE__: WWDG handle #define IS_WWDG_EWI_MODE(__MODE__) (((__MODE__) == WWDG_EWI_ENABLE) || \
* @param __INTERRUPT__ specifies the interrupt to enable. ((__MODE__) == WWDG_EWI_DISABLE))
* This parameter can be one of the following values: /**
* @arg WWDG_IT_EWI: Early wakeup interrupt * @}
* @note Once enabled this interrupt cannot be disabled except by a system reset. */
* @retval None
*/
#define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__)) /* Exported macros ------------------------------------------------------------*/
/** /** @defgroup WWDG_Exported_Macros WWDG Exported Macros
* @brief Check whether the selected WWDG interrupt has occurred or not. * @{
* @param __HANDLE__ WWDG handle */
* @param __INTERRUPT__ specifies the it to check.
* This parameter can be one of the following values: /**
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT * @brief Enable the WWDG peripheral.
* @retval The new state of WWDG_FLAG (SET or RESET). * @param __HANDLE__ WWDG handle
*/ * @retval None
#define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__)) */
#define __HAL_WWDG_ENABLE(__HANDLE__) SET_BIT((__HANDLE__)->Instance->CR, WWDG_CR_WDGA)
/** @brief Clear the WWDG interrupt pending bits.
* bits to clear the selected interrupt pending bits. /**
* @param __HANDLE__ WWDG handle * @brief Enable the WWDG early wakeup interrupt.
* @param __INTERRUPT__ specifies the interrupt pending bit to clear. * @param __HANDLE__: WWDG handle
* This parameter can be one of the following values: * @param __INTERRUPT__ specifies the interrupt to enable.
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag * This parameter can be one of the following values:
*/ * @arg WWDG_IT_EWI: Early wakeup interrupt
#define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__)) * @note Once enabled this interrupt cannot be disabled except by a system reset.
* @retval None
/** */
* @brief Check whether the specified WWDG flag is set or not. #define __HAL_WWDG_ENABLE_IT(__HANDLE__, __INTERRUPT__) SET_BIT((__HANDLE__)->Instance->CFR, (__INTERRUPT__))
* @param __HANDLE__ WWDG handle
* @param __FLAG__ specifies the flag to check. /**
* This parameter can be one of the following values: * @brief Check whether the selected WWDG interrupt has occurred or not.
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag * @param __HANDLE__ WWDG handle
* @retval The new state of WWDG_FLAG (SET or RESET). * @param __INTERRUPT__ specifies the it to check.
*/ * This parameter can be one of the following values:
#define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__)) * @arg WWDG_FLAG_EWIF: Early wakeup interrupt IT
* @retval The new state of WWDG_FLAG (SET or RESET).
/** */
* @brief Clear the WWDG's pending flags. #define __HAL_WWDG_GET_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_GET_FLAG((__HANDLE__),(__INTERRUPT__))
* @param __HANDLE__ WWDG handle
* @param __FLAG__ specifies the flag to clear. /** @brief Clear the WWDG interrupt pending bits.
* This parameter can be one of the following values: * bits to clear the selected interrupt pending bits.
* @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag * @param __HANDLE__ WWDG handle
* @retval None * @param __INTERRUPT__ specifies the interrupt pending bit to clear.
*/ * This parameter can be one of the following values:
#define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__)) * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
*/
/** @brief Check whether the specified WWDG interrupt source is enabled or not. #define __HAL_WWDG_CLEAR_IT(__HANDLE__, __INTERRUPT__) __HAL_WWDG_CLEAR_FLAG((__HANDLE__), (__INTERRUPT__))
* @param __HANDLE__ WWDG Handle.
* @param __INTERRUPT__ specifies the WWDG interrupt source to check. /**
* This parameter can be one of the following values: * @brief Check whether the specified WWDG flag is set or not.
* @arg WWDG_IT_EWI: Early Wakeup Interrupt * @param __HANDLE__ WWDG handle
* @retval state of __INTERRUPT__ (TRUE or FALSE). * @param __FLAG__ specifies the flag to check.
*/ * This parameter can be one of the following values:
#define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTERRUPT__)) == (__INTERRUPT__)) * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
* @retval The new state of WWDG_FLAG (SET or RESET).
/** */
* @} #define __HAL_WWDG_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR & (__FLAG__)) == (__FLAG__))
*/
/**
/* Exported functions --------------------------------------------------------*/ * @brief Clear the WWDG's pending flags.
* @param __HANDLE__ WWDG handle
/** @addtogroup WWDG_Exported_Functions * @param __FLAG__ specifies the flag to clear.
* @{ * This parameter can be one of the following values:
*/ * @arg WWDG_FLAG_EWIF: Early wakeup interrupt flag
* @retval None
/** @addtogroup WWDG_Exported_Functions_Group1 */
* @{ #define __HAL_WWDG_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->SR = ~(__FLAG__))
*/
/* Initialization/de-initialization functions **********************************/ /** @brief Check whether the specified WWDG interrupt source is enabled or not.
HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg); * @param __HANDLE__ WWDG Handle.
void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg); * @param __INTERRUPT__ specifies the WWDG interrupt source to check.
/** * This parameter can be one of the following values:
* @} * @arg WWDG_IT_EWI: Early Wakeup Interrupt
*/ * @retval state of __INTERRUPT__ (TRUE or FALSE).
*/
/** @addtogroup WWDG_Exported_Functions_Group2 #define __HAL_WWDG_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CFR & (__INTERRUPT__)) == (__INTERRUPT__))
* @{
*/ /**
/* I/O operation functions ******************************************************/ * @}
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg); */
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef* hwwdg); /* Exported functions --------------------------------------------------------*/
/**
* @} /** @addtogroup WWDG_Exported_Functions
*/ * @{
*/
/**
* @} /** @addtogroup WWDG_Exported_Functions_Group1
*/ * @{
*/
/** /* Initialization/de-initialization functions **********************************/
* @} HAL_StatusTypeDef HAL_WWDG_Init(WWDG_HandleTypeDef *hwwdg);
*/ void HAL_WWDG_MspInit(WWDG_HandleTypeDef *hwwdg);
/* Callbacks Register/UnRegister functions ***********************************/
/** #if (USE_HAL_WWDG_REGISTER_CALLBACKS == 1)
* @} HAL_StatusTypeDef HAL_WWDG_RegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID, pWWDG_CallbackTypeDef pCallback);
*/ HAL_StatusTypeDef HAL_WWDG_UnRegisterCallback(WWDG_HandleTypeDef *hwwdg, HAL_WWDG_CallbackIDTypeDef CallbackID);
#endif
#ifdef __cplusplus
} /**
#endif * @}
*/
#endif /* __STM32L4xx_HAL_WWDG_H */
/** @addtogroup WWDG_Exported_Functions_Group2
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ * @{
*/
/* I/O operation functions ******************************************************/
HAL_StatusTypeDef HAL_WWDG_Refresh(WWDG_HandleTypeDef *hwwdg);
void HAL_WWDG_IRQHandler(WWDG_HandleTypeDef *hwwdg);
void HAL_WWDG_EarlyWakeupCallback(WWDG_HandleTypeDef *hwwdg);
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_HAL_WWDG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_ll_crc.h * @file stm32l4xx_ll_crc.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of CRC LL module. * @brief Header file of CRC LL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_LL_CRC_H #ifndef __STM32L4xx_LL_CRC_H
#define __STM32L4xx_LL_CRC_H #define __STM32L4xx_LL_CRC_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h" #include "stm32l4xx.h"
/** @addtogroup STM32L4xx_LL_Driver /** @addtogroup STM32L4xx_LL_Driver
* @{ * @{
*/ */
#if defined(CRC) #if defined(CRC)
/** @defgroup CRC_LL CRC /** @defgroup CRC_LL CRC
* @{ * @{
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup CRC_LL_Exported_Constants CRC Exported Constants /** @defgroup CRC_LL_Exported_Constants CRC Exported Constants
* @{ * @{
*/ */
/** @defgroup CRC_LL_EC_POLYLENGTH Polynomial length /** @defgroup CRC_LL_EC_POLYLENGTH Polynomial length
* @{ * @{
*/ */
#define LL_CRC_POLYLENGTH_32B 0x00000000U /*!< 32 bits Polynomial size */ #define LL_CRC_POLYLENGTH_32B 0x00000000U /*!< 32 bits Polynomial size */
#define LL_CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< 16 bits Polynomial size */ #define LL_CRC_POLYLENGTH_16B CRC_CR_POLYSIZE_0 /*!< 16 bits Polynomial size */
#define LL_CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< 8 bits Polynomial size */ #define LL_CRC_POLYLENGTH_8B CRC_CR_POLYSIZE_1 /*!< 8 bits Polynomial size */
#define LL_CRC_POLYLENGTH_7B (CRC_CR_POLYSIZE_1 | CRC_CR_POLYSIZE_0) /*!< 7 bits Polynomial size */ #define LL_CRC_POLYLENGTH_7B (CRC_CR_POLYSIZE_1 | CRC_CR_POLYSIZE_0) /*!< 7 bits Polynomial size */
/** /**
* @} * @}
*/ */
/** @defgroup CRC_LL_EC_INDATA_REVERSE Input Data Reverse /** @defgroup CRC_LL_EC_INDATA_REVERSE Input Data Reverse
* @{ * @{
*/ */
#define LL_CRC_INDATA_REVERSE_NONE 0x00000000U /*!< Input Data bit order not affected */ #define LL_CRC_INDATA_REVERSE_NONE 0x00000000U /*!< Input Data bit order not affected */
#define LL_CRC_INDATA_REVERSE_BYTE CRC_CR_REV_IN_0 /*!< Input Data bit reversal done by byte */ #define LL_CRC_INDATA_REVERSE_BYTE CRC_CR_REV_IN_0 /*!< Input Data bit reversal done by byte */
#define LL_CRC_INDATA_REVERSE_HALFWORD CRC_CR_REV_IN_1 /*!< Input Data bit reversal done by half-word */ #define LL_CRC_INDATA_REVERSE_HALFWORD CRC_CR_REV_IN_1 /*!< Input Data bit reversal done by half-word */
#define LL_CRC_INDATA_REVERSE_WORD (CRC_CR_REV_IN_1 | CRC_CR_REV_IN_0) /*!< Input Data bit reversal done by word */ #define LL_CRC_INDATA_REVERSE_WORD (CRC_CR_REV_IN_1 | CRC_CR_REV_IN_0) /*!< Input Data bit reversal done by word */
/** /**
* @} * @}
*/ */
/** @defgroup CRC_LL_EC_OUTDATA_REVERSE Output Data Reverse /** @defgroup CRC_LL_EC_OUTDATA_REVERSE Output Data Reverse
* @{ * @{
*/ */
#define LL_CRC_OUTDATA_REVERSE_NONE 0x00000000U /*!< Output Data bit order not affected */ #define LL_CRC_OUTDATA_REVERSE_NONE 0x00000000U /*!< Output Data bit order not affected */
#define LL_CRC_OUTDATA_REVERSE_BIT CRC_CR_REV_OUT /*!< Output Data bit reversal done by bit */ #define LL_CRC_OUTDATA_REVERSE_BIT CRC_CR_REV_OUT /*!< Output Data bit reversal done by bit */
/** /**
* @} * @}
*/ */
/** @defgroup CRC_LL_EC_Default_Polynomial_Value Default CRC generating polynomial value /** @defgroup CRC_LL_EC_Default_Polynomial_Value Default CRC generating polynomial value
* @brief Normal representation of this polynomial value is * @brief Normal representation of this polynomial value is
* X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2 + X + 1 . * X^32 + X^26 + X^23 + X^22 + X^16 + X^12 + X^11 + X^10 +X^8 + X^7 + X^5 + X^4 + X^2 + X + 1 .
* @{ * @{
*/ */
#define LL_CRC_DEFAULT_CRC32_POLY 0x04C11DB7U /*!< Default CRC generating polynomial value */ #define LL_CRC_DEFAULT_CRC32_POLY 0x04C11DB7U /*!< Default CRC generating polynomial value */
/** /**
* @} * @}
*/ */
/** @defgroup CRC_LL_EC_Default_InitValue Default CRC computation initialization value /** @defgroup CRC_LL_EC_Default_InitValue Default CRC computation initialization value
* @{ * @{
*/ */
#define LL_CRC_DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Default CRC computation initialization value */ #define LL_CRC_DEFAULT_CRC_INITVALUE 0xFFFFFFFFU /*!< Default CRC computation initialization value */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup CRC_LL_Exported_Macros CRC Exported Macros /** @defgroup CRC_LL_Exported_Macros CRC Exported Macros
* @{ * @{
*/ */
/** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros /** @defgroup CRC_LL_EM_WRITE_READ Common Write and read registers Macros
* @{ * @{
*/ */
/** /**
* @brief Write a value in CRC register * @brief Write a value in CRC register
* @param __INSTANCE__ CRC Instance * @param __INSTANCE__ CRC Instance
* @param __REG__ Register to be written * @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register * @param __VALUE__ Value to be written in the register
* @retval None * @retval None
*/ */
#define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) #define LL_CRC_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, __VALUE__)
/** /**
* @brief Read a value in CRC register * @brief Read a value in CRC register
* @param __INSTANCE__ CRC Instance * @param __INSTANCE__ CRC Instance
* @param __REG__ Register to be read * @param __REG__ Register to be read
* @retval Register value * @retval Register value
*/ */
#define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) #define LL_CRC_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup CRC_LL_Exported_Functions CRC Exported Functions /** @defgroup CRC_LL_Exported_Functions CRC Exported Functions
* @{ * @{
*/ */
/** @defgroup CRC_LL_EF_Configuration CRC Configuration functions /** @defgroup CRC_LL_EF_Configuration CRC Configuration functions
* @{ * @{
*/ */
/** /**
* @brief Reset the CRC calculation unit. * @brief Reset the CRC calculation unit.
* @note If Programmable Initial CRC value feature * @note If Programmable Initial CRC value feature
* is available, also set the Data Register to the value stored in the * is available, also set the Data Register to the value stored in the
* CRC_INIT register, otherwise, reset Data Register to its default value. * CRC_INIT register, otherwise, reset Data Register to its default value.
* @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit * @rmtoll CR RESET LL_CRC_ResetCRCCalculationUnit
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx) __STATIC_INLINE void LL_CRC_ResetCRCCalculationUnit(CRC_TypeDef *CRCx)
{ {
SET_BIT(CRCx->CR, CRC_CR_RESET); SET_BIT(CRCx->CR, CRC_CR_RESET);
} }
/** /**
* @brief Configure size of the polynomial. * @brief Configure size of the polynomial.
* @rmtoll CR POLYSIZE LL_CRC_SetPolynomialSize * @rmtoll CR POLYSIZE LL_CRC_SetPolynomialSize
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param PolySize This parameter can be one of the following values: * @param PolySize This parameter can be one of the following values:
* @arg @ref LL_CRC_POLYLENGTH_32B * @arg @ref LL_CRC_POLYLENGTH_32B
* @arg @ref LL_CRC_POLYLENGTH_16B * @arg @ref LL_CRC_POLYLENGTH_16B
* @arg @ref LL_CRC_POLYLENGTH_8B * @arg @ref LL_CRC_POLYLENGTH_8B
* @arg @ref LL_CRC_POLYLENGTH_7B * @arg @ref LL_CRC_POLYLENGTH_7B
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySize) __STATIC_INLINE void LL_CRC_SetPolynomialSize(CRC_TypeDef *CRCx, uint32_t PolySize)
{ {
MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize); MODIFY_REG(CRCx->CR, CRC_CR_POLYSIZE, PolySize);
} }
/** /**
* @brief Return size of the polynomial. * @brief Return size of the polynomial.
* @rmtoll CR POLYSIZE LL_CRC_GetPolynomialSize * @rmtoll CR POLYSIZE LL_CRC_GetPolynomialSize
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @retval Returned value can be one of the following values: * @retval Returned value can be one of the following values:
* @arg @ref LL_CRC_POLYLENGTH_32B * @arg @ref LL_CRC_POLYLENGTH_32B
* @arg @ref LL_CRC_POLYLENGTH_16B * @arg @ref LL_CRC_POLYLENGTH_16B
* @arg @ref LL_CRC_POLYLENGTH_8B * @arg @ref LL_CRC_POLYLENGTH_8B
* @arg @ref LL_CRC_POLYLENGTH_7B * @arg @ref LL_CRC_POLYLENGTH_7B
*/ */
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx) __STATIC_INLINE uint32_t LL_CRC_GetPolynomialSize(CRC_TypeDef *CRCx)
{ {
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE)); return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_POLYSIZE));
} }
/** /**
* @brief Configure the reversal of the bit order of the input data * @brief Configure the reversal of the bit order of the input data
* @rmtoll CR REV_IN LL_CRC_SetInputDataReverseMode * @rmtoll CR REV_IN LL_CRC_SetInputDataReverseMode
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param ReverseMode This parameter can be one of the following values: * @param ReverseMode This parameter can be one of the following values:
* @arg @ref LL_CRC_INDATA_REVERSE_NONE * @arg @ref LL_CRC_INDATA_REVERSE_NONE
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE * @arg @ref LL_CRC_INDATA_REVERSE_BYTE
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD * @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
* @arg @ref LL_CRC_INDATA_REVERSE_WORD * @arg @ref LL_CRC_INDATA_REVERSE_WORD
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode) __STATIC_INLINE void LL_CRC_SetInputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
{ {
MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode); MODIFY_REG(CRCx->CR, CRC_CR_REV_IN, ReverseMode);
} }
/** /**
* @brief Return type of reversal for input data bit order * @brief Return type of reversal for input data bit order
* @rmtoll CR REV_IN LL_CRC_GetInputDataReverseMode * @rmtoll CR REV_IN LL_CRC_GetInputDataReverseMode
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @retval Returned value can be one of the following values: * @retval Returned value can be one of the following values:
* @arg @ref LL_CRC_INDATA_REVERSE_NONE * @arg @ref LL_CRC_INDATA_REVERSE_NONE
* @arg @ref LL_CRC_INDATA_REVERSE_BYTE * @arg @ref LL_CRC_INDATA_REVERSE_BYTE
* @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD * @arg @ref LL_CRC_INDATA_REVERSE_HALFWORD
* @arg @ref LL_CRC_INDATA_REVERSE_WORD * @arg @ref LL_CRC_INDATA_REVERSE_WORD
*/ */
__STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx) __STATIC_INLINE uint32_t LL_CRC_GetInputDataReverseMode(CRC_TypeDef *CRCx)
{ {
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN)); return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_IN));
} }
/** /**
* @brief Configure the reversal of the bit order of the Output data * @brief Configure the reversal of the bit order of the Output data
* @rmtoll CR REV_OUT LL_CRC_SetOutputDataReverseMode * @rmtoll CR REV_OUT LL_CRC_SetOutputDataReverseMode
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param ReverseMode This parameter can be one of the following values: * @param ReverseMode This parameter can be one of the following values:
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE * @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT * @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode) __STATIC_INLINE void LL_CRC_SetOutputDataReverseMode(CRC_TypeDef *CRCx, uint32_t ReverseMode)
{ {
MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode); MODIFY_REG(CRCx->CR, CRC_CR_REV_OUT, ReverseMode);
} }
/** /**
* @brief Configure the reversal of the bit order of the Output data * @brief Configure the reversal of the bit order of the Output data
* @rmtoll CR REV_OUT LL_CRC_GetOutputDataReverseMode * @rmtoll CR REV_OUT LL_CRC_GetOutputDataReverseMode
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @retval Returned value can be one of the following values: * @retval Returned value can be one of the following values:
* @arg @ref LL_CRC_OUTDATA_REVERSE_NONE * @arg @ref LL_CRC_OUTDATA_REVERSE_NONE
* @arg @ref LL_CRC_OUTDATA_REVERSE_BIT * @arg @ref LL_CRC_OUTDATA_REVERSE_BIT
*/ */
__STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx) __STATIC_INLINE uint32_t LL_CRC_GetOutputDataReverseMode(CRC_TypeDef *CRCx)
{ {
return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT)); return (uint32_t)(READ_BIT(CRCx->CR, CRC_CR_REV_OUT));
} }
/** /**
* @brief Initialize the Programmable initial CRC value. * @brief Initialize the Programmable initial CRC value.
* @note If the CRC size is less than 32 bits, the least significant bits * @note If the CRC size is less than 32 bits, the least significant bits
* are used to write the correct value * are used to write the correct value
* @note LL_CRC_DEFAULT_CRC_INITVALUE could be used as value for InitCrc parameter. * @note LL_CRC_DEFAULT_CRC_INITVALUE could be used as value for InitCrc parameter.
* @rmtoll INIT INIT LL_CRC_SetInitialData * @rmtoll INIT INIT LL_CRC_SetInitialData
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param InitCrc Value to be programmed in Programmable initial CRC value register * @param InitCrc Value to be programmed in Programmable initial CRC value register
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc) __STATIC_INLINE void LL_CRC_SetInitialData(CRC_TypeDef *CRCx, uint32_t InitCrc)
{ {
WRITE_REG(CRCx->INIT, InitCrc); WRITE_REG(CRCx->INIT, InitCrc);
} }
/** /**
* @brief Return current Initial CRC value. * @brief Return current Initial CRC value.
* @note If the CRC size is less than 32 bits, the least significant bits * @note If the CRC size is less than 32 bits, the least significant bits
* are used to read the correct value * are used to read the correct value
* @rmtoll INIT INIT LL_CRC_GetInitialData * @rmtoll INIT INIT LL_CRC_GetInitialData
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @retval Value programmed in Programmable initial CRC value register * @retval Value programmed in Programmable initial CRC value register
*/ */
__STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx) __STATIC_INLINE uint32_t LL_CRC_GetInitialData(CRC_TypeDef *CRCx)
{ {
return (uint32_t)(READ_REG(CRCx->INIT)); return (uint32_t)(READ_REG(CRCx->INIT));
} }
/** /**
* @brief Initialize the Programmable polynomial value * @brief Initialize the Programmable polynomial value
* (coefficients of the polynomial to be used for CRC calculation). * (coefficients of the polynomial to be used for CRC calculation).
* @note LL_CRC_DEFAULT_CRC32_POLY could be used as value for PolynomCoef parameter. * @note LL_CRC_DEFAULT_CRC32_POLY could be used as value for PolynomCoef parameter.
* @note Please check Reference Manual and existing Errata Sheets, * @note Please check Reference Manual and existing Errata Sheets,
* regarding possible limitations for Polynomial values usage. * regarding possible limitations for Polynomial values usage.
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 * For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
* @rmtoll POL POL LL_CRC_SetPolynomialCoef * @rmtoll POL POL LL_CRC_SetPolynomialCoef
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param PolynomCoef Value to be programmed in Programmable Polynomial value register * @param PolynomCoef Value to be programmed in Programmable Polynomial value register
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t PolynomCoef) __STATIC_INLINE void LL_CRC_SetPolynomialCoef(CRC_TypeDef *CRCx, uint32_t PolynomCoef)
{ {
WRITE_REG(CRCx->POL, PolynomCoef); WRITE_REG(CRCx->POL, PolynomCoef);
} }
/** /**
* @brief Return current Programmable polynomial value * @brief Return current Programmable polynomial value
* @note Please check Reference Manual and existing Errata Sheets, * @note Please check Reference Manual and existing Errata Sheets,
* regarding possible limitations for Polynomial values usage. * regarding possible limitations for Polynomial values usage.
* For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65 * For example, for a polynomial of degree 7, X^7 + X^6 + X^5 + X^2 + 1 is written 0x65
* @rmtoll POL POL LL_CRC_GetPolynomialCoef * @rmtoll POL POL LL_CRC_GetPolynomialCoef
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @retval Value programmed in Programmable Polynomial value register * @retval Value programmed in Programmable Polynomial value register
*/ */
__STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx) __STATIC_INLINE uint32_t LL_CRC_GetPolynomialCoef(CRC_TypeDef *CRCx)
{ {
return (uint32_t)(READ_REG(CRCx->POL)); return (uint32_t)(READ_REG(CRCx->POL));
} }
/** /**
* @} * @}
*/ */
/** @defgroup CRC_LL_EF_Data_Management Data_Management /** @defgroup CRC_LL_EF_Data_Management Data_Management
* @{ * @{
*/ */
/** /**
* @brief Write given 32-bit data to the CRC calculator * @brief Write given 32-bit data to the CRC calculator
* @rmtoll DR DR LL_CRC_FeedData32 * @rmtoll DR DR LL_CRC_FeedData32
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF * @param InData value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFFFFFF
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData) __STATIC_INLINE void LL_CRC_FeedData32(CRC_TypeDef *CRCx, uint32_t InData)
{ {
WRITE_REG(CRCx->DR, InData); WRITE_REG(CRCx->DR, InData);
} }
/** /**
* @brief Write given 16-bit data to the CRC calculator * @brief Write given 16-bit data to the CRC calculator
* @rmtoll DR DR LL_CRC_FeedData16 * @rmtoll DR DR LL_CRC_FeedData16
* @param CRCx CRC Instance * @param CRCx CRC Instance
* @param InData 16 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFF * @param InData 16 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFFFF
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData) __STATIC_INLINE void LL_CRC_FeedData16(CRC_TypeDef *CRCx, uint16_t InData)
{ {
*(uint16_t __IO *)(&CRCx->DR) = (uint16_t) InData; __IO uint16_t *pReg;
}
pReg = (__IO uint16_t *)(__IO void *)(&CRCx->DR);
/** *pReg = InData;
* @brief Write given 8-bit data to the CRC calculator }
* @rmtoll DR DR LL_CRC_FeedData8
* @param CRCx CRC Instance /**
* @param InData 8 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFF * @brief Write given 8-bit data to the CRC calculator
* @retval None * @rmtoll DR DR LL_CRC_FeedData8
*/ * @param CRCx CRC Instance
__STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData) * @param InData 8 bit value to be provided to CRC calculator between between Min_Data=0 and Max_Data=0xFF
{ * @retval None
*(uint8_t __IO *)(&CRCx->DR) = (uint8_t) InData; */
} __STATIC_INLINE void LL_CRC_FeedData8(CRC_TypeDef *CRCx, uint8_t InData)
{
/** *(uint8_t __IO *)(&CRCx->DR) = (uint8_t) InData;
* @brief Return current CRC calculation result. 32 bits value is returned. }
* @rmtoll DR DR LL_CRC_ReadData32
* @param CRCx CRC Instance /**
* @retval Current CRC calculation result as stored in CRC_DR register (32 bits). * @brief Return current CRC calculation result. 32 bits value is returned.
*/ * @rmtoll DR DR LL_CRC_ReadData32
__STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx) * @param CRCx CRC Instance
{ * @retval Current CRC calculation result as stored in CRC_DR register (32 bits).
return (uint32_t)(READ_REG(CRCx->DR)); */
} __STATIC_INLINE uint32_t LL_CRC_ReadData32(CRC_TypeDef *CRCx)
{
/** return (uint32_t)(READ_REG(CRCx->DR));
* @brief Return current CRC calculation result. 16 bits value is returned. }
* @note This function is expected to be used in a 16 bits CRC polynomial size context.
* @rmtoll DR DR LL_CRC_ReadData16 /**
* @param CRCx CRC Instance * @brief Return current CRC calculation result. 16 bits value is returned.
* @retval Current CRC calculation result as stored in CRC_DR register (16 bits). * @note This function is expected to be used in a 16 bits CRC polynomial size context.
*/ * @rmtoll DR DR LL_CRC_ReadData16
__STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx) * @param CRCx CRC Instance
{ * @retval Current CRC calculation result as stored in CRC_DR register (16 bits).
return (uint16_t)READ_REG(CRCx->DR); */
} __STATIC_INLINE uint16_t LL_CRC_ReadData16(CRC_TypeDef *CRCx)
{
/** return (uint16_t)READ_REG(CRCx->DR);
* @brief Return current CRC calculation result. 8 bits value is returned. }
* @note This function is expected to be used in a 8 bits CRC polynomial size context.
* @rmtoll DR DR LL_CRC_ReadData8 /**
* @param CRCx CRC Instance * @brief Return current CRC calculation result. 8 bits value is returned.
* @retval Current CRC calculation result as stored in CRC_DR register (8 bits). * @note This function is expected to be used in a 8 bits CRC polynomial size context.
*/ * @rmtoll DR DR LL_CRC_ReadData8
__STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx) * @param CRCx CRC Instance
{ * @retval Current CRC calculation result as stored in CRC_DR register (8 bits).
return (uint8_t)READ_REG(CRCx->DR); */
} __STATIC_INLINE uint8_t LL_CRC_ReadData8(CRC_TypeDef *CRCx)
{
/** return (uint8_t)READ_REG(CRCx->DR);
* @brief Return current CRC calculation result. 7 bits value is returned. }
* @note This function is expected to be used in a 7 bits CRC polynomial size context.
* @rmtoll DR DR LL_CRC_ReadData7 /**
* @param CRCx CRC Instance * @brief Return current CRC calculation result. 7 bits value is returned.
* @retval Current CRC calculation result as stored in CRC_DR register (7 bits). * @note This function is expected to be used in a 7 bits CRC polynomial size context.
*/ * @rmtoll DR DR LL_CRC_ReadData7
__STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx) * @param CRCx CRC Instance
{ * @retval Current CRC calculation result as stored in CRC_DR register (7 bits).
return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU); */
} __STATIC_INLINE uint8_t LL_CRC_ReadData7(CRC_TypeDef *CRCx)
{
/** return (uint8_t)(READ_REG(CRCx->DR) & 0x7FU);
* @brief Return data stored in the Independent Data(IDR) register. }
* @note This register can be used as a temporary storage location for one byte.
* @rmtoll IDR IDR LL_CRC_Read_IDR /**
* @param CRCx CRC Instance * @brief Return data stored in the Independent Data(IDR) register.
* @retval Value stored in CRC_IDR register (General-purpose 8-bit data register). * @note This register can be used as a temporary storage location.
*/ * @note Refer to the Reference Manual to get the authorized data length in bits.
__STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx) * @rmtoll IDR IDR LL_CRC_Read_IDR
{ * @param CRCx CRC Instance
return (uint32_t)(READ_REG(CRCx->IDR)); * @retval Value stored in CRC_IDR register
} */
__STATIC_INLINE uint32_t LL_CRC_Read_IDR(CRC_TypeDef *CRCx)
/** {
* @brief Store data in the Independent Data(IDR) register. return (uint32_t)(READ_REG(CRCx->IDR));
* @note This register can be used as a temporary storage location for one byte. }
* @rmtoll IDR IDR LL_CRC_Write_IDR
* @param CRCx CRC Instance /**
* @param InData value to be stored in CRC_IDR register (8-bit) between between Min_Data=0 and Max_Data=0xFF * @brief Store data in the Independent Data(IDR) register.
* @retval None * @note This register can be used as a temporary storage location.
*/ * @note Refer to the Reference Manual to get the authorized data length in bits.
__STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData) * @rmtoll IDR IDR LL_CRC_Write_IDR
{ * @param CRCx CRC Instance
*((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData; * @param InData value to be stored in CRC_IDR register
} * @retval None
/** */
* @} __STATIC_INLINE void LL_CRC_Write_IDR(CRC_TypeDef *CRCx, uint32_t InData)
*/ {
#if (CRC_IDR_IDR == 0x0FFU)
#if defined(USE_FULL_LL_DRIVER) *((uint8_t __IO *)(&CRCx->IDR)) = (uint8_t) InData;
/** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions #else
* @{ WRITE_REG(CRCx->IDR, InData);
*/ #endif
}
ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx); /**
* @}
/** */
* @}
*/ #if defined(USE_FULL_LL_DRIVER)
#endif /* USE_FULL_LL_DRIVER */ /** @defgroup CRC_LL_EF_Init Initialization and de-initialization functions
* @{
/** */
* @}
*/ ErrorStatus LL_CRC_DeInit(CRC_TypeDef *CRCx);
/** /**
* @} * @}
*/ */
#endif /* USE_FULL_LL_DRIVER */
#endif /* defined(CRC) */
/**
/** * @}
* @} */
*/
/**
#ifdef __cplusplus * @}
} */
#endif
#endif /* defined(CRC) */
#endif /* __STM32L4xx_LL_CRC_H */
/**
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ * @}
*/
#ifdef __cplusplus
}
#endif
#endif /* __STM32L4xx_LL_CRC_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_ll_iwdg.h * @file stm32l4xx_ll_iwdg.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of IWDG LL module. * @brief Header file of IWDG LL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_LL_IWDG_H #ifndef __STM32L4xx_LL_IWDG_H
#define __STM32L4xx_LL_IWDG_H #define __STM32L4xx_LL_IWDG_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h" #include "stm32l4xx.h"
/** @addtogroup STM32L4xx_LL_Driver /** @addtogroup STM32L4xx_LL_Driver
* @{ * @{
*/ */
#if defined(IWDG) #if defined(IWDG)
/** @defgroup IWDG_LL IWDG /** @defgroup IWDG_LL IWDG
* @{ * @{
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/** @defgroup IWDG_LL_Private_Constants IWDG Private Constants /** @defgroup IWDG_LL_Private_Constants IWDG Private Constants
* @{ * @{
*/ */
#define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */ #define LL_IWDG_KEY_RELOAD 0x0000AAAAU /*!< IWDG Reload Counter Enable */
#define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */ #define LL_IWDG_KEY_ENABLE 0x0000CCCCU /*!< IWDG Peripheral Enable */
#define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */ #define LL_IWDG_KEY_WR_ACCESS_ENABLE 0x00005555U /*!< IWDG KR Write Access Enable */
#define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */ #define LL_IWDG_KEY_WR_ACCESS_DISABLE 0x00000000U /*!< IWDG KR Write Access Disable */
/** /**
* @} * @}
*/ */
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants /** @defgroup IWDG_LL_Exported_Constants IWDG Exported Constants
* @{ * @{
*/ */
/** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines /** @defgroup IWDG_LL_EC_GET_FLAG Get Flags Defines
* @brief Flags defines which can be used with LL_IWDG_ReadReg function * @brief Flags defines which can be used with LL_IWDG_ReadReg function
* @{ * @{
*/ */
#define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */ #define LL_IWDG_SR_PVU IWDG_SR_PVU /*!< Watchdog prescaler value update */
#define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */ #define LL_IWDG_SR_RVU IWDG_SR_RVU /*!< Watchdog counter reload value update */
#define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */ #define LL_IWDG_SR_WVU IWDG_SR_WVU /*!< Watchdog counter window value update */
/** /**
* @} * @}
*/ */
/** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider /** @defgroup IWDG_LL_EC_PRESCALER Prescaler Divider
* @{ * @{
*/ */
#define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */ #define LL_IWDG_PRESCALER_4 0x00000000U /*!< Divider by 4 */
#define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */ #define LL_IWDG_PRESCALER_8 (IWDG_PR_PR_0) /*!< Divider by 8 */
#define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */ #define LL_IWDG_PRESCALER_16 (IWDG_PR_PR_1) /*!< Divider by 16 */
#define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */ #define LL_IWDG_PRESCALER_32 (IWDG_PR_PR_1 | IWDG_PR_PR_0) /*!< Divider by 32 */
#define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */ #define LL_IWDG_PRESCALER_64 (IWDG_PR_PR_2) /*!< Divider by 64 */
#define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */ #define LL_IWDG_PRESCALER_128 (IWDG_PR_PR_2 | IWDG_PR_PR_0) /*!< Divider by 128 */
#define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */ #define LL_IWDG_PRESCALER_256 (IWDG_PR_PR_2 | IWDG_PR_PR_1) /*!< Divider by 256 */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros /** @defgroup IWDG_LL_Exported_Macros IWDG Exported Macros
* @{ * @{
*/ */
/** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros /** @defgroup IWDG_LL_EM_WRITE_READ Common Write and read registers Macros
* @{ * @{
*/ */
/** /**
* @brief Write a value in IWDG register * @brief Write a value in IWDG register
* @param __INSTANCE__ IWDG Instance * @param __INSTANCE__ IWDG Instance
* @param __REG__ Register to be written * @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register * @param __VALUE__ Value to be written in the register
* @retval None * @retval None
*/ */
#define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) #define LL_IWDG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/** /**
* @brief Read a value in IWDG register * @brief Read a value in IWDG register
* @param __INSTANCE__ IWDG Instance * @param __INSTANCE__ IWDG Instance
* @param __REG__ Register to be read * @param __REG__ Register to be read
* @retval Register value * @retval Register value
*/ */
#define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) #define LL_IWDG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions /** @defgroup IWDG_LL_Exported_Functions IWDG Exported Functions
* @{ * @{
*/ */
/** @defgroup IWDG_LL_EF_Configuration Configuration /** @defgroup IWDG_LL_EF_Configuration Configuration
* @{ * @{
*/ */
/** /**
* @brief Start the Independent Watchdog * @brief Start the Independent Watchdog
* @note Except if the hardware watchdog option is selected * @note Except if the hardware watchdog option is selected
* @rmtoll KR KEY LL_IWDG_Enable * @rmtoll KR KEY LL_IWDG_Enable
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx) __STATIC_INLINE void LL_IWDG_Enable(IWDG_TypeDef *IWDGx)
{ {
WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE); WRITE_REG(IWDG->KR, LL_IWDG_KEY_ENABLE);
} }
/** /**
* @brief Reloads IWDG counter with value defined in the reload register * @brief Reloads IWDG counter with value defined in the reload register
* @rmtoll KR KEY LL_IWDG_ReloadCounter * @rmtoll KR KEY LL_IWDG_ReloadCounter
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx) __STATIC_INLINE void LL_IWDG_ReloadCounter(IWDG_TypeDef *IWDGx)
{ {
WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD); WRITE_REG(IWDG->KR, LL_IWDG_KEY_RELOAD);
} }
/** /**
* @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers * @brief Enable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
* @rmtoll KR KEY LL_IWDG_EnableWriteAccess * @rmtoll KR KEY LL_IWDG_EnableWriteAccess
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx) __STATIC_INLINE void LL_IWDG_EnableWriteAccess(IWDG_TypeDef *IWDGx)
{ {
WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE); WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_ENABLE);
} }
/** /**
* @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers * @brief Disable write access to IWDG_PR, IWDG_RLR and IWDG_WINR registers
* @rmtoll KR KEY LL_IWDG_DisableWriteAccess * @rmtoll KR KEY LL_IWDG_DisableWriteAccess
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx) __STATIC_INLINE void LL_IWDG_DisableWriteAccess(IWDG_TypeDef *IWDGx)
{ {
WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE); WRITE_REG(IWDG->KR, LL_IWDG_KEY_WR_ACCESS_DISABLE);
} }
/** /**
* @brief Select the prescaler of the IWDG * @brief Select the prescaler of the IWDG
* @rmtoll PR PR LL_IWDG_SetPrescaler * @rmtoll PR PR LL_IWDG_SetPrescaler
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @param Prescaler This parameter can be one of the following values: * @param Prescaler This parameter can be one of the following values:
* @arg @ref LL_IWDG_PRESCALER_4 * @arg @ref LL_IWDG_PRESCALER_4
* @arg @ref LL_IWDG_PRESCALER_8 * @arg @ref LL_IWDG_PRESCALER_8
* @arg @ref LL_IWDG_PRESCALER_16 * @arg @ref LL_IWDG_PRESCALER_16
* @arg @ref LL_IWDG_PRESCALER_32 * @arg @ref LL_IWDG_PRESCALER_32
* @arg @ref LL_IWDG_PRESCALER_64 * @arg @ref LL_IWDG_PRESCALER_64
* @arg @ref LL_IWDG_PRESCALER_128 * @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256 * @arg @ref LL_IWDG_PRESCALER_256
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler) __STATIC_INLINE void LL_IWDG_SetPrescaler(IWDG_TypeDef *IWDGx, uint32_t Prescaler)
{ {
WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler); WRITE_REG(IWDGx->PR, IWDG_PR_PR & Prescaler);
} }
/** /**
* @brief Get the selected prescaler of the IWDG * @brief Get the selected prescaler of the IWDG
* @rmtoll PR PR LL_IWDG_GetPrescaler * @rmtoll PR PR LL_IWDG_GetPrescaler
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval Returned value can be one of the following values: * @retval Returned value can be one of the following values:
* @arg @ref LL_IWDG_PRESCALER_4 * @arg @ref LL_IWDG_PRESCALER_4
* @arg @ref LL_IWDG_PRESCALER_8 * @arg @ref LL_IWDG_PRESCALER_8
* @arg @ref LL_IWDG_PRESCALER_16 * @arg @ref LL_IWDG_PRESCALER_16
* @arg @ref LL_IWDG_PRESCALER_32 * @arg @ref LL_IWDG_PRESCALER_32
* @arg @ref LL_IWDG_PRESCALER_64 * @arg @ref LL_IWDG_PRESCALER_64
* @arg @ref LL_IWDG_PRESCALER_128 * @arg @ref LL_IWDG_PRESCALER_128
* @arg @ref LL_IWDG_PRESCALER_256 * @arg @ref LL_IWDG_PRESCALER_256
*/ */
__STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_GetPrescaler(IWDG_TypeDef *IWDGx)
{ {
return (uint32_t)(READ_REG(IWDGx->PR)); return (uint32_t)(READ_REG(IWDGx->PR));
} }
/** /**
* @brief Specify the IWDG down-counter reload value * @brief Specify the IWDG down-counter reload value
* @rmtoll RLR RL LL_IWDG_SetReloadCounter * @rmtoll RLR RL LL_IWDG_SetReloadCounter
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @param Counter Value between Min_Data=0 and Max_Data=0x0FFF * @param Counter Value between Min_Data=0 and Max_Data=0x0FFF
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter) __STATIC_INLINE void LL_IWDG_SetReloadCounter(IWDG_TypeDef *IWDGx, uint32_t Counter)
{ {
WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter); WRITE_REG(IWDGx->RLR, IWDG_RLR_RL & Counter);
} }
/** /**
* @brief Get the specified IWDG down-counter reload value * @brief Get the specified IWDG down-counter reload value
* @rmtoll RLR RL LL_IWDG_GetReloadCounter * @rmtoll RLR RL LL_IWDG_GetReloadCounter
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF * @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/ */
__STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_GetReloadCounter(IWDG_TypeDef *IWDGx)
{ {
return (uint32_t)(READ_REG(IWDGx->RLR)); return (uint32_t)(READ_REG(IWDGx->RLR));
} }
/** /**
* @brief Specify high limit of the window value to be compared to the down-counter. * @brief Specify high limit of the window value to be compared to the down-counter.
* @rmtoll WINR WIN LL_IWDG_SetWindow * @rmtoll WINR WIN LL_IWDG_SetWindow
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @param Window Value between Min_Data=0 and Max_Data=0x0FFF * @param Window Value between Min_Data=0 and Max_Data=0x0FFF
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window) __STATIC_INLINE void LL_IWDG_SetWindow(IWDG_TypeDef *IWDGx, uint32_t Window)
{ {
WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window); WRITE_REG(IWDGx->WINR, IWDG_WINR_WIN & Window);
} }
/** /**
* @brief Get the high limit of the window value specified. * @brief Get the high limit of the window value specified.
* @rmtoll WINR WIN LL_IWDG_GetWindow * @rmtoll WINR WIN LL_IWDG_GetWindow
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval Value between Min_Data=0 and Max_Data=0x0FFF * @retval Value between Min_Data=0 and Max_Data=0x0FFF
*/ */
__STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_GetWindow(IWDG_TypeDef *IWDGx)
{ {
return (uint32_t)(READ_REG(IWDGx->WINR)); return (uint32_t)(READ_REG(IWDGx->WINR));
} }
/** /**
* @} * @}
*/ */
/** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management /** @defgroup IWDG_LL_EF_FLAG_Management FLAG_Management
* @{ * @{
*/ */
/** /**
* @brief Check if flag Prescaler Value Update is set or not * @brief Check if flag Prescaler Value Update is set or not
* @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU * @rmtoll SR PVU LL_IWDG_IsActiveFlag_PVU
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_PVU(IWDG_TypeDef *IWDGx)
{ {
return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU)); return (READ_BIT(IWDGx->SR, IWDG_SR_PVU) == (IWDG_SR_PVU));
} }
/** /**
* @brief Check if flag Reload Value Update is set or not * @brief Check if flag Reload Value Update is set or not
* @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU * @rmtoll SR RVU LL_IWDG_IsActiveFlag_RVU
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_RVU(IWDG_TypeDef *IWDGx)
{ {
return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU)); return (READ_BIT(IWDGx->SR, IWDG_SR_RVU) == (IWDG_SR_RVU));
} }
/** /**
* @brief Check if flag Window Value Update is set or not * @brief Check if flag Window Value Update is set or not
* @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU * @rmtoll SR WVU LL_IWDG_IsActiveFlag_WVU
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_IsActiveFlag_WVU(IWDG_TypeDef *IWDGx)
{ {
return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU)); return (READ_BIT(IWDGx->SR, IWDG_SR_WVU) == (IWDG_SR_WVU));
} }
/** /**
* @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not * @brief Check if all flags Prescaler, Reload & Window Value Update are reset or not
* @rmtoll SR PVU LL_IWDG_IsReady\n * @rmtoll SR PVU LL_IWDG_IsReady\n
* SR WVU LL_IWDG_IsReady\n * SR WVU LL_IWDG_IsReady\n
* SR RVU LL_IWDG_IsReady * SR RVU LL_IWDG_IsReady
* @param IWDGx IWDG Instance * @param IWDGx IWDG Instance
* @retval State of bits (1 or 0). * @retval State of bits (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx) __STATIC_INLINE uint32_t LL_IWDG_IsReady(IWDG_TypeDef *IWDGx)
{ {
return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U); return (READ_BIT(IWDGx->SR, IWDG_SR_PVU | IWDG_SR_RVU | IWDG_SR_WVU) == 0U);
} }
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* IWDG) */ #endif /* IWDG) */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_LL_IWDG_H */ #endif /* __STM32L4xx_LL_IWDG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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/** /**
****************************************************************************** ******************************************************************************
* @file stm32l4xx_ll_rng.h * @file stm32l4xx_ll_rng.h
* @author MCD Application Team * @author MCD Application Team
* @brief Header file of RNG LL module. * @brief Header file of RNG LL module.
****************************************************************************** ******************************************************************************
* @attention * @attention
* *
* <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2> * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
* *
* Redistribution and use in source and binary forms, with or without modification, * Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met: * are permitted provided that the following conditions are met:
* 1. Redistributions of source code must retain the above copyright notice, * 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer. * this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice, * 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation * this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution. * and/or other materials provided with the distribution.
* 3. Neither the name of STMicroelectronics nor the names of its contributors * 3. Neither the name of STMicroelectronics nor the names of its contributors
* may be used to endorse or promote products derived from this software * may be used to endorse or promote products derived from this software
* without specific prior written permission. * without specific prior written permission.
* *
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
* *
****************************************************************************** ******************************************************************************
*/ */
/* Define to prevent recursive inclusion -------------------------------------*/ /* Define to prevent recursive inclusion -------------------------------------*/
#ifndef __STM32L4xx_LL_RNG_H #ifndef __STM32L4xx_LL_RNG_H
#define __STM32L4xx_LL_RNG_H #define __STM32L4xx_LL_RNG_H
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
/* Includes ------------------------------------------------------------------*/ /* Includes ------------------------------------------------------------------*/
#include "stm32l4xx.h" #include "stm32l4xx.h"
/** @addtogroup STM32L4xx_LL_Driver /** @addtogroup STM32L4xx_LL_Driver
* @{ * @{
*/ */
#if defined(RNG) #if defined(RNG)
/** @defgroup RNG_LL RNG /** @defgroup RNG_LL RNG
* @{ * @{
*/ */
/* Private types -------------------------------------------------------------*/ /* Private types -------------------------------------------------------------*/
/* Private variables ---------------------------------------------------------*/ /* Private variables ---------------------------------------------------------*/
/* Private constants ---------------------------------------------------------*/ /* Private constants ---------------------------------------------------------*/
/* Private macros ------------------------------------------------------------*/ /* Private macros ------------------------------------------------------------*/
/* Exported types ------------------------------------------------------------*/ /* Exported types ------------------------------------------------------------*/
#if defined(USE_FULL_LL_DRIVER) #if defined(USE_FULL_LL_DRIVER)
/** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures /** @defgroup RNG_LL_ES_Init_Struct RNG Exported Init structures
* @{ * @{
*/ */
#if defined(RNG_CR_CED) #if defined(RNG_CR_CED)
/** /**
* @brief LL RNG Init Structure Definition * @brief LL RNG Init Structure Definition
*/ */
typedef struct typedef struct
{ {
uint32_t ClockErrorDetection; /*!< Clock error detection. uint32_t ClockErrorDetection; /*!< Clock error detection.
This parameter can be one value of @ref RNG_LL_CED. This parameter can be one value of @ref RNG_LL_CED.
This parameter can be modified using unitary functions @ref LL_RNG_EnableClkErrorDetect(). */ This parameter can be modified using unitary functions @ref LL_RNG_EnableClkErrorDetect(). */
}LL_RNG_InitTypeDef; }LL_RNG_InitTypeDef;
#endif /* defined(RNG_CR_CED) */ #endif /* defined(RNG_CR_CED) */
/** /**
* @} * @}
*/ */
#endif /* USE_FULL_LL_DRIVER */ #endif /* USE_FULL_LL_DRIVER */
/* Exported constants --------------------------------------------------------*/ /* Exported constants --------------------------------------------------------*/
/** @defgroup RNG_LL_Exported_Constants RNG Exported Constants /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
* @{ * @{
*/ */
#if defined(RNG_CR_CED) #if defined(RNG_CR_CED)
/** @defgroup RNG_LL_CED Clock Error Detection /** @defgroup RNG_LL_CED Clock Error Detection
* @{ * @{
*/ */
#define LL_RNG_CED_ENABLE 0x00000000U /*!< Clock error detection enabled */ #define LL_RNG_CED_ENABLE 0x00000000U /*!< Clock error detection enabled */
#define LL_RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */ #define LL_RNG_CED_DISABLE RNG_CR_CED /*!< Clock error detection disabled */
/** /**
* @} * @}
*/ */
#endif /* defined(RNG_CR_CED) */ #endif /* defined(RNG_CR_CED) */
/** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
* @brief Flags defines which can be used with LL_RNG_ReadReg function * @brief Flags defines which can be used with LL_RNG_ReadReg function
* @{ * @{
*/ */
#define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */ #define LL_RNG_SR_DRDY RNG_SR_DRDY /*!< Register contains valid random data */
#define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */ #define LL_RNG_SR_CECS RNG_SR_CECS /*!< Clock error current status */
#define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */ #define LL_RNG_SR_SECS RNG_SR_SECS /*!< Seed error current status */
#define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */ #define LL_RNG_SR_CEIS RNG_SR_CEIS /*!< Clock error interrupt status */
#define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */ #define LL_RNG_SR_SEIS RNG_SR_SEIS /*!< Seed error interrupt status */
/** /**
* @} * @}
*/ */
/** @defgroup RNG_LL_EC_IT IT Defines /** @defgroup RNG_LL_EC_IT IT Defines
* @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros * @brief IT defines which can be used with LL_RNG_ReadReg and LL_RNG_WriteReg macros
* @{ * @{
*/ */
#define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */ #define LL_RNG_CR_IE RNG_CR_IE /*!< RNG Interrupt enable */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported macro ------------------------------------------------------------*/ /* Exported macro ------------------------------------------------------------*/
/** @defgroup RNG_LL_Exported_Macros RNG Exported Macros /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
* @{ * @{
*/ */
/** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
* @{ * @{
*/ */
/** /**
* @brief Write a value in RNG register * @brief Write a value in RNG register
* @param __INSTANCE__ RNG Instance * @param __INSTANCE__ RNG Instance
* @param __REG__ Register to be written * @param __REG__ Register to be written
* @param __VALUE__ Value to be written in the register * @param __VALUE__ Value to be written in the register
* @retval None * @retval None
*/ */
#define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__)) #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
/** /**
* @brief Read a value in RNG register * @brief Read a value in RNG register
* @param __INSTANCE__ RNG Instance * @param __INSTANCE__ RNG Instance
* @param __REG__ Register to be read * @param __REG__ Register to be read
* @retval Register value * @retval Register value
*/ */
#define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__) #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
/* Exported functions --------------------------------------------------------*/ /* Exported functions --------------------------------------------------------*/
/** @defgroup RNG_LL_Exported_Functions RNG Exported Functions /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
* @{ * @{
*/ */
/** @defgroup RNG_LL_EF_Configuration RNG Configuration functions /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
* @{ * @{
*/ */
/** /**
* @brief Enable Random Number Generation * @brief Enable Random Number Generation
* @rmtoll CR RNGEN LL_RNG_Enable * @rmtoll CR RNGEN LL_RNG_Enable
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
{ {
SET_BIT(RNGx->CR, RNG_CR_RNGEN); SET_BIT(RNGx->CR, RNG_CR_RNGEN);
} }
/** /**
* @brief Disable Random Number Generation * @brief Disable Random Number Generation
* @rmtoll CR RNGEN LL_RNG_Disable * @rmtoll CR RNGEN LL_RNG_Disable
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
{ {
CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN); CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
} }
/** /**
* @brief Check if Random Number Generator is enabled * @brief Check if Random Number Generator is enabled
* @rmtoll CR RNGEN LL_RNG_IsEnabled * @rmtoll CR RNGEN LL_RNG_IsEnabled
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN)); return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN));
} }
#if defined(RNG_CR_CED) #if defined(RNG_CR_CED)
/** /**
* @brief Enable RNG Clock Error Detection * @brief Enable RNG Clock Error Detection
* @rmtoll CR CED LL_RNG_EnableClkErrorDetect * @rmtoll CR CED LL_RNG_EnableClkErrorDetect
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_EnableClkErrorDetect(RNG_TypeDef *RNGx)
{ {
CLEAR_BIT(RNGx->CR, RNG_CR_CED); CLEAR_BIT(RNGx->CR, RNG_CR_CED);
} }
/** /**
* @brief Disable RNG Clock Error Detection * @brief Disable RNG Clock Error Detection
* @rmtoll CR CED LL_RNG_DisableClkErrorDetect * @rmtoll CR CED LL_RNG_DisableClkErrorDetect
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_DisableClkErrorDetect(RNG_TypeDef *RNGx)
{ {
SET_BIT(RNGx->CR, RNG_CR_CED); SET_BIT(RNGx->CR, RNG_CR_CED);
} }
/** /**
* @brief Check if RNG Clock Error Detection is enabled * @brief Check if RNG Clock Error Detection is enabled
* @rmtoll CR CED LL_RNG_IsEnabledClkErrorDetect * @rmtoll CR CED LL_RNG_IsEnabledClkErrorDetect
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsEnabledClkErrorDetect(RNG_TypeDef *RNGx)
{ {
return (!(READ_BIT(RNGx->CR, RNG_CR_CED) == (RNG_CR_CED))); return (!(READ_BIT(RNGx->CR, RNG_CR_CED) == (RNG_CR_CED)));
} }
#endif /* defined(RNG_CR_CED) */ #endif /* defined(RNG_CR_CED) */
/** /**
* @} * @}
*/ */
/** @defgroup RNG_LL_EF_FLAG_Management FLAG Management /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
* @{ * @{
*/ */
/** /**
* @brief Indicate if the RNG Data ready Flag is set or not * @brief Indicate if the RNG Data ready Flag is set or not
* @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY * @rmtoll SR DRDY LL_RNG_IsActiveFlag_DRDY
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY)); return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY));
} }
/** /**
* @brief Indicate if the Clock Error Current Status Flag is set or not * @brief Indicate if the Clock Error Current Status Flag is set or not
* @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS * @rmtoll SR CECS LL_RNG_IsActiveFlag_CECS
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS)); return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS));
} }
/** /**
* @brief Indicate if the Seed Error Current Status Flag is set or not * @brief Indicate if the Seed Error Current Status Flag is set or not
* @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS * @rmtoll SR SECS LL_RNG_IsActiveFlag_SECS
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS)); return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS));
} }
/** /**
* @brief Indicate if the Clock Error Interrupt Status Flag is set or not * @brief Indicate if the Clock Error Interrupt Status Flag is set or not
* @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS * @rmtoll SR CEIS LL_RNG_IsActiveFlag_CEIS
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS)); return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS));
} }
/** /**
* @brief Indicate if the Seed Error Interrupt Status Flag is set or not * @brief Indicate if the Seed Error Interrupt Status Flag is set or not
* @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS * @rmtoll SR SEIS LL_RNG_IsActiveFlag_SEIS
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS)); return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS));
} }
/** /**
* @brief Clear Clock Error interrupt Status (CEIS) Flag * @brief Clear Clock Error interrupt Status (CEIS) Flag
* @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS * @rmtoll SR CEIS LL_RNG_ClearFlag_CEIS
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
{ {
WRITE_REG(RNGx->SR, ~RNG_SR_CEIS); WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
} }
/** /**
* @brief Clear Seed Error interrupt Status (SEIS) Flag * @brief Clear Seed Error interrupt Status (SEIS) Flag
* @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS * @rmtoll SR SEIS LL_RNG_ClearFlag_SEIS
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
{ {
WRITE_REG(RNGx->SR, ~RNG_SR_SEIS); WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
} }
/** /**
* @} * @}
*/ */
/** @defgroup RNG_LL_EF_IT_Management IT Management /** @defgroup RNG_LL_EF_IT_Management IT Management
* @{ * @{
*/ */
/** /**
* @brief Enable Random Number Generator Interrupt * @brief Enable Random Number Generator Interrupt
* (applies for either Seed error, Clock Error or Data ready interrupts) * (applies for either Seed error, Clock Error or Data ready interrupts)
* @rmtoll CR IE LL_RNG_EnableIT * @rmtoll CR IE LL_RNG_EnableIT
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
{ {
SET_BIT(RNGx->CR, RNG_CR_IE); SET_BIT(RNGx->CR, RNG_CR_IE);
} }
/** /**
* @brief Disable Random Number Generator Interrupt * @brief Disable Random Number Generator Interrupt
* (applies for either Seed error, Clock Error or Data ready interrupts) * (applies for either Seed error, Clock Error or Data ready interrupts)
* @rmtoll CR IE LL_RNG_DisableIT * @rmtoll CR IE LL_RNG_DisableIT
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval None * @retval None
*/ */
__STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx) __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
{ {
CLEAR_BIT(RNGx->CR, RNG_CR_IE); CLEAR_BIT(RNGx->CR, RNG_CR_IE);
} }
/** /**
* @brief Check if Random Number Generator Interrupt is enabled * @brief Check if Random Number Generator Interrupt is enabled
* (applies for either Seed error, Clock Error or Data ready interrupts) * (applies for either Seed error, Clock Error or Data ready interrupts)
* @rmtoll CR IE LL_RNG_IsEnabledIT * @rmtoll CR IE LL_RNG_IsEnabledIT
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval State of bit (1 or 0). * @retval State of bit (1 or 0).
*/ */
__STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
{ {
return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE)); return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE));
} }
/** /**
* @} * @}
*/ */
/** @defgroup RNG_LL_EF_Data_Management Data Management /** @defgroup RNG_LL_EF_Data_Management Data Management
* @{ * @{
*/ */
/** /**
* @brief Return32-bit Random Number value * @brief Return32-bit Random Number value
* @rmtoll DR RNDATA LL_RNG_ReadRandData32 * @rmtoll DR RNDATA LL_RNG_ReadRandData32
* @param RNGx RNG Instance * @param RNGx RNG Instance
* @retval Generated 32-bit random value * @retval Generated 32-bit random value
*/ */
__STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx) __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
{ {
return (uint32_t)(READ_REG(RNGx->DR)); return (uint32_t)(READ_REG(RNGx->DR));
} }
/** /**
* @} * @}
*/ */
#if defined(USE_FULL_LL_DRIVER) #if defined(USE_FULL_LL_DRIVER)
/** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
* @{ * @{
*/ */
#if defined(RNG_CR_CED) #if defined(RNG_CR_CED)
ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct); ErrorStatus LL_RNG_Init(RNG_TypeDef *RNGx, LL_RNG_InitTypeDef *RNG_InitStruct);
void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct); void LL_RNG_StructInit(LL_RNG_InitTypeDef *RNG_InitStruct);
#endif /* defined(RNG_CR_CED) */ #endif /* defined(RNG_CR_CED) */
ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx); ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
/** /**
* @} * @}
*/ */
#endif /* USE_FULL_LL_DRIVER */ #endif /* USE_FULL_LL_DRIVER */
/** /**
* @} * @}
*/ */
/** /**
* @} * @}
*/ */
#endif /* defined(RNG) */ #endif /* defined(RNG) */
/** /**
* @} * @}
*/ */
#ifdef __cplusplus #ifdef __cplusplus
} }
#endif #endif
#endif /* __STM32L4xx_LL_RNG_H */ #endif /* __STM32L4xx_LL_RNG_H */
/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/ /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/

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ext/hal/st/stm32cube/stm32l4xx/drivers/include/stm32l4xx_ll_rtc.h
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