From b308d83d458add9b1421bbd5171859ede36f36b5 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Benjamin=20Bj=C3=B6rnsson?= Date: Fri, 17 Mar 2023 16:35:28 +0100 Subject: [PATCH] drivers: watchdog: add watchdog support on STM32C0-series MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add support for independent watchdog and window watchdog on the STM32C0-series. Signed-off-by: Benjamin Björnsson --- drivers/watchdog/wdt_iwdg_stm32.c | 2 +- drivers/watchdog/wdt_wwdg_stm32.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/watchdog/wdt_iwdg_stm32.c b/drivers/watchdog/wdt_iwdg_stm32.c index df3d42d83a7..57f250c3dfa 100644 --- a/drivers/watchdog/wdt_iwdg_stm32.c +++ b/drivers/watchdog/wdt_iwdg_stm32.c @@ -92,7 +92,7 @@ static int iwdg_stm32_setup(const struct device *dev, uint8_t options) if (options & WDT_OPT_PAUSE_HALTED_BY_DBG) { #if defined(CONFIG_SOC_SERIES_STM32F0X) LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU); -#elif defined(CONFIG_SOC_SERIES_STM32G0X) +#elif defined(CONFIG_SOC_SERIES_STM32C0X) || defined(CONFIG_SOC_SERIES_STM32G0X) LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU); #elif defined(CONFIG_SOC_SERIES_STM32L0X) LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU); diff --git a/drivers/watchdog/wdt_wwdg_stm32.c b/drivers/watchdog/wdt_wwdg_stm32.c index f75bade6ae4..b6e7d90a1a0 100644 --- a/drivers/watchdog/wdt_wwdg_stm32.c +++ b/drivers/watchdog/wdt_wwdg_stm32.c @@ -170,7 +170,7 @@ static int wwdg_stm32_setup(const struct device *dev, uint8_t options) LL_APB1_GRP2_EnableClock(LL_APB1_GRP2_PERIPH_DBGMCU); #elif defined(CONFIG_SOC_SERIES_STM32L0X) LL_APB2_GRP1_EnableClock(LL_APB2_GRP1_PERIPH_DBGMCU); -#elif defined(CONFIG_SOC_SERIES_STM32G0X) +#elif defined(CONFIG_SOC_SERIES_STM32C0X) || defined(CONFIG_SOC_SERIES_STM32G0X) LL_APB1_GRP1_EnableClock(LL_APB1_GRP1_PERIPH_DBGMCU); #endif #if defined(CONFIG_SOC_SERIES_STM32H7X)